2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
22 #include <isl/schedule.h>
23 #include <isl/schedule_node.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
29 #include "gpu_array_tile.h"
30 #include "gpu_group.h"
32 #include "ppcg_options.h"
35 struct gpu_array_info
;
37 /* Collect all references to the given array and store pointers to them
40 * If the array contains structures, then there is no need to collect
41 * the references since we will not be computing any reference groups.
43 static void collect_references(struct gpu_prog
*prog
,
44 struct gpu_array_info
*array
)
49 if (array
->has_compound_element
)
53 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
54 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
55 struct gpu_stmt_access
*access
;
57 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
59 name
= isl_map_get_tuple_name(access
->access
,
61 if (name
&& !strcmp(array
->name
, name
))
67 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
71 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
72 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
73 struct gpu_stmt_access
*access
;
75 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
77 name
= isl_map_get_tuple_name(access
->access
,
79 if (!name
|| strcmp(array
->name
, name
))
82 array
->refs
[n
++] = access
;
87 /* Compute and return the extent of "array", taking into account the set of
90 * In particular, the extent in the outer dimension is taken
91 * from "accessed", while the extents in the remaining dimensions
92 * are taken from array->extent.
94 * The extent in the outer dimension cannot be taken from array->extent
95 * because that may be unbounded. Furthermore, even if it is bounded,
96 * it may be larger than the piece of the array that is being accessed.
98 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
99 __isl_keep isl_set
*accessed
)
106 extent
= isl_set_copy(array
->extent
);
108 n_index
= isl_set_dim(accessed
, isl_dim_set
);
112 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
113 outer
= isl_set_copy(accessed
);
114 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
115 extent
= isl_set_flat_product(outer
, extent
);
116 id
= isl_set_get_tuple_id(accessed
);
117 extent
= isl_set_set_tuple_id(extent
, id
);
122 /* Is the array "array" being extracted a read-only scalar?
124 * That is, is "array" a scalar that is never possibly written to.
125 * An array containing structures is never considered to be a scalar.
127 static int is_read_only_scalar(struct gpu_array_info
*array
,
128 struct gpu_prog
*prog
)
131 isl_union_map
*write
;
134 if (array
->has_compound_element
)
136 if (array
->n_index
!= 0)
139 write
= isl_union_map_copy(prog
->may_write
);
140 space
= isl_set_universe(isl_space_copy(array
->space
));
141 write
= isl_union_map_intersect_range(write
,
142 isl_union_set_from_set(space
));
143 empty
= isl_union_map_is_empty(write
);
144 isl_union_map_free(write
);
149 /* Compute bounds on the host array "pa" based on the corresponding
150 * accessed elements in "arrays"
151 * and collect all references to the array.
152 * Store the results in "info".
154 * If the array is zero-dimensional and does not contain structures,
155 * i.e., if the array is a scalar, we check whether it is read-only.
156 * We also check whether the array is accessed at all.
158 static int extract_array_info(struct gpu_prog
*prog
,
159 struct gpu_array_info
*info
, struct pet_array
*pa
,
160 __isl_keep isl_union_set
*arrays
)
166 isl_set
*accessed
, *extent
;
168 n_index
= isl_set_dim(pa
->extent
, isl_dim_set
);
169 name
= isl_set_get_tuple_name(pa
->extent
);
170 bounds
= isl_alloc_array(prog
->ctx
, isl_pw_aff
*, n_index
);
174 info
->space
= isl_set_get_space(pa
->extent
);
175 info
->name
= strdup(name
);
176 info
->n_index
= n_index
;
177 info
->bound
= bounds
;
178 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
180 info
->type
= strdup(pa
->element_type
);
181 info
->size
= pa
->element_size
;
182 info
->local
= pa
->declared
&& !pa
->exposed
;
183 info
->has_compound_element
= pa
->element_is_record
;
184 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
186 accessed
= isl_union_set_extract_set(arrays
,
187 isl_space_copy(info
->space
));
188 empty
= isl_set_is_empty(accessed
);
189 extent
= compute_extent(pa
, accessed
);
190 isl_set_free(accessed
);
191 info
->extent
= extent
;
194 info
->accessed
= !empty
;
195 for (i
= 0; i
< n_index
; ++i
) {
201 dom
= isl_set_copy(extent
);
202 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
204 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
205 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
206 fprintf(stderr
, "unable to determine extent of '%s' "
207 "in dimension %d\n", info
->name
, i
);
208 dom
= isl_set_free(dom
);
210 bound
= isl_set_dim_max(dom
, 0);
211 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
212 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
213 one
= isl_aff_zero_on_domain(ls
);
214 one
= isl_aff_add_constant_si(one
, 1);
215 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
216 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
219 if (!isl_pw_aff_is_cst(bound
))
223 collect_references(prog
, info
);
228 /* Remove independence from the order constraints "order" on array "array".
229 * Since the pairs of iterations in the filter relation of an independence
230 * are guaranteed to be completely independent by the user, there is
231 * no need to ensure that live ranges are ordered along thong pairs.
232 * We make an exception for local variables, though, as the independence
233 * guarantee does not apply to those.
235 * The order constraints are used in two places.
236 * Those on scalars are used in check_scalar_live_ranges to check if
237 * we need to force the scalar to be private. Any non-local scalar
238 * should not be forced scalar if it only appears in independent loops.
239 * Those on non-scalars are added to the coincidence constraints
240 * in compute_schedule because we do not support any array expansion.
241 * Accesses to non-local arrays should not prevent a loop from being
242 * considered coincident so we should indeed remove those constraints
243 * from the order constraints.
245 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
246 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
250 for (i
= 0; i
< prog
->scop
->pet
->n_independence
; ++i
) {
251 struct pet_independence
*pi
= prog
->scop
->pet
->independences
[i
];
252 if (isl_union_set_contains(pi
->local
, array
->space
))
255 order
= isl_union_map_subtract(order
,
256 isl_union_map_copy(pi
->filter
));
262 /* For each array in "prog", store the (untagged) order dependences
263 * derived from the array in array->dep_order.
264 * In particular, consider all references that access the given array
265 * and take the order dependences that have one of these references
266 * as source. (Since an order dependence relates two references to
267 * the same array, the target of these order dependences will also
268 * be one of these references.)
269 * Additionally, store the union of these array->dep_order relations
270 * for all non-scalar arrays in prog->array_order.
272 void collect_order_dependences(struct gpu_prog
*prog
)
276 isl_union_map
*accesses
;
278 space
= isl_union_map_get_space(prog
->read
);
279 prog
->array_order
= isl_union_map_empty(space
);
281 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
282 accesses
= isl_union_map_union(accesses
,
283 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
284 accesses
= isl_union_map_universe(accesses
);
285 accesses
= isl_union_map_apply_range(accesses
,
286 isl_union_map_copy(prog
->to_outer
));
288 for (i
= 0; i
< prog
->n_array
; ++i
) {
289 struct gpu_array_info
*array
= &prog
->array
[i
];
292 isl_union_map
*order
;
294 set
= isl_set_universe(isl_space_copy(array
->space
));
295 uset
= isl_union_set_from_set(set
);
296 uset
= isl_union_map_domain(
297 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
299 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
300 order
= isl_union_map_intersect_domain(order
, uset
);
301 order
= isl_union_map_zip(order
);
302 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
303 order
= remove_independences(prog
, array
, order
);
304 array
->dep_order
= order
;
306 if (gpu_array_is_scalar(array
) && !array
->has_compound_element
)
309 prog
->array_order
= isl_union_map_union(prog
->array_order
,
310 isl_union_map_copy(array
->dep_order
));
313 isl_union_map_free(accesses
);
316 /* Construct a gpu_array_info for each array referenced by prog->scop and
317 * collect them in prog->array.
319 * The sizes are based on the extents and the set of possibly accessed
320 * elements by "prog".
321 * If there are any member accesses involved, then they are first mapped
322 * to the outer arrays of structs.
324 * If we are allowing live range reordering, then also set
325 * the dep_order field. Otherwise leave it NULL.
327 static int collect_array_info(struct gpu_prog
*prog
)
331 isl_union_set
*arrays
;
333 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
334 arrays
= isl_union_set_union(arrays
,
335 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
337 arrays
= isl_union_set_apply(arrays
,
338 isl_union_map_copy(prog
->to_outer
));
340 arrays
= isl_union_set_coalesce(arrays
);
342 prog
->n_array
= prog
->scop
->pet
->n_array
;
343 prog
->array
= isl_calloc_array(prog
->ctx
,
344 struct gpu_array_info
, prog
->n_array
);
346 for (i
= 0; i
< prog
->scop
->pet
->n_array
; ++i
)
347 if (extract_array_info(prog
, &prog
->array
[i
],
348 prog
->scop
->pet
->arrays
[i
], arrays
) < 0)
351 isl_union_set_free(arrays
);
353 if (prog
->scop
->options
->live_range_reordering
)
354 collect_order_dependences(prog
);
359 static void free_array_info(struct gpu_prog
*prog
)
363 for (i
= 0; i
< prog
->n_array
; ++i
) {
364 int n_index
= prog
->array
[i
].n_index
;
365 free(prog
->array
[i
].type
);
366 free(prog
->array
[i
].name
);
367 for (j
= 0; j
< n_index
; ++j
)
368 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
369 isl_space_free(prog
->array
[i
].space
);
370 isl_set_free(prog
->array
[i
].extent
);
371 free(prog
->array
[i
].bound
);
372 free(prog
->array
[i
].refs
);
373 isl_union_map_free(prog
->array
[i
].dep_order
);
378 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
379 * as an array or through a pointer reference, but as a single data element.
380 * At the moment, scalars are represented as zero-dimensional arrays.
381 * Note that the single data element may be an entire structure.
383 int gpu_array_is_scalar(struct gpu_array_info
*array
)
385 return array
->n_index
== 0;
388 /* Is "array" a read-only scalar?
390 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
392 return array
->read_only_scalar
;
395 /* Return the set of parameter values for which the array has a positive
396 * size in all dimensions.
397 * If the sizes are only valid for some parameter values, then those
398 * constraints are also taken into account.
400 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
406 space
= isl_space_params(isl_space_copy(array
->space
));
407 guard
= isl_set_universe(space
);
409 for (i
= 0; i
< array
->n_index
; ++i
) {
411 isl_set
*guard_i
, *zero
;
413 bound
= isl_pw_aff_copy(array
->bound
[i
]);
414 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
415 zero
= isl_pw_aff_zero_set(bound
);
416 guard_i
= isl_set_subtract(guard_i
, zero
);
417 guard
= isl_set_intersect(guard
, guard_i
);
423 /* Internal data structure for extract_size_of_type.
424 * "type" specifies the name of the space that we want to extract.
425 * "res" is used to store the subset of that space.
427 struct ppcg_extract_size_data
{
432 /* This function is called for each set in a union_set.
433 * If the name of the set matches data->type, we store the
436 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
438 struct ppcg_extract_size_data
*data
= user
;
441 name
= isl_set_get_tuple_name(size
);
442 if (name
&& !strcmp(name
, data
->type
)) {
451 /* Given a union map { kernel[i] -> *[...] },
452 * return the range in the space called "type" for the kernel with
453 * sequence number "id".
455 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
456 const char *type
, int id
)
460 isl_union_set
*local_sizes
;
461 struct ppcg_extract_size_data data
= { type
, NULL
};
466 space
= isl_union_map_get_space(sizes
);
467 space
= isl_space_set_from_params(space
);
468 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
469 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
470 dom
= isl_set_universe(space
);
471 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
473 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
474 isl_union_map_copy(sizes
));
475 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
476 isl_union_set_free(local_sizes
);
480 /* Given a singleton set, extract the first (at most *len) elements
481 * of the single integer tuple into *sizes and update *len if needed.
483 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
491 dim
= isl_set_dim(set
, isl_dim_set
);
495 for (i
= 0; i
< *len
; ++i
) {
498 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
501 sizes
[i
] = isl_val_get_num_si(v
);
508 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
509 * if the option debug->dump_sizes is set.
511 static void set_used_sizes(struct gpu_gen
*gen
, const char *type
, int id
,
518 if (!gen
->options
->debug
->dump_sizes
)
521 space
= isl_union_map_get_space(gen
->used_sizes
);
522 space
= isl_space_set_from_params(space
);
523 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
524 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
525 space
= isl_space_from_domain(space
);
526 space
= isl_space_add_dims(space
, isl_dim_out
, len
);
527 space
= isl_space_set_tuple_name(space
, isl_dim_out
, type
);
529 map
= isl_map_universe(space
);
530 map
= isl_map_fix_si(map
, isl_dim_in
, 0, id
);
531 for (i
= 0; i
< len
; ++i
)
532 map
= isl_map_fix_si(map
, isl_dim_out
, i
, sizes
[i
]);
534 gen
->used_sizes
= isl_union_map_add_map(gen
->used_sizes
, map
);
537 /* Extract user specified "tile" sizes from the "sizes" command line option,
538 * defaulting to option->tile_size in each dimension.
539 * Add the effectively used sizes to gen->used_sizes.
541 static void read_tile_sizes(struct gpu_gen
*gen
)
545 struct ppcg_kernel
*kernel
= gen
->kernel
;
547 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, kernel
->tile_len
);
548 assert(gen
->tile_size
);
549 for (n
= 0; n
< kernel
->tile_len
; ++n
)
550 gen
->tile_size
[n
] = kernel
->options
->tile_size
;
552 size
= extract_sizes(gen
->sizes
, "tile", kernel
->id
);
553 read_sizes_from_set(size
, gen
->tile_size
, &kernel
->tile_len
);
554 set_used_sizes(gen
, "tile", kernel
->id
,
555 gen
->tile_size
, kernel
->tile_len
);
557 if (kernel
->n_parallel
> kernel
->tile_len
)
558 kernel
->n_parallel
= kernel
->tile_len
;
561 /* Extract user specified "block" sizes from the "sizes" command line option,
562 * after filling in some potentially useful defaults.
563 * Add the effectively used sizes to gen->used_sizes.
565 static void read_block_sizes(struct gpu_gen
*gen
)
570 n
= gen
->kernel
->n_parallel
;
571 gen
->n_block
= (n
<= 3) ? n
: 3;
572 switch (gen
->n_block
) {
574 gen
->block_dim
[0] = 512;
577 gen
->block_dim
[0] = 32;
578 gen
->block_dim
[1] = 16;
581 gen
->block_dim
[0] = 32;
582 gen
->block_dim
[1] = 4;
583 gen
->block_dim
[2] = 4;
587 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel
->id
);
588 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
589 set_used_sizes(gen
, "block", gen
->kernel
->id
,
590 gen
->block_dim
, gen
->n_block
);
593 /* Extract user specified "grid" sizes from the "sizes" command line option,
594 * after filling in some potentially useful defaults.
596 static void read_grid_sizes(struct ppcg_kernel
*kernel
,
597 __isl_keep isl_union_map
*sizes
)
601 if (kernel
->n_grid
> 2)
603 switch (kernel
->n_grid
) {
605 kernel
->grid_dim
[0] = 32768;
608 kernel
->grid_dim
[0] = 256;
609 kernel
->grid_dim
[1] = 256;
613 size
= extract_sizes(sizes
, "grid", kernel
->id
);
614 read_sizes_from_set(size
, kernel
->grid_dim
, &kernel
->n_grid
);
617 /* Extract user specified sizes from the "sizes" command line option
618 * after filling in some potentially useful defaults.
619 * Add the effectively used sizes to gen->used_sizes.
621 static void read_sizes(struct gpu_gen
*gen
)
623 struct ppcg_kernel
*kernel
= gen
->kernel
;
625 read_tile_sizes(gen
);
626 read_block_sizes(gen
);
627 read_grid_sizes(kernel
, gen
->sizes
);
628 set_used_sizes(gen
, "grid", kernel
->id
,
629 kernel
->grid_dim
, kernel
->n_grid
);
632 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
639 for (i
= 0; i
< n
; ++i
) {
640 struct gpu_stmt_access
*access
, *next
;
642 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
644 isl_id_free(access
->ref_id
);
645 isl_map_free(access
->access
);
646 isl_map_free(access
->tagged_access
);
650 isl_id_free(stmts
[i
].id
);
657 /* Construct a map from a domain of dimensionality "len"
658 * to a domain of dimensionality "len" + "tile_len" that tiles
659 * the "tile_len" coordinates starting at "first".
660 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
661 * "dim" prescribes the parameters.
663 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
664 int first
, int tile_len
, int *tile_size
)
671 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
672 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
673 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
674 ls
= isl_local_space_from_space(dim
);
676 for (i
= 0; i
< len
- tile_len
; ++i
) {
677 int j
= i
< first
? i
: i
+ tile_len
;
678 int k
= i
< first
? i
: i
+ 2 * tile_len
;
680 c
= isl_equality_alloc(isl_local_space_copy(ls
));
681 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
682 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
683 bmap
= isl_basic_map_add_constraint(bmap
, c
);
686 for (i
= 0; i
< tile_len
; ++i
) {
687 c
= isl_equality_alloc(isl_local_space_copy(ls
));
688 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
690 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
691 first
+ i
, tile_size
[i
]);
692 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
693 first
+ i
+ tile_len
, 1);
694 bmap
= isl_basic_map_add_constraint(bmap
, c
);
696 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
697 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
698 first
+ i
+ tile_len
, 1);
699 bmap
= isl_basic_map_add_constraint(bmap
, c
);
701 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
702 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
703 first
+ i
+ tile_len
, -1);
704 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
705 bmap
= isl_basic_map_add_constraint(bmap
, c
);
708 isl_local_space_free(ls
);
710 return isl_map_from_basic_map(bmap
);
713 /* Construct a map from a domain of dimensionality "len"
714 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
715 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
716 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
717 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
718 * that are projected out at the end.
719 * "dim" prescribes the parameters.
721 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
722 int first
, int wrap_len
, int *wrap_size
)
729 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
730 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
731 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
732 ls
= isl_local_space_from_space(dim
);
734 for (i
= 0; i
< len
; ++i
) {
735 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
737 c
= isl_equality_alloc(isl_local_space_copy(ls
));
738 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
739 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
740 bmap
= isl_basic_map_add_constraint(bmap
, c
);
743 for (i
= 0; i
< wrap_len
; ++i
) {
744 c
= isl_equality_alloc(isl_local_space_copy(ls
));
745 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
747 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
748 first
+ wrap_len
+ i
, 1);
749 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
750 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
751 bmap
= isl_basic_map_add_constraint(bmap
, c
);
753 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
754 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
755 first
+ wrap_len
+ i
, 1);
756 bmap
= isl_basic_map_add_constraint(bmap
, c
);
758 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
759 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
760 first
+ wrap_len
+ i
, -1);
761 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
762 bmap
= isl_basic_map_add_constraint(bmap
, c
);
765 isl_local_space_free(ls
);
767 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
768 first
+ 2 * wrap_len
, wrap_len
);
770 return isl_map_from_basic_map(bmap
);
773 /* Tile the B loops over the tile sizes and then tile/wrap
774 * the T1 loops over the blocks.
776 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
777 __isl_take isl_union_map
*sched
)
779 struct ppcg_kernel
*kernel
= gen
->kernel
;
781 isl_map
*tiling
, *block_tiling
;
783 dim
= isl_union_map_get_space(sched
);
784 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
785 gen
->tile_first
, kernel
->tile_len
, gen
->tile_size
);
787 if (gen
->options
->wrap
)
788 block_tiling
= wrap(dim
, gen
->untiled_len
+ kernel
->tile_len
,
789 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
791 block_tiling
= tile(dim
, gen
->untiled_len
+ kernel
->tile_len
,
792 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
794 gen
->tiled_len
= gen
->untiled_len
+ kernel
->tile_len
+ kernel
->n_grid
;
796 tiling
= isl_map_apply_range(tiling
, block_tiling
);
798 sched
= isl_union_map_apply_range(sched
,
799 isl_union_map_from_map(tiling
));
801 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
806 /* Equate the "T1P" iterators in the tiled schedule "sched"
807 * to the block dimensions.
809 static __isl_give isl_union_map
*parametrize_tiled_schedule(
810 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
812 struct ppcg_kernel
*kernel
= gen
->kernel
;
816 dim
= isl_union_map_get_space(sched
);
817 par
= parametrization(dim
, gen
->tiled_len
,
818 gen
->tile_first
+ kernel
->n_grid
, kernel
->block_ids
);
819 sched
= isl_union_map_intersect_range(sched
,
820 isl_union_set_from_set(par
));
825 /* Tile/wrap the P1 loops over the threads.
827 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
828 __isl_take isl_union_map
*sched
)
830 struct ppcg_kernel
*kernel
= gen
->kernel
;
835 dim
= isl_union_map_get_space(sched
);
837 if (gen
->options
->wrap
)
838 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
839 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
841 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
842 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
843 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
845 sched
= isl_union_map_apply_range(sched
,
846 isl_union_map_from_map(tiling
));
848 par
= parametrization(dim
, gen
->thread_tiled_len
,
849 gen
->tile_first
+ kernel
->tile_len
+
850 kernel
->n_grid
+ gen
->n_block
, kernel
->thread_ids
);
851 sched
= isl_union_map_intersect_range(sched
,
852 isl_union_set_from_set(par
));
854 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
859 /* If the user asked for it, scale the shared memory tile loops
860 * (T1T and T2) of "sched" by gen->tile_size[i].
861 * If we are not performing "wrapping", then additionally scale the T1P
862 * loops by kernel->grid_dim[i].
864 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
865 __isl_take isl_union_map
*sched
)
867 struct ppcg_kernel
*kernel
= gen
->kernel
;
870 isl_basic_map
*scale
;
874 if (!gen
->options
->scale_tile_loops
)
877 dim
= isl_union_map_get_space(sched
);
878 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
879 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
880 scale
= isl_basic_map_universe(isl_space_copy(dim
));
881 ls
= isl_local_space_from_space(dim
);
883 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
886 if (i
>= gen
->tile_first
&&
887 i
< gen
->tile_first
+ kernel
->n_grid
) {
888 f
= gen
->tile_size
[i
- gen
->tile_first
];
889 if (!gen
->options
->wrap
)
890 f
*= kernel
->grid_dim
[i
- gen
->tile_first
];
891 } else if (i
>= gen
->tile_first
+ kernel
->n_grid
&&
892 i
< gen
->tile_first
+ kernel
->n_grid
+
894 f
= gen
->tile_size
[i
-
895 (gen
->tile_first
+ kernel
->n_grid
)];
898 c
= isl_equality_alloc(isl_local_space_copy(ls
));
899 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
900 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
901 scale
= isl_basic_map_add_constraint(scale
, c
);
904 isl_local_space_free(ls
);
906 sched
= isl_union_map_apply_range(sched
,
907 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
912 /* If we are not performing "wrapping" and if the user asked for it,
913 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
915 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
916 __isl_take isl_union_map
*sched
)
920 isl_basic_map
*scale
;
924 if (gen
->options
->wrap
)
926 if (!gen
->options
->scale_tile_loops
)
929 dim
= isl_union_map_get_space(sched
);
930 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
931 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
932 scale
= isl_basic_map_universe(isl_space_copy(dim
));
933 ls
= isl_local_space_from_space(dim
);
935 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
938 if (i
>= gen
->shared_len
&&
939 i
< gen
->shared_len
+ gen
->n_block
)
940 f
= gen
->block_dim
[i
- gen
->shared_len
];
942 c
= isl_equality_alloc(isl_local_space_copy(ls
));
943 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
944 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
945 scale
= isl_basic_map_add_constraint(scale
, c
);
948 isl_local_space_free(ls
);
950 sched
= isl_union_map_apply_range(sched
,
951 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
956 /* If we are not performing "wrapping" and if the user asked for it,
957 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
959 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
960 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
964 isl_basic_map
*scale
;
968 if (gen
->options
->wrap
)
970 if (!gen
->options
->scale_tile_loops
)
973 dim
= isl_union_map_get_space(sched
);
974 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
975 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
976 scale
= isl_basic_map_universe(isl_space_copy(dim
));
977 ls
= isl_local_space_from_space(dim
);
979 for (i
= 0; i
< len
; ++i
) {
982 if (i
>= first
&& i
< first
+ n_tile
)
983 f
= gen
->kernel
->block_dim
[i
- first
];
985 c
= isl_equality_alloc(isl_local_space_copy(ls
));
986 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
987 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
988 scale
= isl_basic_map_add_constraint(scale
, c
);
991 isl_local_space_free(ls
);
993 sched
= isl_union_map_apply_range(sched
,
994 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
999 /* Add parameters p[i] with identifiers "ids" to "set",
1000 * with bounds to 0 <= p[i] < size[i].
1002 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1003 int *size
, __isl_keep isl_id_list
*ids
)
1008 len
= isl_id_list_n_id(ids
);
1009 nparam
= isl_set_dim(set
, isl_dim_param
);
1010 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1012 for (i
= 0; i
< len
; ++i
) {
1015 id
= isl_id_list_get_id(ids
, i
);
1016 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1017 set
= isl_set_lower_bound_si(set
, isl_dim_param
, nparam
+ i
, 0);
1018 set
= isl_set_upper_bound_si(set
, isl_dim_param
,
1019 nparam
+ i
, size
[i
] - 1);
1025 /* Add "len" parameters p[i] with identifiers "ids" and intersect "set"
1028 * { : 0 <= p[i] < size[i] }
1030 * or an overapproximation.
1032 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1033 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1034 __isl_keep isl_id_list
*ids
)
1039 isl_local_space
*ls
;
1041 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1042 nparam
= isl_set_dim(set
, isl_dim_param
);
1043 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1045 for (i
= 0; i
< len
; ++i
) {
1048 id
= isl_id_list_get_id(ids
, i
);
1049 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1052 space
= isl_space_params(isl_set_get_space(set
));
1053 ls
= isl_local_space_from_space(space
);
1054 for (i
= 0; i
< len
; ++i
) {
1055 isl_pw_aff
*param
, *size_i
, *zero
;
1058 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1059 isl_dim_param
, nparam
+ i
);
1061 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1062 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1063 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1064 set
= isl_set_intersect_params(set
, bound
);
1066 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1067 bound
= isl_pw_aff_ge_set(param
, zero
);
1068 set
= isl_set_intersect_params(set
, bound
);
1070 isl_local_space_free(ls
);
1075 /* Construct a map from an access to group->array to the corresponding
1076 * shared/private memory tile.
1077 * The map is of the form
1079 * { [D[i] -> A[a]] -> T[t] }
1081 * where D represents the initial shared_len dimensions
1082 * of the computed schedule.
1084 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1086 struct gpu_array_tile
*tile
;
1087 isl_multi_aff
*tiling
;
1089 tile
= group
->private_tile
;
1091 tile
= group
->shared_tile
;
1093 tiling
= isl_multi_aff_copy(tile
->tiling
);
1095 return isl_map_from_multi_aff(tiling
);
1098 /* Given a schedule that iterates over all elements in a piece of an array,
1099 * perform tiling/wrapping over the threads.
1101 * In particular, we tile the final iterators so that the final thread
1102 * dimension runs over the final array dimension.
1103 * However, if those final iterators have only a single iteration,
1104 * we try to tile earlier iterators instead.
1106 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1107 __isl_take isl_map
*sched
)
1110 isl_union_map
*usched
;
1113 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1117 n_tile
= gen
->kernel
->n_block
;
1118 if (n_tile
> nvar
) {
1120 sched
= isl_map_insert_dims(sched
,
1121 isl_dim_out
, 0, n_tile
- nvar
);
1122 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1123 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1127 first
= nvar
- n_tile
;
1129 for (; first
> 0; first
--)
1130 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1133 dim
= isl_map_get_space(sched
);
1134 dim
= isl_space_params(dim
);
1135 if (gen
->options
->wrap
)
1136 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1137 n_tile
, gen
->kernel
->block_dim
);
1139 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1140 n_tile
, gen
->kernel
->block_dim
);
1141 sched
= isl_map_apply_range(sched
, tiling
);
1143 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
,
1144 gen
->kernel
->thread_ids
);
1145 sched
= isl_map_intersect_range(sched
, par
);
1147 usched
= isl_union_map_from_map(sched
);
1148 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1150 sched
= isl_map_from_union_map(usched
);
1155 /* Return the union of all tagged access relations in the group.
1157 static __isl_give isl_union_map
*group_tagged_access_relation(
1158 struct gpu_array_ref_group
*group
)
1161 isl_union_map
*access
;
1163 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1164 for (i
= 0; i
< group
->n_ref
; ++i
) {
1167 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1168 access
= isl_union_map_union(access
,
1169 isl_union_map_from_map(map_i
));
1175 /* Return the extent of "array", recomputed from the bounds.
1176 * The recomputed extent may be simpler than the original extent.
1178 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1183 isl_local_space
*ls
;
1186 id
= isl_set_get_tuple_id(array
->extent
);
1187 space
= isl_set_get_space(array
->extent
);
1188 extent
= isl_set_universe(isl_space_copy(space
));
1189 ls
= isl_local_space_from_space(space
);
1190 for (i
= 0; i
< array
->n_index
; ++i
) {
1196 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1198 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1200 index
= isl_pw_aff_from_aff(aff
);
1201 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1202 bound
= isl_pw_aff_from_range(bound
);
1203 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1204 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1206 lt
= isl_pw_aff_lt_set(index
, bound
);
1207 extent
= isl_set_intersect(extent
, lt
);
1209 isl_local_space_free(ls
);
1215 /* Return a map from the first shared_len dimensions of the computed
1216 * schedule to the array tile in
1217 * global memory that corresponds to the shared memory copy.
1219 * In particular, return a map
1225 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1229 * 0 <= a <= array_size - 1 (2)
1231 * Note that if some stride has been detected (i.e., when
1232 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1233 * to the shifted and scaled down version.
1235 * Constraints (1) are obtained by mapping the size constraints on the
1236 * shared/private memory tile back to the access relation.
1237 * Constraints (2) are obtained from the (recomputed) extent.
1239 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1242 int n_index
= group
->array
->n_index
;
1248 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1249 space
= isl_space_range(space
);
1250 local
= isl_set_universe(space
);
1251 for (i
= 0; i
< n_index
; ++i
) {
1254 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1255 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1256 bound
= isl_val_sub_ui(bound
, 1);
1257 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1259 local
= isl_set_preimage_multi_aff(local
,
1260 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1261 tile
= isl_set_unwrap(local
);
1262 extent
= array_extent(group
->array
);
1263 tile
= isl_map_intersect_range(tile
, extent
);
1268 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1269 * return the corresponding mapping from the AST schedule to
1270 * to the first shared_len dimensions of the schedule computed by PPCG.
1272 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1273 __isl_take isl_pw_multi_aff
*iterator_map
)
1275 isl_union_map
*umap
;
1277 isl_map
*map
, *sched
;;
1279 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1280 space
= isl_space_from_domain(space
);
1281 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1283 umap
= isl_union_map_copy(gen
->shared_sched
);
1284 umap
= isl_union_map_apply_range(umap
,
1285 isl_union_map_copy(gen
->shared_proj
));
1286 map
= isl_union_map_extract_map(umap
, space
);
1287 isl_union_map_free(umap
);
1289 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1290 sched
= isl_map_detect_equalities(sched
);
1292 return isl_pw_multi_aff_from_map(sched
);
1295 /* Set unroll[j] if the input dimension j is involved in
1296 * the index expression represented by ma.
1298 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1302 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1303 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1306 for (i
= 0; i
< n_out
; ++i
) {
1309 aff
= isl_multi_aff_get_aff(ma
, i
);
1310 for (j
= 0; j
< n_in
; ++j
)
1311 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1317 isl_multi_aff_free(ma
);
1321 /* Given an array pos mapping input dimensions to the corresponding
1322 * output dimension, construct the corresponding map.
1324 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1329 isl_basic_map
*bmap
;
1330 isl_local_space
*ls
;
1332 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1333 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1334 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1335 ls
= isl_local_space_from_space(dim
);
1337 for (i
= 0; i
< len
; ++i
) {
1338 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1339 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1341 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1343 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1345 isl_local_space_free(ls
);
1347 return isl_map_from_basic_map(bmap
);
1350 /* Remove the private tiles from all array reference groups,
1351 * except for the groups of arrays that are marked force_private.
1353 static void remove_private_tiles(struct gpu_gen
*gen
)
1357 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1358 struct gpu_local_array_info
*local
= &gen
->kernel
->array
[i
];
1360 if (local
->force_private
)
1363 for (j
= 0; j
< local
->n_group
; ++j
) {
1364 struct gpu_array_ref_group
*group
= local
->groups
[j
];
1366 group
->private_tile
=
1367 gpu_array_tile_free(group
->private_tile
);
1372 /* Find all loops involved in any of the index expressions for any of
1373 * the private accesses, move them innermost and then mark them as
1374 * requiring unrolling by setting gen->first_unroll.
1375 * The loops involved should all be parallel because of the checks
1376 * we performed in check_private_group_access. Moving them innermost
1377 * is therefore a valid transformation.
1379 * If any of the arrays are marked force_private, however, then
1380 * those loops may not be parallel with respect to the marked arrays.
1381 * If any of the loops would have to be moved innermost for the
1382 * (non forced) private accesses and if there are any force_private
1383 * arrays, then we revert the decision to map the selected arrays
1384 * to private memory. An alternative solution would be to expand
1385 * the force_private arrays.
1387 * Loops up to gen->shared_len are generated before the mapping to
1388 * threads is applied. They should therefore be ignored.
1390 * We compute the hidden equalities of the schedule first
1391 * since we will need them in our calls to isl_pw_multi_aff_from_map
1392 * and because we want to make sure that the same equalities
1393 * are also available to the code generator.
1395 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1396 __isl_take isl_union_map
*sched
)
1398 struct ppcg_kernel
*kernel
= gen
->kernel
;
1400 int unroll
[gen
->thread_tiled_len
];
1401 int perm
[gen
->thread_tiled_len
];
1404 int len
= gen
->shared_len
+ kernel
->n_parallel
+ gen
->n_block
;
1406 gen
->first_unroll
= -1;
1408 sched
= isl_union_map_detect_equalities(sched
);
1409 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1411 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1412 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1414 for (j
= 0; j
< array
->n_group
; ++j
) {
1415 isl_union_map
*access
;
1417 isl_pw_multi_aff
*pma
;
1419 if (!array
->groups
[j
]->private_tile
)
1422 access
= gpu_array_ref_group_access_relation(
1423 array
->groups
[j
], 1, 1);
1424 access
= isl_union_map_apply_domain(access
,
1425 isl_union_map_copy(sched
));
1427 acc
= isl_map_from_union_map(access
);
1428 pma
= isl_pw_multi_aff_from_map(acc
);
1429 isl_pw_multi_aff_foreach_piece(pma
,
1430 &check_unroll
, unroll
);
1432 isl_pw_multi_aff_free(pma
);
1436 for (i
= gen
->shared_len
; i
< len
; ++i
)
1443 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1447 if (kernel
->any_force_private
) {
1448 remove_private_tiles(gen
);
1453 for (i
= 0; i
< gen
->shared_len
; ++i
)
1455 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1458 gen
->first_unroll
= j
- gen
->shared_len
;
1459 for (i
= gen
->shared_len
; i
< len
; ++i
)
1463 dim
= isl_union_map_get_space(sched
);
1464 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1465 sched
= isl_union_map_apply_range(sched
,
1466 isl_union_map_from_map(permute
));
1471 /* Construct a map with input the shared tile loops and the loops that
1472 * will be wrapped around the threads that relates these later loops
1473 * to the thread indices and then projects them out.
1475 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
1477 struct ppcg_kernel
*kernel
= gen
->kernel
;
1484 dim
= isl_union_map_get_space(gen
->shared_sched
);
1486 if (gen
->options
->wrap
)
1487 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1488 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1490 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1491 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1495 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
1496 gen
->tile_first
+ kernel
->tile_len
+
1497 kernel
->n_grid
+ gen
->n_block
, kernel
->thread_ids
);
1499 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
1500 priv
= isl_map_intersect_range(priv
, par
);
1502 dim
= isl_map_get_space(priv
);
1503 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
1504 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
1505 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
1508 priv
= isl_map_apply_range(priv
, proj
);
1513 /* If max_shared_memory is not set to infinity (-1), then make
1514 * sure that the total amount of shared memory required by the
1515 * array reference groups mapped to shared memory is no larger
1516 * than this maximum.
1518 * We apply a greedy approach and discard (keep in global memory)
1519 * those groups that would result in a total memory size that
1520 * is larger than the maximum.
1522 * This function should be called after any function that may
1523 * affect the decision on whether to place a reference group
1524 * in private, shared or global memory.
1526 static void check_shared_memory_bound(struct gpu_gen
*gen
)
1529 isl_val
*left
, *size
;
1531 if (gen
->options
->max_shared_memory
< 0)
1534 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
1536 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1537 struct gpu_local_array_info
*local
= &gen
->kernel
->array
[i
];
1539 for (j
= 0; j
< local
->n_group
; ++j
) {
1540 struct gpu_array_ref_group
*group
;
1542 group
= local
->groups
[j
];
1543 if (group
->private_tile
)
1545 if (!group
->shared_tile
)
1548 size
= gpu_array_tile_size(group
->shared_tile
);
1549 size
= isl_val_mul_ui(size
, local
->array
->size
);
1551 if (isl_val_le(size
, left
)) {
1552 left
= isl_val_sub(left
, size
);
1557 group
->shared_tile
=
1558 gpu_array_tile_free(group
->shared_tile
);
1565 /* Compute a tiling for all the array reference groups.
1567 static void compute_group_tilings(struct gpu_gen
*gen
)
1571 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1572 struct gpu_local_array_info
*array
= &gen
->kernel
->array
[i
];
1574 for (j
= 0; j
< array
->n_group
; ++j
)
1575 gpu_array_ref_group_compute_tiling(array
->groups
[j
]);
1579 /* Take tiled_sched, project it onto the shared tile loops and
1580 * the loops that will be wrapped over the threads and
1581 * store the result in gen->shared_sched.
1582 * Also compute a projection that projects out the loops that will be
1583 * wrapped over the threads and store this projection in gen->shared_proj.
1585 static void compute_shared_sched(struct gpu_gen
*gen
)
1590 isl_union_map
*sched
;
1592 sched
= isl_union_map_copy(gen
->tiled_sched
);
1594 dim
= isl_union_map_get_space(sched
);
1595 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
1596 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1598 dim
= isl_union_map_get_space(sched
);
1599 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
1601 gen
->shared_sched
= sched
;
1602 gen
->shared_proj
= isl_union_map_from_map(proj
);
1605 /* Compute the size of a bounding box around the origin and "set",
1606 * where "set" is assumed to contain only non-negative elements.
1607 * In particular, compute the maximal value of "set" in each direction
1610 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
1611 __isl_take isl_set
*context
)
1614 isl_multi_pw_aff
*mpa
;
1616 context
= isl_set_params(context
);
1617 n
= isl_set_dim(set
, isl_dim_set
);
1618 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
1619 for (i
= 0; i
< n
; ++i
) {
1624 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
1625 bound
= isl_pw_aff_coalesce(bound
);
1626 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
1628 space
= isl_pw_aff_get_domain_space(bound
);
1629 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1630 one
= isl_aff_add_constant_si(one
, 1);
1631 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
1632 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
1635 isl_set_free(context
);
1640 /* Compute the effective grid size as a list of the sizes in each dimension.
1642 * The grid size specified by the user or set by default
1643 * in read_grid_sizes() and applied in tile_schedule(),
1644 * may be too large for the given code in the sense that
1645 * it may contain blocks that don't need to execute anything.
1646 * We therefore don't return this grid size, but instead the
1647 * smallest grid size that ensures that all blocks that actually
1648 * execute code are included in the grid.
1650 * We first extract a description of the grid, i.e., the possible values
1651 * of the block ids, from gen->tiled_sched.
1652 * The block ids are parameters in gen->tiled_sched.
1653 * We simply need to change them into set dimensions.
1655 * Then, for each block dimension, we compute the maximal value of the block id
1658 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
1659 struct ppcg_kernel
*kernel
)
1664 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
1665 grid
= isl_set_from_params(grid
);
1666 grid
= isl_set_add_dims(grid
, isl_dim_set
, kernel
->n_grid
);
1667 for (i
= 0; i
< kernel
->n_grid
; ++i
) {
1671 id
= isl_id_list_get_id(kernel
->block_ids
, i
);
1672 pos
= isl_set_find_dim_by_id(grid
, isl_dim_param
, id
);
1675 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
1676 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
1679 return extract_size(grid
, isl_set_copy(kernel
->context
));
1682 /* Compute the size of a fixed bounding box around the origin and "set",
1683 * where "set" is assumed to contain only non-negative elements,
1684 * and store the results in "size".
1685 * In particular, compute the maximal value of "set" in each direction
1688 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
1691 isl_local_space
*ls
;
1694 n
= isl_set_dim(set
, isl_dim_set
);
1695 ls
= isl_local_space_from_space(isl_set_get_space(set
));
1696 obj
= isl_aff_zero_on_domain(ls
);
1697 for (i
= 0; i
< n
; ++i
) {
1700 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
1701 max
= isl_set_max_val(set
, obj
);
1702 size
[i
] = isl_val_get_num_si(max
) + 1;
1704 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
1710 /* Compute the effective block size as a list of the sizes in each dimension
1711 * and store the sizes in kernel->block_dim.
1713 * The block size specified by the user or set by default
1714 * in read_block_sizes() and applied in thread_tile_schedule(),
1715 * may be too large for the given code in the sense that
1716 * it may contain threads that don't need to execute anything.
1717 * We therefore don't store this block size in kernel->block_dim,
1718 * but instead the smallest block size that ensures that all threads
1719 * that actually execute code are included in the block.
1721 * The current implementation eliminates all parameters, ensuring
1722 * that the size is a fixed constant in each dimension.
1723 * In principle we could also compute parametric sizes.
1724 * We would have to make sure to project out all b%d and t%d parameters,
1727 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
1732 isl_multi_pw_aff
*mpa
;
1734 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
1735 block
= isl_set_from_params(block
);
1736 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
1737 kernel
->n_block
= gen
->n_block
;
1738 for (i
= 0; i
< gen
->n_block
; ++i
) {
1742 id
= isl_id_list_get_id(kernel
->thread_ids
, i
);
1743 pos
= isl_set_find_dim_by_id(block
, isl_dim_param
, id
);
1746 block
= isl_set_equate(block
, isl_dim_param
, pos
,
1749 nparam
= isl_set_dim(block
, isl_dim_param
);
1750 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
1752 extract_fixed_size(block
, kernel
->block_dim
);
1755 struct ppcg_kernel
*ppcg_kernel_free(struct ppcg_kernel
*kernel
)
1762 isl_id_list_free(kernel
->block_ids
);
1763 isl_id_list_free(kernel
->thread_ids
);
1764 isl_multi_pw_aff_free(kernel
->grid_size
);
1765 isl_set_free(kernel
->context
);
1766 isl_union_set_free(kernel
->arrays
);
1767 isl_space_free(kernel
->space
);
1768 isl_ast_node_free(kernel
->tree
);
1770 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1771 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1773 for (j
= 0; j
< array
->n_group
; ++j
)
1774 gpu_array_ref_group_free(array
->groups
[j
]);
1775 free(array
->groups
);
1777 isl_pw_aff_list_free(array
->bound
);
1779 free(kernel
->array
);
1781 for (i
= 0; i
< kernel
->n_var
; ++i
) {
1782 free(kernel
->var
[i
].name
);
1783 isl_vec_free(kernel
->var
[i
].size
);
1792 /* Wrapper around ppcg_kernel_free for use as a isl_id_set_free_user callback.
1794 static void ppcg_kernel_free_wrap(void *user
)
1796 struct ppcg_kernel
*kernel
= user
;
1798 ppcg_kernel_free(kernel
);
1801 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
1802 struct ppcg_kernel_var
*var
)
1805 struct gpu_array_tile
*tile
;
1809 var
->array
= group
->array
;
1811 tile
= group
->private_tile
;
1812 var
->type
= ppcg_access_private
;
1814 tile
= group
->shared_tile
;
1815 var
->type
= ppcg_access_shared
;
1818 p
= isl_printer_to_str(ctx
);
1819 p
= gpu_array_ref_group_print_name(group
, p
);
1820 var
->name
= isl_printer_get_str(p
);
1821 isl_printer_free(p
);
1823 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
1825 for (j
= 0; j
< group
->array
->n_index
; ++j
)
1826 var
->size
= isl_vec_set_element_val(var
->size
, j
,
1827 isl_val_copy(tile
->bound
[j
].size
));
1830 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
1835 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1836 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1838 for (j
= 0; j
< array
->n_group
; ++j
) {
1839 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1840 if (group
->private_tile
|| group
->shared_tile
)
1846 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
1847 assert(kernel
->var
);
1850 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1851 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1853 for (j
= 0; j
< array
->n_group
; ++j
) {
1854 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1855 if (!group
->private_tile
&& !group
->shared_tile
)
1857 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
1863 /* Replace "pa" by the zero function defined over the universe domain
1864 * in the space of "pa".
1866 static __isl_give isl_pw_aff
*set_universally_zero(__isl_take isl_pw_aff
*pa
)
1871 space
= isl_space_domain(isl_pw_aff_get_space(pa
));
1872 isl_pw_aff_free(pa
);
1873 zero
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1875 return isl_pw_aff_from_aff(zero
);
1878 /* The sizes of the arrays on the host that have been computed by
1879 * extract_array_info may depend on the parameters. Use the extra
1880 * constraints on the parameters that are valid at "host_domain"
1881 * to simplify these expressions and store the results in kernel->array.
1883 * We only need these localized bounds for arrays that are accessed
1884 * by the current kernel. If we have found at least one reference group
1885 * then the array is accessed by the kernel. If the array has compound
1886 * elements then we skipped the construction of array reference groups.
1888 * The resulting sizes may be functions that are nowhere defined
1889 * in case the access function cannot possibly access anything inside
1890 * the kernel for some reason. If so, they are replaced by the zero
1891 * function. Since the access function cannot actually access anything,
1892 * there is no harm in printing the array sizes as zero.
1894 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
1895 __isl_keep isl_set
*host_domain
)
1900 context
= isl_set_copy(host_domain
);
1901 context
= isl_set_params(context
);
1903 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1904 struct gpu_local_array_info
*local
= &kernel
->array
[i
];
1905 isl_pw_aff_list
*bound
;
1908 if (local
->n_group
== 0 && !local
->array
->has_compound_element
)
1911 n_index
= local
->array
->n_index
;
1912 bound
= isl_pw_aff_list_alloc(gen
->ctx
, n_index
);
1914 for (j
= 0; j
< n_index
; ++j
) {
1918 pwaff
= isl_pw_aff_copy(local
->array
->bound
[j
]);
1919 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
1920 empty
= isl_pw_aff_is_empty(pwaff
);
1922 pwaff
= isl_pw_aff_free(pwaff
);
1924 pwaff
= set_universally_zero(pwaff
);
1925 bound
= isl_pw_aff_list_add(bound
, pwaff
);
1928 local
->n_index
= n_index
;
1929 local
->bound
= bound
;
1931 isl_set_free(context
);
1934 /* Create the array of gpu_local_array_info structures "array"
1935 * inside "kernel". The number of elements in this array is
1936 * the same as the number of arrays in "prog".
1937 * Initialize the "array" field of each local array to point
1938 * to the corresponding array in "prog".
1940 static struct ppcg_kernel
*ppcg_kernel_create_local_arrays(
1941 struct ppcg_kernel
*kernel
, struct gpu_prog
*prog
)
1946 ctx
= isl_set_get_ctx(prog
->context
);
1947 kernel
->array
= isl_calloc_array(ctx
,
1948 struct gpu_local_array_info
, prog
->n_array
);
1950 return ppcg_kernel_free(kernel
);
1951 kernel
->n_array
= prog
->n_array
;
1953 for (i
= 0; i
< prog
->n_array
; ++i
)
1954 kernel
->array
[i
].array
= &prog
->array
[i
];
1959 /* Find the element in gen->stmt that has the given "id".
1960 * Return NULL if no such gpu_stmt can be found.
1962 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
1966 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
1967 if (id
== prog
->stmts
[i
].id
)
1971 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
1974 void ppcg_kernel_stmt_free(void *user
)
1977 struct ppcg_kernel_stmt
*stmt
= user
;
1982 switch (stmt
->type
) {
1983 case ppcg_kernel_copy
:
1984 isl_ast_expr_free(stmt
->u
.c
.index
);
1985 isl_ast_expr_free(stmt
->u
.c
.local_index
);
1987 case ppcg_kernel_domain
:
1988 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
1990 case ppcg_kernel_sync
:
1997 /* Set the options of "context" to
1999 * { space -> [x] : x >= first }
2001 static __isl_give isl_ast_build
*set_unroll(
2002 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
2009 ctx
= isl_ast_build_get_ctx(build
);
2011 space
= isl_space_from_domain(space
);
2012 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
2013 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
2014 unroll
= isl_map_universe(space
);
2015 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
2016 opt
= isl_union_map_from_map(unroll
);
2018 build
= isl_ast_build_set_options(build
, opt
);
2023 /* Extend the schedule "schedule" with the part of "extension"
2024 * starting at "first" up to "len".
2026 static __isl_give isl_union_map
*extend_schedule(
2027 __isl_take isl_union_map
*schedule
,
2028 __isl_take isl_union_map
*extension
, int first
, int len
)
2032 isl_union_map
*umap
;
2035 space
= isl_union_map_get_space(schedule
);
2036 space
= isl_space_set_from_params(space
);
2037 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
2038 proj
= isl_set_identity(isl_set_universe(space
));
2039 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
2040 extension
= isl_union_map_apply_range(extension
,
2041 isl_union_map_from_map(proj
));
2043 schedule
= isl_union_map_range_product(schedule
, extension
);
2048 /* Return the gpu_stmt_access in the list "accesses" that corresponds
2051 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
2052 __isl_keep isl_id
*ref_id
)
2054 struct gpu_stmt_access
*access
;
2056 for (access
= accesses
; access
; access
= access
->next
)
2057 if (access
->ref_id
== ref_id
)
2063 /* Return the index of the array called "name" in the list of arrays.
2065 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
2069 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2070 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
2076 /* Internal data structure for the index and AST expression transformation
2077 * callbacks for pet_stmt_build_ast_exprs.
2079 * "accesses" is the list of gpu_stmt_access in the statement.
2080 * "iterator_map" expresses the statement iterators in terms of
2081 * the AST loop iterators.
2082 * "sched2shared" expresses the first shared_len dimensions of
2083 * the computed schedule in terms of the AST loop iterators.
2085 * The following fields are set in transform_index and used in transform_expr.
2086 * "array" is the array that is being accessed.
2087 * "global" is set if the global array is accessed (rather than
2088 * shared/private memory).
2089 * "local_array" refers to information on the array specialized
2090 * to the current kernel.
2092 struct ppcg_transform_data
{
2093 struct gpu_gen
*gen
;
2094 struct gpu_stmt_access
*accesses
;
2095 isl_pw_multi_aff
*iterator_map
;
2096 isl_pw_multi_aff
*sched2shared
;
2098 struct gpu_array_info
*array
;
2100 struct gpu_local_array_info
*local_array
;
2103 /* Return the name of the outer array (of structs) accessed by "access".
2105 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
2110 space
= isl_space_range(isl_map_get_space(access
));
2111 while (space
&& isl_space_is_wrapping(space
))
2112 space
= isl_space_domain(isl_space_unwrap(space
));
2113 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
2114 isl_space_free(space
);
2119 /* Return a pointer to the gpu_array_ref_group in "local"
2120 * that contains the reference "access".
2121 * Return NULL if no such group can be found.
2123 static struct gpu_array_ref_group
*find_ref_group(
2124 struct gpu_local_array_info
*local
, struct gpu_stmt_access
*access
)
2128 for (i
= 0; i
< local
->n_group
; ++i
) {
2129 struct gpu_array_ref_group
*group
= local
->groups
[i
];
2131 for (j
= 0; j
< group
->n_ref
; ++j
)
2132 if (group
->refs
[j
] == access
)
2139 /* Index transformation callback for pet_stmt_build_ast_exprs.
2141 * "index" expresses the array indices in terms of statement iterators
2143 * We first reformulate "index" in terms of the AST loop iterators.
2144 * Then we check if we are accessing the global array or
2145 * a shared/private copy. In the former case, we simply return
2146 * the updated index. If "index" is an affine expression rather
2147 * than an array access, then we also return the updated index here.
2149 * If no reference groups have been computed for the array,
2150 * then we can only be accessing the global array.
2152 * Otherwise, we apply the tiling to the index.
2153 * This tiling is of the form
2157 * The index is of the form
2161 * We update the tiling to refer to the AST loop iterators
2165 * and modify index to keep track of those iterators
2169 * Combining these two yields a tiled index expression in terms
2170 * of the AST loop iterators
2174 static __isl_give isl_multi_pw_aff
*transform_index(
2175 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
2178 struct ppcg_transform_data
*data
= user
;
2179 struct gpu_stmt_access
*access
;
2180 struct gpu_array_ref_group
*group
;
2181 struct gpu_array_tile
*tile
;
2182 isl_pw_multi_aff
*iterator_map
;
2186 isl_multi_pw_aff
*tiling
;
2187 isl_pw_multi_aff
*pma
;
2188 isl_multi_pw_aff
*mpa
;
2192 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
2193 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
2195 access
= find_access(data
->accesses
, ref_id
);
2198 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
2201 name
= get_outer_array_name(access
->access
);
2202 i
= find_array_index(data
->gen
, name
);
2204 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
2205 "cannot find array",
2206 return isl_multi_pw_aff_free(index
));
2207 data
->array
= &data
->gen
->prog
->array
[i
];
2208 data
->local_array
= &data
->gen
->kernel
->array
[i
];
2210 group
= find_ref_group(data
->local_array
, access
);
2216 tile
= group
->private_tile
;
2218 tile
= group
->shared_tile
;
2219 data
->global
= !tile
;
2223 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
2224 space
= isl_space_map_from_set(space
);
2225 pma
= isl_pw_multi_aff_identity(space
);
2226 pma
= isl_pw_multi_aff_product(
2227 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
2228 tiling
= isl_multi_pw_aff_from_multi_aff(
2229 isl_multi_aff_copy(tile
->tiling
));
2230 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
2232 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
2233 space
= isl_space_map_from_set(space
);
2234 mpa
= isl_multi_pw_aff_identity(space
);
2235 index
= isl_multi_pw_aff_range_product(mpa
, index
);
2236 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
2241 /* Dereference "expr" by adding an index [0].
2242 * The original "expr" is assumed not to have any indices.
2244 * If "expr" is a member access, then the dereferencing needs
2245 * to be applied to the structure argument of this member access.
2247 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
2250 isl_ast_expr
*arg0
, *res
;
2251 isl_ast_expr_list
*list
;
2253 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2255 return isl_ast_expr_free(expr
);
2256 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2257 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2260 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2261 arg
= dereference(arg
);
2262 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2263 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2267 isl_ast_expr_free(arg0
);
2269 ctx
= isl_ast_expr_get_ctx(expr
);
2270 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
2271 list
= isl_ast_expr_list_from_ast_expr(res
);
2272 res
= isl_ast_expr_get_op_arg(expr
, 0);
2273 res
= isl_ast_expr_access(res
, list
);
2274 isl_ast_expr_free(expr
);
2279 /* Linearize the index expression "expr" based on the array bounds
2282 * That is, transform expression
2284 * A[i_0][i_1]...[i_n]
2288 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
2290 * where b_0, b_1, ..., b_n are the bounds on the array.
2292 * If the base of "expr" is a member access, then the linearization needs
2293 * to be applied to the structure argument of this member access.
2295 * In the base case, if "expr" has no arguments (other than the name of
2296 * the array), then we are passing an entire array to a function.
2297 * In this case, there is nothing to linearize.
2298 * Note that at this point an expression with no arguments can
2299 * only be an entire array because the scalar case and
2300 * the case of single struct are handled by the caller.
2302 * If the number of specified index expressions in "expr"
2303 * is smaller than the dimension of the accessed array,
2304 * then the missing i_j also do not appear in the linearized expression.
2305 * Furthermore, since such an expression does not refer to a single
2306 * element while the default linearized expression would refer to
2307 * a single element, we return the expression
2309 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
2311 * instead. Note that because of the special case handling above,
2312 * we can assume here that here that there is at least one index expression.
2314 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
2315 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
2322 isl_ast_expr_list
*list
;
2323 isl_ast_build
*build
;
2325 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2326 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2327 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2330 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2331 arg
= gpu_local_array_info_linearize_index(array
, arg
);
2332 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2333 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2337 isl_ast_expr_free(arg0
);
2339 if (isl_ast_expr_get_op_n_arg(expr
) == 1)
2342 ctx
= isl_ast_expr_get_ctx(expr
);
2343 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
2344 build
= isl_ast_build_from_context(context
);
2346 n
= isl_ast_expr_get_op_n_arg(expr
);
2347 res
= isl_ast_expr_get_op_arg(expr
, 1);
2348 for (i
= 1; i
< array
->n_index
; ++i
) {
2349 isl_pw_aff
*bound_i
;
2350 isl_ast_expr
*expr_i
;
2352 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
);
2353 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
2354 res
= isl_ast_expr_mul(res
, expr_i
);
2358 expr_i
= isl_ast_expr_get_op_arg(expr
, i
+ 1);
2359 res
= isl_ast_expr_add(res
, expr_i
);
2362 isl_ast_build_free(build
);
2364 if (1 + array
->n_index
> n
) {
2365 res
= isl_ast_expr_add(isl_ast_expr_get_op_arg(expr
, 0), res
);
2367 list
= isl_ast_expr_list_from_ast_expr(res
);
2368 res
= isl_ast_expr_get_op_arg(expr
, 0);
2369 res
= isl_ast_expr_access(res
, list
);
2372 isl_ast_expr_free(expr
);
2377 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
2379 * If the AST expression refers to an array that is not accessed
2380 * at all, then this means the value of the expression is not used,
2381 * so we might as well print zero (NULL pointer) instead.
2383 * If the AST expression refers to a global scalar that is not
2384 * a read-only scalar, then its address was passed to the kernel and
2385 * we need to dereference it.
2387 * If the AST expression refers to an access to a global array,
2388 * then we linearize the access exploiting the bounds in data->local_array.
2390 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
2391 __isl_keep isl_id
*id
, void *user
)
2393 struct ppcg_transform_data
*data
= user
;
2397 if (!data
->array
->accessed
) {
2400 ctx
= isl_ast_expr_get_ctx(expr
);
2401 isl_ast_expr_free(expr
);
2402 return isl_ast_expr_from_val(isl_val_zero(ctx
));
2404 if (gpu_array_is_read_only_scalar(data
->array
))
2408 if (data
->array
->n_index
== 0)
2409 return dereference(expr
);
2410 if (!data
->array
->linearize
)
2413 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
2416 /* This function is called for each instance of a user statement
2419 * We attach a struct ppcg_kernel_stmt to the "node", containing
2420 * a computed AST expression for each access.
2421 * These AST expressions are computed from iterator_map,
2422 * which expresses the domain
2423 * elements in terms of the generated loops, and sched2shared,
2424 * which expresses the first shared_len dimensions of the schedule
2425 * computed by PPCG in terms of the generated loops.
2427 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
2428 __isl_keep isl_ast_build
*build
, void *user
)
2430 struct ppcg_transform_data data
;
2431 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2432 struct ppcg_kernel_stmt
*stmt
;
2434 isl_pw_multi_aff
*sched2shared
;
2436 isl_pw_multi_aff
*iterator_map
;
2437 isl_ast_expr
*expr
, *arg
;
2438 isl_union_map
*schedule
;
2440 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2442 return isl_ast_node_free(node
);
2444 expr
= isl_ast_node_user_get_expr(node
);
2445 arg
= isl_ast_expr_get_op_arg(expr
, 0);
2446 id
= isl_ast_expr_get_id(arg
);
2448 schedule
= isl_ast_build_get_schedule(build
);
2449 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
2450 iterator_map
= isl_pw_multi_aff_from_map(map
);
2451 sched2shared
= compute_sched_to_shared(gen
,
2452 isl_pw_multi_aff_copy(iterator_map
));
2454 stmt
->type
= ppcg_kernel_domain
;
2455 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
2456 if (!stmt
->u
.d
.stmt
)
2457 isl_die(gen
->ctx
, isl_error_internal
,
2458 "statement not found", goto error
);
2461 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
2462 data
.iterator_map
= iterator_map
;
2463 data
.sched2shared
= sched2shared
;
2464 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
2465 build
, &transform_index
, &data
,
2466 &transform_expr
, &data
);
2469 isl_pw_multi_aff_free(iterator_map
);
2470 isl_pw_multi_aff_free(sched2shared
);
2471 isl_ast_expr_free(arg
);
2472 isl_ast_expr_free(expr
);
2474 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2475 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2476 return isl_ast_node_set_annotation(node
, id
);
2479 isl_pw_multi_aff_free(iterator_map
);
2480 ppcg_kernel_stmt_free(stmt
);
2481 isl_pw_multi_aff_free(sched2shared
);
2482 return isl_ast_node_free(node
);
2485 /* This function is called when code has been generated for the shared
2486 * tile loops. The "schedule" refers only to the original statements.
2488 * We extend the schedule with that part of gen->local_sched that hasn't
2489 * been taken into account yet. This introduces parameters referring
2490 * to thread ids in the schedule, so we add them (with the appropriate
2491 * bounds to the context as well).
2492 * Finally, we set the appropriate unrolling options
2493 * if gen->first_unroll is set.
2495 static __isl_give isl_ast_node
*create_domain_leaf(
2496 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
2499 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2501 isl_union_map
*sched
;
2504 isl_id_list
*iterators
;
2507 schedule
= extend_schedule(schedule
,
2508 isl_union_map_copy(gen
->local_sched
),
2509 gen
->shared_len
, gen
->thread_tiled_len
);
2511 space
= isl_ast_build_get_schedule_space(build
);
2512 set
= isl_set_universe(space
);
2513 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2514 gen
->kernel
->thread_ids
);
2515 build
= isl_ast_build_restrict(build
, set
);
2517 n
= gen
->thread_tiled_len
- gen
->shared_len
;
2519 if (gen
->first_unroll
>= 0) {
2520 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
2521 build
= set_unroll(build
, space
, gen
->first_unroll
);
2523 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2524 build
= isl_ast_build_set_iterators(build
, iterators
);
2525 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
2526 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
2527 isl_ast_build_free(build
);
2532 /* This function is called for each statement node in the AST of the code
2533 * for copying to or from shared/private memory.
2534 * Attach a pointer to a ppcg_kernel_stmt representing the copy
2535 * statement to the node.
2536 * The statement name is "read" or "write", depending on whether we are
2537 * reading from global memory or writing to global memory.
2538 * The name of the T space is {shared,private}_<array>.
2540 * The schedule is of the form
2544 * where A refers to a piece of an array and T to the corresponding
2545 * shifted tile. We split this schedule into mappings L -> A and L -> T
2546 * and store the corresponding expressions in stmt->index and stmt->local_index,
2547 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
2549 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
2550 __isl_keep isl_ast_build
*build
, void *user
)
2552 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2553 struct ppcg_kernel_stmt
*stmt
;
2557 isl_map
*access
, *local_access
, *map
;
2558 isl_pw_multi_aff
*pma
;
2562 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2564 return isl_ast_node_free(node
);
2566 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
2567 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
2568 stmt
->u
.c
.read
= !strcmp(type
, "read");
2569 access
= isl_map_reverse(access
);
2570 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
2571 local_access
= isl_map_copy(access
);
2573 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
2574 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
2575 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2576 access
= isl_map_apply_range(access
, map
);
2577 pma
= isl_pw_multi_aff_from_map(access
);
2578 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2579 stmt
->u
.c
.index
= expr
;
2581 map
= isl_map_range_map(isl_map_universe(space
));
2582 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
2583 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2584 local_access
= isl_map_apply_range(local_access
, map
);
2585 pma
= isl_pw_multi_aff_from_map(local_access
);
2586 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2587 stmt
->u
.c
.local_index
= expr
;
2589 stmt
->u
.c
.array
= gen
->copy_group
->array
;
2590 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
2591 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
2592 stmt
->type
= ppcg_kernel_copy
;
2594 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2595 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2596 return isl_ast_node_set_annotation(node
, id
);
2599 /* Given a schedule of the form
2603 * (with S the first shared_len dimensions of the computed schedule,
2604 * A the array and L the schedule correponding to the generated loops),
2605 * indicating where to copy the array elements that need to be copied,
2606 * construct code for performing the copying.
2608 * "group" is the array reference group that is being copied
2609 * "type" is either "read" or "write"
2610 * private is set if copying needs to be performed to/from registers
2612 * We first construct a mapping to a shifted tile of the array,
2614 * [S -> A] -> T(S,A) (1)
2616 * If private is set, then we also use this mapping as a schedule
2617 * (which is already thread-specific and will be completely unrolled).
2618 * Otherwise, we wrap/tile the range over the threads.
2621 * [S -> A] -> T'(S,A)
2623 * Combined with the given schedule, we have
2625 * [S -> A] -> [L -> T'(S,A)] (2)
2627 * From the shifted tile mapping, we construct a mapping
2629 * [S -> A] -> [A -> T(S,A)]
2631 * and apply it to the schedule (2), obtaining
2633 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
2635 * Note that we can project out S because it is uniquely defined by L.
2637 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
2638 __isl_take isl_map
*sched
,
2639 const char *type
, struct gpu_array_ref_group
*group
,
2640 __isl_take isl_ast_build
*build
, int private)
2644 isl_map
*schedule
, *shift
, *map
;
2646 isl_id_list
*iterators
;
2649 shift
= shift_access(group
);
2651 schedule
= isl_map_copy(shift
);
2652 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
2654 schedule
= tile_access_schedule(gen
, schedule
);
2656 n
= isl_map_dim(schedule
, isl_dim_out
);
2657 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
2658 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2659 gen
->kernel
->thread_ids
);
2661 schedule
= isl_map_range_product(sched
, schedule
);
2663 space
= isl_space_domain(isl_map_get_space(shift
));
2664 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
2665 map
= isl_map_range_product(map
, shift
);
2667 schedule
= isl_map_apply_domain(schedule
, map
);
2669 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
2671 build
= isl_ast_build_restrict(build
, set
);
2673 gen
->copy_group
= group
;
2676 space
= isl_space_range(isl_map_get_space(schedule
));
2677 space
= isl_space_range(isl_space_unwrap(space
));
2678 build
= set_unroll(build
, space
, 0);
2680 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2681 build
= isl_ast_build_set_iterators(build
, iterators
);
2682 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
2683 tree
= isl_ast_build_node_from_schedule_map(build
,
2684 isl_union_map_from_map(schedule
));
2685 isl_ast_build_free(build
);
2690 /* Return code for reading into or writing from shared memory
2691 * the given array reference group.
2693 * If we are performing a read from global memory to shared memory and
2694 * if the array involved is not a scalar, then we copy
2695 * the entire tile to shared memory. This may result in some extra
2696 * elements getting copied, but it should lead to simpler code
2697 * (which means that fewer registers may be needed) and less divergence.
2699 * Otherwise, we only copy the elements that will be read or have been written
2703 * The input "sched" is of the form.
2707 * with S the first shared_len dimensions of the computed schedule,
2708 * A the array and L the schedule correponding to the generated loops.
2710 * We first drop "type",
2714 * If the above conditions are satisfied, we project out A,
2719 * and then introduce the group tile [S -> T], resulting in
2723 static __isl_give isl_ast_node
*copy_group_shared_accesses(
2724 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2725 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2729 isl_union_map
*access
;
2731 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2732 read
= !strcmp(type
, "read");
2734 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2736 if (read
&& !gpu_array_is_scalar(group
->array
)) {
2740 space
= isl_space_domain(isl_map_get_space(sched
));
2741 space
= isl_space_unwrap(space
);
2742 map
= isl_map_domain_map(isl_map_universe(space
));
2743 sched
= isl_map_apply_domain(sched
, map
);
2745 map
= group_tile(group
);
2746 map
= isl_map_reverse(isl_map_domain_map(map
));
2747 sched
= isl_map_apply_domain(sched
, map
);
2750 return copy_access(gen
, sched
, type
, group
, build
, 0);
2753 /* Return code for reading into or writing from private memory
2754 * the given array reference group.
2756 * Let S be the first shared_len dimensions of the computed schedule,
2757 * D the iteration domains, A the array and L the schedule correponding
2758 * to the generated loops.
2759 * "sched" is of the form
2763 * where type is either "read" or "write".
2764 * We apply the privatization D -> S(t), with t the thread ids,
2765 * to the access relation D -> A to obtain the privatized access relation
2769 * We drop the type from "sched" and intersect with the privatized access
2770 * relation to obtain
2774 static __isl_give isl_ast_node
*copy_group_private_accesses(
2775 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2776 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2780 isl_union_map
*priv
;
2781 isl_union_map
*access
;
2782 isl_map
*access_map
;
2784 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2785 read
= !strcmp(type
, "read");
2787 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2788 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2791 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
2792 access
= isl_union_map_apply_domain(access
, priv
);
2793 access_map
= isl_map_from_union_map(access
);
2795 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2796 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
2798 return copy_access(gen
, sched
, type
, group
, build
, 1);
2801 /* Return code for reading into or writing from shared or private memory.
2803 * "schedule" is of the form
2807 * with S be the first shared_len dimensions of the computed schedule,
2808 * A the array and L the schedule correponding to the generated loops.
2809 * The array reference group is attached to "type".
2811 static __isl_give isl_ast_node
*create_access_leaf(
2812 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2813 __isl_take isl_ast_build
*build
)
2815 struct gpu_array_ref_group
*group
;
2818 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
2819 group
= isl_id_get_user(id
);
2822 if (group
->private_tile
)
2823 return copy_group_private_accesses(gen
, group
, schedule
,
2826 return copy_group_shared_accesses(gen
, group
, schedule
,
2830 /* Create a domain node representing a synchronization.
2832 static __isl_give isl_ast_node
*create_sync_leaf(
2833 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2834 __isl_take isl_ast_build
*build
)
2836 struct ppcg_kernel_stmt
*stmt
;
2842 isl_map_free(schedule
);
2844 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2848 stmt
->type
= ppcg_kernel_sync
;
2850 space
= isl_ast_build_get_schedule_space(build
);
2851 space
= isl_space_from_domain(space
);
2852 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
2853 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
2854 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
2855 node
= isl_ast_node_alloc_user(expr
);
2856 isl_ast_build_free(build
);
2858 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2859 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2860 return isl_ast_node_set_annotation(node
, id
);
2863 /* This function is called during the code generation at the point
2864 * where the schedule domain element is completely determined by
2865 * the generated code. The input schedule contains the original
2866 * statements as well as synchronization and copy "statements".
2867 * The latter are scheduled at different points than any of the original
2868 * statements, so they will only arrive here in isolation.
2870 * If the current schedule only refers to a single statement,
2871 * we check if it is a copy or synchronization statement and
2872 * call the appropriate functions.
2873 * Otherwise, we assume we are dealing with the original statements
2874 * and we call create_domain_leaf.
2876 static __isl_give isl_ast_node
*create_kernel_leaf(
2877 __isl_take isl_ast_build
*build
, void *user
)
2879 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2881 isl_union_map
*schedule
;
2884 schedule
= isl_ast_build_get_schedule(build
);
2886 if (isl_union_map_n_map(schedule
) != 1)
2887 return create_domain_leaf(schedule
, build
, user
);
2889 map
= isl_map_from_union_map(schedule
);
2890 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
2891 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
2892 return create_access_leaf(gen
, map
, build
);
2893 if (!strcmp(name
, "sync"))
2894 return create_sync_leaf(gen
, map
, build
);
2896 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
2899 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
2900 * have value 0) and all even schedule dimensions as "unroll".
2902 * That is, the options look as follows
2904 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
2905 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
2907 * The even positions are used to be able to schedule copying blocks
2908 * and synchronization before or after each level of the shared memory
2909 * tile loops and we want to make sure that code for these is generated
2910 * separately (within each level).
2912 static __isl_give isl_ast_build
*set_atomic_and_unroll(
2913 __isl_take isl_ast_build
*build
,
2914 __isl_take isl_space
*space
, int sched_len
)
2920 isl_local_space
*ls
;
2923 ctx
= isl_ast_build_get_ctx(build
);
2925 space
= isl_space_params(space
);
2926 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
2927 space
= isl_space_from_domain(space
);
2928 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
2929 map
= isl_map_universe(isl_space_copy(space
));
2930 for (i
= 0; i
< sched_len
; i
+= 2)
2931 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
2932 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2933 c
= isl_equality_alloc(ls
);
2934 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2935 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2936 c
= isl_constraint_set_constant_si(c
, 1);
2937 map
= isl_map_add_constraint(map
, c
);
2938 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2939 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
2940 opt
= isl_union_map_from_map(map
);
2942 map
= isl_map_universe(space
);
2943 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2944 c
= isl_equality_alloc(ls
);
2945 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2946 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2947 map
= isl_map_add_constraint(map
, c
);
2948 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2949 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
2950 opt
= isl_union_map_add_map(opt
, map
);
2952 build
= isl_ast_build_set_options(build
, opt
);
2957 /* Return a map that maps a space of dimension gen->shared_len
2958 * to its last dimensions starting at gen->tile_first.
2959 * The range is of dimension
2961 * 2 * (gen->shared_len - gen->tile_first) + 1
2963 * The input dimensions are mapped to the odd dimensions in the output,
2964 * while the even dimensions (except 2*pos) are fixed to 0.
2965 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
2966 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
2967 * are mapped to the output. The remaining input dimensions are projected
2968 * out and the corresponding output dimensions are fixed to 0.
2970 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
2971 __isl_take isl_space
*space
, int pos
, int val
)
2976 space
= isl_space_set_from_params(space
);
2977 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
2978 space
= isl_space_map_from_set(space
);
2979 proj
= isl_map_identity(space
);
2980 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
2981 n
= gen
->shared_len
- gen
->tile_first
;
2982 for (i
= 0; i
<= n
; ++i
) {
2983 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
2985 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
2987 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
2993 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
2994 gen
->shared_len
- (gen
->tile_first
+ pos
));
2995 for (i
= pos
; i
< n
; ++i
)
2996 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
3001 /* Given the AST context schedule "schedule" and the mapping from
3002 * domains to the shared tile loops "shared_sched", add a schedule
3003 * for a synchronization operation at position "val" of loop level "pos".
3005 * schedule is of the form
3009 * (with D the iteration domains and L the already generated loops),
3010 * while shared_sched is of the form
3014 * We combine them into
3020 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3022 * and use the result as a schedule for "sync".
3024 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
3025 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3026 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
3029 isl_map
*proj
, *map
;
3031 shared_sched
= isl_union_map_copy(shared_sched
);
3032 schedule
= isl_union_map_copy(schedule
);
3034 space
= isl_union_map_get_space(shared_sched
);
3035 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
3036 map
= isl_map_from_union_map(schedule
);
3038 proj
= insert_even(gen
, space
, pos
, val
);
3039 map
= isl_map_apply_range(map
, proj
);
3040 map
= isl_map_from_range(isl_map_wrap(map
));
3041 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
3043 res
= isl_union_map_add_map(res
, map
);
3048 /* Given a set of wrapped references "ref", return the corresponding
3049 * access relations based on the tagged access relations "tagged".
3051 * The elements of "ref" are of the form
3055 * with D an iteration domains and R a reference.
3056 * The elements of "tagged" are of the form
3062 * Extend "tagged" to include the iteration domain in the range, i.e.,
3064 * [D -> R] -> [D -> A]
3066 * apply the result to "ref" and then unwrap the resulting set
3067 * to obtain relations of the form
3071 static __isl_give isl_union_map
*wrapped_reference_to_access(
3072 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
3074 isl_union_map
*tag2access
;
3076 tag2access
= isl_union_map_copy(tagged
);
3077 tag2access
= isl_union_map_universe(tag2access
);
3078 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
3079 tag2access
= isl_union_map_domain_map(tag2access
);
3080 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
3082 ref
= isl_union_set_coalesce(ref
);
3083 ref
= isl_union_set_apply(ref
, tag2access
);
3085 return isl_union_set_unwrap(ref
);
3088 /* Given an access relation "access" from "group", remove those reads
3089 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
3090 * communicate data within the same iteration of the last_shared dimension
3093 * If the access is a read then it is either an element of
3095 * live_in union (range flow)
3097 * where live_in and flow may be overapproximations, or
3098 * it reads an uninitialized value (that is not live-in because
3099 * there is an intermediate kill) or it reads a value that was
3100 * written within the same (compound) statement instance.
3101 * If the access is a write then it is either an element of
3103 * live_out union (domain flow)
3105 * or it writes a value that is never read (and is not live-out
3106 * because of an intermediate kill) or only
3107 * within the same (compound) statement instance.
3108 * In both cases, the access relation is also a subset of
3109 * the group access relation.
3111 * The cases where an uninitialized value is read or a value is written
3112 * that is never read or where the dataflow occurs within a statement
3113 * instance are also considered local and may also be removed.
3115 * Essentially, we compute the intersection of "access" with either
3117 * live_in union (range non-local-flow)
3121 * live_out union (domain non-local-flow)
3123 * We first construct a relation "local"
3125 * [[D -> R] -> [D' -> R']]
3127 * of pairs of domain iterations accessing the reference group
3128 * and references in the group that are scheduled to the same iteration
3129 * of the last_shared dimension.
3131 * If this relation does not intersect the dataflow dependences,
3132 * then there is nothing we can possibly remove, unless the dataflow
3133 * dependences themselves only relate a subset of the accesses.
3134 * In particular, the accesses may not be involved in any dataflow
3135 * dependences, either because they are uninitialized reads/dead writes
3136 * or because the dataflow occurs inside a statement instance.
3138 * Since the computation below may break up the access relation
3139 * into smaller pieces, we only perform the intersection with
3140 * the non-local dependent accesses if the local pairs
3141 * intersect the dataflow dependences. Otherwise, we intersect
3142 * with the universe of the non-local dependent accesses.
3143 * This should at least remove accesses from statements that
3144 * do not participate in any dependences.
3146 * In particular, we remove the "local" dataflow dependences from
3147 * the set of all dataflow dependences.
3148 * Note that if the potential dataflow dependences are an overapproximation
3149 * of the actual dataflow dependences, then the result remains an
3150 * overapproximation of the non-local dataflow dependences.
3151 * Copying to/from global memory is only needed for the references
3152 * in the domain/range of the result or for accesses that are live out/in
3153 * for the entire scop.
3155 * We therefore map the domain/range of the "external" relation
3156 * to the corresponding access relation and take the union with
3157 * the live out/in relation.
3159 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
3160 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
3164 isl_union_pw_multi_aff
*tagger
;
3165 isl_union_set
*domain
;
3167 isl_union_map
*sched
, *local
, *tagged
, *external
;
3168 isl_union_set
*tag_set
;
3171 if (isl_union_map_is_empty(access
))
3174 tagged
= group_tagged_access_relation(group
);
3176 sched
= isl_union_map_copy(gen
->sched
);
3178 space
= isl_union_map_get_space(sched
);
3179 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
3180 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3182 tagger
= isl_union_pw_multi_aff_copy(gen
->prog
->scop
->tagger
);
3183 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
3184 tagger
= isl_union_pw_multi_aff_intersect_domain(tagger
, domain
);
3185 sched
= isl_union_map_preimage_domain_union_pw_multi_aff(sched
, tagger
);
3187 local
= isl_union_map_apply_range(sched
,
3188 isl_union_map_reverse(isl_union_map_copy(sched
)));
3189 local
= isl_union_map_intersect(local
,
3190 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
3192 empty
= isl_union_map_is_empty(local
);
3194 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
3195 external
= isl_union_map_intersect_params(external
,
3196 isl_set_copy(gen
->prog
->scop
->context
));
3197 external
= isl_union_map_subtract(external
, local
);
3200 tag_set
= isl_union_map_range(external
);
3201 external
= wrapped_reference_to_access(tag_set
, tagged
);
3202 external
= isl_union_map_union(external
,
3203 isl_union_map_copy(gen
->prog
->scop
->live_in
));
3205 tag_set
= isl_union_map_domain(external
);
3206 external
= wrapped_reference_to_access(tag_set
, tagged
);
3207 external
= isl_union_map_union(external
,
3208 isl_union_map_copy(gen
->prog
->scop
->live_out
));
3212 external
= isl_union_map_free(external
);
3214 external
= isl_union_map_universe(external
);
3216 access
= isl_union_map_intersect(access
, external
);
3221 /* Given the AST context schedule "schedule" and the mapping from
3222 * domains to the shared tile loops "shared_sched", add a schedule
3223 * for copying an array reference group to/from shared/private memory.
3224 * "read" is set if data should be copied from global memory
3225 * to shared/private memory.
3226 * "k" represents the current group
3227 * "s" is the total number of groups
3229 * We schedule an operation before or after the innermost loop
3230 * of "shared_sched" that affects the tile of the array reference group.
3232 * schedule is of the form
3236 * (with D the iteration domains and L the already generated loops),
3237 * while shared_sched is of the form
3241 * We first compute the access relation for the reference group
3245 * and remove from this access relation those reads or writes
3246 * that only needed to communicate data within the same iteration
3247 * of the last_shared dimension of the group.
3248 * We then combine what is left with shared_sched into
3252 * If this results in an empty relation, no copying needs to be performed
3254 * Otherwise, we invert the relation and combine it with "schedule" into
3258 * The actual additional piece of the schedule is obtained from combining
3264 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3266 * The position of "val" corresponds to the innermost loop that affects
3267 * the tile and the value indicates where the copying is scheduled
3268 * with respect to the actual kernel code (at value 0).
3269 * Reads are schedule before the code, writes to global memory from
3270 * private memory are scheduled at values 1 to s, writes to global
3271 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
3273 * If we are scheduling a read from global memory to shared memory,
3274 * we insert a synchronization before the kernel code (at the innermost
3276 * If we are scheduling a write to global memory, then we add
3277 * a synchronization after all writes (at value 2 *s + 2).
3278 * However, there is no need for a synchronization after the outermost loop.
3279 * A write to global memory from private memory at the innermost level
3280 * does not require a synchronization, because it is covered by
3281 * the synchronization after the kernel inserted by body_schedule.
3283 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
3284 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3285 __isl_keep isl_union_map
*shared_sched
,
3286 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
3291 isl_union_map
*access
;
3292 isl_map
*map
, *proj
, *access_map
;
3295 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
3296 access
= remove_local_accesses(gen
, group
, access
, read
);
3297 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
3300 if (isl_union_map_is_empty(access
)) {
3301 isl_union_map_free(access
);
3305 access
= isl_union_map_reverse(access
);
3306 access
= isl_union_map_apply_range(access
,
3307 isl_union_map_copy(schedule
));
3308 access_map
= isl_map_from_union_map(access
);
3310 space
= isl_space_copy(group
->array
->space
);
3311 space
= isl_space_from_range(space
);
3312 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
3313 map
= isl_map_domain_map(isl_map_universe(space
));
3315 space
= isl_union_map_get_space(schedule
);
3316 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
3320 else if (group
->private_tile
)
3323 val
= 1 + s
+ 1 + k
;
3324 proj
= insert_even(gen
, space
, pos
, val
);
3325 map
= isl_map_apply_range(map
, proj
);
3327 access_map
= isl_map_range_product(access_map
, map
);
3329 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
3330 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
3332 res
= isl_union_map_add_map(res
, access_map
);
3334 n
= gen
->shared_len
- gen
->tile_first
;
3336 if (!group
->private_tile
)
3337 res
= add_sync_schedule(gen
, res
, schedule
,
3338 shared_sched
, n
, -1);
3342 if (pos
== n
&& group
->private_tile
)
3344 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3351 /* Return a schedule for the shared tile loops based on the current
3352 * AST context schedule.
3354 * We create a "shared_sched" that maps the domains to the first
3355 * shared_len dimensions of the computed schedule, project out the
3356 * first tile_first dimensions (as these are already covered by
3357 * the host code) and insert "statement-level" dimensions at even
3358 * positions so that we can schedule copy blocks and synchronization
3359 * before/after each level.
3361 * In particular, copy blocks are inserted inside the innermost
3362 * level that affect the tile. For the copying to global memory,
3363 * those from private memory are scheduled before those from shared
3364 * memory such that synchronization can be inserted between the two
3365 * at the innermost level.
3366 * Synchronization is inserted at the innermost level before the
3367 * actual kernel code if there is any copying from global memory
3368 * to shared memory. It is inserted unconditionally at the innermost
3369 * level after the actual kernel code and the copying to global memory
3370 * from private memory (if any). Finally, it is inserted after
3371 * any copying to global memory, except at the outermost level
3372 * and at the innermost level if there is no copying from shared
3373 * memory. The copying from private memory is covered by the unconditional
3374 * synchronization at the innermost level.
3376 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
3377 __isl_take isl_union_map
*schedule
)
3381 isl_union_map
*shared_sched
;
3382 isl_union_map
*sched
;
3383 isl_map
*proj
, *map
;
3386 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
3387 proj
= projection(isl_union_map_get_space(shared_sched
),
3388 gen
->tiled_len
, gen
->shared_len
);
3389 shared_sched
= isl_union_map_apply_range(shared_sched
,
3390 isl_union_map_from_map(proj
));
3391 space
= isl_union_map_get_space(shared_sched
);
3392 proj
= insert_even(gen
, space
, -1, 0);
3393 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
3394 isl_union_map_from_map(proj
));
3396 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
3399 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
)
3400 s
+= gen
->kernel
->array
[i
].n_group
;
3403 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
3404 struct gpu_local_array_info
*array
= &gen
->kernel
->array
[i
];
3406 for (j
= 0; j
< array
->n_group
; ++j
) {
3407 struct gpu_array_ref_group
*group
;
3409 group
= array
->groups
[j
];
3410 if (!group
->private_tile
&& !group
->shared_tile
)
3412 res
= add_group_schedule(gen
, res
, schedule
,
3413 shared_sched
, group
, 0, k
, s
);
3414 res
= add_group_schedule(gen
, res
, schedule
,
3415 shared_sched
, group
, 1, k
, s
);
3420 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3421 gen
->shared_len
- gen
->tile_first
, 1 + s
);
3423 isl_union_map_free(shared_sched
);
3424 isl_union_map_free(schedule
);
3429 /* Generate code for "kernel" in the given "context".
3431 * We first generate code for the shared tile loops (T1T, T1P and T2)
3432 * in a context that includes the block ids.
3433 * Within each iteration of these loops an additional code generation
3434 * is performed (within create_kernel_leaf) for the rest of the schedule
3435 * in a context that includes the thread ids.
3437 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
3438 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
3439 __isl_keep isl_multi_pw_aff
*grid_size
)
3443 isl_id_list
*iterators
;
3444 isl_union_map
*schedule
;
3448 schedule
= isl_ast_build_get_schedule(build
);
3450 build
= isl_ast_build_copy(build
);
3451 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
3452 space
= isl_ast_build_get_schedule_space(build
);
3453 set
= isl_set_universe(isl_space_copy(space
));
3454 set
= add_bounded_parameters_dynamic(set
, grid_size
,
3455 gen
->kernel
->block_ids
);
3456 build
= isl_ast_build_restrict(build
, set
);
3458 schedule
= body_schedule(gen
, schedule
);
3460 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
3462 build
= set_atomic_and_unroll(build
, space
, sched_len
);
3463 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, sched_len
, "g");
3464 build
= isl_ast_build_set_iterators(build
, iterators
);
3465 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
3466 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3467 isl_ast_build_free(build
);
3472 /* Attach "id" to the given node.
3474 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
3475 __isl_keep isl_ast_build
*build
, void *user
)
3479 node
= isl_ast_node_set_annotation(node
, id
);
3484 /* Construct an AST node for performing a kernel launch and attach
3485 * the information about the kernel to that node.
3486 * "kernel_id" has name "kernel" and contains a pointer
3487 * to the ppcg_kernel structure.
3489 * The kernel AST has been constructed in the context of the range
3490 * of "schedule". In particular, the grid size has been computed
3491 * in the context. We therefore still need to make sure that these
3492 * constraints are expressed in the code. We do this by creating a schedule
3494 * kernel[] -> [S -> []]
3496 * where S is the schedule domain, i.e., the range of "schedule".
3497 * The AST generation will then create a single call surrounded by
3498 * all the condition in "S" that have not been expressed yet.
3500 * The kernel information is attached to this node in attach_id.
3502 static __isl_give isl_ast_node
*construct_launch(
3503 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
3504 __isl_take isl_id
*kernel_id
)
3507 isl_union_set
*domain
;
3512 ctx
= isl_ast_build_get_ctx(build
);
3514 domain
= isl_union_map_range(schedule
);
3515 set
= isl_set_from_union_set(domain
);
3516 map
= isl_map_from_domain(set
);
3517 map
= isl_map_from_range(isl_map_wrap(map
));
3518 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
3519 schedule
= isl_union_map_from_map(map
);
3521 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, kernel_id
);
3522 node
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3523 isl_ast_build_free(build
);
3528 /* This function is called for each leaf in the AST of the host code.
3529 * We first specialize the schedule to the site of the leaf, compute
3530 * the size of shared memory and then construct the body of the host code
3531 * and the associated kernel.
3533 * The necessary information for printing the kernel launch is
3534 * stored in the struct ppcg_kernel that was created in create_kernel and
3535 * attached to an outer mark node in the schedule tree.
3536 * Note that this assumes that a kernel is only launched once.
3537 * The kernel pointer itself is stored in gen->kernel by before_mark,
3538 * while the isl_id containing this pointer is stored in gen->kernel_mark.
3539 * The latter is attached to the leaf AST node created to represent the launch.
3541 static __isl_give isl_ast_node
*create_host_leaf(
3542 __isl_take isl_ast_build
*build
, void *user
)
3544 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3547 struct ppcg_kernel
*kernel
;
3548 isl_set
*host_domain
;
3549 isl_union_map
*schedule
;
3550 isl_union_map
*local_sched
;
3551 isl_union_set
*domain
;
3554 schedule
= isl_ast_build_get_schedule(build
);
3556 kernel
= gen
->kernel
;
3562 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
3564 local_sched
= isl_union_map_copy(gen
->sched
);
3565 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
3567 kernel
->block_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
3568 kernel
->n_grid
, "b");
3569 kernel
->thread_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
3572 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3573 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3574 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3576 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3577 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3578 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3580 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
3581 extract_block_size(gen
, kernel
);
3582 kernel
->space
= isl_ast_build_get_schedule_space(build
);
3584 compute_shared_sched(gen
);
3585 gen
->privatization
= compute_privatization(gen
);
3586 if (gpu_group_references(gen
) < 0)
3587 schedule
= isl_union_map_free(schedule
);
3588 host_domain
= isl_set_from_union_set(isl_union_map_range(
3589 isl_union_map_copy(schedule
)));
3590 localize_bounds(gen
, kernel
, host_domain
);
3592 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3593 check_shared_memory_bound(gen
);
3594 compute_group_tilings(gen
);
3596 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
3598 create_kernel_vars(gen
, kernel
);
3600 isl_map_free(gen
->privatization
);
3601 isl_union_map_free(gen
->local_sched
);
3602 isl_union_map_free(gen
->tiled_sched
);
3603 isl_union_map_free(gen
->shared_sched
);
3604 isl_union_map_free(gen
->shared_proj
);
3605 isl_set_free(host_domain
);
3606 free(gen
->tile_size
);
3608 node
= construct_launch(build
, schedule
, isl_id_copy(gen
->kernel_mark
));
3612 isl_union_map_free(schedule
);
3616 /* This function is called before the AST generator starts traversing
3617 * the schedule subtree of a node with mark "mark".
3619 * If the mark is called "kernel", store the mark itself in gen->kernel_mark
3620 * and the kernel pointer in gen->kernel for use in create_host_leaf.
3622 static int before_mark(__isl_keep isl_id
*mark
,
3623 __isl_keep isl_ast_build
*build
, void *user
)
3625 struct gpu_gen
*gen
= user
;
3629 if (!strcmp(isl_id_get_name(mark
), "kernel")) {
3630 gen
->kernel_mark
= isl_id_copy(mark
);
3631 gen
->kernel
= isl_id_get_user(mark
);
3636 /* This function is called after the AST generator has finished traversing
3637 * the schedule subtree of a mark node. "node" points to the corresponding
3640 * If the mark is called "kernel", then clear kernel and gen->kernel_mark.
3642 static __isl_give isl_ast_node
*after_mark(__isl_take isl_ast_node
*node
,
3643 __isl_keep isl_ast_build
*build
, void *user
)
3645 struct gpu_gen
*gen
= user
;
3648 id
= isl_ast_node_mark_get_id(node
);
3650 return isl_ast_node_free(node
);
3651 if (!strcmp(isl_id_get_name(id
), "kernel") && gen
->kernel
) {
3652 gen
->kernel_mark
= isl_id_free(gen
->kernel_mark
);
3660 /* Use isl to generate host code from gen->host_schedule, which corresponds to
3661 * the outer gen->tile_first loops of the global schedule in gen->sched.
3662 * Within each iteration of this partial schedule, i.e., for each kernel
3663 * launch, create_host_leaf takes care of generating the kernel code.
3664 * The ppcg_kernel objects are stored in mark nodes in the schedule
3665 * tree and are extracted in before_mark.
3667 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
3669 isl_ast_build
*build
;
3671 isl_schedule
*schedule
;
3672 isl_id_list
*iterators
;
3674 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
3675 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
3676 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
,
3677 gen
->tile_first
, "h");
3678 build
= isl_ast_build_set_iterators(build
, iterators
);
3679 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
3680 build
= isl_ast_build_set_before_each_mark(build
, &before_mark
, gen
);
3681 build
= isl_ast_build_set_after_each_mark(build
, &after_mark
, gen
);
3682 schedule
= isl_schedule_copy(gen
->host_schedule
);
3683 tree
= isl_ast_build_node_from_schedule(build
, schedule
);
3684 isl_ast_build_free(build
);
3689 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
3693 return isl_union_map_read_from_str(ctx
, str
);
3696 /* Information about the outermost tilable bands in the forest of bands.
3698 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3700 * tile_first is the number of schedule dimensions in prefix.
3702 * suffix is the schedule of the outermost tilable bands and their descendants.
3705 struct gpu_gen
*gen
;
3707 isl_union_map
*prefix
;
3708 isl_union_map
*suffix
;
3711 /* Extract the set of parameter values and outer schedule dimensions
3712 * for which any statement instance
3713 * in the kernel inserted at "node" needs to be executed.
3714 * Intersect the set of parameter values derived from the host schedule
3715 * relation with the context of "prog".
3717 static __isl_give isl_set
*extract_context(__isl_keep isl_schedule_node
*node
,
3718 struct gpu_prog
*prog
)
3720 isl_union_map
*schedule
;
3721 isl_union_set
*schedule_domain
;
3725 schedule
= isl_schedule_node_get_prefix_schedule_relation(node
);
3726 schedule_domain
= isl_union_map_range(schedule
);
3727 empty
= isl_union_set_is_empty(schedule_domain
);
3729 isl_union_set_free(schedule_domain
);
3736 space
= isl_union_set_get_space(schedule_domain
);
3737 isl_union_set_free(schedule_domain
);
3738 space
= isl_space_set_from_params(space
);
3739 depth
= isl_schedule_node_get_schedule_depth(node
);
3740 space
= isl_space_add_dims(space
, isl_dim_set
, depth
);
3741 context
= isl_set_empty(space
);
3743 context
= isl_set_from_union_set(schedule_domain
);
3745 context
= isl_set_intersect_params(context
,
3746 isl_set_copy(prog
->context
));
3751 /* Return the set of outer array elements accessed by
3752 * by the statement instance in "domain" in "prog".
3754 static __isl_give isl_union_set
*accessed_by_domain(
3755 __isl_take isl_union_set
*domain
, struct gpu_prog
*prog
)
3757 isl_union_map
*access
;
3758 isl_union_set
*arrays
;
3760 access
= isl_union_map_union(isl_union_map_copy(prog
->read
),
3761 isl_union_map_copy(prog
->may_write
));
3762 access
= isl_union_map_intersect_domain(access
, domain
);
3763 arrays
= isl_union_map_range(access
);
3764 arrays
= isl_union_set_apply(arrays
,
3765 isl_union_map_copy(prog
->to_outer
));
3770 /* Return the number of outer band members of the band node "node"
3771 * that are marked coincident.
3773 static int n_outer_coincidence(__isl_keep isl_schedule_node
*node
)
3777 n
= isl_schedule_node_band_n_member(node
);
3779 for (i
= 0; i
< n
; ++i
)
3780 if (!isl_schedule_node_band_member_get_coincident(node
, i
))
3786 /* Mark all dimensions in the current band node atomic.
3788 static __isl_give isl_schedule_node
*atomic(__isl_take isl_schedule_node
*node
)
3792 n
= isl_schedule_node_band_n_member(node
);
3793 for (i
= 0; i
< n
; ++i
)
3794 node
= isl_schedule_node_band_member_set_ast_loop_type(node
, i
,
3795 isl_ast_loop_atomic
);
3800 /* Mark "node" atomic, if it is a band node.
3801 * Do the same for all ancestors.
3802 * Return a pointer to "node" (in the updated schedule tree).
3804 static __isl_give isl_schedule_node
*atomic_ancestors(
3805 __isl_take isl_schedule_node
*node
)
3811 if (!isl_schedule_node_has_parent(node
))
3814 pos
= isl_schedule_node_get_child_position(node
);
3815 node
= isl_schedule_node_parent(node
);
3816 if (isl_schedule_node_get_type(node
) == isl_schedule_node_band
)
3817 node
= atomic(node
);
3818 node
= atomic_ancestors(node
);
3819 node
= isl_schedule_node_child(node
, pos
);
3824 /* Group the domain elements into a single space, named kernelX,
3825 * with X the kernel sequence number "kernel_id".
3827 static __isl_give isl_schedule_node
*group_statements(
3828 __isl_take isl_schedule_node
*node
, int kernel_id
)
3836 snprintf(buffer
, sizeof(buffer
), "kernel%d", kernel_id
);
3837 id
= isl_id_alloc(isl_schedule_node_get_ctx(node
), buffer
, NULL
);
3838 return isl_schedule_node_group(node
, id
);
3841 /* Create a ppcg_kernel representing the domain instances that reach "node"
3842 * and replace the subtree at "node" by a mark node pointing
3843 * to the ppcg_kernel.
3844 * Mark all outer band nodes as atomic to ensure each kernel is only
3846 * If the domain elements that reach "node" live in more than one space,
3847 * then group the domain elements into a single space, named kernelX,
3848 * with X the kernel sequence number.
3850 * We keep a copy of the isl_id that points to the kernel to ensure
3851 * that the kernel does not get destroyed if the schedule node
3852 * is freed due to some error condition.
3854 static __isl_give isl_schedule_node
*create_kernel(struct gpu_gen
*gen
,
3855 __isl_take isl_schedule_node
*node
)
3857 struct ppcg_kernel
*kernel
;
3859 isl_union_set
*domain
;
3860 int single_statement
;
3862 kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
3863 kernel
= ppcg_kernel_create_local_arrays(kernel
, gen
->prog
);
3865 return isl_schedule_node_free(node
);
3867 domain
= isl_schedule_node_get_domain(node
);
3868 single_statement
= isl_union_set_n_set(domain
) == 1;
3870 kernel
->ctx
= gen
->ctx
;
3871 kernel
->options
= gen
->options
;
3872 kernel
->context
= extract_context(node
, gen
->prog
);
3873 kernel
->arrays
= accessed_by_domain(domain
, gen
->prog
);
3874 kernel
->tile_len
= isl_schedule_node_band_n_member(node
);
3875 kernel
->n_parallel
= n_outer_coincidence(node
);
3876 kernel
->n_grid
= kernel
->n_parallel
;
3877 kernel
->id
= gen
->kernel_id
++;
3879 node
= atomic_ancestors(node
);
3881 id
= isl_id_alloc(gen
->ctx
, "kernel", kernel
);
3882 id
= isl_id_set_free_user(id
, &ppcg_kernel_free_wrap
);
3883 node
= isl_schedule_node_insert_mark(node
, isl_id_copy(id
));
3885 if (!single_statement
)
3886 node
= group_statements(node
, kernel
->id
);
3888 node
= isl_schedule_node_child(node
, 0);
3889 node
= isl_schedule_node_cut(node
);
3890 node
= isl_schedule_node_parent(node
);
3892 if (!single_statement
)
3893 node
= isl_schedule_node_parent(node
);
3899 /* Insert a zero-dimensional permutable band at "node".
3901 static __isl_give isl_schedule_node
*insert_empty_permutable_band(
3902 __isl_take isl_schedule_node
*node
)
3905 isl_schedule
*schedule
;
3906 isl_union_set
*domain
;
3907 isl_multi_union_pw_aff
*mupa
;
3909 schedule
= isl_schedule_node_get_schedule(node
);
3910 domain
= isl_schedule_get_domain(schedule
);
3911 space
= isl_union_set_get_space(domain
);
3912 isl_union_set_free(domain
);
3913 isl_schedule_free(schedule
);
3915 space
= isl_space_set_from_params(space
);
3916 mupa
= isl_multi_union_pw_aff_zero(space
);
3917 node
= isl_schedule_node_insert_partial_schedule(node
, mupa
);
3918 node
= isl_schedule_node_band_set_permutable(node
, 1);
3923 /* Mark "node" as outer permutable.
3925 * If "node" originally points to a leaf, then insert a zero-dimensional
3926 * permutable band such that we can assume that "node" always
3927 * points to a band node.
3929 * Create a kernel representing the domain instances that reach "node" and
3930 * replace the band node with a mark node pointing to the kernel.
3932 static __isl_give isl_schedule_node
*mark_outer_permutable(
3933 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
)
3935 if (isl_schedule_node_get_type(node
) == isl_schedule_node_leaf
)
3936 node
= insert_empty_permutable_band(node
);
3938 node
= create_kernel(gen
, node
);
3943 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
3944 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
);
3946 /* Check if this band node is tilable and has any parallel loops. If so,
3947 * take it as the outermost tilable band. If not, continue looking for the
3948 * outermost tilable band in the children of the current band.
3949 * Return a pointer to the same node in a tree where all outermost tilable
3950 * bands in the current subtree have been replaced by mark nodes
3951 * containing a pointer to a ppcg_kernel object.
3953 static __isl_give isl_schedule_node
*band_select_outer_band(struct gpu_gen
*gen
,
3954 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
3956 int n
= isl_schedule_node_band_n_member(node
);
3959 n_parallel
= n_outer_coincidence(node
);
3961 if (!isl_schedule_node_band_get_permutable(node
) || n_parallel
== 0) {
3962 node
= isl_schedule_node_child(node
, 0);
3963 node
= select_outer_band(gen
, node
, pos
+ n
, info
);
3964 return isl_schedule_node_parent(node
);
3967 gen
->any_parallelism
= 1;
3969 info
->tile_first
= pos
;
3970 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
3971 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
3973 node
= mark_outer_permutable(gen
, node
);
3978 /* Extend "umap" with coordinates with fixed value "val"
3979 * to a total length of "dst_len", assuming the original dimension is "src_len".
3981 static __isl_give isl_union_map
*extend_range(
3982 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
3988 dim
= isl_union_map_get_space(umap
);
3989 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
3990 for (i
= src_len
; i
< dst_len
; ++i
)
3991 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
3993 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
3998 /* Select the outermost bands in the elements of the sequence or set
3999 * node "node", align their prefix schedules and combine the resulting
4000 * prefix and suffix schedules into a single pair of prefix and
4001 * suffix schedules for the entire list.
4002 * Return a pointer to the same node in a tree where all outermost tilable
4003 * bands in the current subtree have been replaced by mark nodes
4004 * containing a pointer to a ppcg_kernel object.
4006 static __isl_give isl_schedule_node
*list_select_outer_band(
4007 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
, int pos
,
4008 struct band_info
*list_info
)
4011 int n
= isl_schedule_node_n_children(node
);
4012 isl_ctx
*ctx
= isl_schedule_node_get_ctx(node
);
4013 struct band_info
*info
;
4015 isl_union_map
*prefix
;
4016 isl_union_map
*suffix
;
4019 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4023 for (i
= 0; i
< n
; ++i
) {
4024 node
= isl_schedule_node_child(node
, i
);
4025 node
= select_outer_band(gen
, node
, pos
, &info
[i
]);
4026 if (info
[i
].tile_first
> max_tile_first
)
4027 max_tile_first
= info
[i
].tile_first
;
4028 node
= isl_schedule_node_parent(node
);
4031 for (i
= 0; i
< n
; ++i
) {
4032 if (info
[i
].tile_first
== max_tile_first
)
4034 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4035 info
[i
].tile_first
, max_tile_first
, 0);
4036 info
[i
].tile_first
= max_tile_first
;
4039 prefix
= info
[0].prefix
;
4040 suffix
= info
[0].suffix
;
4042 for (i
= 1; i
< n
; ++i
) {
4043 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4044 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4047 list_info
->tile_first
= info
[0].tile_first
;
4048 list_info
->prefix
= prefix
;
4049 list_info
->suffix
= suffix
;
4055 /* If we reach a leaf node, then we have not found any outer tilable
4056 * band with parallel loops, so consider the leaf node as the outermost
4058 * Return a pointer to a mark node containing a pointer
4059 * to a ppcg_kernel object inserted at the original leaf node.
4061 static __isl_give isl_schedule_node
*leaf_select_outer_band(struct gpu_gen
*gen
,
4062 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4065 info
->tile_first
= pos
;
4066 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
4067 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
4069 node
= mark_outer_permutable(gen
, node
);
4074 /* Select the outermost tilable band in the subtree that "node" points to and
4075 * return a pointer to the same node in a tree where all outermost tilable
4076 * bands in the current subtree have been replaced by mark nodes
4077 * containing a pointer to a ppcg_kernel object.
4079 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
4080 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4082 enum isl_schedule_node_type type
;
4084 type
= isl_schedule_node_get_type(node
);
4086 case isl_schedule_node_domain
:
4087 case isl_schedule_node_filter
:
4088 node
= isl_schedule_node_child(node
, 0);
4089 node
= select_outer_band(gen
, node
, pos
, info
);
4090 return isl_schedule_node_parent(node
);
4091 case isl_schedule_node_leaf
:
4092 return leaf_select_outer_band(gen
, node
, pos
, info
);
4093 case isl_schedule_node_band
:
4094 return band_select_outer_band(gen
, node
, pos
, info
);
4095 case isl_schedule_node_set
:
4096 case isl_schedule_node_sequence
:
4097 return list_select_outer_band(gen
, node
, pos
, info
);
4099 isl_die(isl_schedule_node_get_ctx(node
),
4100 isl_error_unsupported
, "unhandled schedule node type",
4102 case isl_schedule_node_error
:
4103 info
->prefix
= NULL
;
4104 info
->suffix
= NULL
;
4108 return isl_schedule_node_free(node
);
4111 /* Select the outermost tilable band that (by construction)
4112 * has at least one parallel loop.
4113 * The starting position of the aligned band is stored in the pair
4115 * The sizes and number of parallel loops may be different in different
4116 * parts of the band forest and are therefore stored in the gpu_stmts.
4118 * Return the complete schedule, with the tilable bands aligned
4119 * at gen->tile_first and padded with zero, if needed.
4120 * Store a schedule tree corresponding to the outer gen->tile_first
4121 * dimensions, with mark nodes containing pointers to ppcg_kernel objects,
4122 * in gen->host_schedule.
4124 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4125 __isl_keep isl_schedule
*schedule
)
4127 isl_schedule_node
*node
;
4128 struct band_info info
;
4130 node
= isl_schedule_get_root(schedule
);
4131 node
= select_outer_band(gen
, node
, 0, &info
);
4132 gen
->host_schedule
= isl_schedule_node_get_schedule(node
);
4133 isl_schedule_node_free(node
);
4135 gen
->tile_first
= info
.tile_first
;
4136 info
.suffix
= align_range(info
.suffix
);
4138 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4141 /* Set gen->untiled_len to the number of scheduling dimensions
4142 * for the schedule of the first domain.
4143 * We assume here that this number is the same for all domains.
4145 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4147 unsigned *untiled_len
= user
;
4149 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4155 /* Compute an appropriate schedule based on the accesses in
4156 * gen->read and gen->write.
4158 * We use the dependences in gen->prog->scop to compute
4159 * a schedule that has a parallel loop in each tilable band.
4160 * Finally, we select the outermost tilable band.
4162 * If live range reordering is allowed, then we need to make sure
4163 * that live ranges on arrays are not run in parallel since doing
4164 * so would require array expansion. We therefore add the array
4165 * order dependences to the coincidence dependences. Non-zero array
4166 * order dependences will then prevent a schedule dimension from being
4167 * considered parallel.
4168 * Live ranges derived from scalars are allowed to be run in parallel
4169 * since we force the scalars to be mapped to private memory in
4170 * check_scalar_live_ranges.
4171 * If live range reordering is allowed, then the false dependences
4172 * are not added to the validity constraints as that would prevent
4173 * reordering. Instead, the external false dependences that enforce that reads
4174 * from potentially live-in data precede any later write and
4175 * that writes of potentially live-out data follow any other earlier write
4176 * are added to the validity and the coincidence constraints.
4177 * The false dependences are still added to the proximity constraints
4178 * for consistency with the case where live range reordering is not allowed.
4179 * The coincidence constraints then consist of flow dependences,
4180 * external false dependences and array order dependences.
4181 * The independences can be filtered out from the first two sets.
4182 * They have already been filtered out from the array order dependences
4183 * on a per array basis in collect_order_dependences.
4184 * There is no need for a per array handling of the other two sets
4185 * as there should be no flow or external false dependence on local
4186 * variables that can be filtered out.
4188 static void compute_schedule(struct gpu_gen
*gen
)
4190 isl_union_set
*domain
;
4191 isl_union_map
*dep_raw
, *dep
;
4192 isl_union_map
*validity
, *proximity
, *coincidence
;
4193 isl_union_map
*sched
;
4194 isl_schedule_constraints
*sc
;
4195 isl_schedule
*schedule
;
4197 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4198 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
4199 sc
= isl_schedule_constraints_set_context(sc
,
4200 isl_set_copy(gen
->prog
->scop
->context
));
4201 if (gen
->options
->live_range_reordering
) {
4202 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
4203 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
4204 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
4205 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4206 validity
= isl_union_map_copy(proximity
);
4207 validity
= isl_union_map_union(validity
,
4208 isl_union_map_copy(gen
->prog
->scop
->dep_forced
));
4209 proximity
= isl_union_map_union(proximity
,
4210 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
4211 coincidence
= isl_union_map_copy(validity
);
4212 coincidence
= isl_union_map_subtract(coincidence
,
4213 isl_union_map_copy(gen
->prog
->scop
->independence
));
4214 coincidence
= isl_union_map_union(coincidence
,
4215 isl_union_map_copy(gen
->prog
->array_order
));
4217 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4218 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4219 dep
= isl_union_map_union(dep
, dep_raw
);
4220 dep
= isl_union_map_coalesce(dep
);
4221 proximity
= isl_union_map_copy(dep
);
4222 coincidence
= isl_union_map_copy(dep
);
4225 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
4226 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
4227 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
4229 if (gen
->options
->debug
->dump_schedule_constraints
)
4230 isl_schedule_constraints_dump(sc
);
4231 schedule
= isl_schedule_constraints_compute_schedule(sc
);
4232 if (gen
->options
->debug
->dump_schedule
)
4233 isl_schedule_dump(schedule
);
4235 sched
= select_outer_tilable_band(gen
, schedule
);
4237 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4238 sched
= isl_union_map_intersect_domain(sched
, domain
);
4241 isl_schedule_free(schedule
);
4244 /* Compute the sets of outer array elements that need to be copied in and out.
4246 * In particular, for each array that is possibly written anywhere in
4247 * gen->prog and that is visible outside the corresponding scop,
4248 * we copy out its entire extent.
4250 * Any array elements that is read without first being written needs
4251 * to be copied in. Furthermore, if there are any array elements that
4252 * are copied out, but that may not be written inside gen->prog, then
4253 * they also need to be copied in to ensure that the value after execution
4254 * is the same as the value before execution, at least for those array
4255 * elements that may have their values preserved by the scop.
4256 * In case the array elements are structures, we need to take into
4257 * account that all members of the structures need to be written
4258 * by gen->prog before we can avoid copying the data structure in.
4260 * While computing the set of array elements that are copied out but
4261 * not necessarily written, we intersect both sets with the context.
4262 * This helps in those cases where the arrays are declared with a fixed size,
4263 * while the accesses are parametric and the context assigns a fixed value
4264 * to the parameters.
4266 * If an element from a local array is read without first being written,
4267 * then there is no point in copying it in since it cannot have been
4268 * written prior to the scop. Warn about the uninitialized read instead.
4270 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4273 isl_union_set
*local
;
4274 isl_union_set
*may_write
, *must_write
;
4275 isl_union_set
*copy_in
, *copy_out
;
4276 isl_union_set
*not_written
;
4277 isl_union_map
*uninitialized
;
4278 isl_union_map
*local_uninitialized
;
4280 must_write
= isl_union_map_range(
4281 isl_union_map_copy(gen
->prog
->must_write
));
4282 must_write
= isl_union_set_intersect_params(must_write
,
4283 isl_set_copy(gen
->prog
->context
));
4284 may_write
= isl_union_map_range(
4285 isl_union_map_copy(gen
->prog
->may_write
));
4286 may_write
= isl_union_set_intersect_params(may_write
,
4287 isl_set_copy(gen
->prog
->context
));
4288 may_write
= isl_union_set_universe(may_write
);
4289 may_write
= isl_union_set_apply(may_write
,
4290 isl_union_map_copy(gen
->prog
->to_outer
));
4291 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
4292 local
= isl_union_set_copy(copy_out
);
4294 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4299 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
4301 if (gen
->prog
->array
[i
].local
) {
4304 set
= isl_set_universe(space
);
4305 local
= isl_union_set_add_set(local
, set
);
4309 write_i
= isl_union_set_extract_set(may_write
, space
);
4310 empty
= isl_set_plain_is_empty(write_i
);
4311 isl_set_free(write_i
);
4315 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4316 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4318 isl_union_set_free(may_write
);
4320 copy_out
= isl_union_set_intersect_params(copy_out
,
4321 isl_set_copy(gen
->prog
->context
));
4323 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4325 copy_out
= isl_union_set_apply(copy_out
,
4326 isl_union_map_copy(gen
->prog
->to_inner
));
4327 copy_out
= isl_union_set_intersect(copy_out
,
4328 isl_union_set_copy(gen
->prog
->may_persist
));
4329 not_written
= isl_union_set_subtract(copy_out
, must_write
);
4331 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4332 local_uninitialized
= isl_union_map_copy(uninitialized
);
4334 local
= isl_union_set_apply(local
,
4335 isl_union_map_copy(gen
->prog
->to_inner
));
4336 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
4338 if (!isl_union_map_is_empty(local_uninitialized
)) {
4340 "possibly uninitialized reads (not copied in):\n");
4341 isl_union_map_dump(local_uninitialized
);
4343 uninitialized
= isl_union_map_subtract(uninitialized
,
4344 local_uninitialized
);
4345 copy_in
= isl_union_map_range(uninitialized
);
4346 copy_in
= isl_union_set_union(copy_in
, not_written
);
4347 copy_in
= isl_union_set_apply(copy_in
,
4348 isl_union_map_copy(gen
->prog
->to_outer
));
4350 gen
->prog
->copy_in
= copy_in
;
4353 /* Internal data structure for extract_access.
4354 * "next_access" points to the end of a linked list that is extended
4355 * by extract_access.
4356 * "single_expression" is set if the access expressions belong to
4357 * an expression statement (i.e., a statement without internal control).
4358 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4360 struct ppcg_extract_access_data
{
4361 struct gpu_stmt_access
**next_access
;
4362 int single_expression
;
4363 isl_union_map
*any_to_outer
;
4366 /* Given a tagged access relation to a single array "tagged", extract it
4367 * as a map, taking into account that the input may be empty.
4368 * If the access relation is empty, then it does not contain
4369 * any space information, so we try to recover it from the index
4371 * The space of the index expression is of the form I -> A,
4372 * with I the statement instances and A the array, or [I -> F] -> A,
4373 * with F the filters corresponding to arguments.
4374 * We first drop F, if present, obtaining I -> A.
4375 * Then we construct I -> R, with R the reference tag,
4376 * combine the two into I -> [R -> A] and uncurry to obtain
4377 * the final result [I -> R] -> A.
4378 * Note that the index expression may have a lower dimension
4379 * than that of the array, but this dimension is not used
4380 * if the access relation is empty.
4382 static __isl_give isl_map
*extract_single_tagged_access(
4383 __isl_take isl_union_map
*tagged
, __isl_keep pet_expr
*expr
)
4387 isl_space
*space
, *space2
;
4388 isl_multi_pw_aff
*index
;
4390 empty
= isl_union_map_is_empty(tagged
);
4394 return isl_map_from_union_map(tagged
);
4395 isl_union_map_free(tagged
);
4397 index
= pet_expr_access_get_index(expr
);
4398 space
= isl_multi_pw_aff_get_space(index
);
4399 isl_multi_pw_aff_free(index
);
4400 if (isl_space_domain_is_wrapping(space
))
4401 space
= isl_space_domain_factor_domain(space
);
4402 space2
= isl_space_copy(space
);
4403 space2
= isl_space_from_domain(isl_space_domain(space
));
4404 id
= pet_expr_access_get_ref_id(expr
);
4405 space2
= isl_space_set_tuple_id(space2
, isl_dim_out
, id
);
4406 space
= isl_space_range_product(space2
, space
);
4407 space
= isl_space_uncurry(space
);
4409 return isl_map_empty(space
);
4411 isl_union_map_free(tagged
);
4415 /* Extract a gpu_stmt_access from "expr", append it to the list
4416 * that ends in *data->next_access and update the end of the list.
4417 * If the access expression performs a write, then it is considered
4418 * exact only if it appears in a single expression statement and
4419 * if its may access relation is equal to its must access relation.
4421 * The combined set of may accesses may be union if member accesses
4422 * are involved, but the entire set is derived from a single reference and
4423 * therefore from a single index expression. These accesses therefore
4424 * all map to the same outer array.
4426 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
4428 struct ppcg_extract_access_data
*data
= user
;
4429 isl_union_map
*tagged
;
4430 struct gpu_stmt_access
*access
;
4431 isl_ctx
*ctx
= pet_expr_get_ctx(expr
);
4432 isl_multi_pw_aff
*index
;
4434 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4436 access
->next
= NULL
;
4437 access
->read
= pet_expr_access_is_read(expr
);
4438 access
->write
= pet_expr_access_is_write(expr
);
4439 tagged
= pet_expr_access_get_tagged_may_read(expr
);
4440 tagged
= isl_union_map_union(tagged
,
4441 pet_expr_access_get_tagged_may_write(expr
));
4442 tagged
= isl_union_map_apply_range(tagged
,
4443 isl_union_map_copy(data
->any_to_outer
));
4444 if (!access
->write
) {
4445 access
->exact_write
= 1;
4446 } else if (!data
->single_expression
) {
4447 access
->exact_write
= 0;
4449 isl_union_map
*must
, *may
;
4450 may
= isl_union_map_copy(tagged
);
4451 may
= isl_union_map_domain_factor_domain(may
);
4452 must
= pet_expr_access_get_must_write(expr
);
4453 access
->exact_write
= isl_union_map_is_equal(must
, may
);
4454 isl_union_map_free(must
);
4455 isl_union_map_free(may
);
4457 index
= pet_expr_access_get_index(expr
);
4458 access
->n_index
= isl_multi_pw_aff_dim(index
, isl_dim_out
);
4459 isl_multi_pw_aff_free(index
);
4460 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
4461 access
->tagged_access
= extract_single_tagged_access(tagged
, expr
);
4462 access
->access
= isl_map_copy(access
->tagged_access
);
4463 access
->access
= isl_map_domain_factor_domain(access
->access
);
4465 *data
->next_access
= access
;
4466 data
->next_access
= &(*data
->next_access
)->next
;
4468 if (!access
->access
)
4474 /* Construct a linked list of gpu_stmt_access objects,
4475 * one for each access expression in the statement body.
4476 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4478 static int pet_stmt_extract_accesses(struct gpu_stmt
*stmt
,
4479 __isl_keep isl_union_map
*any_to_outer
)
4481 struct ppcg_extract_access_data data
;
4483 stmt
->accesses
= NULL
;
4484 data
.next_access
= &stmt
->accesses
;
4485 data
.single_expression
=
4486 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
4487 data
.any_to_outer
= any_to_outer
;
4488 return pet_tree_foreach_access_expr(stmt
->stmt
->body
,
4489 &extract_access
, &data
);
4492 /* Return an array of gpu_stmt representing the statements in "scop".
4494 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4495 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*any_to_outer
)
4498 struct gpu_stmt
*stmts
;
4500 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->pet
->n_stmt
);
4504 for (i
= 0; i
< scop
->pet
->n_stmt
; ++i
) {
4505 struct gpu_stmt
*s
= &stmts
[i
];
4507 s
->id
= isl_set_get_tuple_id(scop
->pet
->stmts
[i
]->domain
);
4508 s
->stmt
= scop
->pet
->stmts
[i
];
4509 if (pet_stmt_extract_accesses(s
, any_to_outer
) < 0)
4510 return free_stmts(stmts
, i
+ 1);
4516 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
4518 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
4520 struct gpu_gen
*gen
= user
;
4522 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
4526 /* Generate CUDA code for "scop" and print it to "p".
4527 * After generating an AST for the transformed scop as explained below,
4528 * we call "gen->print" to print the AST in the desired output format
4531 * If it turns out that it does not make sense to generate GPU code,
4532 * then we generate CPU code instead.
4534 * The GPU code is generated in a context where at least one
4535 * statement instance is executed. The corresponding guard (if any) is printed
4536 * around the entire generated GPU code, except for the declaration
4537 * of the arrays that are visible outside of the scop and that therefore
4538 * cannot be declared inside the body of any possible guard.
4540 * We first compute a schedule that respects the dependences
4541 * of the original program and select the outermost band
4542 * of tilable dimensions that has at least one parallel loop.
4543 * We then have three blocks of dimensions
4547 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4552 * For each iteration of the T loop and for each array, we compute
4553 * the array elements accessed by that iteration, construct a rectangular
4554 * box around it and shift it to the origin. The result is used
4555 * as shared memory for the array.
4557 * We then split off at most 2 parallel loops from the T loops and
4558 * at most 3 parallel loops from the P loops
4562 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4563 * according to "grid"/"block" sizes.
4565 * H T1T T1P T2 P1T P1P P2 G
4567 * Finally, the T1P and P1P iterators are equated to the block and
4568 * thread dimensions respectively and so are effectively removed.
4569 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4570 * are run on the GPU.
4572 * Code is generated in three stages. We first generate code for the
4573 * host (the H loops), with iterators h%d. Then, for each leaf node
4574 * of the resulting AST, we generate code for the shared loops (up to
4575 * and including T2), with iterators g%d and after equating the H loops
4576 * to h%d parameters and the T1P loops to the block dimensions.
4577 * Finally, we generate code for the remaining loops in a similar fashion.
4579 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
4580 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
4581 struct ppcg_options
*options
)
4583 struct gpu_prog
*prog
;
4585 isl_set
*context
, *guard
;
4588 return isl_printer_free(p
);
4590 ctx
= isl_printer_get_ctx(p
);
4591 prog
= gpu_prog_alloc(ctx
, scop
);
4593 return isl_printer_free(p
);
4595 context
= isl_set_copy(prog
->context
);
4596 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
4597 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
4600 gen
->any_parallelism
= 0;
4601 compute_schedule(gen
);
4603 if (!gen
->any_parallelism
) {
4604 isl_set_free(context
);
4605 isl_set_free(guard
);
4606 p
= print_cpu(p
, scop
, options
);
4608 compute_copy_in_and_out(gen
);
4609 gen
->tree
= generate_host_code(gen
);
4610 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
4611 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
4612 isl_ast_node_free(gen
->tree
);
4615 isl_union_map_free(gen
->sched
);
4616 isl_schedule_free(gen
->host_schedule
);
4618 gpu_prog_free(prog
);
4623 /* Wrapper around generate for use as a ppcg_transform callback.
4625 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
4626 struct ppcg_scop
*scop
, void *user
)
4628 struct gpu_gen
*gen
= user
;
4630 return generate(p
, gen
, scop
, gen
->options
);
4633 /* Transform the code in the file called "input" by replacing
4634 * all scops by corresponding GPU code and write the results to "out".
4636 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
4637 struct ppcg_options
*options
,
4638 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
4639 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
4640 struct gpu_types
*types
, void *user
), void *user
)
4647 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
4648 gen
.options
= options
;
4651 gen
.print_user
= user
;
4653 gen
.types
.name
= NULL
;
4655 if (options
->debug
->dump_sizes
) {
4656 isl_space
*space
= isl_space_params_alloc(ctx
, 0);
4657 gen
.used_sizes
= isl_union_map_empty(space
);
4660 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
4662 if (options
->debug
->dump_sizes
) {
4663 isl_union_map_dump(gen
.used_sizes
);
4664 isl_union_map_free(gen
.used_sizes
);
4667 isl_union_map_free(gen
.sizes
);
4668 for (i
= 0; i
< gen
.types
.n
; ++i
)
4669 free(gen
.types
.name
[i
]);
4670 free(gen
.types
.name
);
4675 /* Compute the set of inner array elements that may have their values
4676 * preserved by "prog". In particular, collect the array elements of
4677 * arrays that are not local to "prog" and remove those elements that
4678 * are definitely killed or definitely written by "prog".
4680 static __isl_give isl_union_set
*compute_may_persist(struct gpu_prog
*prog
)
4683 isl_union_set
*may_persist
, *killed
;
4684 isl_union_map
*must_kill
;
4686 may_persist
= isl_union_set_empty(isl_set_get_space(prog
->context
));
4687 for (i
= 0; i
< prog
->n_array
; ++i
) {
4690 if (prog
->array
[i
].local
)
4693 extent
= isl_set_copy(prog
->array
[i
].extent
);
4694 may_persist
= isl_union_set_add_set(may_persist
, extent
);
4697 may_persist
= isl_union_set_intersect_params(may_persist
,
4698 isl_set_copy(prog
->context
));
4699 may_persist
= isl_union_set_apply(may_persist
,
4700 isl_union_map_copy(prog
->to_inner
));
4701 must_kill
= isl_union_map_copy(prog
->tagged_must_kill
);
4702 killed
= isl_union_map_range(must_kill
);
4703 must_kill
= isl_union_map_copy(prog
->must_write
);
4704 killed
= isl_union_set_union(killed
, isl_union_map_range(must_kill
));
4706 may_persist
= isl_union_set_subtract(may_persist
, killed
);
4710 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
4712 struct gpu_prog
*prog
;
4719 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
4724 prog
->context
= isl_set_copy(scop
->context
);
4725 prog
->n_stmts
= scop
->pet
->n_stmt
;
4726 prog
->any_to_outer
= pet_scop_compute_outer_to_any(scop
->pet
);
4727 prog
->any_to_outer
= isl_union_map_reverse(prog
->any_to_outer
);
4728 space
= isl_union_map_get_space(prog
->any_to_outer
);
4729 space
= isl_space_set_from_params(space
);
4730 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
4731 space
= isl_space_map_from_set(space
);
4732 id
= isl_map_identity(space
);
4733 prog
->any_to_outer
= isl_union_map_add_map(prog
->any_to_outer
, id
);
4734 prog
->stmts
= extract_stmts(ctx
, scop
,
4735 prog
->context
, prog
->any_to_outer
);
4736 prog
->read
= isl_union_map_copy(scop
->reads
);
4737 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
4738 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
4739 prog
->tagged_must_kill
= isl_union_map_copy(scop
->tagged_must_kills
);
4740 prog
->to_inner
= pet_scop_compute_outer_to_inner(scop
->pet
);
4741 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
4742 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
4745 return gpu_prog_free(prog
);
4747 if (collect_array_info(prog
) < 0)
4748 return gpu_prog_free(prog
);
4749 prog
->may_persist
= compute_may_persist(prog
);
4754 void *gpu_prog_free(struct gpu_prog
*prog
)
4758 free_array_info(prog
);
4759 free_stmts(prog
->stmts
, prog
->n_stmts
);
4760 isl_union_map_free(prog
->any_to_outer
);
4761 isl_union_map_free(prog
->to_outer
);
4762 isl_union_map_free(prog
->to_inner
);
4763 isl_union_set_free(prog
->copy_in
);
4764 isl_union_set_free(prog
->copy_out
);
4765 isl_union_map_free(prog
->read
);
4766 isl_union_map_free(prog
->may_write
);
4767 isl_union_map_free(prog
->must_write
);
4768 isl_union_map_free(prog
->tagged_must_kill
);
4769 isl_union_map_free(prog
->array_order
);
4770 isl_union_set_free(prog
->may_persist
);
4771 isl_set_free(prog
->context
);