2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride, shift and shift_map only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * shift_map contains the mapping
39 * i -> (i + shift)/stride
41 * Let D represent the initial shared_len dimensions of the computed schedule.
42 * The spaces of "lb" and "shift" are of the form
46 * "shift_map" is of the form
48 * [D -> i] -> [D -> (i + shift(D))/stride]
50 struct gpu_array_bound
{
56 isl_basic_map
*shift_map
;
59 /* A tile of an array.
61 * n is the dimension of the array.
62 * bound is an array of size "n" representing the lower bound
63 * and size for each index.
65 * tiling maps a tile in the global array to the corresponding
66 * shared/private memory tile and is of the form
68 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
70 * where D represents the initial shared_len dimensions
71 * of the computed schedule.
73 struct gpu_array_tile
{
75 struct gpu_array_bound
*bound
;
76 isl_multi_aff
*tiling
;
79 struct gpu_array_info
;
81 /* A group of array references in a kernel that should be handled together.
82 * If private_tile is not NULL, then it is mapped to registers.
83 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
84 * Otherwise, it is accessed from global memory.
86 struct gpu_array_ref_group
{
87 /* The references in this group access this array. */
88 struct gpu_array_info
*array
;
89 /* Position of this group in the list of reference groups of array. */
92 /* The following fields are use during the construction of the groups.
93 * access is the combined access relation relative to the shared
94 * memory tiling. In particular, the domain of the map corresponds
95 * to the first shared_len dimensions of the computed schedule.
96 * write is set if any access in the group is a write.
97 * exact_write is set if all writes are definite writes.
98 * slice is set if there is at least one access in the group
99 * that refers to more than one element
106 /* The shared memory tile, NULL if none. */
107 struct gpu_array_tile
*shared_tile
;
109 /* The private memory tile, NULL if none. */
110 struct gpu_array_tile
*private_tile
;
112 /* References in this group; point to elements of a linked list. */
114 struct gpu_stmt_access
**refs
;
116 /* Last shared memory tile dimension that affects tile of this group. */
122 struct ppcg_options
*options
;
124 /* Callback for printing of AST in appropriate format. */
125 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
126 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
127 struct gpu_types
*types
, void *user
);
130 struct gpu_prog
*prog
;
131 /* The generated AST. */
134 /* The sequence of types for which a definition has been printed. */
135 struct gpu_types types
;
137 /* User specified tile, grid and block sizes for each kernel */
138 isl_union_map
*sizes
;
140 /* Effectively used tile, grid and block sizes for each kernel */
141 isl_union_map
*used_sizes
;
143 /* Identifier of current kernel. */
145 /* Pointer to the current kernel. */
146 struct ppcg_kernel
*kernel
;
147 /* Does the computed schedule exhibit any parallelism? */
150 /* First tile dimension. */
152 /* Number of tile dimensions. */
154 /* Number of initial parallel loops among tile dimensions. */
157 /* Number of dimensions determining shared memory. */
160 /* Number of rows in the untiled schedule. */
162 /* Number of rows in the tiled schedule. */
164 /* Number of rows in schedule after tiling/wrapping over threads. */
165 int thread_tiled_len
;
167 /* Global untiled schedule. */
168 isl_union_map
*sched
;
169 /* Local (per kernel launch) tiled schedule. */
170 isl_union_map
*tiled_sched
;
171 /* Local schedule per shared memory tile loop iteration. */
172 isl_union_map
*local_sched
;
174 /* Local tiled schedule projected onto the shared tile loops and
175 * the loops that will be wrapped over the threads,
176 * with all shared tile loops parametrized.
178 isl_union_map
*shared_sched
;
179 /* Projects out the loops that will be wrapped over the threads
182 isl_union_map
*shared_proj
;
184 /* A map that takes the range of shared_sched as input,
185 * wraps the appropriate loops over the threads and then projects
188 isl_map
*privatization
;
190 /* A map from the shared memory tile loops and the thread indices
191 * (as parameters) to the set of accessed memory elements that
192 * will be accessed through private copies.
194 isl_union_map
*private_access
;
196 /* The schedule for the current private/shared access
197 * (within print_private_access or print_shared_access).
200 /* The array reference group corresponding to copy_sched. */
201 struct gpu_array_ref_group
*copy_group
;
203 /* Is any array in the current kernel marked force_private? */
204 int any_force_private
;
206 /* First loop to unroll (or -1 if none) in the current part of the
213 /* Note: in the input file, the sizes of the grid and the blocks
214 * are specified in the order x, y, z, but internally, the sizes
215 * are stored in reverse order, so that the last element always
216 * refers to the x dimension.
223 /* Print the name of the local copy of a given group of array references.
225 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
226 struct gpu_array_ref_group
*group
)
230 if (group
->private_tile
)
231 p
= isl_printer_print_str(p
, "private_");
232 else if (group
->shared_tile
)
233 p
= isl_printer_print_str(p
, "shared_");
236 p
= isl_printer_print_str(p
, group
->array
->name
);
237 if (!global
&& group
->array
->n_group
> 1) {
238 p
= isl_printer_print_str(p
, "_");
239 p
= isl_printer_print_int(p
, group
->nr
);
245 /* Collect all references to the given array and store pointers to them
248 * If the array contains structures, then there is no need to collect
249 * the references since we will not be computing any reference groups.
251 static void collect_references(struct gpu_prog
*prog
,
252 struct gpu_array_info
*array
)
257 if (array
->has_compound_element
)
261 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
262 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
263 struct gpu_stmt_access
*access
;
265 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
267 name
= isl_map_get_tuple_name(access
->access
,
269 if (name
&& !strcmp(array
->name
, name
))
275 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
279 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
280 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
281 struct gpu_stmt_access
*access
;
283 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
285 name
= isl_map_get_tuple_name(access
->access
,
287 if (!name
|| strcmp(array
->name
, name
))
290 array
->refs
[n
++] = access
;
295 /* Create a gpu_array_tile for an array of dimension "n_index".
297 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
300 struct gpu_array_tile
*tile
;
302 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
307 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
310 for (i
= 0; i
< n_index
; ++i
) {
311 tile
->bound
[i
].size
= NULL
;
312 tile
->bound
[i
].lb
= NULL
;
313 tile
->bound
[i
].stride
= NULL
;
314 tile
->bound
[i
].shift
= NULL
;
315 tile
->bound
[i
].shift_map
= NULL
;
321 static void *free_tile(struct gpu_array_tile
*tile
)
328 for (j
= 0; j
< tile
->n
; ++j
) {
329 isl_val_free(tile
->bound
[j
].size
);
330 isl_val_free(tile
->bound
[j
].stride
);
331 isl_aff_free(tile
->bound
[j
].lb
);
332 isl_aff_free(tile
->bound
[j
].shift
);
333 isl_basic_map_free(tile
->bound
[j
].shift_map
);
336 isl_multi_aff_free(tile
->tiling
);
342 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
343 __isl_keep isl_set
*accessed
)
348 id
= isl_set_get_tuple_id(accessed
);
350 for (i
= 0; i
< scop
->pet
->n_array
; ++i
) {
353 id_i
= isl_set_get_tuple_id(scop
->pet
->arrays
[i
]->extent
);
360 return i
< scop
->pet
->n_array
? scop
->pet
->arrays
[i
] : NULL
;
363 /* Compute and return the extent of "array", taking into account the set of
366 * In particular, the extent in the outer dimension is taken
367 * from "accessed", while then extent in the remaing dimensions
368 * are taken from array->extent.
370 * The extent in the outer dimension cannot be taken from array->extent
371 * because that may be unbounded. Furthermore, even if it is bounded,
372 * it may be larger than the piece of the array that is being accessed.
374 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
375 __isl_keep isl_set
*accessed
)
382 extent
= isl_set_copy(array
->extent
);
384 n_index
= isl_set_dim(accessed
, isl_dim_set
);
388 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
389 outer
= isl_set_copy(accessed
);
390 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
391 extent
= isl_set_flat_product(outer
, extent
);
392 id
= isl_set_get_tuple_id(accessed
);
393 extent
= isl_set_set_tuple_id(extent
, id
);
398 /* Is the array "array" being extracted a read-only scalar?
400 * That is, is "array" a scalar that is never possibly written to.
401 * An array containing structures is never considered to be a scalar.
403 static int is_read_only_scalar(struct gpu_array_info
*array
,
404 struct gpu_prog
*prog
)
407 isl_union_map
*write
;
410 if (array
->has_compound_element
)
412 if (array
->n_index
!= 0)
415 write
= isl_union_map_copy(prog
->may_write
);
416 space
= isl_set_universe(isl_space_copy(array
->space
));
417 write
= isl_union_map_intersect_range(write
,
418 isl_union_set_from_set(space
));
419 empty
= isl_union_map_is_empty(write
);
420 isl_union_map_free(write
);
425 /* Compute bounds on the host arrays based on the accessed elements
426 * and collect all references to the array.
428 * If the array is zero-dimensional and does not contain structures,
429 * i.e., if the array is a scalar, we check whether it is read-only.
431 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
434 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
438 struct pet_array
*pa
;
439 struct gpu_array_info
*info
;
442 info
= &prog
->array
[prog
->n_array
];
445 n_index
= isl_set_dim(array
, isl_dim_set
);
446 name
= isl_set_get_tuple_name(array
);
447 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
448 isl_pw_aff
*, n_index
);
452 info
->space
= isl_set_get_space(array
);
453 info
->name
= strdup(name
);
454 info
->n_index
= n_index
;
455 info
->bound
= bounds
;
456 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
458 pa
= find_array(prog
->scop
, array
);
460 isl_die(isl_set_get_ctx(array
), isl_error_internal
,
461 "unable to find array in scop", goto error
);
463 info
->type
= strdup(pa
->element_type
);
464 info
->size
= pa
->element_size
;
465 info
->local
= pa
->declared
&& !pa
->exposed
;
466 info
->has_compound_element
= pa
->element_is_record
;
467 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
469 extent
= compute_extent(pa
, array
);
470 info
->extent
= extent
;
471 for (i
= 0; i
< n_index
; ++i
) {
477 dom
= isl_set_copy(extent
);
478 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
480 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
481 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
482 fprintf(stderr
, "unable to determine extent of '%s' "
483 "in dimension %d\n", info
->name
, i
);
484 dom
= isl_set_free(dom
);
486 bound
= isl_set_dim_max(dom
, 0);
487 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
488 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
489 one
= isl_aff_zero_on_domain(ls
);
490 one
= isl_aff_add_constant_si(one
, 1);
491 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
492 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
495 if (!isl_pw_aff_is_cst(bound
))
499 collect_references(prog
, info
);
508 /* Compute a mapping from all outer arrays (of structs) in scop
509 * to their innermost arrays.
511 * In particular, for each array of a primitive type, the result
512 * contains the identity mapping on that array.
513 * For each array involving member accesses, the result
514 * contains a mapping from the elements of the outer array of structs
515 * to all corresponding elements of the innermost nested arrays.
517 static __isl_give isl_union_map
*compute_to_inner(struct ppcg_scop
*scop
)
520 isl_union_map
*to_inner
;
522 to_inner
= isl_union_map_empty(isl_set_get_space(scop
->context
));
524 for (i
= 0; i
< scop
->pet
->n_array
; ++i
) {
525 struct pet_array
*array
= scop
->pet
->arrays
[i
];
529 if (array
->element_is_record
)
532 set
= isl_set_copy(array
->extent
);
533 map
= isl_set_identity(isl_set_copy(set
));
535 while (set
&& isl_set_is_wrapping(set
)) {
539 id
= isl_set_get_tuple_id(set
);
540 wrapped
= isl_set_unwrap(set
);
541 wrapped
= isl_map_domain_map(wrapped
);
542 wrapped
= isl_map_set_tuple_id(wrapped
, isl_dim_in
, id
);
543 map
= isl_map_apply_domain(map
, wrapped
);
544 set
= isl_map_domain(isl_map_copy(map
));
547 map
= isl_map_gist_domain(map
, set
);
549 to_inner
= isl_union_map_add_map(to_inner
, map
);
555 /* Remove independence from the order constraints "order" on array "array".
556 * Since the pairs of iterations in the filter relation of an independence
557 * are guaranteed to be completely independent by the user, there is
558 * no need to ensure that live ranges are ordered along thong pairs.
559 * We make an exception for local variables, though, as the independence
560 * guarantee does not apply to those.
562 * The order constraints are used in two places.
563 * Those on scalars are used in check_scalar_live_ranges to check if
564 * we need to force the scalar to be private. Any non-local scalar
565 * should not be forced scalar if it only appears in independent loops.
566 * Those on non-scalars are added to the coincidence constraints
567 * in compute_schedule because we do not support any array expansion.
568 * Accesses to non-local arrays should not prevent a loop from being
569 * considered coincident so we should indeed remove those constraints
570 * from the order constraints.
572 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
573 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
577 for (i
= 0; i
< prog
->scop
->pet
->n_independence
; ++i
) {
578 struct pet_independence
*pi
= prog
->scop
->pet
->independences
[i
];
579 if (isl_union_set_contains(pi
->local
, array
->space
))
582 order
= isl_union_map_subtract(order
,
583 isl_union_map_copy(pi
->filter
));
589 /* For each array in "prog", store the (untagged) order dependences
590 * derived from the array in array->dep_order.
591 * In particular, consider all references that access the given array
592 * and take the order dependences that have one of these references
593 * as source. (Since an order dependence relates two references to
594 * the same array, the target of these order dependences will also
595 * be one of these references.)
596 * Additionally, store the union of these array->dep_order relations
597 * for all non-scalar arrays in prog->array_order.
599 void collect_order_dependences(struct gpu_prog
*prog
)
603 isl_union_map
*accesses
;
605 space
= isl_union_map_get_space(prog
->read
);
606 prog
->array_order
= isl_union_map_empty(space
);
608 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
609 accesses
= isl_union_map_union(accesses
,
610 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
611 accesses
= isl_union_map_universe(accesses
);
612 accesses
= isl_union_map_apply_range(accesses
,
613 isl_union_map_copy(prog
->to_outer
));
615 for (i
= 0; i
< prog
->n_array
; ++i
) {
616 struct gpu_array_info
*array
= &prog
->array
[i
];
619 isl_union_map
*order
;
621 set
= isl_set_universe(isl_space_copy(array
->space
));
622 uset
= isl_union_set_from_set(set
);
623 uset
= isl_union_map_domain(
624 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
626 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
627 order
= isl_union_map_intersect_domain(order
, uset
);
628 order
= isl_union_map_zip(order
);
629 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
630 order
= remove_independences(prog
, array
, order
);
631 array
->dep_order
= order
;
633 if (gpu_array_is_scalar(array
))
636 prog
->array_order
= isl_union_map_union(prog
->array_order
,
637 isl_union_map_copy(array
->dep_order
));
640 isl_union_map_free(accesses
);
643 /* Construct a gpu_array_info for each array possibly accessed by "prog" and
644 * collect them in prog->array.
646 * If there are any member accesses involved, then they are first mapped
647 * to the outer arrays of structs.
649 * If we are allowing live range reordering, then also set
650 * the dep_order field. Otherwise leave it NULL.
652 static int collect_array_info(struct gpu_prog
*prog
)
655 isl_union_set
*arrays
;
657 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
658 arrays
= isl_union_set_union(arrays
,
659 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
661 arrays
= isl_union_set_apply(arrays
,
662 isl_union_map_copy(prog
->to_outer
));
664 arrays
= isl_union_set_coalesce(arrays
);
666 prog
->n_array
= isl_union_set_n_set(arrays
);
667 prog
->array
= isl_calloc_array(prog
->ctx
,
668 struct gpu_array_info
, prog
->n_array
);
671 r
= isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
672 isl_union_set_free(arrays
);
674 if (prog
->scop
->options
->live_range_reordering
)
675 collect_order_dependences(prog
);
680 static void free_array_info(struct gpu_prog
*prog
)
684 for (i
= 0; i
< prog
->n_array
; ++i
) {
685 int n_index
= prog
->array
[i
].n_index
;
686 free(prog
->array
[i
].type
);
687 free(prog
->array
[i
].name
);
688 for (j
= 0; j
< n_index
; ++j
)
689 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
690 isl_space_free(prog
->array
[i
].space
);
691 isl_set_free(prog
->array
[i
].extent
);
692 free(prog
->array
[i
].bound
);
693 free(prog
->array
[i
].refs
);
694 isl_union_map_free(prog
->array
[i
].dep_order
);
699 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
700 * as an array or through a pointer reference, but as a single data element.
701 * At the moment, scalars are represented as zero-dimensional arrays.
702 * A zero-dimensional array containing structures is not considered
705 int gpu_array_is_scalar(struct gpu_array_info
*array
)
707 return !array
->has_compound_element
&& array
->n_index
== 0;
710 /* Is "array" a read-only scalar?
712 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
714 return array
->read_only_scalar
;
717 /* Return the set of parameter values for which the array has a positive
718 * size in all dimensions.
719 * If the sizes are only valid for some parameter values, then those
720 * constraints are also taken into account.
722 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
728 space
= isl_space_params(isl_space_copy(array
->space
));
729 guard
= isl_set_universe(space
);
731 for (i
= 0; i
< array
->n_index
; ++i
) {
733 isl_set
*guard_i
, *zero
;
735 bound
= isl_pw_aff_copy(array
->bound
[i
]);
736 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
737 zero
= isl_pw_aff_zero_set(bound
);
738 guard_i
= isl_set_subtract(guard_i
, zero
);
739 guard
= isl_set_intersect(guard
, guard_i
);
745 /* Internal data structure for extract_size_of_type.
746 * "type" specifies the name of the space that we want to extract.
747 * "res" is used to store the subset of that space.
749 struct ppcg_extract_size_data
{
754 /* This function is called for each set in a union_set.
755 * If the name of the set matches data->type, we store the
758 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
760 struct ppcg_extract_size_data
*data
= user
;
763 name
= isl_set_get_tuple_name(size
);
764 if (name
&& !strcmp(name
, data
->type
)) {
773 /* Given a union map { kernel[i] -> *[...] },
774 * return the range in the space called "type" for the kernel with
775 * sequence number "id".
777 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
778 const char *type
, int id
)
782 isl_union_set
*local_sizes
;
783 struct ppcg_extract_size_data data
= { type
, NULL
};
788 space
= isl_union_map_get_space(sizes
);
789 space
= isl_space_set_from_params(space
);
790 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
791 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
792 dom
= isl_set_universe(space
);
793 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
795 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
796 isl_union_map_copy(sizes
));
797 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
798 isl_union_set_free(local_sizes
);
802 /* Given a singleton set, extract the first (at most *len) elements
803 * of the single integer tuple into *sizes and update *len if needed.
805 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
813 dim
= isl_set_dim(set
, isl_dim_set
);
817 for (i
= 0; i
< *len
; ++i
) {
820 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
823 sizes
[i
] = isl_val_get_num_si(v
);
830 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
831 * if the option debug->dump_sizes is set.
833 static void set_used_sizes(struct gpu_gen
*gen
, const char *type
, int id
,
840 if (!gen
->options
->debug
->dump_sizes
)
843 space
= isl_union_map_get_space(gen
->used_sizes
);
844 space
= isl_space_set_from_params(space
);
845 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
846 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
847 space
= isl_space_from_domain(space
);
848 space
= isl_space_add_dims(space
, isl_dim_out
, len
);
849 space
= isl_space_set_tuple_name(space
, isl_dim_out
, type
);
851 map
= isl_map_universe(space
);
852 map
= isl_map_fix_si(map
, isl_dim_in
, 0, id
);
853 for (i
= 0; i
< len
; ++i
)
854 map
= isl_map_fix_si(map
, isl_dim_out
, i
, sizes
[i
]);
856 gen
->used_sizes
= isl_union_map_add_map(gen
->used_sizes
, map
);
859 /* Extract user specified "tile" sizes from the "sizes" command line option,
860 * defaulting to option->tile_size in each dimension.
861 * Add the effectively used sizes to gen->used_sizes.
863 static void read_tile_sizes(struct gpu_gen
*gen
)
868 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
869 assert(gen
->tile_size
);
870 for (n
= 0; n
< gen
->tile_len
; ++n
)
871 gen
->tile_size
[n
] = gen
->options
->tile_size
;
873 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
874 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
875 set_used_sizes(gen
, "tile", gen
->kernel_id
,
876 gen
->tile_size
, gen
->tile_len
);
878 if (gen
->n_parallel
> gen
->tile_len
)
879 gen
->n_parallel
= gen
->tile_len
;
882 /* Extract user specified "block" sizes from the "sizes" command line option,
883 * after filling in some potentially useful defaults.
884 * Add the effectively used sizes to gen->used_sizes.
886 static void read_block_sizes(struct gpu_gen
*gen
)
892 gen
->n_block
= (n
<= 3) ? n
: 3;
893 switch (gen
->n_block
) {
895 gen
->block_dim
[0] = 512;
898 gen
->block_dim
[0] = 32;
899 gen
->block_dim
[1] = 16;
902 gen
->block_dim
[0] = 32;
903 gen
->block_dim
[1] = 4;
904 gen
->block_dim
[2] = 4;
908 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
909 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
910 set_used_sizes(gen
, "block", gen
->kernel_id
,
911 gen
->block_dim
, gen
->n_block
);
914 /* Extract user specified "grid" sizes from the "sizes" command line option,
915 * after filling in some potentially useful defaults.
916 * Add the effectively used sizes to gen->used_sizes.
918 static void read_grid_sizes(struct gpu_gen
*gen
)
920 int n
= gen
->n_parallel
;
923 gen
->n_grid
= (n
<= 2) ? n
: 2;
924 switch (gen
->n_grid
) {
926 gen
->grid_dim
[0] = 32768;
929 gen
->grid_dim
[0] = 256;
930 gen
->grid_dim
[1] = 256;
934 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
935 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
936 set_used_sizes(gen
, "grid", gen
->kernel_id
, gen
->grid_dim
, gen
->n_grid
);
939 /* Extract user specified sizes from the "sizes" command line option
940 * after filling in some potentially useful defaults.
942 static void read_sizes(struct gpu_gen
*gen
)
944 read_tile_sizes(gen
);
945 read_block_sizes(gen
);
946 read_grid_sizes(gen
);
949 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
956 for (i
= 0; i
< n
; ++i
) {
957 struct gpu_stmt_access
*access
, *next
;
959 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
961 isl_id_free(access
->ref_id
);
962 isl_map_free(access
->access
);
963 isl_map_free(access
->tagged_access
);
967 isl_id_free(stmts
[i
].id
);
974 /* Construct a map from a domain of dimensionality "len"
975 * to a domain of dimensionality "len" + "tile_len" that tiles
976 * the "tile_len" coordinates starting at "first".
977 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
978 * "dim" prescribes the parameters.
980 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
981 int first
, int tile_len
, int *tile_size
)
988 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
989 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
990 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
991 ls
= isl_local_space_from_space(dim
);
993 for (i
= 0; i
< len
- tile_len
; ++i
) {
994 int j
= i
< first
? i
: i
+ tile_len
;
995 int k
= i
< first
? i
: i
+ 2 * tile_len
;
997 c
= isl_equality_alloc(isl_local_space_copy(ls
));
998 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
999 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
1000 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1003 for (i
= 0; i
< tile_len
; ++i
) {
1004 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1005 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
1007 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1008 first
+ i
, tile_size
[i
]);
1009 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1010 first
+ i
+ tile_len
, 1);
1011 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1013 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1014 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1015 first
+ i
+ tile_len
, 1);
1016 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1018 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1019 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1020 first
+ i
+ tile_len
, -1);
1021 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
1022 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1025 isl_local_space_free(ls
);
1027 return isl_map_from_basic_map(bmap
);
1030 /* Construct a map from a domain of dimensionality "len"
1031 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
1032 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
1033 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
1034 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
1035 * that are projected out at the end.
1036 * "dim" prescribes the parameters.
1038 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
1039 int first
, int wrap_len
, int *wrap_size
)
1042 isl_basic_map
*bmap
;
1044 isl_local_space
*ls
;
1046 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1047 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
1048 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1049 ls
= isl_local_space_from_space(dim
);
1051 for (i
= 0; i
< len
; ++i
) {
1052 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
1054 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1055 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
1056 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
1057 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1060 for (i
= 0; i
< wrap_len
; ++i
) {
1061 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1062 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1064 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1065 first
+ wrap_len
+ i
, 1);
1066 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1067 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
1068 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1070 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1071 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1072 first
+ wrap_len
+ i
, 1);
1073 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1075 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1076 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1077 first
+ wrap_len
+ i
, -1);
1078 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
1079 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1082 isl_local_space_free(ls
);
1084 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
1085 first
+ 2 * wrap_len
, wrap_len
);
1087 return isl_map_from_basic_map(bmap
);
1090 /* Add "n" parameters named prefix%d.
1092 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
1093 int n
, const char *prefix
)
1099 nparam
= isl_set_dim(set
, isl_dim_param
);
1100 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
1102 for (i
= 0; i
< n
; ++i
) {
1103 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1104 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1111 /* Equate the "n" dimensions of "set" starting at "first" to
1112 * freshly created parameters named prefix%d.
1114 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
1115 int first
, int n
, const char *prefix
)
1120 nparam
= isl_set_dim(set
, isl_dim_param
);
1122 set
= add_params(set
, n
, prefix
);
1124 for (i
= 0; i
< n
; ++i
)
1125 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
1126 isl_dim_set
, first
+ i
);
1131 /* Given a parameter space "space", create a set of dimension "len"
1132 * of which the "n" dimensions starting at "first" are equated to
1133 * freshly created parameters named prefix%d.
1135 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
1136 int len
, int first
, int n
, const char *prefix
)
1140 space
= isl_space_set_from_params(space
);
1141 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
1142 set
= isl_set_universe(space
);
1144 return parametrize(set
, first
, n
, prefix
);
1147 /* Tile the B loops over the tile sizes and then tile/wrap
1148 * the T1 loops over the blocks.
1150 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
1151 __isl_take isl_union_map
*sched
)
1154 isl_map
*tiling
, *block_tiling
;
1156 dim
= isl_union_map_get_space(sched
);
1157 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
1158 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
1160 if (gen
->options
->wrap
)
1161 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
1162 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1164 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
1165 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1167 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
1169 tiling
= isl_map_apply_range(tiling
, block_tiling
);
1171 sched
= isl_union_map_apply_range(sched
,
1172 isl_union_map_from_map(tiling
));
1174 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1179 /* Equate the "T1P" iterators in the tiled schedule "sched"
1180 * to the block dimensions.
1182 static __isl_give isl_union_map
*parametrize_tiled_schedule(
1183 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
1188 dim
= isl_union_map_get_space(sched
);
1189 par
= parametrization(dim
, gen
->tiled_len
,
1190 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
1191 sched
= isl_union_map_intersect_range(sched
,
1192 isl_union_set_from_set(par
));
1197 /* Tile/wrap the P1 loops over the threads.
1199 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
1200 __isl_take isl_union_map
*sched
)
1206 dim
= isl_union_map_get_space(sched
);
1208 if (gen
->options
->wrap
)
1209 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
1210 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1212 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
1213 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1214 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
1216 sched
= isl_union_map_apply_range(sched
,
1217 isl_union_map_from_map(tiling
));
1219 par
= parametrization(dim
, gen
->thread_tiled_len
,
1220 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1222 sched
= isl_union_map_intersect_range(sched
,
1223 isl_union_set_from_set(par
));
1225 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1230 /* If the user asked for it, scale the shared memory tile loops
1231 * (T1T and T2) of "sched" by gen->tile_size[i].
1232 * If we are not performing "wrapping", then additionally scale the T1P
1233 * loops by gen->grid_dim[i].
1235 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
1236 __isl_take isl_union_map
*sched
)
1240 isl_basic_map
*scale
;
1242 isl_local_space
*ls
;
1244 if (!gen
->options
->scale_tile_loops
)
1247 dim
= isl_union_map_get_space(sched
);
1248 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
1249 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
1250 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1251 ls
= isl_local_space_from_space(dim
);
1253 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
1256 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
1257 f
= gen
->tile_size
[i
- gen
->tile_first
];
1258 if (!gen
->options
->wrap
)
1259 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
1260 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
1261 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
1262 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
1265 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1266 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1267 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1268 scale
= isl_basic_map_add_constraint(scale
, c
);
1271 isl_local_space_free(ls
);
1273 sched
= isl_union_map_apply_range(sched
,
1274 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1279 /* If we are not performing "wrapping" and if the user asked for it,
1280 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1282 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1283 __isl_take isl_union_map
*sched
)
1287 isl_basic_map
*scale
;
1289 isl_local_space
*ls
;
1291 if (gen
->options
->wrap
)
1293 if (!gen
->options
->scale_tile_loops
)
1296 dim
= isl_union_map_get_space(sched
);
1297 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1298 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1299 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1300 ls
= isl_local_space_from_space(dim
);
1302 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1305 if (i
>= gen
->shared_len
&&
1306 i
< gen
->shared_len
+ gen
->n_block
)
1307 f
= gen
->block_dim
[i
- gen
->shared_len
];
1309 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1310 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1311 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1312 scale
= isl_basic_map_add_constraint(scale
, c
);
1315 isl_local_space_free(ls
);
1317 sched
= isl_union_map_apply_range(sched
,
1318 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1323 /* If we are not performing "wrapping" and if the user asked for it,
1324 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1326 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1327 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1331 isl_basic_map
*scale
;
1333 isl_local_space
*ls
;
1335 if (gen
->options
->wrap
)
1337 if (!gen
->options
->scale_tile_loops
)
1340 dim
= isl_union_map_get_space(sched
);
1341 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1342 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1343 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1344 ls
= isl_local_space_from_space(dim
);
1346 for (i
= 0; i
< len
; ++i
) {
1349 if (i
>= first
&& i
< first
+ n_tile
)
1350 f
= gen
->kernel
->block_dim
[i
- first
];
1352 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1353 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1354 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1355 scale
= isl_basic_map_add_constraint(scale
, c
);
1358 isl_local_space_free(ls
);
1360 sched
= isl_union_map_apply_range(sched
,
1361 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1366 /* Add "len" parameters p[i] called prefix%d,
1367 * with bounds to 0 <= p[i] < size[i].
1369 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1370 int len
, int *size
, const char *prefix
)
1375 isl_basic_set
*bset
;
1377 isl_local_space
*ls
;
1380 nparam
= isl_set_dim(set
, isl_dim_param
);
1381 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1383 for (i
= 0; i
< len
; ++i
) {
1384 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1385 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1389 dim
= isl_set_get_space(set
);
1390 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1391 ls
= isl_local_space_from_space(dim
);
1393 for (i
= 0; i
< len
; ++i
) {
1394 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1395 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1397 bset
= isl_basic_set_add_constraint(bset
, c
);
1399 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1400 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1402 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1403 bset
= isl_basic_set_add_constraint(bset
, c
);
1406 isl_local_space_free(ls
);
1408 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1411 /* Add "len" parameters p[i] called prefix%d and intersect "set"
1414 * { : 0 <= p[i] < size[i] }
1416 * or an overapproximation.
1418 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1419 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1425 isl_local_space
*ls
;
1428 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1429 nparam
= isl_set_dim(set
, isl_dim_param
);
1430 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1432 for (i
= 0; i
< len
; ++i
) {
1433 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1434 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1438 space
= isl_space_params(isl_set_get_space(set
));
1439 ls
= isl_local_space_from_space(space
);
1440 for (i
= 0; i
< len
; ++i
) {
1441 isl_pw_aff
*param
, *size_i
, *zero
;
1444 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1445 isl_dim_param
, nparam
+ i
);
1447 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1448 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1449 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1450 set
= isl_set_intersect_params(set
, bound
);
1452 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1453 bound
= isl_pw_aff_ge_set(param
, zero
);
1454 set
= isl_set_intersect_params(set
, bound
);
1456 isl_local_space_free(ls
);
1461 /* Construct a map from an access to group->array to the corresponding
1462 * shared/private memory tile.
1463 * The map is of the form
1465 * { [D[i] -> A[a]] -> T[t] }
1467 * where D represents the initial shared_len dimensions
1468 * of the computed schedule.
1470 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1472 struct gpu_array_tile
*tile
;
1473 isl_multi_aff
*tiling
;
1475 tile
= group
->private_tile
;
1477 tile
= group
->shared_tile
;
1479 tiling
= isl_multi_aff_copy(tile
->tiling
);
1481 return isl_map_from_multi_aff(tiling
);
1484 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1486 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1492 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1495 fixed
= isl_val_is_int(v
);
1501 /* Given a schedule that iterates over all elements in a piece of an array,
1502 * perform tiling/wrapping over the threads.
1504 * In particular, we tile the final iterators so that the final thread
1505 * dimension runs over the final array dimension.
1506 * However, if those final iterators have only a single iteration,
1507 * we try to tile earlier iterators instead.
1509 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1510 __isl_take isl_map
*sched
)
1513 isl_union_map
*usched
;
1516 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1520 n_tile
= gen
->kernel
->n_block
;
1521 if (n_tile
> nvar
) {
1523 sched
= isl_map_insert_dims(sched
,
1524 isl_dim_out
, 0, n_tile
- nvar
);
1525 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1526 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1530 first
= nvar
- n_tile
;
1532 for (; first
> 0; first
--)
1533 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1536 dim
= isl_map_get_space(sched
);
1537 dim
= isl_space_params(dim
);
1538 if (gen
->options
->wrap
)
1539 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1540 n_tile
, gen
->kernel
->block_dim
);
1542 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1543 n_tile
, gen
->kernel
->block_dim
);
1544 sched
= isl_map_apply_range(sched
, tiling
);
1546 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1547 sched
= isl_map_intersect_range(sched
, par
);
1549 usched
= isl_union_map_from_map(sched
);
1550 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1552 sched
= isl_map_from_union_map(usched
);
1557 /* Return the union of all read (read = 1) and/or write (write = 1)
1558 * access relations in the group.
1560 static __isl_give isl_union_map
*group_access_relation(
1561 struct gpu_array_ref_group
*group
, int read
, int write
)
1564 isl_union_map
*access
;
1566 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1567 for (i
= 0; i
< group
->n_ref
; ++i
) {
1570 if (!((read
&& group
->refs
[i
]->read
) ||
1571 (write
&& group
->refs
[i
]->write
)))
1573 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1574 access
= isl_union_map_union(access
,
1575 isl_union_map_from_map(map_i
));
1581 /* Return the union of all tagged access relations in the group.
1583 static __isl_give isl_union_map
*group_tagged_access_relation(
1584 struct gpu_array_ref_group
*group
)
1587 isl_union_map
*access
;
1589 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1590 for (i
= 0; i
< group
->n_ref
; ++i
) {
1593 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1594 access
= isl_union_map_union(access
,
1595 isl_union_map_from_map(map_i
));
1601 /* Return the extent of "array", recomputed from the bounds.
1602 * The recomputed extent may be simpler than the original extent.
1604 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1609 isl_local_space
*ls
;
1612 id
= isl_set_get_tuple_id(array
->extent
);
1613 space
= isl_set_get_space(array
->extent
);
1614 extent
= isl_set_universe(isl_space_copy(space
));
1615 ls
= isl_local_space_from_space(space
);
1616 for (i
= 0; i
< array
->n_index
; ++i
) {
1622 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1624 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1626 index
= isl_pw_aff_from_aff(aff
);
1627 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1628 bound
= isl_pw_aff_from_range(bound
);
1629 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1630 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1632 lt
= isl_pw_aff_lt_set(index
, bound
);
1633 extent
= isl_set_intersect(extent
, lt
);
1635 isl_local_space_free(ls
);
1641 /* Return a map from the first shared_len dimensions of the computed
1642 * schedule to the array tile in
1643 * global memory that corresponds to the shared memory copy.
1645 * In particular, return a map
1651 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1655 * 0 <= a <= array_size - 1 (2)
1657 * Note that if some stride has been detected (i.e., when
1658 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1659 * to the shifted and scaled down version.
1661 * Constraints (1) are obtained by mapping the size constraints on the
1662 * shared/private memory tile back to the access relation.
1663 * Constraints (2) are obtained from the (recomputed) extent.
1665 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1668 int n_index
= group
->array
->n_index
;
1674 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1675 space
= isl_space_range(space
);
1676 local
= isl_set_universe(space
);
1677 for (i
= 0; i
< n_index
; ++i
) {
1680 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1681 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1682 bound
= isl_val_sub_ui(bound
, 1);
1683 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1685 local
= isl_set_preimage_multi_aff(local
,
1686 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1687 tile
= isl_set_unwrap(local
);
1688 extent
= array_extent(group
->array
);
1689 tile
= isl_map_intersect_range(tile
, extent
);
1694 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1695 * return the corresponding mapping from the AST schedule to
1696 * to the first shared_len dimensions of the schedule computed by PPCG.
1698 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1699 __isl_take isl_pw_multi_aff
*iterator_map
)
1701 isl_union_map
*umap
;
1703 isl_map
*map
, *sched
;;
1705 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1706 space
= isl_space_from_domain(space
);
1707 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1709 umap
= isl_union_map_copy(gen
->shared_sched
);
1710 umap
= isl_union_map_apply_range(umap
,
1711 isl_union_map_copy(gen
->shared_proj
));
1712 map
= isl_union_map_extract_map(umap
, space
);
1713 isl_union_map_free(umap
);
1715 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1716 sched
= isl_map_detect_equalities(sched
);
1718 return isl_pw_multi_aff_from_map(sched
);
1721 /* Set unroll[j] if the input dimension j is involved in
1722 * the index expression represented by ma.
1724 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1728 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1729 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1732 for (i
= 0; i
< n_out
; ++i
) {
1735 aff
= isl_multi_aff_get_aff(ma
, i
);
1736 for (j
= 0; j
< n_in
; ++j
)
1737 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1743 isl_multi_aff_free(ma
);
1747 /* Given an array pos mapping input dimensions to the corresponding
1748 * output dimension, construct the corresponding map.
1750 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1755 isl_basic_map
*bmap
;
1756 isl_local_space
*ls
;
1758 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1759 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1760 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1761 ls
= isl_local_space_from_space(dim
);
1763 for (i
= 0; i
< len
; ++i
) {
1764 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1765 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1767 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1769 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1771 isl_local_space_free(ls
);
1773 return isl_map_from_basic_map(bmap
);
1776 /* Remove the private tiles from all array reference groups,
1777 * except for the groups of arrays that are marked force_private.
1779 static void remove_private_tiles(struct gpu_gen
*gen
)
1783 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1784 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1786 if (array
->force_private
)
1789 for (j
= 0; j
< array
->n_group
; ++j
) {
1790 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1792 group
->private_tile
= free_tile(group
->private_tile
);
1797 /* Find all loops involved in any of the index expressions for any of
1798 * the private accesses, move them innermost and then mark them as
1799 * requiring unrolling by setting gen->first_unroll.
1800 * The loops involved should all be parallel because of the checks
1801 * we performed in check_private_group_access. Moving them innermost
1802 * is therefore a valid transformation.
1804 * If any of the arrays are marked force_private, however, then
1805 * those loops may not be parallel with respect to the marked arrays.
1806 * If any of the loops would have to be moved innermost for the
1807 * (non forced) private accesses and if there are any force_private
1808 * arrays, then we revert the decision to map the selected arrays
1809 * to private memory. An alternative solution would be to expand
1810 * the force_private arrays.
1812 * Loops up to gen->shared_len are generated before the mapping to
1813 * threads is applied. They should therefore be ignored.
1815 * We compute the hidden equalities of the schedule first
1816 * since we will need them in our calls to isl_pw_multi_aff_from_map
1817 * and because we want to make sure that the same equalities
1818 * are also available to the code generator.
1820 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1821 __isl_take isl_union_map
*sched
)
1824 int unroll
[gen
->thread_tiled_len
];
1825 int perm
[gen
->thread_tiled_len
];
1828 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1830 gen
->first_unroll
= -1;
1832 sched
= isl_union_map_detect_equalities(sched
);
1833 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1835 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1836 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1838 for (j
= 0; j
< array
->n_group
; ++j
) {
1839 isl_union_map
*access
;
1841 isl_pw_multi_aff
*pma
;
1843 if (!array
->groups
[j
]->private_tile
)
1846 access
= group_access_relation(array
->groups
[j
], 1, 1);
1847 access
= isl_union_map_apply_domain(access
,
1848 isl_union_map_copy(sched
));
1850 acc
= isl_map_from_union_map(access
);
1851 pma
= isl_pw_multi_aff_from_map(acc
);
1852 isl_pw_multi_aff_foreach_piece(pma
,
1853 &check_unroll
, unroll
);
1855 isl_pw_multi_aff_free(pma
);
1859 for (i
= gen
->shared_len
; i
< len
; ++i
)
1866 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1870 if (gen
->any_force_private
) {
1871 remove_private_tiles(gen
);
1876 for (i
= 0; i
< gen
->shared_len
; ++i
)
1878 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1881 gen
->first_unroll
= j
- gen
->shared_len
;
1882 for (i
= gen
->shared_len
; i
< len
; ++i
)
1886 dim
= isl_union_map_get_space(sched
);
1887 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1888 sched
= isl_union_map_apply_range(sched
,
1889 isl_union_map_from_map(permute
));
1894 /* Given a constraint
1896 * a(p,i) + j = g f(e)
1898 * or -a(p,i) - j = g f(e) if sign < 0,
1899 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1900 * a(p,i) is assumed to be an expression in only the parameters
1901 * and the input dimensions.
1903 static void extract_stride(__isl_keep isl_constraint
*c
,
1904 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1913 isl_val_free(bound
->stride
);
1914 bound
->stride
= isl_val_copy(stride
);
1916 space
= isl_constraint_get_space(c
);
1917 space
= isl_space_domain(space
);
1919 nparam
= isl_space_dim(space
, isl_dim_param
);
1920 nvar
= isl_space_dim(space
, isl_dim_set
);
1922 v
= isl_constraint_get_constant_val(c
);
1925 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1926 aff
= isl_aff_set_constant_val(aff
, v
);
1928 for (i
= 0; i
< nparam
; ++i
) {
1929 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1931 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1934 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1937 for (i
= 0; i
< nvar
; ++i
) {
1938 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1940 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1943 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1949 /* Given an equality constraint of a map with a single output dimension j,
1950 * check if the constraint is of the form
1952 * a(p,i) + j = g f(e)
1954 * with a(p,i) an expression in the parameters and input dimensions
1955 * and f(e) an expression in the existentially quantified variables.
1956 * If so, and if g is larger than any such g from a previously considered
1957 * constraint, then call extract_stride to record the stride information
1960 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1966 struct gpu_array_bound
*bound
= user
;
1968 ctx
= isl_constraint_get_ctx(c
);
1969 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1970 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1972 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1973 int s
= isl_val_sgn(v
);
1974 isl_val
*stride
= isl_val_zero(ctx
);
1977 for (i
= 0; i
< n_div
; ++i
) {
1978 v
= isl_constraint_get_coefficient_val(c
,
1980 stride
= isl_val_gcd(stride
, v
);
1982 if (!isl_val_is_zero(stride
) &&
1983 isl_val_gt(stride
, bound
->stride
))
1984 extract_stride(c
, bound
, stride
, s
);
1986 isl_val_free(stride
);
1990 isl_constraint_free(c
);
1994 /* Given contraints on an array index i, check if we can find
1995 * a shift a(p) and a stride g such that
1997 * a(p) + i = 0 mod g
1999 * If so, record the information in bound and apply the mapping
2000 * i -> (i + a(p))/g to the array index in bounds and return
2001 * the new constraints.
2002 * If not, simply return the original constraints.
2004 * If bounds is a subset of the space
2008 * then the bound recorded in bound->shift is of the form
2012 * with s(D) equal to a(p) above.
2013 * The mapping recorded in bound->shift_map is of the form
2015 * [D -> i] -> [D -> (i + S(D))/g]
2017 * This mapping is computed as follows.
2018 * We first introduce "i" in the domain through precomposition
2019 * with [D -> i] -> D obtaining
2023 * Adding [D -> i] -> i produces
2025 * [D -> i] -> i + s(D)
2027 * and the domain product with [D -> i] -> D yields
2029 * [D -> i] -> [D -> i + s(D)]
2031 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
2033 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
2034 __isl_take isl_basic_map
*bounds
)
2037 isl_basic_map
*hull
;
2038 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
2039 isl_basic_set
*bset
;
2042 bound
->stride
= NULL
;
2044 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
2046 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
2048 isl_basic_map_free(hull
);
2053 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
2054 space
= isl_basic_map_get_space(bounds
);
2055 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
2056 shift
= isl_basic_map_apply_range(bmap
, shift
);
2057 space
= isl_basic_map_get_space(bounds
);
2058 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
2059 shift
= isl_basic_map_sum(id
, shift
);
2060 space
= isl_basic_map_get_space(bounds
);
2061 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
2062 shift
= isl_basic_map_range_product(id
, shift
);
2064 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
2065 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
2066 space
= isl_space_range(isl_basic_map_get_space(bounds
));
2067 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2068 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
2069 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
2070 scale
= isl_basic_map_from_aff(aff
);
2071 scale
= isl_basic_map_product(id
, scale
);
2073 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
2074 bmap
= isl_basic_map_copy(bound
->shift_map
);
2075 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
2076 bounds
= isl_basic_set_unwrap(bset
);
2081 /* Data used in compute_array_dim_size and compute_size_in_direction.
2083 * pos is the position of the variable representing the array index,
2084 * i.e., the variable for which want to compute the size. This variable
2085 * is also the last variable in the set.
2087 struct gpu_size_info
{
2088 isl_basic_set
*bset
;
2089 struct gpu_array_bound
*bound
;
2093 /* Given a constraint from the basic set describing the bounds on
2094 * an array index, check if it is a lower bound, say m i >= b(x), and,
2095 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2096 * upper bound. If so, and if this bound is smaller than any bound
2097 * derived from earlier constraints, set the size to this bound on
2098 * the expression and the lower bound to ceil(b(x)/m).
2100 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2102 struct gpu_size_info
*size
= user
;
2109 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2110 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2112 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
2113 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
2114 isl_constraint_free(c
);
2118 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2119 aff
= isl_aff_ceil(aff
);
2121 lb
= isl_aff_copy(aff
);
2123 aff
= isl_aff_neg(aff
);
2124 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
2126 v
= isl_basic_set_max_val(size
->bset
, aff
);
2129 if (isl_val_is_int(v
)) {
2130 v
= isl_val_add_ui(v
, 1);
2131 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
2132 isl_val_free(size
->bound
->size
);
2133 size
->bound
->size
= isl_val_copy(v
);
2134 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
2135 isl_aff_free(size
->bound
->lb
);
2136 size
->bound
->lb
= isl_aff_copy(lb
);
2142 isl_constraint_free(c
);
2147 /* Given a basic map "bounds" that maps parameters and input dimensions
2148 * to a single output dimension, look for an expression in the parameters
2149 * and input dimensions such that the range of the output dimension shifted
2150 * by this expression is a constant.
2152 * In particular, we currently only consider lower bounds on the output
2153 * dimension as candidate expressions.
2155 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
2156 __isl_take isl_basic_map
*bounds
)
2158 struct gpu_size_info size
;
2160 bounds
= isl_basic_map_detect_equalities(bounds
);
2161 bounds
= check_stride(bound
, bounds
);
2167 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2168 size
.bset
= isl_basic_map_wrap(bounds
);
2169 size
.bset
= isl_basic_set_flatten(size
.bset
);
2170 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2171 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2173 isl_basic_set_free(size
.bset
);
2175 return bound
->size
? 0 : -1;
2178 /* Check if we can find a memory tile for the given array
2179 * based on the given accesses, and if so, put the results in "tile".
2181 * We project the accesses on each index in turn and look for a parametric
2182 * offset such that the size is constant.
2184 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2188 for (i
= 0; i
< tile
->n
; ++i
) {
2190 isl_basic_map
*hull
;
2192 access_i
= isl_map_copy(access
);
2193 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2194 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2195 1, tile
->n
- (i
+ 1));
2196 access_i
= isl_map_compute_divs(access_i
);
2197 hull
= isl_map_simple_hull(access_i
);
2198 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2205 /* Construct a map with input the shared tile loops and the loops that
2206 * will be wrapped around the threads that relates these later loops
2207 * to the thread indices and then projects them out.
2209 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2217 dim
= isl_union_map_get_space(gen
->shared_sched
);
2219 if (gen
->options
->wrap
)
2220 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2221 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2223 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2224 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2228 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2229 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2232 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2233 priv
= isl_map_intersect_range(priv
, par
);
2235 dim
= isl_map_get_space(priv
);
2236 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2237 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2238 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2241 priv
= isl_map_apply_range(priv
, proj
);
2246 /* Construct a map from domain_dim to domain_dim that increments
2247 * the dimension at position "pos" and leaves all other dimensions
2250 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2253 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2255 isl_basic_map
*next
;
2256 isl_local_space
*ls
;
2258 dim
= isl_space_map_from_set(domain_dim
);
2259 next
= isl_basic_map_universe(isl_space_copy(dim
));
2260 ls
= isl_local_space_from_space(dim
);
2262 for (i
= 0; i
< len
; ++i
) {
2265 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2266 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2267 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2269 c
= isl_constraint_set_constant_si(c
, 1);
2270 next
= isl_basic_map_add_constraint(next
, c
);
2273 isl_local_space_free(ls
);
2275 return isl_map_from_basic_map(next
);
2278 /* Check if the given access is coalesced.
2279 * That is, check whether incrementing the dimension that will get
2280 * wrapped over the last thread index results in incrementing
2281 * the last array index.
2283 * This function is only called for access relations without reuse.
2285 static int access_is_coalesced(struct gpu_gen
*gen
,
2286 __isl_keep isl_union_map
*access
)
2289 isl_map
*access_map
;
2290 isl_map
*next_thread_x
;
2291 isl_map
*next_element
;
2295 access
= isl_union_map_copy(access
);
2296 access
= isl_union_map_apply_domain(access
,
2297 isl_union_map_copy(gen
->tiled_sched
));
2298 access_map
= isl_map_from_union_map(access
);
2300 dim
= isl_map_get_space(access_map
);
2301 dim
= isl_space_domain(dim
);
2302 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2304 dim
= isl_map_get_space(access_map
);
2305 dim
= isl_space_range(dim
);
2306 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2308 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2309 map
= isl_map_apply_range(map
, access_map
);
2311 coalesced
= isl_map_is_subset(map
, next_element
);
2313 isl_map_free(next_element
);
2319 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2320 * dimensions of the computed schedule, check if it is bijective for
2321 * fixed values of the first gen->shared_len dimensions.
2322 * We perform this check by equating these dimensions to parameters.
2324 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2330 access
= isl_map_copy(access
);
2331 space
= isl_space_params(isl_map_get_space(access
));
2332 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2333 0, gen
->shared_len
, "s");
2334 access
= isl_map_intersect_domain(access
, par
);
2335 res
= isl_map_is_bijective(access
);
2336 isl_map_free(access
);
2341 /* Look for the last shared tile loop that affects the offset of "tile"
2342 * and return the result.
2343 * If there is no such loop, then return the index of the loop
2344 * before the first shared tile loop, in particular gen->tile_first - 1.
2346 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2347 struct gpu_array_tile
*tile
)
2351 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2352 for (i
= 0; i
< tile
->n
; ++i
) {
2356 lb
= tile
->bound
[i
].lb
;
2357 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2360 shift
= tile
->bound
[i
].shift
;
2363 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2373 /* Look for the last shared tile loop that affects the offset of the
2374 * shared or private tile and store the result in group->last_shared.
2375 * If there is no such loop, then group->last_shared is set to a value
2376 * before the first shared tile loop, in particular gen->tile_first - 1.
2377 * If there is no tile defined on the array reference group,
2378 * then set group->last_shared to gen->shared_len - 1.
2380 static void set_last_shared(struct gpu_gen
*gen
,
2381 struct gpu_array_ref_group
*group
)
2383 struct gpu_array_tile
*tile
;
2385 group
->last_shared
= gen
->shared_len
- 1;
2387 tile
= group
->private_tile
;
2389 tile
= group
->shared_tile
;
2393 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2396 /* Compute a privatized copy of all access relations from reference groups that
2397 * are mapped to private memory and store the result in gen->privatization.
2399 * Read-only scalars and arrays containing structures are not mapped
2400 * to private memory.
2402 static void compute_private_access(struct gpu_gen
*gen
)
2405 isl_union_map
*private;
2407 if (!gen
->options
->use_private_memory
)
2410 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2412 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2413 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2415 if (gpu_array_is_read_only_scalar(array
))
2417 if (array
->has_compound_element
)
2420 for (j
= 0; j
< array
->n_group
; ++j
) {
2421 if (!array
->groups
[j
]->private_tile
)
2424 private = isl_union_map_union(private,
2425 group_access_relation(array
->groups
[j
], 1, 1));
2429 if (isl_union_map_is_empty(private))
2430 isl_union_map_free(private);
2432 isl_union_map
*priv
;
2434 private = isl_union_map_apply_domain(private,
2435 isl_union_map_copy(gen
->shared_sched
));
2436 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2437 private = isl_union_map_apply_domain(private, priv
);
2438 gen
->private_access
= private;
2442 /* Compute the size of the tile specified by "tile"
2443 * in number of elements and return the result.
2445 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2450 size
= isl_val_one(ctx
);
2452 for (i
= 0; i
< tile
->n
; ++i
)
2453 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2458 /* If max_shared_memory is not set to infinity (-1), then make
2459 * sure that the total amount of shared memory required by the
2460 * array reference groups mapped to shared memory is no larger
2461 * than this maximum.
2463 * We apply a greedy approach and discard (keep in global memory)
2464 * those groups that would result in a total memory size that
2465 * is larger than the maximum.
2467 * This function should be called after any function that may
2468 * affect the decision on whether to place a reference group
2469 * in private, shared or global memory.
2471 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2474 isl_val
*left
, *size
;
2476 if (gen
->options
->max_shared_memory
< 0)
2479 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2481 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2482 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2484 for (j
= 0; j
< array
->n_group
; ++j
) {
2485 struct gpu_array_ref_group
*group
;
2487 group
= array
->groups
[j
];
2488 if (group
->private_tile
)
2490 if (!group
->shared_tile
)
2493 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2494 size
= isl_val_mul_ui(size
, array
->size
);
2496 if (isl_val_le(size
, left
)) {
2497 left
= isl_val_sub(left
, size
);
2502 group
->shared_tile
= free_tile(group
->shared_tile
);
2509 /* Given a description of an array tile "tile" and the "space"
2513 * where D represents the first shared_len schedule dimensions
2514 * and A represents the array, construct an isl_multi_aff
2516 * { [D[i] -> A[a]] -> A'[a'] }
2518 * with A' a scaled down copy of A according to the shifts and strides
2519 * in "tile". In particular,
2521 * a' = (a + shift(i))/stride
2523 * "insert_array" represents
2527 * and is used to insert A into the domain of functions that only
2530 static __isl_give isl_multi_aff
*strided_tile(
2531 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2532 __isl_keep isl_multi_aff
*insert_array
)
2536 isl_multi_aff
*shift
;
2537 isl_multi_val
*stride
;
2539 isl_local_space
*ls
;
2540 isl_multi_aff
*tiling
;
2542 ctx
= isl_space_get_ctx(space
);
2543 space2
= isl_space_domain(isl_space_copy(space
));
2544 ls
= isl_local_space_from_space(space2
);
2545 space2
= isl_space_range(isl_space_copy(space
));
2546 stride
= isl_multi_val_zero(space2
);
2547 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2549 for (i
= 0; i
< tile
->n
; ++i
) {
2550 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2554 if (tile
->bound
[i
].shift
) {
2555 stride_i
= isl_val_copy(bound
->stride
);
2556 shift_i
= isl_aff_copy(bound
->shift
);
2558 stride_i
= isl_val_one(ctx
);
2559 shift_i
= isl_aff_zero_on_domain(
2560 isl_local_space_copy(ls
));
2563 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2564 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2566 isl_local_space_free(ls
);
2568 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2569 isl_multi_aff_copy(insert_array
));
2571 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2572 tiling
= isl_multi_aff_add(tiling
, shift
);
2573 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2578 /* Compute a tiling for the array reference group "group".
2580 * The tiling is of the form
2582 * { [D[i] -> A[a]] -> T[t] }
2584 * where D represents the first shared_len schedule dimensions,
2585 * A represents the global array and T represents the shared or
2586 * private memory tile. The name of T is the name of the local
2589 * If there is any stride in the accesses, then the mapping is
2591 * t = (a + shift(i))/stride - lb(i)
2593 * otherwise, it is simply
2597 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2600 struct gpu_array_tile
*tile
;
2601 struct gpu_array_info
*array
= group
->array
;
2603 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2607 tile
= group
->private_tile
;
2609 tile
= group
->shared_tile
;
2613 space
= isl_map_get_space(group
->access
);
2614 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2616 for (i
= 0; i
< tile
->n
; ++i
)
2617 if (tile
->bound
[i
].shift
)
2621 tiling
= strided_tile(tile
, space
, insert_array
);
2623 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2625 lb
= isl_multi_aff_zero(space
);
2626 for (i
= 0; i
< tile
->n
; ++i
) {
2627 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2628 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2630 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2632 tiling
= isl_multi_aff_sub(tiling
, lb
);
2634 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2635 p
= print_array_name(p
, group
);
2636 local_name
= isl_printer_get_str(p
);
2637 isl_printer_free(p
);
2638 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2641 tile
->tiling
= tiling
;
2644 /* Compute a tiling for all the array reference groups.
2646 static void compute_group_tilings(struct gpu_gen
*gen
)
2650 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2651 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2653 for (j
= 0; j
< array
->n_group
; ++j
)
2654 compute_group_tiling(array
->groups
[j
]);
2658 /* Fill up the groups array with singleton groups, i.e., one group
2659 * per reference, initializing the array, access, write, n_ref and refs fields.
2660 * In particular the access field is initialized to the scheduled
2661 * access relation of the array reference.
2663 * Return the number of elements initialized, i.e., the number of
2664 * active references in the current kernel.
2666 static int populate_array_references(struct gpu_array_info
*array
,
2667 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2671 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2674 for (i
= 0; i
< array
->n_ref
; ++i
) {
2675 isl_union_map
*umap
;
2677 struct gpu_array_ref_group
*group
;
2678 struct gpu_stmt_access
*access
= array
->refs
[i
];
2680 map
= isl_map_copy(access
->access
);
2681 umap
= isl_union_map_from_map(map
);
2682 umap
= isl_union_map_apply_domain(umap
,
2683 isl_union_map_copy(sched
));
2685 if (isl_union_map_is_empty(umap
)) {
2686 isl_union_map_free(umap
);
2690 map
= isl_map_from_union_map(umap
);
2691 map
= isl_map_detect_equalities(map
);
2693 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2695 group
->array
= array
;
2696 group
->access
= map
;
2697 group
->write
= access
->write
;
2698 group
->exact_write
= access
->exact_write
;
2699 group
->slice
= access
->n_index
< array
->n_index
;
2700 group
->refs
= &array
->refs
[i
];
2703 groups
[n
++] = group
;
2709 /* If group->n_ref == 1, then group->refs was set by
2710 * populate_array_references to point directly into
2711 * group->array->refs and should not be freed.
2712 * If group->n_ref > 1, then group->refs was set by join_groups
2713 * to point to a newly allocated array.
2715 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2719 free_tile(group
->shared_tile
);
2720 free_tile(group
->private_tile
);
2721 isl_map_free(group
->access
);
2722 if (group
->n_ref
> 1)
2727 /* Given a map where the input dimensions represent the tile loops,
2728 * eliminate the innermost of those that have a fixed value
2729 * until we reach one that does not (obviously) have a fixed value.
2731 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2732 __isl_take isl_map
*access
)
2736 n
= isl_map_dim(access
, isl_dim_in
);
2738 for (i
= n
- 1; i
>= 0; --i
) {
2739 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2741 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2746 /* Check if the access relations of group1 and group2 overlap within
2747 * the innermost loop. In particular, ignore any inner dimension
2748 * with a fixed value.
2749 * The copying to and from shared memory will be performed within
2750 * the innermost actual loop so we are only allowed to consider
2751 * the dimensions up to that innermost loop while checking whether
2752 * two access relations overlap.
2754 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2755 struct gpu_array_ref_group
*group2
)
2758 isl_map
*access1
, *access2
;
2760 access1
= isl_map_copy(group1
->access
);
2761 access1
= eliminate_fixed_inner_loops(access1
);
2762 access2
= isl_map_copy(group2
->access
);
2763 access2
= eliminate_fixed_inner_loops(access2
);
2764 access1
= isl_map_intersect(access1
, access2
);
2765 empty
= isl_map_is_empty(access1
);
2766 isl_map_free(access1
);
2771 /* Combine the given two groups into a single group, containing
2772 * the references of both groups.
2774 static struct gpu_array_ref_group
*join_groups(
2775 struct gpu_array_ref_group
*group1
,
2776 struct gpu_array_ref_group
*group2
)
2780 struct gpu_array_ref_group
*group
;
2782 ctx
= isl_map_get_ctx(group1
->access
);
2783 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2785 group
->array
= group1
->array
;
2786 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2787 isl_map_copy(group2
->access
));
2788 group
->write
= group1
->write
|| group2
->write
;
2789 group
->exact_write
= group1
->exact_write
&& group2
->exact_write
;
2790 group
->slice
= group1
->slice
|| group2
->slice
;
2791 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2792 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2794 assert(group
->refs
);
2795 for (i
= 0; i
< group1
->n_ref
; ++i
)
2796 group
->refs
[i
] = group1
->refs
[i
];
2797 for (i
= 0; i
< group2
->n_ref
; ++i
)
2798 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2803 /* Combine the given two groups into a single group and free
2804 * the original two groups.
2806 static struct gpu_array_ref_group
*join_groups_and_free(
2807 struct gpu_array_ref_group
*group1
,
2808 struct gpu_array_ref_group
*group2
)
2810 struct gpu_array_ref_group
*group
;
2812 group
= join_groups(group1
, group2
);
2813 free_array_ref_group(group1
);
2814 free_array_ref_group(group2
);
2818 /* Compute the private and/or shared memory tiles for the array
2819 * reference group "group" of array "array".
2820 * Return 0 on success and -1 on error.
2822 * If the array is a read-only scalar or if the user requested
2823 * not to use shared or private memory, then we do not need to do anything.
2825 * If any reference in the reference group accesses more than one element,
2826 * then we would have to make sure that the layout in shared memory
2827 * is the same as that in global memory. Since we do not handle this yet
2828 * (and it may not even be possible), we refuse to map to private or
2829 * shared memory in such cases.
2831 * If the array group involves any may writes (that are not must writes),
2832 * then we would have to make sure that we load the data into shared/private
2833 * memory first in case the data is not written by the kernel
2834 * (but still written back out to global memory).
2835 * Since we don't have any such mechanism at the moment, we don't
2836 * compute shared/private tiles for groups involving may writes.
2838 * We only try to compute a shared memory tile if there is any reuse
2839 * or if the access is not coalesced.
2841 * For computing a private memory tile, we also require that there is
2842 * some reuse. Moreover, we require that the access is private
2843 * to the thread. That is, we check that any given array element
2844 * is only accessed by a single thread.
2845 * We compute an access relation that maps the shared tile loop iterators
2846 * and the shared point loop iterators that will be wrapped over the
2847 * threads to the array elements.
2848 * We actually check that those iterators that will be wrapped
2849 * partition the array space. This check is stricter than necessary
2850 * since several iterations may be mapped onto the same thread
2851 * and then they could be allowed to access the same memory elements,
2852 * but our check does not allow this situation.
2854 * We also check that the index expression only depends on parallel
2855 * loops. That way, we can move those loops innermost and unroll them.
2856 * Again, we use a test that is stricter than necessary.
2857 * We actually check whether the index expression only depends
2858 * on the iterators that are wrapped over the threads.
2859 * These are necessarily parallel, but there may be more parallel loops.
2861 * Combining the injectivity of the first test with the single-valuedness
2862 * of the second test, we simply test for bijectivity.
2864 * If the array is marked force_private, then we bypass all checks
2865 * and assume we can (and should) use registers.
2867 * If it turns out we can (or have to) use registers, we compute
2868 * the private memory tile size using can_tile, after introducing a dependence
2869 * on the thread indices.
2871 static int compute_group_bounds_core(struct gpu_gen
*gen
,
2872 struct gpu_array_ref_group
*group
)
2874 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->space
);
2875 isl_union_map
*access
;
2876 int n_index
= group
->array
->n_index
;
2879 int force_private
= group
->array
->force_private
;
2880 int use_shared
= gen
->options
->use_shared_memory
;
2881 int use_private
= force_private
|| gen
->options
->use_private_memory
;
2883 if (!use_shared
&& !use_private
)
2885 if (gpu_array_is_read_only_scalar(group
->array
))
2887 if (!force_private
&& !group
->exact_write
)
2892 access
= group_access_relation(group
, 1, 1);
2893 no_reuse
= isl_union_map_is_injective(access
);
2895 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2896 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2897 if (!can_tile(group
->access
, group
->shared_tile
))
2898 group
->shared_tile
= free_tile(group
->shared_tile
);
2901 if (!force_private
&& (!use_private
|| no_reuse
)) {
2902 isl_union_map_free(access
);
2906 access
= isl_union_map_apply_domain(access
,
2907 isl_union_map_copy(gen
->shared_sched
));
2909 acc
= isl_map_from_union_map(access
);
2911 if (!force_private
&& !access_is_bijective(gen
, acc
)) {
2916 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2917 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2918 if (!can_tile(acc
, group
->private_tile
))
2919 group
->private_tile
= free_tile(group
->private_tile
);
2923 if (force_private
&& !group
->private_tile
)
2924 isl_die(ctx
, isl_error_internal
,
2925 "unable to map array reference group to registers",
2931 /* Compute the private and/or shared memory tiles for the array
2932 * reference group "group" of array "array" and set last_shared.
2933 * Return 0 on success and -1 on error.
2935 static int compute_group_bounds(struct gpu_gen
*gen
,
2936 struct gpu_array_ref_group
*group
)
2938 if (compute_group_bounds_core(gen
, group
) < 0)
2940 set_last_shared(gen
, group
);
2945 /* If two groups have overlapping access relations (as determined by
2946 * the "overlap" function) and if one of them involves a write,
2947 * then merge the two groups into one.
2948 * If "compute_bounds" is set, then call compute_group_bounds
2949 * on the merged groups.
2951 * Return the updated number of groups.
2952 * Return -1 on error.
2954 static int group_writes(struct gpu_gen
*gen
,
2955 int n
, struct gpu_array_ref_group
**groups
,
2956 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2957 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2961 for (i
= 0; i
< n
; ++i
) {
2962 for (j
= n
- 1; j
> i
; --j
) {
2963 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2966 if (!overlap(groups
[i
], groups
[j
]))
2969 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2970 if (compute_bounds
&&
2971 compute_group_bounds(gen
, groups
[i
]) < 0)
2974 groups
[j
] = groups
[n
- 1];
2975 groups
[n
- 1] = NULL
;
2983 /* If two groups have overlapping access relations (within the innermost
2984 * loop) and if one of them involves a write, then merge the two groups
2987 * Return the updated number of groups.
2989 static int group_overlapping_writes(struct gpu_gen
*gen
,
2990 int n
, struct gpu_array_ref_group
**groups
)
2992 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2995 /* Check if the access relations of group1 and group2 overlap within
2996 * the outermost min(group1->last_shared, group2->last_shared) loops.
2998 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2999 struct gpu_array_ref_group
*group2
)
3004 isl_map
*map_i
, *map_j
, *map
;
3006 last_shared
= group1
->last_shared
;
3007 if (group2
->last_shared
< last_shared
)
3008 last_shared
= group2
->last_shared
;
3009 map_i
= isl_map_copy(group1
->access
);
3010 dim
= isl_map_dim(map_i
, isl_dim_in
);
3011 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
3012 last_shared
+ 1, dim
- (last_shared
+ 1));
3013 map_j
= isl_map_copy(group2
->access
);
3014 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
3015 last_shared
+ 1, dim
- (last_shared
+ 1));
3016 map
= isl_map_intersect(map_i
, map_j
);
3017 empty
= isl_map_is_empty(map
);
3023 /* If two groups have overlapping access relations (within the outer
3024 * last_shared loops) and if one of them involves a write,
3025 * then merge the two groups into one.
3027 * Return the updated number of groups.
3029 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
3030 struct gpu_array_ref_group
**groups
)
3032 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
3035 /* Is the size of the tile specified by "tile" smaller than the sum of
3036 * the sizes of the tiles specified by "tile1" and "tile2"?
3038 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
3039 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
3042 isl_val
*size
, *size1
, *size2
;
3044 size
= tile_size(ctx
, tile
);
3045 size1
= tile_size(ctx
, tile1
);
3046 size2
= tile_size(ctx
, tile2
);
3048 size
= isl_val_sub(size
, size1
);
3049 size
= isl_val_sub(size
, size2
);
3050 smaller
= isl_val_is_neg(size
);
3057 /* Given an initial grouping of array references and shared memory tiles
3058 * for each group that allows for a shared memory tile, merge two groups
3059 * if both have a shared memory tile, the merged group also has
3060 * a shared memory tile and the size of the tile for the merge group
3061 * is smaller than the sum of the tile sizes of the individual groups.
3063 * If merging two groups decreases the "last_shared" dimension of
3064 * one or both of the two groups, then we need to check for overlapping
3067 * Return the number of groups after merging.
3068 * Return -1 on error.
3070 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
3071 struct gpu_array_info
*array
, int n
,
3072 struct gpu_array_ref_group
**groups
)
3075 int recompute_overlap
= 0;
3076 isl_ctx
*ctx
= isl_space_get_ctx(array
->space
);
3078 for (i
= 0; i
< n
; ++i
) {
3079 if (!groups
[i
]->shared_tile
)
3081 for (j
= n
- 1; j
> i
; --j
) {
3084 struct gpu_array_ref_group
*group
;
3086 if (!groups
[j
]->shared_tile
)
3089 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
3090 isl_map_copy(groups
[j
]->access
));
3091 empty
= isl_map_is_empty(map
);
3097 group
= join_groups(groups
[i
], groups
[j
]);
3098 if (compute_group_bounds(gen
, group
) < 0) {
3099 free_array_ref_group(group
);
3102 if (!group
->shared_tile
||
3103 !smaller_tile(ctx
, group
->shared_tile
,
3104 groups
[i
]->shared_tile
,
3105 groups
[j
]->shared_tile
)) {
3106 free_array_ref_group(group
);
3110 if (group
->last_shared
< groups
[i
]->last_shared
||
3111 group
->last_shared
< groups
[j
]->last_shared
)
3112 recompute_overlap
= 1;
3113 free_array_ref_group(groups
[i
]);
3114 free_array_ref_group(groups
[j
]);
3117 groups
[j
] = groups
[n
- 1];
3122 if (recompute_overlap
)
3123 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3127 /* Set array->n_group and array->groups to n and groups.
3129 * Additionally, set the "nr" field of each group
3130 * and the "group" field of each reference in each group.
3132 static void set_array_groups(struct gpu_array_info
*array
,
3133 int n
, struct gpu_array_ref_group
**groups
)
3138 array
->groups
= groups
;
3140 for (i
= 0; i
< n
; ++i
) {
3143 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
3144 groups
[i
]->refs
[j
]->group
= i
;
3148 /* Group array references that should be considered together when
3149 * deciding whether to access them from private, shared or global memory.
3150 * Return -1 on error.
3152 * In particular, if two array references overlap and if one of them
3153 * is a write, then the two references are grouped together.
3154 * We first perform an initial grouping based only on the access relation.
3155 * After computing shared and private memory tiles, we check for
3156 * overlapping writes again, but this time taking into account
3157 * the "last_shared" property.
3159 * Furthermore, if two groups admit a shared memory tile and if the
3160 * combination of the two also admits a shared memory tile, we merge
3163 * If the array contains structures, then there is no need to compute
3164 * reference groups since we do not map such arrays to private or shared
3167 static int group_array_references(struct gpu_gen
*gen
,
3168 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
3172 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3173 struct gpu_array_ref_group
**groups
;
3175 if (array
->has_compound_element
)
3178 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
3183 n
= populate_array_references(array
, sched
, groups
);
3185 n
= group_overlapping_writes(gen
, n
, groups
);
3187 for (i
= 0; i
< n
; ++i
)
3188 if (compute_group_bounds(gen
, groups
[i
]) < 0)
3191 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3193 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
3195 set_array_groups(array
, n
, groups
);
3200 for (i
= 0; i
< array
->n_ref
; ++i
)
3201 free_array_ref_group(groups
[i
]);
3205 /* Take tiled_sched, project it onto the shared tile loops and
3206 * the loops that will be wrapped over the threads and
3207 * store the result in gen->shared_sched.
3208 * Also compute a projection that projects out the loops that will be
3209 * wrapped over the threads and store this projection in gen->shared_proj.
3211 static void compute_shared_sched(struct gpu_gen
*gen
)
3216 isl_union_map
*sched
;
3218 sched
= isl_union_map_copy(gen
->tiled_sched
);
3220 dim
= isl_union_map_get_space(sched
);
3221 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3222 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3224 dim
= isl_union_map_get_space(sched
);
3225 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3227 gen
->shared_sched
= sched
;
3228 gen
->shared_proj
= isl_union_map_from_map(proj
);
3231 /* For each scalar in the input program, check if there are any
3232 * order dependences active inside the current kernel, within
3233 * the same iteration of the host schedule.
3234 * If so, mark the scalar as force_private so that it will be
3235 * mapped to a register.
3237 static void check_scalar_live_ranges(struct gpu_gen
*gen
)
3241 isl_union_map
*sched
;
3242 isl_union_set
*domain
;
3243 isl_union_map
*same_host_iteration
;
3245 gen
->any_force_private
= 0;
3247 if (!gen
->options
->live_range_reordering
)
3250 sched
= gen
->shared_sched
;
3251 sched
= isl_union_map_universe(isl_union_map_copy(sched
));
3252 domain
= isl_union_map_domain(sched
);
3254 sched
= isl_union_map_copy(gen
->sched
);
3255 proj
= projection(isl_union_map_get_space(sched
),
3256 gen
->untiled_len
, gen
->tile_first
);
3257 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3258 same_host_iteration
= isl_union_map_apply_range(sched
,
3259 isl_union_map_reverse(isl_union_map_copy(sched
)));
3261 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3262 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3263 isl_union_map
*order
;
3265 array
->force_private
= 0;
3266 if (array
->n_index
!= 0)
3268 order
= isl_union_map_copy(array
->dep_order
);
3269 order
= isl_union_map_intersect_domain(order
,
3270 isl_union_set_copy(domain
));
3271 order
= isl_union_map_intersect_range(order
,
3272 isl_union_set_copy(domain
));
3273 order
= isl_union_map_intersect(order
,
3274 isl_union_map_copy(same_host_iteration
));
3275 if (!isl_union_map_is_empty(order
)) {
3276 array
->force_private
= 1;
3277 gen
->any_force_private
= 1;
3279 isl_union_map_free(order
);
3282 isl_union_map_free(same_host_iteration
);
3283 isl_union_set_free(domain
);
3286 /* Group references of all arrays in the program.
3288 static int group_references(struct gpu_gen
*gen
)
3292 isl_union_map
*sched
;
3294 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3295 isl_union_map_copy(gen
->shared_proj
));
3297 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3298 r
= group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
3303 isl_union_map_free(sched
);
3308 /* Free all array information that is local to the current kernel.
3310 static void free_local_array_info(struct gpu_gen
*gen
)
3314 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3315 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3317 for (j
= 0; j
< array
->n_group
; ++j
)
3318 free_array_ref_group(array
->groups
[j
]);
3319 free(array
->groups
);
3323 /* Compute the size of a bounding box around the origin and "set",
3324 * where "set" is assumed to contain only non-negative elements.
3325 * In particular, compute the maximal value of "set" in each direction
3328 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
3329 __isl_keep isl_set
*context
)
3332 isl_multi_pw_aff
*mpa
;
3334 n
= isl_set_dim(set
, isl_dim_set
);
3335 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
3336 for (i
= 0; i
< n
; ++i
) {
3341 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
3342 bound
= isl_pw_aff_coalesce(bound
);
3343 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
3345 space
= isl_pw_aff_get_domain_space(bound
);
3346 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
3347 one
= isl_aff_add_constant_si(one
, 1);
3348 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
3349 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
3356 /* Compute the effective grid size as a list of the sizes in each dimension.
3358 * The grid size specified by the user or set by default
3359 * in read_grid_sizes() and applied in tile_schedule(),
3360 * may be too large for the given code in the sense that
3361 * it may contain blocks that don't need to execute anything.
3362 * We therefore don't return this grid size, but instead the
3363 * smallest grid size that ensures that all blocks that actually
3364 * execute code are included in the grid.
3366 * We first extract a description of the grid, i.e., the possible values
3367 * of the block ids, from gen->tiled_sched.
3368 * The block ids are parameters in gen->tiled_sched.
3369 * We simply need to change them into set dimensions.
3371 * Then, for each block dimension, we compute the maximal value of the block id
3374 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
3375 struct ppcg_kernel
*kernel
)
3380 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
3381 grid
= isl_set_from_params(grid
);
3382 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
3383 for (i
= 0; i
< gen
->n_grid
; ++i
) {
3387 snprintf(name
, sizeof(name
), "b%d", i
);
3388 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
3390 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
3391 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
3394 return extract_size(grid
, kernel
->context
);
3397 /* Compute the size of a fixed bounding box around the origin and "set",
3398 * where "set" is assumed to contain only non-negative elements,
3399 * and store the results in "size".
3400 * In particular, compute the maximal value of "set" in each direction
3403 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
3406 isl_local_space
*ls
;
3409 n
= isl_set_dim(set
, isl_dim_set
);
3410 ls
= isl_local_space_from_space(isl_set_get_space(set
));
3411 obj
= isl_aff_zero_on_domain(ls
);
3412 for (i
= 0; i
< n
; ++i
) {
3415 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
3416 max
= isl_set_max_val(set
, obj
);
3417 size
[i
] = isl_val_get_num_si(max
) + 1;
3419 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
3425 /* Compute the effective block size as a list of the sizes in each dimension
3426 * and store the sizes in kernel->block_dim.
3428 * The block size specified by the user or set by default
3429 * in read_block_sizes() and applied in thread_tile_schedule(),
3430 * may be too large for the given code in the sense that
3431 * it may contain threads that don't need to execute anything.
3432 * We therefore don't store this block size in kernel->block_dim,
3433 * but instead the smallest block size that ensures that all threads
3434 * that actually execute code are included in the block.
3436 * The current implementation eliminates all parameters, ensuring
3437 * that the size is a fixed constant in each dimension.
3438 * In principle we could also compute parametric sizes.
3439 * We would have to make sure to project out all b%d and t%d parameters,
3442 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3447 isl_multi_pw_aff
*mpa
;
3449 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3450 block
= isl_set_from_params(block
);
3451 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3452 kernel
->n_block
= gen
->n_block
;
3453 for (i
= 0; i
< gen
->n_block
; ++i
) {
3457 snprintf(name
, sizeof(name
), "t%d", i
);
3458 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3460 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3463 nparam
= isl_set_dim(block
, isl_dim_param
);
3464 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3466 extract_fixed_size(block
, kernel
->block_dim
);
3469 void ppcg_kernel_free(void *user
)
3471 struct ppcg_kernel
*kernel
= user
;
3477 isl_multi_pw_aff_free(kernel
->grid_size
);
3478 isl_set_free(kernel
->context
);
3479 isl_union_set_free(kernel
->arrays
);
3480 isl_space_free(kernel
->space
);
3481 isl_ast_node_free(kernel
->tree
);
3483 for (i
= 0; i
< kernel
->n_array
; ++i
)
3484 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3485 free(kernel
->array
);
3487 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3488 free(kernel
->var
[i
].name
);
3489 isl_vec_free(kernel
->var
[i
].size
);
3496 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3497 struct ppcg_kernel_var
*var
)
3500 struct gpu_array_tile
*tile
;
3504 var
->array
= group
->array
;
3506 tile
= group
->private_tile
;
3507 var
->type
= ppcg_access_private
;
3509 tile
= group
->shared_tile
;
3510 var
->type
= ppcg_access_shared
;
3513 p
= isl_printer_to_str(ctx
);
3514 p
= print_array_name(p
, group
);
3515 var
->name
= isl_printer_get_str(p
);
3516 isl_printer_free(p
);
3518 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3520 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3521 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3522 isl_val_copy(tile
->bound
[j
].size
));
3525 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3530 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3531 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3533 for (j
= 0; j
< array
->n_group
; ++j
) {
3534 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3535 if (group
->private_tile
|| group
->shared_tile
)
3541 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3542 assert(kernel
->var
);
3545 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3546 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3548 for (j
= 0; j
< array
->n_group
; ++j
) {
3549 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3550 if (!group
->private_tile
&& !group
->shared_tile
)
3552 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3558 /* The sizes of the arrays on the host that have been computed by
3559 * extract_array_info may depend on the parameters. Use the extra
3560 * constraints on the parameters that are valid at "host_domain"
3561 * to simplify these expressions and store the results in kernel->array.
3563 * We only need these localized bounds for arrays that are accessed
3564 * by the current kernel. If we have found at least one reference group
3565 * then the array is accessed by the kernel. If the array has compound
3566 * elements then we skipped the construction of array reference groups.
3568 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3569 __isl_keep isl_set
*host_domain
)
3574 kernel
->array
= isl_calloc_array(gen
->ctx
,
3575 struct gpu_local_array_info
, gen
->prog
->n_array
);
3576 assert(kernel
->array
);
3577 kernel
->n_array
= gen
->prog
->n_array
;
3579 context
= isl_set_copy(host_domain
);
3580 context
= isl_set_params(context
);
3582 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3583 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3584 isl_pw_aff_list
*local
;
3586 if (array
->n_group
== 0 && !array
->has_compound_element
)
3589 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3591 for (j
= 0; j
< array
->n_index
; ++j
) {
3594 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3595 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3596 local
= isl_pw_aff_list_add(local
, pwaff
);
3599 kernel
->array
[i
].n_index
= array
->n_index
;
3600 kernel
->array
[i
].bound
= local
;
3602 isl_set_free(context
);
3605 /* Find the element in gen->stmt that has the given "id".
3606 * Return NULL if no such gpu_stmt can be found.
3608 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3612 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3613 if (id
== prog
->stmts
[i
].id
)
3617 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3620 /* Set gen->tile_len and gen->n_parallel to those of the statement
3621 * affected by the first map (part of the schedule)
3622 * on which this function is called.
3623 * Because of the way the schedule is constructed, the other statements
3624 * in the list, if any, should have the same values for these properties.
3626 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3628 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3630 struct gpu_stmt
*stmt
;
3632 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3633 stmt
= find_stmt(gen
->prog
, id
);
3639 isl_die(gen
->ctx
, isl_error_unknown
,
3640 "statement not found", return -1);
3642 gen
->tile_len
= stmt
->tile_len
;
3643 gen
->n_parallel
= stmt
->n_parallel
;
3648 void ppcg_kernel_stmt_free(void *user
)
3651 struct ppcg_kernel_stmt
*stmt
= user
;
3656 switch (stmt
->type
) {
3657 case ppcg_kernel_copy
:
3658 isl_ast_expr_free(stmt
->u
.c
.index
);
3659 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3661 case ppcg_kernel_domain
:
3662 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3664 case ppcg_kernel_sync
:
3671 /* Set the options of "context" to
3673 * { space -> [x] : x >= first }
3675 static __isl_give isl_ast_build
*set_unroll(
3676 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3683 ctx
= isl_ast_build_get_ctx(build
);
3685 space
= isl_space_from_domain(space
);
3686 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3687 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3688 unroll
= isl_map_universe(space
);
3689 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3690 opt
= isl_union_map_from_map(unroll
);
3692 build
= isl_ast_build_set_options(build
, opt
);
3697 /* Return a list of isl_ids of the form "prefix%d".
3699 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3700 int n
, const char *prefix
)
3706 names
= isl_id_list_alloc(ctx
, n
);
3707 for (i
= 0; i
< n
; ++i
) {
3710 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3711 id
= isl_id_alloc(ctx
, name
, NULL
);
3712 names
= isl_id_list_add(names
, id
);
3718 /* Extend the schedule "schedule" with the part of "extension"
3719 * starting at "first" up to "len".
3721 static __isl_give isl_union_map
*extend_schedule(
3722 __isl_take isl_union_map
*schedule
,
3723 __isl_take isl_union_map
*extension
, int first
, int len
)
3727 isl_union_map
*umap
;
3730 space
= isl_union_map_get_space(schedule
);
3731 space
= isl_space_set_from_params(space
);
3732 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3733 proj
= isl_set_identity(isl_set_universe(space
));
3734 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3735 extension
= isl_union_map_apply_range(extension
,
3736 isl_union_map_from_map(proj
));
3738 schedule
= isl_union_map_range_product(schedule
, extension
);
3743 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3746 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3747 __isl_keep isl_id
*ref_id
)
3749 struct gpu_stmt_access
*access
;
3751 for (access
= accesses
; access
; access
= access
->next
)
3752 if (access
->ref_id
== ref_id
)
3758 /* Return the index of the array called "name" in the list of arrays.
3760 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3764 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3765 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3771 /* Internal data structure for the index and AST expression transformation
3772 * callbacks for pet_stmt_build_ast_exprs.
3774 * "accesses" is the list of gpu_stmt_access in the statement.
3775 * "iterator_map" expresses the statement iterators in terms of
3776 * the AST loop iterators.
3777 * "sched2shared" expresses the first shared_len dimensions of
3778 * the computed schedule in terms of the AST loop iterators.
3780 * The following fields are set in transform_index and used in transform_expr.
3781 * "array" is the array that is being accessed.
3782 * "global" is set if the global array is accessed (rather than
3783 * shared/private memory).
3784 * "local_array" refers to information on the array specialized
3785 * to the current kernel.
3787 struct ppcg_transform_data
{
3788 struct gpu_gen
*gen
;
3789 struct gpu_stmt_access
*accesses
;
3790 isl_pw_multi_aff
*iterator_map
;
3791 isl_pw_multi_aff
*sched2shared
;
3793 struct gpu_array_info
*array
;
3795 struct gpu_local_array_info
*local_array
;
3798 /* Return the name of the outer array (of structs) accessed by "access".
3800 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
3805 space
= isl_space_range(isl_map_get_space(access
));
3806 while (space
&& isl_space_is_wrapping(space
))
3807 space
= isl_space_domain(isl_space_unwrap(space
));
3808 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
3809 isl_space_free(space
);
3814 /* Index transformation callback for pet_stmt_build_ast_exprs.
3816 * "index" expresses the array indices in terms of statement iterators
3818 * We first reformulate "index" in terms of the AST loop iterators.
3819 * Then we check if we are accessing the global array or
3820 * a shared/private copy. In the former case, we simply return
3821 * the updated index. If "index" is an affine expression rather
3822 * than an array access, then we also return the updated index here.
3824 * If no reference groups have been computed for the array,
3825 * then we can only be accessing the global array.
3827 * Otherwise, we apply the tiling to the index.
3828 * This tiling is of the form
3832 * The index is of the form
3836 * We update the tiling to refer to the AST loop iteratos
3840 * and modify index to keep track of those iterators
3844 * Combining these two yields a tiled index expression in terms
3845 * of the AST loop iterators
3849 static __isl_give isl_multi_pw_aff
*transform_index(
3850 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3853 struct ppcg_transform_data
*data
= user
;
3854 struct gpu_stmt_access
*access
;
3855 struct gpu_array_ref_group
*group
;
3856 struct gpu_array_tile
*tile
;
3857 isl_pw_multi_aff
*iterator_map
;
3861 isl_multi_pw_aff
*tiling
;
3862 isl_pw_multi_aff
*pma
;
3863 isl_multi_pw_aff
*mpa
;
3867 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3868 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3870 access
= find_access(data
->accesses
, ref_id
);
3873 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3876 name
= get_outer_array_name(access
->access
);
3877 i
= find_array_index(data
->gen
, name
);
3879 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3880 "cannot find array",
3881 return isl_multi_pw_aff_free(index
));
3882 data
->array
= &data
->gen
->prog
->array
[i
];
3883 data
->local_array
= &data
->gen
->kernel
->array
[i
];
3885 if (access
->group
< 0) {
3890 group
= data
->array
->groups
[access
->group
];
3891 tile
= group
->private_tile
;
3893 tile
= group
->shared_tile
;
3894 data
->global
= !tile
;
3898 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3899 space
= isl_space_map_from_set(space
);
3900 pma
= isl_pw_multi_aff_identity(space
);
3901 pma
= isl_pw_multi_aff_product(
3902 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3903 tiling
= isl_multi_pw_aff_from_multi_aff(
3904 isl_multi_aff_copy(tile
->tiling
));
3905 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3907 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3908 space
= isl_space_map_from_set(space
);
3909 mpa
= isl_multi_pw_aff_identity(space
);
3910 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3911 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3916 /* Dereference "expr" by adding an index [0].
3917 * The original "expr" is assumed not to have any indices.
3919 * If "expr" is a member access, then the dereferencing needs
3920 * to be applied to the structure argument of this member access.
3922 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3926 isl_ast_expr_list
*list
;
3928 if (isl_ast_expr_get_op_type(expr
) == isl_ast_op_member
) {
3931 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3932 arg
= dereference(arg
);
3933 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg
);
3938 ctx
= isl_ast_expr_get_ctx(expr
);
3939 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3940 list
= isl_ast_expr_list_from_ast_expr(res
);
3941 res
= isl_ast_expr_get_op_arg(expr
, 0);
3942 res
= isl_ast_expr_access(res
, list
);
3943 isl_ast_expr_free(expr
);
3948 /* Linearize the index expression "expr" based on the array bounds
3951 * That is, transform expression
3953 * A[i_0][i_1]...[i_n]
3957 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
3959 * where b_0, b_1, ..., b_n are the bounds on the array.
3961 * If the base of "expr" is a member access, then the linearization needs
3962 * to be applied to the structure argument of this member access.
3964 * In the base case, if "expr" has no arguments (other than the name of
3965 * the array), then we are passing an entire array to a function.
3966 * In this case, there is nothing to linearize.
3967 * Note that at this point an expression with no arguments can
3968 * only be an entire array because the scalar case and
3969 * the case of single struct are handled by the caller.
3971 * If the number of specified index expressions in "expr"
3972 * is smaller than the dimension of the accessed array,
3973 * then the missing i_j also do not appear in the linearized expression.
3974 * Furthermore, since such an expression does not refer to a single
3975 * element while the default linearized expression would refer to
3976 * a single element, we return the expression
3978 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
3980 * instead. Note that because of the special case handling above,
3981 * we can assume here that here that there is at least one index expression.
3983 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
3984 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
3991 isl_ast_expr_list
*list
;
3992 isl_ast_build
*build
;
3994 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
3995 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
3996 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
3999 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
4000 arg
= gpu_local_array_info_linearize_index(array
, arg
);
4001 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
4002 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
4006 isl_ast_expr_free(arg0
);
4008 if (isl_ast_expr_get_op_n_arg(expr
) == 1)
4011 ctx
= isl_ast_expr_get_ctx(expr
);
4012 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
4013 build
= isl_ast_build_from_context(context
);
4015 n
= isl_ast_expr_get_op_n_arg(expr
);
4016 res
= isl_ast_expr_get_op_arg(expr
, 1);
4017 for (i
= 1; i
< array
->n_index
; ++i
) {
4018 isl_pw_aff
*bound_i
;
4019 isl_ast_expr
*expr_i
;
4021 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
);
4022 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
4023 res
= isl_ast_expr_mul(res
, expr_i
);
4027 expr_i
= isl_ast_expr_get_op_arg(expr
, i
+ 1);
4028 res
= isl_ast_expr_add(res
, expr_i
);
4031 isl_ast_build_free(build
);
4033 if (1 + array
->n_index
> n
) {
4034 res
= isl_ast_expr_add(isl_ast_expr_get_op_arg(expr
, 0), res
);
4036 list
= isl_ast_expr_list_from_ast_expr(res
);
4037 res
= isl_ast_expr_get_op_arg(expr
, 0);
4038 res
= isl_ast_expr_access(res
, list
);
4041 isl_ast_expr_free(expr
);
4046 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
4048 * If the AST expression refers to a global scalar that is not
4049 * a read-only scalar, then its address was passed to the kernel and
4050 * we need to dereference it.
4052 * If the AST expression refers to an access to a global array,
4053 * then we linearize the access exploiting the bounds in data->local_array.
4055 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
4056 __isl_keep isl_id
*id
, void *user
)
4058 struct ppcg_transform_data
*data
= user
;
4062 if (gpu_array_is_read_only_scalar(data
->array
))
4066 if (data
->array
->n_index
== 0)
4067 return dereference(expr
);
4068 if (!data
->array
->linearize
)
4071 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
4074 /* This function is called for each instance of a user statement
4077 * We attach a struct ppcg_kernel_stmt to the "node", containing
4078 * a computed AST expression for each access.
4079 * These AST expressions are computed from iterator_map,
4080 * which expresses the domain
4081 * elements in terms of the generated loops, and sched2shared,
4082 * which expresses the first shared_len dimensions of the schedule
4083 * computed by PPCG in terms of the generated loops.
4085 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
4086 __isl_keep isl_ast_build
*build
, void *user
)
4088 struct ppcg_transform_data data
;
4089 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4090 struct ppcg_kernel_stmt
*stmt
;
4092 isl_pw_multi_aff
*sched2shared
;
4094 isl_pw_multi_aff
*iterator_map
;
4095 isl_ast_expr
*expr
, *arg
;
4096 isl_union_map
*schedule
;
4099 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4101 return isl_ast_node_free(node
);
4103 expr
= isl_ast_node_user_get_expr(node
);
4104 arg
= isl_ast_expr_get_op_arg(expr
, 0);
4105 id
= isl_ast_expr_get_id(arg
);
4107 schedule
= isl_ast_build_get_schedule(build
);
4108 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
4109 iterator_map
= isl_pw_multi_aff_from_map(map
);
4110 sched2shared
= compute_sched_to_shared(gen
,
4111 isl_pw_multi_aff_copy(iterator_map
));
4113 stmt
->type
= ppcg_kernel_domain
;
4114 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
4115 if (!stmt
->u
.d
.stmt
)
4119 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
4120 data
.iterator_map
= iterator_map
;
4121 data
.sched2shared
= sched2shared
;
4122 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
4123 build
, &transform_index
, &data
,
4124 &transform_expr
, &data
);
4127 isl_pw_multi_aff_free(iterator_map
);
4128 isl_pw_multi_aff_free(sched2shared
);
4129 isl_ast_expr_free(arg
);
4130 isl_ast_expr_free(expr
);
4132 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4133 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4134 return isl_ast_node_set_annotation(node
, id
);
4137 isl_pw_multi_aff_free(iterator_map
);
4138 ppcg_kernel_stmt_free(stmt
);
4139 isl_pw_multi_aff_free(sched2shared
);
4140 return isl_ast_node_free(node
);
4143 /* This function is called when code has been generated for the shared
4144 * tile loops. The "schedule" refers only to the original statements.
4146 * We extend the schedule with that part of gen->local_sched that hasn't
4147 * been taken into account yet. This introduces parameters referring
4148 * to thread ids in the schedule, so we add them (with the appropriate
4149 * bounds to the context as well).
4150 * Finally, we set the appropriate unrolling options
4151 * if gen->first_unroll is set.
4153 static __isl_give isl_ast_node
*create_domain_leaf(
4154 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
4157 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4159 isl_union_map
*sched
;
4162 isl_id_list
*iterators
;
4165 schedule
= extend_schedule(schedule
,
4166 isl_union_map_copy(gen
->local_sched
),
4167 gen
->shared_len
, gen
->thread_tiled_len
);
4169 space
= isl_ast_build_get_schedule_space(build
);
4170 set
= isl_set_universe(space
);
4171 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4172 gen
->kernel
->block_dim
, "t");
4173 build
= isl_ast_build_restrict(build
, set
);
4175 n
= gen
->thread_tiled_len
- gen
->shared_len
;
4177 if (gen
->first_unroll
>= 0) {
4178 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
4179 build
= set_unroll(build
, space
, gen
->first_unroll
);
4181 iterators
= generate_names(gen
->ctx
, n
, "c");
4182 build
= isl_ast_build_set_iterators(build
, iterators
);
4183 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
4184 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4185 isl_ast_build_free(build
);
4190 /* This function is called for each statement node in the AST of the code
4191 * for copying to or from shared/private memory.
4192 * Attach a pointer to a ppcg_kernel_stmt representing the copy
4193 * statement to the node.
4194 * The statement name is "read" or "write", depending on whether we are
4195 * reading from global memory or writing to global memory.
4196 * The name of the T space is {shared,private}_<array>.
4198 * The schedule is of the form
4202 * where A refers to a piece of an array and T to the corresponding
4203 * shifted tile. We split this schedule into mappings L -> A and L -> T
4204 * and store the corresponding expressions in stmt->index and stmt->local_index,
4205 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
4207 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
4208 __isl_keep isl_ast_build
*build
, void *user
)
4210 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4211 struct ppcg_kernel_stmt
*stmt
;
4215 isl_map
*access
, *local_access
, *map
;
4216 isl_pw_multi_aff
*pma
;
4220 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4222 return isl_ast_node_free(node
);
4224 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
4225 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
4226 stmt
->u
.c
.read
= !strcmp(type
, "read");
4227 access
= isl_map_reverse(access
);
4228 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
4229 local_access
= isl_map_copy(access
);
4231 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
4232 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
4233 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4234 access
= isl_map_apply_range(access
, map
);
4235 pma
= isl_pw_multi_aff_from_map(access
);
4236 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4237 stmt
->u
.c
.index
= expr
;
4239 map
= isl_map_range_map(isl_map_universe(space
));
4240 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
4241 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4242 local_access
= isl_map_apply_range(local_access
, map
);
4243 pma
= isl_pw_multi_aff_from_map(local_access
);
4244 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4245 stmt
->u
.c
.local_index
= expr
;
4247 stmt
->u
.c
.array
= gen
->copy_group
->array
;
4248 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
4249 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
4250 stmt
->type
= ppcg_kernel_copy
;
4252 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4253 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4254 return isl_ast_node_set_annotation(node
, id
);
4257 /* Given a schedule of the form
4261 * (with S the first shared_len dimensions of the computed schedule,
4262 * A the array and L the schedule correponding to the generated loops),
4263 * indicating where to copy the array elements that need to be copied,
4264 * construct code for performing the copying.
4266 * "group" is the array reference group that is being copied
4267 * "type" is either "read" or "write"
4268 * private is set if copying needs to be performed to/from registers
4270 * We first construct a mapping to a shifted tile of the array,
4272 * [S -> A] -> T(S,A) (1)
4274 * If private is set, then we also use this mapping as a schedule
4275 * (which is already thread-specific and will be completely unrolled).
4276 * Otherwise, we wrap/tile the range over the threads.
4279 * [S -> A] -> T'(S,A)
4281 * Combined with the given schedule, we have
4283 * [S -> A] -> [L -> T'(S,A)] (2)
4285 * From the shifted tile mapping, we construct a mapping
4287 * [S -> A] -> [A -> T(S,A)]
4289 * and apply it to the schedule (2), obtaining
4291 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
4293 * Note that we can project out S because it is uniquely defined by L.
4295 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
4296 __isl_take isl_map
*sched
,
4297 const char *type
, struct gpu_array_ref_group
*group
,
4298 __isl_take isl_ast_build
*build
, int private)
4302 isl_map
*schedule
, *shift
, *map
;
4304 isl_id_list
*iterators
;
4307 shift
= shift_access(group
);
4309 schedule
= isl_map_copy(shift
);
4310 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
4312 schedule
= tile_access_schedule(gen
, schedule
);
4314 n
= isl_map_dim(schedule
, isl_dim_out
);
4315 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
4316 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4317 gen
->kernel
->block_dim
, "t");
4319 schedule
= isl_map_range_product(sched
, schedule
);
4321 space
= isl_space_domain(isl_map_get_space(shift
));
4322 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
4323 map
= isl_map_range_product(map
, shift
);
4325 schedule
= isl_map_apply_domain(schedule
, map
);
4327 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
4329 build
= isl_ast_build_restrict(build
, set
);
4331 gen
->copy_group
= group
;
4334 space
= isl_space_range(isl_map_get_space(schedule
));
4335 space
= isl_space_range(isl_space_unwrap(space
));
4336 build
= set_unroll(build
, space
, 0);
4338 iterators
= generate_names(gen
->ctx
, n
, "c");
4339 build
= isl_ast_build_set_iterators(build
, iterators
);
4340 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
4341 tree
= isl_ast_build_ast_from_schedule(build
,
4342 isl_union_map_from_map(schedule
));
4343 isl_ast_build_free(build
);
4348 /* Return code for reading into or writing from shared memory
4349 * the given array reference group.
4351 * If we are performing a read from global memory to shared memory and
4352 * if the array involved is not a scalar, then we copy
4353 * the entire tile to shared memory. This may result in some extra
4354 * elements getting copied, but it should lead to simpler code
4355 * (which means that fewer registers may be needed) and less divergence.
4357 * Otherwise, we only copy the elements that will be read or have been written
4361 * The input "sched" is of the form.
4365 * with S the first shared_len dimensions of the computed schedule,
4366 * A the array and L the schedule correponding to the generated loops.
4368 * We first drop "type",
4372 * If the above conditions are satisfied, we project out A,
4377 * and then introduce the group tile [S -> T], resulting in
4381 static __isl_give isl_ast_node
*copy_group_shared_accesses(
4382 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4383 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4387 isl_union_map
*access
;
4389 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4390 read
= !strcmp(type
, "read");
4392 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4394 if (read
&& !gpu_array_is_scalar(group
->array
)) {
4398 space
= isl_space_domain(isl_map_get_space(sched
));
4399 space
= isl_space_unwrap(space
);
4400 map
= isl_map_domain_map(isl_map_universe(space
));
4401 sched
= isl_map_apply_domain(sched
, map
);
4403 map
= group_tile(group
);
4404 map
= isl_map_reverse(isl_map_domain_map(map
));
4405 sched
= isl_map_apply_domain(sched
, map
);
4408 return copy_access(gen
, sched
, type
, group
, build
, 0);
4411 /* Return code for reading into or writing from private memory
4412 * the given array reference group.
4414 * Let S be the first shared_len dimensions of the computed schedule,
4415 * D the iteration domains, A the array and L the schedule correponding
4416 * to the generated loops.
4417 * "sched" is of the form
4421 * where type is either "read" or "write".
4422 * We apply the privatization D -> S(t), with t the thread ids,
4423 * to the access relation D -> A to obtain the privatized access relation
4427 * We drop the type from "sched" and intersect with the privatized access
4428 * relation to obtain
4432 static __isl_give isl_ast_node
*copy_group_private_accesses(
4433 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4434 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4438 isl_union_map
*priv
;
4439 isl_union_map
*access
;
4440 isl_map
*access_map
;
4442 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4443 read
= !strcmp(type
, "read");
4445 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
4446 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
4449 access
= group_access_relation(group
, read
, !read
);
4450 access
= isl_union_map_apply_domain(access
, priv
);
4451 access_map
= isl_map_from_union_map(access
);
4453 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4454 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
4456 return copy_access(gen
, sched
, type
, group
, build
, 1);
4459 /* Return code for reading into or writing from shared or private memory.
4461 * "schedule" is of the form
4465 * with S be the first shared_len dimensions of the computed schedule,
4466 * A the array and L the schedule correponding to the generated loops.
4467 * The array reference group is attached to "type".
4469 static __isl_give isl_ast_node
*create_access_leaf(
4470 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4471 __isl_take isl_ast_build
*build
)
4473 struct gpu_array_ref_group
*group
;
4476 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
4477 group
= isl_id_get_user(id
);
4480 if (group
->private_tile
)
4481 return copy_group_private_accesses(gen
, group
, schedule
,
4484 return copy_group_shared_accesses(gen
, group
, schedule
,
4488 /* Create a domain node representing a synchronization.
4490 static __isl_give isl_ast_node
*create_sync_leaf(
4491 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4492 __isl_take isl_ast_build
*build
)
4494 struct ppcg_kernel_stmt
*stmt
;
4500 isl_map_free(schedule
);
4502 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4506 stmt
->type
= ppcg_kernel_sync
;
4508 space
= isl_ast_build_get_schedule_space(build
);
4509 space
= isl_space_from_domain(space
);
4510 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
4511 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
4512 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
4513 node
= isl_ast_node_alloc_user(expr
);
4514 isl_ast_build_free(build
);
4516 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4517 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4518 return isl_ast_node_set_annotation(node
, id
);
4521 /* This function is called during the code generation at the point
4522 * where the schedule domain element is completely determined by
4523 * the generated code. The input schedule contains the original
4524 * statements as well as synchronization and copy "statements".
4525 * The latter are scheduled at different points than any of the original
4526 * statements, so they will only arrive here in isolation.
4528 * If the current schedule only refers to a single statement,
4529 * we check if it is a copy or synchronization statement and
4530 * call the appropriate functions.
4531 * Otherwise, we assume we are dealing with the original statements
4532 * and we call create_domain_leaf.
4534 static __isl_give isl_ast_node
*create_kernel_leaf(
4535 __isl_take isl_ast_build
*build
, void *user
)
4537 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4539 isl_union_map
*schedule
;
4542 schedule
= isl_ast_build_get_schedule(build
);
4544 if (isl_union_map_n_map(schedule
) != 1)
4545 return create_domain_leaf(schedule
, build
, user
);
4547 map
= isl_map_from_union_map(schedule
);
4548 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
4549 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
4550 return create_access_leaf(gen
, map
, build
);
4551 if (!strcmp(name
, "sync"))
4552 return create_sync_leaf(gen
, map
, build
);
4554 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
4557 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
4558 * have value 0) and all even schedule dimensions as "unroll".
4560 * That is, the options look as follows
4562 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
4563 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
4565 * The even positions are used to be able to schedule copying blocks
4566 * and synchronization before or after each level of the shared memory
4567 * tile loops and we want to make sure that code for these is generated
4568 * separately (within each level).
4570 static __isl_give isl_ast_build
*set_atomic_and_unroll(
4571 __isl_take isl_ast_build
*build
,
4572 __isl_take isl_space
*space
, int sched_len
)
4578 isl_local_space
*ls
;
4581 ctx
= isl_ast_build_get_ctx(build
);
4583 space
= isl_space_params(space
);
4584 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4585 space
= isl_space_from_domain(space
);
4586 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4587 map
= isl_map_universe(isl_space_copy(space
));
4588 for (i
= 0; i
< sched_len
; i
+= 2)
4589 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4590 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4591 c
= isl_equality_alloc(ls
);
4592 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4593 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4594 c
= isl_constraint_set_constant_si(c
, 1);
4595 map
= isl_map_add_constraint(map
, c
);
4596 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4597 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4598 opt
= isl_union_map_from_map(map
);
4600 map
= isl_map_universe(space
);
4601 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4602 c
= isl_equality_alloc(ls
);
4603 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4604 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4605 map
= isl_map_add_constraint(map
, c
);
4606 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4607 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4608 opt
= isl_union_map_add_map(opt
, map
);
4610 build
= isl_ast_build_set_options(build
, opt
);
4615 /* Return a map that maps a space of dimension gen->shared_len
4616 * to its last dimensions starting at gen->tile_first.
4617 * The range is of dimension
4619 * 2 * (gen->shared_len - gen->tile_first) + 1
4621 * The input dimensions are mapped to the odd dimensions in the output,
4622 * while the even dimensions (except 2*pos) are fixed to 0.
4623 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4624 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4625 * are mapped to the output. The remaining input dimensions are projected
4626 * out and the corresponding output dimensions are fixed to 0.
4628 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4629 __isl_take isl_space
*space
, int pos
, int val
)
4634 space
= isl_space_set_from_params(space
);
4635 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4636 space
= isl_space_map_from_set(space
);
4637 proj
= isl_map_identity(space
);
4638 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4639 n
= gen
->shared_len
- gen
->tile_first
;
4640 for (i
= 0; i
<= n
; ++i
) {
4641 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4643 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4645 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4651 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4652 gen
->shared_len
- (gen
->tile_first
+ pos
));
4653 for (i
= pos
; i
< n
; ++i
)
4654 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4659 /* Given the AST context schedule "schedule" and the mapping from
4660 * domains to the shared tile loops "shared_sched", add a schedule
4661 * for a synchronization operation at position "val" of loop level "pos".
4663 * schedule is of the form
4667 * (with D the iteration domains and L the already generated loops),
4668 * while shared_sched is of the form
4672 * We combine them into
4678 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4680 * and use the result as a schedule for "sync".
4682 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4683 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4684 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4687 isl_map
*proj
, *map
;
4689 shared_sched
= isl_union_map_copy(shared_sched
);
4690 schedule
= isl_union_map_copy(schedule
);
4692 space
= isl_union_map_get_space(shared_sched
);
4693 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4694 map
= isl_map_from_union_map(schedule
);
4696 proj
= insert_even(gen
, space
, pos
, val
);
4697 map
= isl_map_apply_range(map
, proj
);
4698 map
= isl_map_from_range(isl_map_wrap(map
));
4699 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4701 res
= isl_union_map_add_map(res
, map
);
4706 /* Given a set of wrapped references "ref", return the corresponding
4707 * access relations based on the tagged access relations "tagged".
4709 * The elements of "ref" are of the form
4713 * with D an iteration domains and R a reference.
4714 * The elements of "tagged" are of the form
4720 * Extend "tagged" to include the iteration domain in the range, i.e.,
4722 * [D -> R] -> [D -> A]
4724 * apply the result to "ref" and then unwrap the resulting set
4725 * to obtain relations of the form
4729 static __isl_give isl_union_map
*wrapped_reference_to_access(
4730 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
4732 isl_union_map
*tag2access
;
4734 tag2access
= isl_union_map_copy(tagged
);
4735 tag2access
= isl_union_map_universe(tag2access
);
4736 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
4737 tag2access
= isl_union_map_domain_map(tag2access
);
4738 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
4740 ref
= isl_union_set_coalesce(ref
);
4741 ref
= isl_union_set_apply(ref
, tag2access
);
4743 return isl_union_set_unwrap(ref
);
4746 /* Given an access relation "access" from "group", remove those reads
4747 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
4748 * communicate data within the same iteration of the last_shared dimension
4751 * If the access is a read then it is necessarily an element of
4753 * live_in union (range flow)
4755 * where live_in and flow may be overapproximations.
4756 * If the access is a write then it is necessarily an element of
4758 * live_out union (domain flow)
4760 * In both cases, the access relation is also a subset of
4761 * the group access relation.
4763 * Essentially, we compute the intersection of "access" with either
4765 * live_in union (range non-local-flow)
4769 * live_out union (domain non-local-flow)
4771 * We first construct a relation "local"
4773 * [[D -> R] -> [D' -> R']]
4775 * of pairs of domain iterations accessing the reference group
4776 * and references in the group that are scheduled to the same iteration
4777 * of the last_shared dimension.
4779 * If this relation does not intersect the dataflow dependences,
4780 * then there is nothing we can possibly remove and we simply
4783 * Otherwise, we remove the "local" dataflow dependences from
4784 * the set of all dataflow dependences.
4785 * Note that if the potential dataflow dependences are an overapproximation
4786 * of the actual dataflow dependences, then the result remains an
4787 * overapproximation of the non-local dataflow dependences.
4788 * Copying to/from global memory is only needed for the references
4789 * in the domain/range of the result or for accesses that are live out/in
4790 * for the entire scop.
4792 * We therefore map the domain/range of the "external" relation
4793 * to the corresponding access relation and take the union with
4794 * the live out/in relation.
4796 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
4797 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
4801 isl_union_map
*tagger
;
4802 isl_union_set
*domain
;
4804 isl_union_map
*sched
, *local
, *tagged
, *external
;
4805 isl_union_set
*tag_set
;
4808 if (isl_union_map_is_empty(access
))
4811 tagged
= group_tagged_access_relation(group
);
4813 sched
= isl_union_map_copy(gen
->sched
);
4815 space
= isl_union_map_get_space(sched
);
4816 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
4817 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4819 tagger
= isl_union_map_copy(gen
->prog
->scop
->tagger
);
4820 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
4821 tagger
= isl_union_map_intersect_range(tagger
, domain
);
4822 sched
= isl_union_map_apply_domain(sched
, tagger
);
4824 local
= isl_union_map_apply_range(sched
,
4825 isl_union_map_reverse(isl_union_map_copy(sched
)));
4826 local
= isl_union_map_intersect(local
,
4827 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
4829 empty
= isl_union_map_is_empty(local
);
4830 if (empty
< 0 || empty
) {
4831 isl_union_map_free(tagged
);
4832 isl_union_map_free(local
);
4834 return isl_union_map_free(access
);
4838 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
4839 external
= isl_union_map_intersect_params(external
,
4840 isl_set_copy(gen
->prog
->scop
->context
));
4841 external
= isl_union_map_subtract(external
, local
);
4844 tag_set
= isl_union_map_range(external
);
4845 external
= wrapped_reference_to_access(tag_set
, tagged
);
4846 external
= isl_union_map_union(external
,
4847 isl_union_map_copy(gen
->prog
->scop
->live_in
));
4849 tag_set
= isl_union_map_domain(external
);
4850 external
= wrapped_reference_to_access(tag_set
, tagged
);
4851 external
= isl_union_map_union(external
,
4852 isl_union_map_copy(gen
->prog
->scop
->live_out
));
4855 access
= isl_union_map_intersect(access
, external
);
4860 /* Given the AST context schedule "schedule" and the mapping from
4861 * domains to the shared tile loops "shared_sched", add a schedule
4862 * for copying an array reference group to/from shared/private memory.
4863 * "read" is set if data should be copied from global memory
4864 * to shared/private memory.
4865 * "k" represents the current group
4866 * "s" is the total number of groups
4868 * We schedule an operation before or after the innermost loop
4869 * of "shared_sched" that affects the tile of the array reference group.
4871 * schedule is of the form
4875 * (with D the iteration domains and L the already generated loops),
4876 * while shared_sched is of the form
4880 * We first compute the access relation for the reference group
4884 * and remove from this access relation those reads or writes
4885 * that only needed to communicate data within the same iteration
4886 * of the last_shared dimension of the group.
4887 * We then combine what is left with shared_sched into
4891 * If this results in an empty relation, no copying needs to be performed
4893 * Otherwise, we invert the relation and combine it with "schedule" into
4897 * The actual additional piece of the schedule is obtained from combining
4903 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4905 * The position of "val" corresponds to the innermost loop that affects
4906 * the tile and the value indicates where the copying is scheduled
4907 * with respect to the actual kernel code (at value 0).
4908 * Reads are schedule before the code, writes to global memory from
4909 * private memory are scheduled at values 1 to s, writes to global
4910 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4912 * If we are scheduling a read from global memory to shared memory,
4913 * we insert a synchronization before the kernel code (at the innermost
4915 * If we are scheduling a write to global memory, then we add
4916 * a synchronization after all writes (at value 2 *s + 2).
4917 * However, there is no need for a synchronization after the outermost loop.
4918 * A write to global memory from private memory at the innermost level
4919 * does not require a synchronization, because it is covered by
4920 * the synchronization after the kernel inserted by body_schedule.
4922 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4923 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4924 __isl_keep isl_union_map
*shared_sched
,
4925 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4930 isl_union_map
*access
;
4931 isl_map
*map
, *proj
, *access_map
;
4934 access
= group_access_relation(group
, read
, !read
);
4935 access
= remove_local_accesses(gen
, group
, access
, read
);
4936 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4939 if (isl_union_map_is_empty(access
)) {
4940 isl_union_map_free(access
);
4944 access
= isl_union_map_reverse(access
);
4945 access
= isl_union_map_apply_range(access
,
4946 isl_union_map_copy(schedule
));
4947 access_map
= isl_map_from_union_map(access
);
4949 space
= isl_space_copy(group
->array
->space
);
4950 space
= isl_space_from_range(space
);
4951 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4952 map
= isl_map_domain_map(isl_map_universe(space
));
4954 space
= isl_union_map_get_space(schedule
);
4955 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4959 else if (group
->private_tile
)
4962 val
= 1 + s
+ 1 + k
;
4963 proj
= insert_even(gen
, space
, pos
, val
);
4964 map
= isl_map_apply_range(map
, proj
);
4966 access_map
= isl_map_range_product(access_map
, map
);
4968 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4969 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4971 res
= isl_union_map_add_map(res
, access_map
);
4973 n
= gen
->shared_len
- gen
->tile_first
;
4975 if (!group
->private_tile
)
4976 res
= add_sync_schedule(gen
, res
, schedule
,
4977 shared_sched
, n
, -1);
4981 if (pos
== n
&& group
->private_tile
)
4983 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4990 /* Return a schedule for the shared tile loops based on the current
4991 * AST context schedule.
4993 * We create a "shared_sched" that maps the domains to the first
4994 * shared_len dimensions of the computed schedule, project out the
4995 * first tile_first dimensions (as these are already covered by
4996 * the host code) and insert "statement-level" dimensions at even
4997 * positions so that we can schedule copy blocks and synchronization
4998 * before/after each level.
5000 * In particular, copy blocks are inserted inside the innermost
5001 * level that affect the tile. For the copying to global memory,
5002 * those from private memory are scheduled before those from shared
5003 * memory such that synchronization can be inserted between the two
5004 * at the innermost level.
5005 * Synchronization is inserted at the innermost level before the
5006 * actual kernel code if there is any copying from global memory
5007 * to shared memory. It is inserted unconditionally at the innermost
5008 * level after the actual kernel code and the copying to global memory
5009 * from private memory (if any). Finally, it is inserted after
5010 * any copying to global memory, except at the outermost level
5011 * and at the innermost level if there is no copying from shared
5012 * memory. The copying from private memory is covered by the unconditional
5013 * synchronization at the innermost level.
5015 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
5016 __isl_take isl_union_map
*schedule
)
5020 isl_union_map
*shared_sched
;
5021 isl_union_map
*sched
;
5022 isl_map
*proj
, *map
;
5025 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
5026 proj
= projection(isl_union_map_get_space(shared_sched
),
5027 gen
->tiled_len
, gen
->shared_len
);
5028 shared_sched
= isl_union_map_apply_range(shared_sched
,
5029 isl_union_map_from_map(proj
));
5030 space
= isl_union_map_get_space(shared_sched
);
5031 proj
= insert_even(gen
, space
, -1, 0);
5032 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
5033 isl_union_map_from_map(proj
));
5035 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
5038 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
5039 s
+= gen
->prog
->array
[i
].n_group
;
5042 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5043 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
5045 for (j
= 0; j
< array
->n_group
; ++j
) {
5046 struct gpu_array_ref_group
*group
;
5048 group
= array
->groups
[j
];
5049 if (!group
->private_tile
&& !group
->shared_tile
)
5051 res
= add_group_schedule(gen
, res
, schedule
,
5052 shared_sched
, group
, 0, k
, s
);
5053 res
= add_group_schedule(gen
, res
, schedule
,
5054 shared_sched
, group
, 1, k
, s
);
5059 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
5060 gen
->shared_len
- gen
->tile_first
, 1 + s
);
5062 isl_union_map_free(shared_sched
);
5063 isl_union_map_free(schedule
);
5068 /* Generate code for "kernel" in the given "context".
5070 * We first generate code for the shared tile loops (T1T, T1P and T2)
5071 * in a context that includes the block ids.
5072 * Within each iteration of these loops an additional code generation
5073 * is performed (within create_kernel_leaf) for the rest of the schedule
5074 * in a context that includes the thread ids.
5076 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
5077 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
5078 __isl_keep isl_multi_pw_aff
*grid_size
)
5082 isl_id_list
*iterators
;
5083 isl_union_map
*schedule
;
5087 schedule
= isl_ast_build_get_schedule(build
);
5089 build
= isl_ast_build_copy(build
);
5090 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
5091 space
= isl_ast_build_get_schedule_space(build
);
5092 set
= isl_set_universe(isl_space_copy(space
));
5093 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
5094 build
= isl_ast_build_restrict(build
, set
);
5096 schedule
= body_schedule(gen
, schedule
);
5098 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
5100 build
= set_atomic_and_unroll(build
, space
, sched_len
);
5101 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
5102 build
= isl_ast_build_set_iterators(build
, iterators
);
5103 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
5104 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
5105 isl_ast_build_free(build
);
5110 /* Attach "id" to the given node.
5112 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
5113 __isl_keep isl_ast_build
*build
, void *user
)
5117 node
= isl_ast_node_set_annotation(node
, id
);
5122 /* Construct an AST node for performing a kernel launch and attach
5123 * the information about the kernel to that node.
5125 * The kernel AST has been constructed in the context of the range
5126 * of "schedule". In particular, the grid size has been computed
5127 * in the context. We therefore still need to make sure that these
5128 * constraints are expressed in the code. We do this by creating a schedule
5130 * kernel[] -> [S -> []]
5132 * where S is the schedule domain, i.e., the range of "schedule".
5133 * The AST generation will then create a single call surrounded by
5134 * all the condition in "S" that have not been expressed yet.
5136 * The kernel information is attached to this node in attach_id.
5138 static __isl_give isl_ast_node
*construct_launch(
5139 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
5140 __isl_take
struct ppcg_kernel
*kernel
)
5144 isl_union_set
*domain
;
5149 ctx
= isl_ast_build_get_ctx(build
);
5151 id
= isl_id_alloc(ctx
, NULL
, kernel
);
5152 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
5154 domain
= isl_union_map_range(schedule
);
5155 set
= isl_set_from_union_set(domain
);
5156 map
= isl_map_from_domain(set
);
5157 map
= isl_map_from_range(isl_map_wrap(map
));
5158 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
5159 schedule
= isl_union_map_from_map(map
);
5161 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
5162 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
5163 isl_ast_build_free(build
);
5168 /* This function is called for each leaf in the AST of the host code.
5169 * We first specialize the schedule to the site of the leaf, compute
5170 * the size of shared memory and then construct the body of the host code
5171 * and the associated kernel.
5173 * The necessary information for printing the kernel launch is
5174 * stored in a struct ppcg_kernel and attached to the leaf node
5175 * created to represent the launch.
5177 static __isl_give isl_ast_node
*create_host_leaf(
5178 __isl_take isl_ast_build
*build
, void *user
)
5180 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
5183 struct ppcg_kernel
*kernel
;
5184 isl_set
*host_domain
;
5185 isl_union_map
*schedule
;
5186 isl_union_map
*local_sched
;
5187 isl_union_map
*access
;
5188 isl_union_set
*domain
;
5191 schedule
= isl_ast_build_get_schedule(build
);
5193 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
5196 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
5198 local_sched
= isl_union_map_copy(gen
->sched
);
5199 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
5200 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
5201 isl_union_map_copy(gen
->prog
->may_write
));
5202 access
= isl_union_map_apply_domain(access
,
5203 isl_union_map_copy(local_sched
));
5205 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
5206 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
5207 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
5209 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
5210 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
5211 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
5213 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
5217 kernel
->id
= gen
->kernel_id
++;
5218 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
5219 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
5220 extract_block_size(gen
, kernel
);
5221 kernel
->arrays
= isl_union_map_range(access
);
5222 kernel
->arrays
= isl_union_set_apply(kernel
->arrays
,
5223 isl_union_map_copy(gen
->prog
->to_outer
));
5224 kernel
->space
= isl_ast_build_get_schedule_space(build
);
5226 gen
->private_access
= NULL
;
5227 compute_shared_sched(gen
);
5228 gen
->privatization
= compute_privatization(gen
);
5229 check_scalar_live_ranges(gen
);
5230 if (group_references(gen
) < 0)
5231 schedule
= isl_union_map_free(schedule
);
5232 compute_private_access(gen
);
5233 host_domain
= isl_set_from_union_set(isl_union_map_range(
5234 isl_union_map_copy(schedule
)));
5235 localize_bounds(gen
, kernel
, host_domain
);
5237 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
5238 check_shared_memory_bound(gen
);
5239 compute_group_tilings(gen
);
5241 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
5243 create_kernel_vars(gen
, kernel
);
5245 free_local_array_info(gen
);
5246 isl_map_free(gen
->privatization
);
5247 isl_union_map_free(gen
->private_access
);
5248 isl_union_map_free(gen
->local_sched
);
5249 isl_union_map_free(gen
->tiled_sched
);
5250 isl_union_map_free(gen
->shared_sched
);
5251 isl_union_map_free(gen
->shared_proj
);
5252 isl_set_free(host_domain
);
5253 free(gen
->tile_size
);
5255 node
= construct_launch(build
, schedule
, kernel
);
5259 isl_union_map_free(schedule
);
5263 /* Use isl to generate code for the outer gen->tile_first loops
5264 * of the global schedule in gen->sched, resulting in the host code.
5265 * Within each iteration of this partial schedule, i.e., for each kernel
5266 * launch, create_host_leaf takes care of generating the kernel code.
5268 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
5270 isl_ast_build
*build
;
5272 isl_union_map
*sched
;
5274 isl_id_list
*iterators
;
5276 sched
= isl_union_map_copy(gen
->sched
);
5277 proj
= projection(isl_union_map_get_space(sched
),
5278 gen
->untiled_len
, gen
->tile_first
);
5279 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
5281 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
5282 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
5283 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
5284 build
= isl_ast_build_set_iterators(build
, iterators
);
5285 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
5286 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
5287 isl_ast_build_free(build
);
5292 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
5296 return isl_union_map_read_from_str(ctx
, str
);
5299 /* Information about the outermost tilable bands in the forest of bands.
5301 * tile_len and n_parallel are only sets on band_info structures
5302 * that correspond to outermost bands. For other bands (in particular,
5303 * ancestors of the outermost bands), n_parallal is set to 0.
5305 * prefix is the (padded) schedule leading up to the outermost tilable bands.
5307 * tile_first is the number of schedule dimensions in prefix.
5309 * suffix is the schedule of the outermost tilable bands and their descendants.
5312 struct gpu_gen
*gen
;
5316 isl_union_map
*prefix
;
5317 isl_union_map
*suffix
;
5320 /* Set tile_len and n_parallel of the statement to that of
5321 * their outermost band, recorded in the band_info.
5323 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
5325 struct band_info
*info
= user
;
5326 struct gpu_stmt
*stmt
;
5329 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
5330 stmt
= find_stmt(info
->gen
->prog
, id
);
5333 stmt
->tile_len
= info
->tile_len
;
5334 stmt
->n_parallel
= info
->n_parallel
;
5341 static void list_select_outer_band(struct gpu_gen
*gen
,
5342 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
5344 /* Check if this band has any parallel loops. If so, take it as
5345 * the outermost tilable band. If not, continue looking for the
5346 * outermost tilable band in the children of the current band.
5348 static void band_select_outer_band(struct gpu_gen
*gen
,
5349 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
5351 int n
= isl_band_n_member(band
);
5354 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
5355 if (!isl_band_member_is_coincident(band
, n_parallel
))
5358 info
->n_parallel
= n_parallel
;
5360 gen
->any_parallelism
= 1;
5362 info
->tile_first
= pos
;
5364 info
->prefix
= isl_band_get_prefix_schedule(band
);
5365 info
->suffix
= isl_union_map_flat_range_product(
5366 isl_band_get_partial_schedule(band
),
5367 isl_band_get_suffix_schedule(band
));
5368 isl_union_map_foreach_map(info
->prefix
,
5369 &set_stmt_tile_len
, info
);
5370 } else if (isl_band_has_children(band
)) {
5371 isl_band_list
*children
;
5372 children
= isl_band_get_children(band
);
5373 list_select_outer_band(gen
, children
, pos
+ n
, info
);
5376 info
->tile_first
= pos
+ n
;
5378 info
->prefix
= isl_union_map_flat_range_product(
5379 isl_band_get_prefix_schedule(band
),
5380 isl_band_get_partial_schedule(band
));
5381 info
->suffix
= isl_band_get_suffix_schedule(band
);
5382 isl_union_map_foreach_map(info
->prefix
,
5383 &set_stmt_tile_len
, info
);
5386 isl_band_free(band
);
5389 /* Comparison function that returns a non-zero value for band_infos
5390 * with different tile_len fields or different n_parallel fields.
5392 static int cmp_band(const void *p1
, const void *p2
)
5394 const struct band_info
*info1
= p1
;
5395 const struct band_info
*info2
= p2
;
5397 if (info1
->tile_len
!= info2
->tile_len
)
5398 return info1
->tile_len
- info2
->tile_len
;
5400 return info1
->n_parallel
- info2
->n_parallel
;
5403 /* Extend "umap" with coordinates with fixed value "val"
5404 * to a total length of "dst_len", assuming the original dimension is "src_len".
5406 static __isl_give isl_union_map
*extend_range(
5407 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
5413 dim
= isl_union_map_get_space(umap
);
5414 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
5415 for (i
= src_len
; i
< dst_len
; ++i
)
5416 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
5418 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
5423 /* Group bands with the same values for tile_len and n_parallel.
5424 * The prefix schedule is then extended with a fixed coordinate that
5425 * is different for each such group.
5426 * Note that the actual values for this coordinate are not important.
5427 * The bands have already been effectively separated at a higher level
5428 * or they are independent and may be executed in parallel.
5429 * The list of band_info has been sorted before this functions is called.
5431 static void separate_bands(struct band_info
*info
, int n
)
5436 for (i
= 0; i
< n
; ++i
) {
5437 int l
= info
[i
].tile_first
;
5440 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
5441 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
5444 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5446 info
[i
].tile_first
= l
+ 1;
5450 /* Select the outermost bands in the elements of the list, align
5451 * their prefix schedules, separate bands with different values
5452 * for tile_len and/or n_parallel and then combine the resulting
5453 * prefix and suffix schedules into a single pair of prefix and
5454 * suffix schedules for the entire list.
5456 static void list_select_outer_band(struct gpu_gen
*gen
,
5457 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
5461 int n
= isl_band_list_n_band(list
);
5462 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
5463 struct band_info
*info
;
5465 isl_union_map
*prefix
;
5466 isl_union_map
*suffix
;
5469 info
= isl_calloc_array(ctx
, struct band_info
, n
);
5473 for (i
= 0; i
< n
; ++i
) {
5474 band
= isl_band_list_get_band(list
, i
);
5475 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
5476 if (info
[i
].tile_first
> max_tile_first
)
5477 max_tile_first
= info
[i
].tile_first
;
5480 for (i
= 0; i
< n
; ++i
) {
5481 if (info
[i
].tile_first
== max_tile_first
)
5483 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5484 info
[i
].tile_first
, max_tile_first
, 0);
5485 info
[i
].tile_first
= max_tile_first
;
5488 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
5490 for (i
= 0; i
< n
- 1; ++i
)
5491 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
5492 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
5496 separate_bands(info
, n
);
5498 prefix
= info
[0].prefix
;
5499 suffix
= info
[0].suffix
;
5501 for (i
= 1; i
< n
; ++i
) {
5502 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
5503 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
5506 list_info
->tile_first
= info
[0].tile_first
;
5507 list_info
->tile_len
= -1;
5508 list_info
->prefix
= prefix
;
5509 list_info
->suffix
= suffix
;
5511 isl_band_list_free(list
);
5515 /* Select the outermost tilable band that (by construction)
5516 * has at least one parallel loop.
5517 * The starting position of the aligned band is stored in the pair
5519 * The sizes and number of parallel loops may be different in different
5520 * parts of the band forest and are therefore stored in the gpu_stmts.
5522 * Return the complete schedule, with the tilable bands aligned
5523 * at gen->tile_first and padded with zero, if needed.
5525 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
5526 __isl_keep isl_schedule
*schedule
)
5528 isl_band_list
*list
;
5529 struct band_info info
;
5531 gen
->n_parallel
= 0;
5534 list
= isl_schedule_get_band_forest(schedule
);
5536 if (isl_band_list_n_band(list
) == 0) {
5537 isl_band_list_free(list
);
5538 return isl_schedule_get_map(schedule
);
5541 list_select_outer_band(gen
, list
, 0, &info
);
5543 gen
->tile_first
= info
.tile_first
;
5544 info
.suffix
= align_range(info
.suffix
);
5546 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
5549 /* Set gen->untiled_len to the number of scheduling dimensions
5550 * for the schedule of the first domain.
5551 * We assume here that this number is the same for all domains.
5553 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
5555 unsigned *untiled_len
= user
;
5557 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
5563 /* Compute an appropriate schedule based on the accesses in
5564 * gen->read and gen->write.
5566 * We use the dependences in gen->prog->scop to compute
5567 * a schedule that has a parallel loop in each tilable band.
5568 * Finally, we select the outermost tilable band.
5570 * If live range reordering is allowed, then we need to make sure
5571 * that live ranges on arrays are not run in parallel since doing
5572 * so would require array expansion. We therefore add the array
5573 * order dependences to the coincidence dependences. Non-zero array
5574 * order dependences will then prevent a schedule dimension from being
5575 * considered parallel.
5576 * Live ranges derived from scalars are allowed to be run in parallel
5577 * since we force the scalars to be mapped to private memory in
5578 * check_scalar_live_ranges.
5579 * If live range reordering is allowed, then the false dependences
5580 * are not added to the validity constraints as that would prevent
5581 * reordering. Instead, the external false dependences that enforce that reads
5582 * from potentially live-in data precede any later write and
5583 * that writes of potentially live-out data follow any other earlier write
5584 * are added to the validity and the coincidence constraints.
5585 * The false dependences are still added to the proximity constraints
5586 * for consistency with the case where live range reordering is not allowed.
5587 * The coincidence constraints then consist of flow dependences,
5588 * exernal false dependences and array order dependences.
5589 * The independences can be filtered out from the first two sets.
5590 * They have already been filtered out from the array order dependences
5591 * on a per array basis in collect_order_dependences.
5592 * There is no need for a per array handling of the other two sets
5593 * as there should be no flow or external false dependence on local
5594 * variables that can be filtered out.
5596 static void compute_schedule(struct gpu_gen
*gen
)
5598 isl_union_set
*domain
;
5599 isl_union_map
*dep_raw
, *dep
;
5600 isl_union_map
*validity
, *proximity
, *coincidence
;
5601 isl_union_map
*sched
;
5602 isl_schedule_constraints
*sc
;
5603 isl_schedule
*schedule
;
5605 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
5606 domain
= isl_union_set_intersect_params(domain
,
5607 isl_set_copy(gen
->prog
->scop
->context
));
5608 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
5609 if (gen
->options
->live_range_reordering
) {
5610 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
5611 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
5612 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
5613 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5614 validity
= isl_union_map_copy(proximity
);
5615 validity
= isl_union_map_union(validity
,
5616 isl_union_map_copy(gen
->prog
->scop
->dep_external
));
5617 proximity
= isl_union_map_union(proximity
,
5618 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
5619 coincidence
= isl_union_map_copy(validity
);
5620 coincidence
= isl_union_map_subtract(coincidence
,
5621 isl_union_map_copy(gen
->prog
->scop
->independence
));
5622 coincidence
= isl_union_map_union(coincidence
,
5623 isl_union_map_copy(gen
->prog
->array_order
));
5625 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5626 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
5627 dep
= isl_union_map_union(dep
, dep_raw
);
5628 dep
= isl_union_map_coalesce(dep
);
5629 proximity
= isl_union_map_copy(dep
);
5630 coincidence
= isl_union_map_copy(dep
);
5633 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
5634 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
5635 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
5637 if (gen
->options
->debug
->dump_schedule_constraints
)
5638 isl_schedule_constraints_dump(sc
);
5639 schedule
= isl_schedule_constraints_compute_schedule(sc
);
5640 if (gen
->options
->debug
->dump_schedule
)
5641 isl_schedule_dump(schedule
);
5643 sched
= select_outer_tilable_band(gen
, schedule
);
5645 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
5646 sched
= isl_union_map_intersect_domain(sched
, domain
);
5649 isl_schedule_free(schedule
);
5652 /* Compute the sets of outer array elements that need to be copied in and out.
5654 * In particular, for each array that is possibly written anywhere in
5655 * gen->prog and that is visible outside the corresponding scop,
5656 * we copy out its entire extent.
5658 * Any array elements that is read without first being written needs
5659 * to be copied in. Furthermore, if there are any array elements that
5660 * are copied out, but that may not be written inside gen->prog, then
5661 * they also need to be copied in to ensure that the value after execution
5662 * is the same as the value before execution.
5663 * In case the array elements are structures, we need to take into
5664 * account that all members of the structures need to be written
5665 * by gen->prog before we can avoid copying the data structure in.
5667 * While computing the set of array elements that are copied out but
5668 * not necessarily written, we intersect both sets with the context.
5669 * This helps in those cases where the arrays are declared with a fixed size,
5670 * while the accesses are parametric and the context assigns a fixed value
5671 * to the parameters.
5673 * If an element from a local array is read without first being written,
5674 * then there is no point in copying it in since it cannot have been
5675 * written prior to the scop. Warn about the uninitialized read instead.
5677 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
5680 isl_union_set
*local
;
5681 isl_union_set
*may_write
, *must_write
;
5682 isl_union_set
*copy_in
, *copy_out
;
5683 isl_union_set
*not_written
;
5684 isl_union_map
*uninitialized
;
5685 isl_union_map
*local_uninitialized
;
5687 must_write
= isl_union_map_range(
5688 isl_union_map_copy(gen
->prog
->must_write
));
5689 must_write
= isl_union_set_intersect_params(must_write
,
5690 isl_set_copy(gen
->prog
->context
));
5691 may_write
= isl_union_map_range(
5692 isl_union_map_copy(gen
->prog
->may_write
));
5693 may_write
= isl_union_set_intersect_params(may_write
,
5694 isl_set_copy(gen
->prog
->context
));
5695 may_write
= isl_union_set_universe(may_write
);
5696 may_write
= isl_union_set_apply(may_write
,
5697 isl_union_map_copy(gen
->prog
->to_outer
));
5698 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
5699 local
= isl_union_set_copy(copy_out
);
5701 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5706 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
5708 if (gen
->prog
->array
[i
].local
) {
5711 set
= isl_set_universe(space
);
5712 local
= isl_union_set_add_set(local
, set
);
5716 write_i
= isl_union_set_extract_set(may_write
, space
);
5717 empty
= isl_set_plain_is_empty(write_i
);
5718 isl_set_free(write_i
);
5722 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
5723 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
5725 isl_union_set_free(may_write
);
5727 copy_out
= isl_union_set_intersect_params(copy_out
,
5728 isl_set_copy(gen
->prog
->context
));
5730 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
5732 copy_out
= isl_union_set_apply(copy_out
,
5733 isl_union_map_copy(gen
->prog
->to_inner
));
5734 not_written
= isl_union_set_subtract(copy_out
, must_write
);
5736 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
5737 local_uninitialized
= isl_union_map_copy(uninitialized
);
5739 local
= isl_union_set_apply(local
,
5740 isl_union_map_copy(gen
->prog
->to_inner
));
5741 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
5743 if (!isl_union_map_is_empty(local_uninitialized
)) {
5745 "possibly uninitialized reads (not copied in):\n");
5746 isl_union_map_dump(local_uninitialized
);
5748 uninitialized
= isl_union_map_subtract(uninitialized
,
5749 local_uninitialized
);
5750 copy_in
= isl_union_map_range(uninitialized
);
5751 copy_in
= isl_union_set_union(copy_in
, not_written
);
5752 copy_in
= isl_union_set_apply(copy_in
,
5753 isl_union_map_copy(gen
->prog
->to_outer
));
5755 gen
->prog
->copy_in
= copy_in
;
5758 /* Internal data structure for extract_access.
5759 * "next_access" points to the end of a linked list that is extended
5760 * by extract_access.
5761 * "single_expression" is set if the access expressions belong to
5762 * an expression statement (i.e., a statement without internal control).
5764 struct ppcg_extract_access_data
{
5765 struct gpu_stmt_access
**next_access
;
5766 int single_expression
;
5769 /* Extract a gpu_stmt_access from "expr", append it to the list
5770 * that ends in *data->next_access and update the end of the list.
5771 * If the access expression performs a write, then it is considered
5772 * exact only if it appears in a single expression statement and
5773 * if its may access relation is equal to its must access relation.
5775 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
5777 struct ppcg_extract_access_data
*data
= user
;
5779 struct gpu_stmt_access
*access
;
5781 isl_multi_pw_aff
*index
;
5783 may
= pet_expr_access_get_may_access(expr
);
5784 ctx
= isl_map_get_ctx(may
);
5785 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
5787 access
->next
= NULL
;
5788 access
->read
= pet_expr_access_is_read(expr
);
5789 access
->write
= pet_expr_access_is_write(expr
);
5790 access
->access
= may
;
5791 access
->tagged_access
= pet_expr_access_get_tagged_may_access(expr
);
5792 if (!access
->write
) {
5793 access
->exact_write
= 1;
5794 } else if (!data
->single_expression
) {
5795 access
->exact_write
= 0;
5798 must
= pet_expr_access_get_must_access(expr
);
5799 access
->exact_write
= isl_map_is_equal(must
, access
->access
);
5802 index
= pet_expr_access_get_index(expr
);
5803 access
->n_index
= isl_multi_pw_aff_dim(index
, isl_dim_out
);
5804 isl_multi_pw_aff_free(index
);
5805 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
5808 *data
->next_access
= access
;
5809 data
->next_access
= &(*data
->next_access
)->next
;
5814 /* Construct a linked list of gpu_stmt_access objects,
5815 * one for each access expression in the statement body.
5817 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
5819 struct ppcg_extract_access_data data
;
5821 stmt
->accesses
= NULL
;
5822 data
.next_access
= &stmt
->accesses
;
5823 data
.single_expression
=
5824 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
5825 pet_tree_foreach_access_expr(stmt
->stmt
->body
, &extract_access
, &data
);
5828 /* Return an array of gpu_stmt representing the statements in "scop".
5830 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
5831 __isl_keep isl_set
*context
)
5834 struct gpu_stmt
*stmts
;
5836 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->pet
->n_stmt
);
5840 for (i
= 0; i
< scop
->pet
->n_stmt
; ++i
) {
5841 struct gpu_stmt
*s
= &stmts
[i
];
5843 s
->id
= isl_set_get_tuple_id(scop
->pet
->stmts
[i
]->domain
);
5844 s
->stmt
= scop
->pet
->stmts
[i
];
5845 pet_stmt_extract_accesses(s
);
5851 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5853 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
5855 struct gpu_gen
*gen
= user
;
5857 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
5861 /* Generate CUDA code for "scop" and print it to "p".
5862 * After generating an AST for the transformed scop as explained below,
5863 * we call "gen->print" to print the AST in the desired output format
5866 * If it turns out that it does not make sense to generate GPU code,
5867 * then we generate CPU code instead.
5869 * The GPU code is generated in a context where at least one
5870 * statement instance is executed. The corresponding guard (if any) is printed
5871 * around the entire generated GPU code, except for the declaration
5872 * of the arrays that are visible outside of the scop and that therefore
5873 * cannot be declared inside the body of any possible guard.
5875 * We first compute a schedule that respects the dependences
5876 * of the original program and select the outermost band
5877 * of tilable dimensions that has at least one parallel loop.
5878 * We then have three blocks of dimensions
5882 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5887 * For each iteration of the T loop and for each array, we compute
5888 * the array elements accessed by that iteration, construct a rectangular
5889 * box around it and shift it to the origin. The result is used
5890 * as shared memory for the array.
5892 * We then split off at most 2 parallel loops from the T loops and
5893 * at most 3 parallel loops from the P loops
5897 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5898 * according to "grid"/"block" sizes.
5900 * H T1T T1P T2 P1T P1P P2 G
5902 * Finally, the T1P and P1P iterators are equated to the block and
5903 * thread dimensions respectively and so are effectively removed.
5904 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5905 * are run on the GPU.
5907 * Code is generated in three stages. We first generate code for the
5908 * host (the H loops), with iterators h%d. Then, for each leaf node
5909 * of the resulting AST, we generate code for the shared loops (up to
5910 * and including T2), with iterators g%d and after equating the H loops
5911 * to h%d parameters and the T1P loops to the block dimensions.
5912 * Finally, we generate code for the remaining loops in a similar fashion.
5914 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5915 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5916 struct ppcg_options
*options
)
5918 struct gpu_prog
*prog
;
5920 isl_set
*context
, *guard
;
5923 return isl_printer_free(p
);
5925 ctx
= isl_printer_get_ctx(p
);
5926 prog
= gpu_prog_alloc(ctx
, scop
);
5928 return isl_printer_free(p
);
5930 context
= isl_set_copy(prog
->context
);
5931 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5932 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5935 gen
->any_parallelism
= 0;
5936 compute_schedule(gen
);
5938 if (!gen
->any_parallelism
) {
5939 isl_set_free(context
);
5940 isl_set_free(guard
);
5941 p
= print_cpu(p
, scop
, options
);
5943 compute_copy_in_and_out(gen
);
5944 gen
->tree
= generate_host_code(gen
);
5945 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5946 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5947 isl_ast_node_free(gen
->tree
);
5950 isl_union_map_free(gen
->sched
);
5952 gpu_prog_free(prog
);
5957 /* Wrapper around generate for use as a ppcg_transform callback.
5959 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5960 struct ppcg_scop
*scop
, void *user
)
5962 struct gpu_gen
*gen
= user
;
5964 return generate(p
, gen
, scop
, gen
->options
);
5967 /* Transform the code in the file called "input" by replacing
5968 * all scops by corresponding GPU code and write the results to "out".
5970 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5971 struct ppcg_options
*options
,
5972 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5973 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5974 struct gpu_types
*types
, void *user
), void *user
)
5981 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5982 gen
.options
= options
;
5985 gen
.print_user
= user
;
5987 gen
.types
.name
= NULL
;
5989 if (options
->debug
->dump_sizes
) {
5990 isl_space
*space
= isl_space_params_alloc(ctx
, 0);
5991 gen
.used_sizes
= isl_union_map_empty(space
);
5994 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5996 if (options
->debug
->dump_sizes
) {
5997 isl_union_map_dump(gen
.used_sizes
);
5998 isl_union_map_free(gen
.used_sizes
);
6001 isl_union_map_free(gen
.sizes
);
6002 for (i
= 0; i
< gen
.types
.n
; ++i
)
6003 free(gen
.types
.name
[i
]);
6004 free(gen
.types
.name
);
6009 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
6011 struct gpu_prog
*prog
;
6016 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
6021 prog
->context
= isl_set_copy(scop
->context
);
6022 prog
->n_stmts
= scop
->pet
->n_stmt
;
6023 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
6024 prog
->read
= isl_union_map_copy(scop
->reads
);
6025 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
6026 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
6027 prog
->to_inner
= compute_to_inner(scop
);
6028 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
6029 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
6032 return gpu_prog_free(prog
);
6034 if (collect_array_info(prog
) < 0)
6035 return gpu_prog_free(prog
);
6040 void *gpu_prog_free(struct gpu_prog
*prog
)
6044 free_array_info(prog
);
6045 free_stmts(prog
->stmts
, prog
->n_stmts
);
6046 isl_union_map_free(prog
->to_outer
);
6047 isl_union_map_free(prog
->to_inner
);
6048 isl_union_set_free(prog
->copy_in
);
6049 isl_union_set_free(prog
->copy_out
);
6050 isl_union_map_free(prog
->read
);
6051 isl_union_map_free(prog
->may_write
);
6052 isl_union_map_free(prog
->must_write
);
6053 isl_union_map_free(prog
->array_order
);
6054 isl_set_free(prog
->context
);