2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
22 #include <isl/schedule.h>
23 #include <isl/schedule_node.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
29 #include "gpu_array_tile.h"
30 #include "gpu_group.h"
33 #include "ppcg_options.h"
36 struct gpu_array_info
;
38 /* Collect all references to the given array and store pointers to them
41 * If the array contains structures, then there is no need to collect
42 * the references since we will not be computing any reference groups.
44 static void collect_references(struct gpu_prog
*prog
,
45 struct gpu_array_info
*array
)
50 if (array
->has_compound_element
)
54 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
55 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
56 struct gpu_stmt_access
*access
;
58 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
60 name
= isl_map_get_tuple_name(access
->access
,
62 if (name
&& !strcmp(array
->name
, name
))
68 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
72 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
73 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
74 struct gpu_stmt_access
*access
;
76 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
78 name
= isl_map_get_tuple_name(access
->access
,
80 if (!name
|| strcmp(array
->name
, name
))
83 array
->refs
[n
++] = access
;
88 /* Compute and return the extent of "array", taking into account the set of
91 * In particular, the extent in the outer dimension is taken
92 * from "accessed", while the extents in the remaining dimensions
93 * are taken from array->extent.
95 * The extent in the outer dimension cannot be taken from array->extent
96 * because that may be unbounded. Furthermore, even if it is bounded,
97 * it may be larger than the piece of the array that is being accessed.
99 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
100 __isl_keep isl_set
*accessed
)
107 extent
= isl_set_copy(array
->extent
);
109 n_index
= isl_set_dim(accessed
, isl_dim_set
);
113 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
114 outer
= isl_set_copy(accessed
);
115 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
116 extent
= isl_set_flat_product(outer
, extent
);
117 id
= isl_set_get_tuple_id(accessed
);
118 extent
= isl_set_set_tuple_id(extent
, id
);
123 /* Is the array "array" being extracted a read-only scalar?
125 * That is, is "array" a scalar that is never possibly written to.
126 * An array containing structures is never considered to be a scalar.
128 static int is_read_only_scalar(struct gpu_array_info
*array
,
129 struct gpu_prog
*prog
)
132 isl_union_map
*write
;
135 if (array
->has_compound_element
)
137 if (array
->n_index
!= 0)
140 write
= isl_union_map_copy(prog
->may_write
);
141 space
= isl_set_universe(isl_space_copy(array
->space
));
142 write
= isl_union_map_intersect_range(write
,
143 isl_union_set_from_set(space
));
144 empty
= isl_union_map_is_empty(write
);
145 isl_union_map_free(write
);
150 /* Compute bounds on the host array "pa" based on the corresponding
151 * accessed elements in "arrays"
152 * and collect all references to the array.
153 * Store the results in "info".
155 * If the array is zero-dimensional and does not contain structures,
156 * i.e., if the array is a scalar, we check whether it is read-only.
157 * We also check whether the array is accessed at all.
159 static int extract_array_info(struct gpu_prog
*prog
,
160 struct gpu_array_info
*info
, struct pet_array
*pa
,
161 __isl_keep isl_union_set
*arrays
)
167 isl_set
*accessed
, *extent
;
169 n_index
= isl_set_dim(pa
->extent
, isl_dim_set
);
170 name
= isl_set_get_tuple_name(pa
->extent
);
171 bounds
= isl_alloc_array(prog
->ctx
, isl_pw_aff
*, n_index
);
175 info
->space
= isl_set_get_space(pa
->extent
);
176 info
->name
= strdup(name
);
177 info
->n_index
= n_index
;
178 info
->bound
= bounds
;
179 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
181 info
->type
= strdup(pa
->element_type
);
182 info
->size
= pa
->element_size
;
183 info
->local
= pa
->declared
&& !pa
->exposed
;
184 info
->has_compound_element
= pa
->element_is_record
;
185 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
187 accessed
= isl_union_set_extract_set(arrays
,
188 isl_space_copy(info
->space
));
189 empty
= isl_set_is_empty(accessed
);
190 extent
= compute_extent(pa
, accessed
);
191 isl_set_free(accessed
);
192 info
->extent
= extent
;
195 info
->accessed
= !empty
;
196 for (i
= 0; i
< n_index
; ++i
) {
202 dom
= isl_set_copy(extent
);
203 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
205 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
206 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
207 fprintf(stderr
, "unable to determine extent of '%s' "
208 "in dimension %d\n", info
->name
, i
);
209 dom
= isl_set_free(dom
);
211 bound
= isl_set_dim_max(dom
, 0);
212 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
213 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
214 one
= isl_aff_zero_on_domain(ls
);
215 one
= isl_aff_add_constant_si(one
, 1);
216 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
217 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
220 if (!isl_pw_aff_is_cst(bound
))
224 collect_references(prog
, info
);
229 /* Remove independence from the order constraints "order" on array "array".
230 * Since the pairs of iterations in the filter relation of an independence
231 * are guaranteed to be completely independent by the user, there is
232 * no need to ensure that live ranges are ordered along thong pairs.
233 * We make an exception for local variables, though, as the independence
234 * guarantee does not apply to those.
236 * The order constraints are used in two places.
237 * Those on scalars are used in check_scalar_live_ranges to check if
238 * we need to force the scalar to be private. Any non-local scalar
239 * should not be forced scalar if it only appears in independent loops.
240 * Those on non-scalars are added to the coincidence constraints
241 * in compute_schedule because we do not support any array expansion.
242 * Accesses to non-local arrays should not prevent a loop from being
243 * considered coincident so we should indeed remove those constraints
244 * from the order constraints.
246 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
247 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
251 for (i
= 0; i
< prog
->scop
->pet
->n_independence
; ++i
) {
252 struct pet_independence
*pi
= prog
->scop
->pet
->independences
[i
];
253 if (isl_union_set_contains(pi
->local
, array
->space
))
256 order
= isl_union_map_subtract(order
,
257 isl_union_map_copy(pi
->filter
));
263 /* For each array in "prog", store the (untagged) order dependences
264 * derived from the array in array->dep_order.
265 * In particular, consider all references that access the given array
266 * and take the order dependences that have one of these references
267 * as source. (Since an order dependence relates two references to
268 * the same array, the target of these order dependences will also
269 * be one of these references.)
270 * Additionally, store the union of these array->dep_order relations
271 * for all non-scalar arrays in prog->array_order.
273 void collect_order_dependences(struct gpu_prog
*prog
)
277 isl_union_map
*accesses
;
279 space
= isl_union_map_get_space(prog
->read
);
280 prog
->array_order
= isl_union_map_empty(space
);
282 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
283 accesses
= isl_union_map_union(accesses
,
284 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
285 accesses
= isl_union_map_universe(accesses
);
286 accesses
= isl_union_map_apply_range(accesses
,
287 isl_union_map_copy(prog
->to_outer
));
289 for (i
= 0; i
< prog
->n_array
; ++i
) {
290 struct gpu_array_info
*array
= &prog
->array
[i
];
293 isl_union_map
*order
;
295 set
= isl_set_universe(isl_space_copy(array
->space
));
296 uset
= isl_union_set_from_set(set
);
297 uset
= isl_union_map_domain(
298 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
300 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
301 order
= isl_union_map_intersect_domain(order
, uset
);
302 order
= isl_union_map_zip(order
);
303 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
304 order
= remove_independences(prog
, array
, order
);
305 array
->dep_order
= order
;
307 if (gpu_array_is_scalar(array
) && !array
->has_compound_element
)
310 prog
->array_order
= isl_union_map_union(prog
->array_order
,
311 isl_union_map_copy(array
->dep_order
));
314 isl_union_map_free(accesses
);
317 /* Construct a gpu_array_info for each array referenced by prog->scop and
318 * collect them in prog->array.
320 * The sizes are based on the extents and the set of possibly accessed
321 * elements by "prog".
322 * If there are any member accesses involved, then they are first mapped
323 * to the outer arrays of structs.
325 * If we are allowing live range reordering, then also set
326 * the dep_order field. Otherwise leave it NULL.
328 static int collect_array_info(struct gpu_prog
*prog
)
332 isl_union_set
*arrays
;
334 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
335 arrays
= isl_union_set_union(arrays
,
336 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
338 arrays
= isl_union_set_apply(arrays
,
339 isl_union_map_copy(prog
->to_outer
));
341 arrays
= isl_union_set_coalesce(arrays
);
343 prog
->n_array
= prog
->scop
->pet
->n_array
;
344 prog
->array
= isl_calloc_array(prog
->ctx
,
345 struct gpu_array_info
, prog
->n_array
);
347 for (i
= 0; i
< prog
->scop
->pet
->n_array
; ++i
)
348 if (extract_array_info(prog
, &prog
->array
[i
],
349 prog
->scop
->pet
->arrays
[i
], arrays
) < 0)
352 isl_union_set_free(arrays
);
354 if (prog
->scop
->options
->live_range_reordering
)
355 collect_order_dependences(prog
);
360 static void free_array_info(struct gpu_prog
*prog
)
364 for (i
= 0; i
< prog
->n_array
; ++i
) {
365 int n_index
= prog
->array
[i
].n_index
;
366 free(prog
->array
[i
].type
);
367 free(prog
->array
[i
].name
);
368 for (j
= 0; j
< n_index
; ++j
)
369 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
370 isl_space_free(prog
->array
[i
].space
);
371 isl_set_free(prog
->array
[i
].extent
);
372 free(prog
->array
[i
].bound
);
373 free(prog
->array
[i
].refs
);
374 isl_union_map_free(prog
->array
[i
].dep_order
);
379 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
380 * as an array or through a pointer reference, but as a single data element.
381 * At the moment, scalars are represented as zero-dimensional arrays.
382 * Note that the single data element may be an entire structure.
384 int gpu_array_is_scalar(struct gpu_array_info
*array
)
386 return array
->n_index
== 0;
389 /* Is "array" a read-only scalar?
391 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
393 return array
->read_only_scalar
;
396 /* Return the set of parameter values for which the array has a positive
397 * size in all dimensions.
398 * If the sizes are only valid for some parameter values, then those
399 * constraints are also taken into account.
401 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
407 space
= isl_space_params(isl_space_copy(array
->space
));
408 guard
= isl_set_universe(space
);
410 for (i
= 0; i
< array
->n_index
; ++i
) {
412 isl_set
*guard_i
, *zero
;
414 bound
= isl_pw_aff_copy(array
->bound
[i
]);
415 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
416 zero
= isl_pw_aff_zero_set(bound
);
417 guard_i
= isl_set_subtract(guard_i
, zero
);
418 guard
= isl_set_intersect(guard
, guard_i
);
424 /* Internal data structure for extract_size_of_type.
425 * "type" specifies the name of the space that we want to extract.
426 * "res" is used to store the subset of that space.
428 struct ppcg_extract_size_data
{
433 /* This function is called for each set in a union_set.
434 * If the name of the set matches data->type, we store the
437 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
439 struct ppcg_extract_size_data
*data
= user
;
442 name
= isl_set_get_tuple_name(size
);
443 if (name
&& !strcmp(name
, data
->type
)) {
452 /* Given a union map { kernel[i] -> *[...] },
453 * return the range in the space called "type" for the kernel with
454 * sequence number "id".
456 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
457 const char *type
, int id
)
461 isl_union_set
*local_sizes
;
462 struct ppcg_extract_size_data data
= { type
, NULL
};
467 space
= isl_union_map_get_space(sizes
);
468 space
= isl_space_set_from_params(space
);
469 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
470 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
471 dom
= isl_set_universe(space
);
472 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
474 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
475 isl_union_map_copy(sizes
));
476 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
477 isl_union_set_free(local_sizes
);
481 /* Given a singleton set, extract the first (at most *len) elements
482 * of the single integer tuple into *sizes and update *len if needed.
484 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
492 dim
= isl_set_dim(set
, isl_dim_set
);
496 for (i
= 0; i
< *len
; ++i
) {
499 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
502 sizes
[i
] = isl_val_get_num_si(v
);
509 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
510 * if the option debug->dump_sizes is set.
512 static void set_used_sizes(struct gpu_gen
*gen
, const char *type
, int id
,
519 if (!gen
->options
->debug
->dump_sizes
)
522 space
= isl_union_map_get_space(gen
->used_sizes
);
523 space
= isl_space_set_from_params(space
);
524 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
525 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
526 space
= isl_space_from_domain(space
);
527 space
= isl_space_add_dims(space
, isl_dim_out
, len
);
528 space
= isl_space_set_tuple_name(space
, isl_dim_out
, type
);
530 map
= isl_map_universe(space
);
531 map
= isl_map_fix_si(map
, isl_dim_in
, 0, id
);
532 for (i
= 0; i
< len
; ++i
)
533 map
= isl_map_fix_si(map
, isl_dim_out
, i
, sizes
[i
]);
535 gen
->used_sizes
= isl_union_map_add_map(gen
->used_sizes
, map
);
538 /* Extract user specified "tile" sizes from the "sizes" command line option,
539 * defaulting to option->tile_size in each dimension.
540 * *tile_len contains the maximum number of tile sizes needed.
541 * Update *tile_len to the number of specified tile sizes, if any, and
542 * return a pointer to the tile sizes (or NULL on error).
543 * Add the effectively used sizes to gen->used_sizes.
545 static int *read_tile_sizes(struct gpu_gen
*gen
, int *tile_len
)
551 tile_size
= isl_alloc_array(gen
->ctx
, int, *tile_len
);
554 for (n
= 0; n
< *tile_len
; ++n
)
555 tile_size
[n
] = gen
->options
->tile_size
;
557 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
558 read_sizes_from_set(size
, tile_size
, tile_len
);
559 set_used_sizes(gen
, "tile", gen
->kernel_id
, tile_size
, *tile_len
);
564 /* Extract user specified "block" sizes from the "sizes" command line option,
565 * after filling in some potentially useful defaults.
567 static void read_block_sizes(struct ppcg_kernel
*kernel
,
568 __isl_keep isl_union_map
*sizes
)
572 if (kernel
->n_block
> 3)
574 switch (kernel
->n_block
) {
576 kernel
->block_dim
[0] = 512;
579 kernel
->block_dim
[0] = 32;
580 kernel
->block_dim
[1] = 16;
583 kernel
->block_dim
[0] = 32;
584 kernel
->block_dim
[1] = 4;
585 kernel
->block_dim
[2] = 4;
589 size
= extract_sizes(sizes
, "block", kernel
->id
);
590 read_sizes_from_set(size
, kernel
->block_dim
, &kernel
->n_block
);
593 /* Extract user specified "grid" sizes from the "sizes" command line option,
594 * after filling in some potentially useful defaults.
596 static void read_grid_sizes(struct ppcg_kernel
*kernel
,
597 __isl_keep isl_union_map
*sizes
)
601 if (kernel
->n_grid
> 2)
603 switch (kernel
->n_grid
) {
605 kernel
->grid_dim
[0] = 32768;
608 kernel
->grid_dim
[0] = 256;
609 kernel
->grid_dim
[1] = 256;
613 size
= extract_sizes(sizes
, "grid", kernel
->id
);
614 read_sizes_from_set(size
, kernel
->grid_dim
, &kernel
->n_grid
);
617 /* Extract user specified grid and block sizes from the gen->sizes
618 * command line option after filling in some potentially useful defaults.
619 * Store the extracted sizes in "kernel".
620 * Add the effectively used sizes to gen->used_sizes.
622 static void read_grid_and_block_sizes(struct ppcg_kernel
*kernel
,
625 read_block_sizes(kernel
, gen
->sizes
);
626 read_grid_sizes(kernel
, gen
->sizes
);
627 set_used_sizes(gen
, "block", kernel
->id
,
628 kernel
->block_dim
, kernel
->n_block
);
629 set_used_sizes(gen
, "grid", kernel
->id
,
630 kernel
->grid_dim
, kernel
->n_grid
);
633 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
640 for (i
= 0; i
< n
; ++i
) {
641 struct gpu_stmt_access
*access
, *next
;
643 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
645 isl_id_free(access
->ref_id
);
646 isl_map_free(access
->access
);
647 isl_map_free(access
->tagged_access
);
651 isl_id_free(stmts
[i
].id
);
658 /* Construct a map from a domain of dimensionality "len"
659 * to a domain of dimensionality "len" + "tile_len" that tiles
660 * the "tile_len" coordinates starting at "first".
661 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
662 * "dim" prescribes the parameters.
664 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
665 int first
, int tile_len
, int *tile_size
)
672 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
673 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
674 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
675 ls
= isl_local_space_from_space(dim
);
677 for (i
= 0; i
< len
- tile_len
; ++i
) {
678 int j
= i
< first
? i
: i
+ tile_len
;
679 int k
= i
< first
? i
: i
+ 2 * tile_len
;
681 c
= isl_equality_alloc(isl_local_space_copy(ls
));
682 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
683 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
684 bmap
= isl_basic_map_add_constraint(bmap
, c
);
687 for (i
= 0; i
< tile_len
; ++i
) {
688 c
= isl_equality_alloc(isl_local_space_copy(ls
));
689 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
691 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
692 first
+ i
, tile_size
[i
]);
693 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
694 first
+ i
+ tile_len
, 1);
695 bmap
= isl_basic_map_add_constraint(bmap
, c
);
697 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
698 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
699 first
+ i
+ tile_len
, 1);
700 bmap
= isl_basic_map_add_constraint(bmap
, c
);
702 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
703 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
704 first
+ i
+ tile_len
, -1);
705 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
706 bmap
= isl_basic_map_add_constraint(bmap
, c
);
709 isl_local_space_free(ls
);
711 return isl_map_from_basic_map(bmap
);
714 /* Construct a map from a domain of dimensionality "len"
715 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
716 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
717 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
718 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
719 * that are projected out at the end.
720 * "dim" prescribes the parameters.
722 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
723 int first
, int wrap_len
, int *wrap_size
)
730 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
731 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
732 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
733 ls
= isl_local_space_from_space(dim
);
735 for (i
= 0; i
< len
; ++i
) {
736 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
738 c
= isl_equality_alloc(isl_local_space_copy(ls
));
739 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
740 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
741 bmap
= isl_basic_map_add_constraint(bmap
, c
);
744 for (i
= 0; i
< wrap_len
; ++i
) {
745 c
= isl_equality_alloc(isl_local_space_copy(ls
));
746 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
748 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
749 first
+ wrap_len
+ i
, 1);
750 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
751 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
752 bmap
= isl_basic_map_add_constraint(bmap
, c
);
754 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
755 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
756 first
+ wrap_len
+ i
, 1);
757 bmap
= isl_basic_map_add_constraint(bmap
, c
);
759 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
760 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
761 first
+ wrap_len
+ i
, -1);
762 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
763 bmap
= isl_basic_map_add_constraint(bmap
, c
);
766 isl_local_space_free(ls
);
768 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
769 first
+ 2 * wrap_len
, wrap_len
);
771 return isl_map_from_basic_map(bmap
);
774 /* Tile the B loops over the tile sizes and then tile/wrap
775 * the T1 loops over the blocks.
777 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
778 __isl_take isl_union_map
*sched
)
780 struct ppcg_kernel
*kernel
= gen
->kernel
;
782 isl_map
*tiling
, *block_tiling
;
784 dim
= isl_union_map_get_space(sched
);
785 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
786 gen
->tile_first
, kernel
->tile_len
, kernel
->tile_size
);
788 if (gen
->options
->wrap
)
789 block_tiling
= wrap(dim
, gen
->untiled_len
+ kernel
->tile_len
,
790 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
792 block_tiling
= tile(dim
, gen
->untiled_len
+ kernel
->tile_len
,
793 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
795 gen
->tiled_len
= gen
->untiled_len
+ kernel
->tile_len
+ kernel
->n_grid
;
797 tiling
= isl_map_apply_range(tiling
, block_tiling
);
799 sched
= isl_union_map_apply_range(sched
,
800 isl_union_map_from_map(tiling
));
802 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
807 /* Equate the "T1P" iterators in the tiled schedule "sched"
808 * to the block dimensions.
810 static __isl_give isl_union_map
*parametrize_tiled_schedule(
811 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
813 struct ppcg_kernel
*kernel
= gen
->kernel
;
817 dim
= isl_union_map_get_space(sched
);
818 par
= parametrization(dim
, gen
->tiled_len
,
819 gen
->tile_first
+ kernel
->n_grid
, kernel
->block_ids
);
820 sched
= isl_union_map_intersect_range(sched
,
821 isl_union_set_from_set(par
));
826 /* Tile/wrap the P1 loops over the threads.
828 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
829 __isl_take isl_union_map
*sched
)
831 struct ppcg_kernel
*kernel
= gen
->kernel
;
836 dim
= isl_union_map_get_space(sched
);
838 if (gen
->options
->wrap
)
839 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
840 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
842 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
843 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
844 gen
->thread_tiled_len
= gen
->tiled_len
+ kernel
->n_block
;
846 sched
= isl_union_map_apply_range(sched
,
847 isl_union_map_from_map(tiling
));
849 par
= parametrization(dim
, gen
->thread_tiled_len
,
850 gen
->tile_first
+ kernel
->tile_len
+
851 kernel
->n_grid
+ kernel
->n_block
, kernel
->thread_ids
);
852 sched
= isl_union_map_intersect_range(sched
,
853 isl_union_set_from_set(par
));
855 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
860 /* If the user asked for it, scale the shared memory tile loops
861 * (T1T and T2) of "sched" by kernel->tile_size[i].
862 * If we are not performing "wrapping", then additionally scale the T1P
863 * loops by kernel->grid_dim[i].
865 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
866 __isl_take isl_union_map
*sched
)
868 struct ppcg_kernel
*kernel
= gen
->kernel
;
871 isl_basic_map
*scale
;
875 if (!gen
->options
->scale_tile_loops
)
878 dim
= isl_union_map_get_space(sched
);
879 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
880 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
881 scale
= isl_basic_map_universe(isl_space_copy(dim
));
882 ls
= isl_local_space_from_space(dim
);
884 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
887 if (i
>= gen
->tile_first
&&
888 i
< gen
->tile_first
+ kernel
->n_grid
) {
889 f
= kernel
->tile_size
[i
- gen
->tile_first
];
890 if (!gen
->options
->wrap
)
891 f
*= kernel
->grid_dim
[i
- gen
->tile_first
];
892 } else if (i
>= gen
->tile_first
+ kernel
->n_grid
&&
893 i
< gen
->tile_first
+ kernel
->n_grid
+
895 f
= kernel
->tile_size
[i
-
896 (gen
->tile_first
+ kernel
->n_grid
)];
899 c
= isl_equality_alloc(isl_local_space_copy(ls
));
900 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
901 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
902 scale
= isl_basic_map_add_constraint(scale
, c
);
905 isl_local_space_free(ls
);
907 sched
= isl_union_map_apply_range(sched
,
908 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
913 /* If we are not performing "wrapping" and if the user asked for it,
914 * scale the thread tile loops (P1T) of "sched" by kernel->block_dim[i].
916 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
917 __isl_take isl_union_map
*sched
)
921 isl_basic_map
*scale
;
925 if (gen
->options
->wrap
)
927 if (!gen
->options
->scale_tile_loops
)
930 dim
= isl_union_map_get_space(sched
);
931 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
932 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
933 scale
= isl_basic_map_universe(isl_space_copy(dim
));
934 ls
= isl_local_space_from_space(dim
);
936 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
939 if (i
>= gen
->shared_len
&&
940 i
< gen
->shared_len
+ gen
->kernel
->n_block
)
941 f
= gen
->kernel
->block_dim
[i
- gen
->shared_len
];
943 c
= isl_equality_alloc(isl_local_space_copy(ls
));
944 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
945 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
946 scale
= isl_basic_map_add_constraint(scale
, c
);
949 isl_local_space_free(ls
);
951 sched
= isl_union_map_apply_range(sched
,
952 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
957 /* If we are not performing "wrapping" and if the user asked for it,
958 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
960 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
961 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
965 isl_basic_map
*scale
;
969 if (gen
->options
->wrap
)
971 if (!gen
->options
->scale_tile_loops
)
974 dim
= isl_union_map_get_space(sched
);
975 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
976 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
977 scale
= isl_basic_map_universe(isl_space_copy(dim
));
978 ls
= isl_local_space_from_space(dim
);
980 for (i
= 0; i
< len
; ++i
) {
983 if (i
>= first
&& i
< first
+ n_tile
)
984 f
= gen
->kernel
->block_dim
[i
- first
];
986 c
= isl_equality_alloc(isl_local_space_copy(ls
));
987 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
988 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
989 scale
= isl_basic_map_add_constraint(scale
, c
);
992 isl_local_space_free(ls
);
994 sched
= isl_union_map_apply_range(sched
,
995 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1000 /* Add parameters p[i] with identifiers "ids" to "set",
1001 * with bounds to 0 <= p[i] < size[i].
1003 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1004 int *size
, __isl_keep isl_id_list
*ids
)
1009 len
= isl_id_list_n_id(ids
);
1010 nparam
= isl_set_dim(set
, isl_dim_param
);
1011 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1013 for (i
= 0; i
< len
; ++i
) {
1016 id
= isl_id_list_get_id(ids
, i
);
1017 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1018 set
= isl_set_lower_bound_si(set
, isl_dim_param
, nparam
+ i
, 0);
1019 set
= isl_set_upper_bound_si(set
, isl_dim_param
,
1020 nparam
+ i
, size
[i
] - 1);
1026 /* Add "len" parameters p[i] with identifiers "ids" and intersect "set"
1029 * { : 0 <= p[i] < size[i] }
1031 * or an overapproximation.
1033 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1034 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1035 __isl_keep isl_id_list
*ids
)
1040 isl_local_space
*ls
;
1042 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1043 nparam
= isl_set_dim(set
, isl_dim_param
);
1044 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1046 for (i
= 0; i
< len
; ++i
) {
1049 id
= isl_id_list_get_id(ids
, i
);
1050 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1053 space
= isl_space_params(isl_set_get_space(set
));
1054 ls
= isl_local_space_from_space(space
);
1055 for (i
= 0; i
< len
; ++i
) {
1056 isl_pw_aff
*param
, *size_i
, *zero
;
1059 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1060 isl_dim_param
, nparam
+ i
);
1062 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1063 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1064 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1065 set
= isl_set_intersect_params(set
, bound
);
1067 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1068 bound
= isl_pw_aff_ge_set(param
, zero
);
1069 set
= isl_set_intersect_params(set
, bound
);
1071 isl_local_space_free(ls
);
1076 /* Construct a map from an access to group->array to the corresponding
1077 * shared/private memory tile.
1078 * The map is of the form
1080 * { [D[i] -> A[a]] -> T[t] }
1082 * where D represents the initial shared_len dimensions
1083 * of the computed schedule.
1085 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1087 struct gpu_array_tile
*tile
;
1088 isl_multi_aff
*tiling
;
1090 tile
= group
->private_tile
;
1092 tile
= group
->shared_tile
;
1094 tiling
= isl_multi_aff_copy(tile
->tiling
);
1096 return isl_map_from_multi_aff(tiling
);
1099 /* Given a schedule that iterates over all elements in a piece of an array,
1100 * perform tiling/wrapping over the threads.
1102 * In particular, we tile the final iterators so that the final thread
1103 * dimension runs over the final array dimension.
1104 * However, if those final iterators have only a single iteration,
1105 * we try to tile earlier iterators instead.
1107 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1108 __isl_take isl_map
*sched
)
1111 isl_union_map
*usched
;
1114 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1118 n_tile
= gen
->kernel
->n_block
;
1119 if (n_tile
> nvar
) {
1121 sched
= isl_map_insert_dims(sched
,
1122 isl_dim_out
, 0, n_tile
- nvar
);
1123 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1124 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1128 first
= nvar
- n_tile
;
1130 for (; first
> 0; first
--)
1131 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1134 dim
= isl_map_get_space(sched
);
1135 dim
= isl_space_params(dim
);
1136 if (gen
->options
->wrap
)
1137 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1138 n_tile
, gen
->kernel
->block_dim
);
1140 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1141 n_tile
, gen
->kernel
->block_dim
);
1142 sched
= isl_map_apply_range(sched
, tiling
);
1144 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
,
1145 gen
->kernel
->thread_ids
);
1146 sched
= isl_map_intersect_range(sched
, par
);
1148 usched
= isl_union_map_from_map(sched
);
1149 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1151 sched
= isl_map_from_union_map(usched
);
1156 /* Return the union of all tagged access relations in the group.
1158 static __isl_give isl_union_map
*group_tagged_access_relation(
1159 struct gpu_array_ref_group
*group
)
1162 isl_union_map
*access
;
1164 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1165 for (i
= 0; i
< group
->n_ref
; ++i
) {
1168 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1169 access
= isl_union_map_union(access
,
1170 isl_union_map_from_map(map_i
));
1176 /* Return the extent of "array", recomputed from the bounds.
1177 * The recomputed extent may be simpler than the original extent.
1179 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1184 isl_local_space
*ls
;
1187 id
= isl_set_get_tuple_id(array
->extent
);
1188 space
= isl_set_get_space(array
->extent
);
1189 extent
= isl_set_universe(isl_space_copy(space
));
1190 ls
= isl_local_space_from_space(space
);
1191 for (i
= 0; i
< array
->n_index
; ++i
) {
1197 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1199 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1201 index
= isl_pw_aff_from_aff(aff
);
1202 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1203 bound
= isl_pw_aff_from_range(bound
);
1204 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1205 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1207 lt
= isl_pw_aff_lt_set(index
, bound
);
1208 extent
= isl_set_intersect(extent
, lt
);
1210 isl_local_space_free(ls
);
1216 /* Return a map from the first shared_len dimensions of the computed
1217 * schedule to the array tile in
1218 * global memory that corresponds to the shared memory copy.
1220 * In particular, return a map
1226 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1230 * 0 <= a <= array_size - 1 (2)
1232 * Note that if some stride has been detected (i.e., when
1233 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1234 * to the shifted and scaled down version.
1236 * Constraints (1) are obtained by mapping the size constraints on the
1237 * shared/private memory tile back to the access relation.
1238 * Constraints (2) are obtained from the (recomputed) extent.
1240 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1243 int n_index
= group
->array
->n_index
;
1249 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1250 space
= isl_space_range(space
);
1251 local
= isl_set_universe(space
);
1252 for (i
= 0; i
< n_index
; ++i
) {
1255 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1256 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1257 bound
= isl_val_sub_ui(bound
, 1);
1258 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1260 local
= isl_set_preimage_multi_aff(local
,
1261 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1262 tile
= isl_set_unwrap(local
);
1263 extent
= array_extent(group
->array
);
1264 tile
= isl_map_intersect_range(tile
, extent
);
1269 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1270 * return the corresponding mapping from the AST schedule to
1271 * to the first shared_len dimensions of the schedule computed by PPCG.
1273 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1274 __isl_take isl_pw_multi_aff
*iterator_map
)
1276 isl_union_map
*umap
;
1278 isl_map
*map
, *sched
;;
1280 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1281 space
= isl_space_from_domain(space
);
1282 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1284 umap
= isl_union_map_copy(gen
->shared_sched
);
1285 umap
= isl_union_map_apply_range(umap
,
1286 isl_union_map_copy(gen
->shared_proj
));
1287 map
= isl_union_map_extract_map(umap
, space
);
1288 isl_union_map_free(umap
);
1290 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1291 sched
= isl_map_detect_equalities(sched
);
1293 return isl_pw_multi_aff_from_map(sched
);
1296 /* Set unroll[j] if the input dimension j is involved in
1297 * the index expression represented by ma.
1299 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1303 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1304 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1307 for (i
= 0; i
< n_out
; ++i
) {
1310 aff
= isl_multi_aff_get_aff(ma
, i
);
1311 for (j
= 0; j
< n_in
; ++j
)
1312 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1318 isl_multi_aff_free(ma
);
1322 /* Given an array pos mapping input dimensions to the corresponding
1323 * output dimension, construct the corresponding map.
1325 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1330 isl_basic_map
*bmap
;
1331 isl_local_space
*ls
;
1333 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1334 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1335 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1336 ls
= isl_local_space_from_space(dim
);
1338 for (i
= 0; i
< len
; ++i
) {
1339 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1340 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1342 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1344 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1346 isl_local_space_free(ls
);
1348 return isl_map_from_basic_map(bmap
);
1351 /* Remove the private tiles from all array reference groups,
1352 * except for the groups of arrays that are marked force_private.
1354 static void remove_private_tiles(struct gpu_gen
*gen
)
1358 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1359 struct gpu_local_array_info
*local
= &gen
->kernel
->array
[i
];
1361 if (local
->force_private
)
1364 for (j
= 0; j
< local
->n_group
; ++j
) {
1365 struct gpu_array_ref_group
*group
= local
->groups
[j
];
1367 group
->private_tile
=
1368 gpu_array_tile_free(group
->private_tile
);
1373 /* Find all loops involved in any of the index expressions for any of
1374 * the private accesses, move them innermost and then mark them as
1375 * requiring unrolling by setting gen->first_unroll.
1376 * The loops involved should all be parallel because of the checks
1377 * we performed in check_private_group_access. Moving them innermost
1378 * is therefore a valid transformation.
1380 * If any of the arrays are marked force_private, however, then
1381 * those loops may not be parallel with respect to the marked arrays.
1382 * If any of the loops would have to be moved innermost for the
1383 * (non forced) private accesses and if there are any force_private
1384 * arrays, then we revert the decision to map the selected arrays
1385 * to private memory. An alternative solution would be to expand
1386 * the force_private arrays.
1388 * Loops up to gen->shared_len are generated before the mapping to
1389 * threads is applied. They should therefore be ignored.
1391 * We compute the hidden equalities of the schedule first
1392 * since we will need them in our calls to isl_pw_multi_aff_from_map
1393 * and because we want to make sure that the same equalities
1394 * are also available to the code generator.
1396 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1397 __isl_take isl_union_map
*sched
)
1399 struct ppcg_kernel
*kernel
= gen
->kernel
;
1401 int unroll
[gen
->thread_tiled_len
];
1402 int perm
[gen
->thread_tiled_len
];
1405 int len
= gen
->shared_len
+ kernel
->n_parallel
+ kernel
->n_block
;
1407 gen
->first_unroll
= -1;
1409 sched
= isl_union_map_detect_equalities(sched
);
1410 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1412 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1413 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1415 for (j
= 0; j
< array
->n_group
; ++j
) {
1416 isl_union_map
*access
;
1418 isl_pw_multi_aff
*pma
;
1420 if (!array
->groups
[j
]->private_tile
)
1423 access
= gpu_array_ref_group_access_relation(
1424 array
->groups
[j
], 1, 1);
1425 access
= isl_union_map_apply_domain(access
,
1426 isl_union_map_copy(sched
));
1428 acc
= isl_map_from_union_map(access
);
1429 pma
= isl_pw_multi_aff_from_map(acc
);
1430 isl_pw_multi_aff_foreach_piece(pma
,
1431 &check_unroll
, unroll
);
1433 isl_pw_multi_aff_free(pma
);
1437 for (i
= gen
->shared_len
; i
< len
; ++i
)
1444 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1448 if (kernel
->any_force_private
) {
1449 remove_private_tiles(gen
);
1454 for (i
= 0; i
< gen
->shared_len
; ++i
)
1456 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1459 gen
->first_unroll
= j
- gen
->shared_len
;
1460 for (i
= gen
->shared_len
; i
< len
; ++i
)
1464 dim
= isl_union_map_get_space(sched
);
1465 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1466 sched
= isl_union_map_apply_range(sched
,
1467 isl_union_map_from_map(permute
));
1472 /* Construct a map with input the shared tile loops and the loops that
1473 * will be wrapped around the threads that relates these later loops
1474 * to the thread indices and then projects them out.
1476 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
1478 struct ppcg_kernel
*kernel
= gen
->kernel
;
1485 dim
= isl_union_map_get_space(gen
->shared_sched
);
1487 if (gen
->options
->wrap
)
1488 tiling
= wrap(isl_space_copy(dim
),
1489 gen
->shared_len
+ kernel
->n_block
,
1490 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
1492 tiling
= tile(isl_space_copy(dim
),
1493 gen
->shared_len
+ kernel
->n_block
,
1494 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
1498 par
= parametrization(dim
, gen
->shared_len
+ 2 * kernel
->n_block
,
1499 gen
->tile_first
+ kernel
->tile_len
+
1500 kernel
->n_grid
+ kernel
->n_block
, kernel
->thread_ids
);
1502 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
1503 priv
= isl_map_intersect_range(priv
, par
);
1505 dim
= isl_map_get_space(priv
);
1506 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
1507 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
1508 proj
= projection(dim
, gen
->shared_len
+ 2 * kernel
->n_block
,
1511 priv
= isl_map_apply_range(priv
, proj
);
1516 /* If max_shared_memory is not set to infinity (-1), then make
1517 * sure that the total amount of shared memory required by the
1518 * array reference groups mapped to shared memory is no larger
1519 * than this maximum.
1521 * We apply a greedy approach and discard (keep in global memory)
1522 * those groups that would result in a total memory size that
1523 * is larger than the maximum.
1525 * This function should be called after any function that may
1526 * affect the decision on whether to place a reference group
1527 * in private, shared or global memory.
1529 static void check_shared_memory_bound(struct gpu_gen
*gen
)
1532 isl_val
*left
, *size
;
1534 if (gen
->options
->max_shared_memory
< 0)
1537 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
1539 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1540 struct gpu_local_array_info
*local
= &gen
->kernel
->array
[i
];
1542 for (j
= 0; j
< local
->n_group
; ++j
) {
1543 struct gpu_array_ref_group
*group
;
1545 group
= local
->groups
[j
];
1546 if (group
->private_tile
)
1548 if (!group
->shared_tile
)
1551 size
= gpu_array_tile_size(group
->shared_tile
);
1552 size
= isl_val_mul_ui(size
, local
->array
->size
);
1554 if (isl_val_le(size
, left
)) {
1555 left
= isl_val_sub(left
, size
);
1560 group
->shared_tile
=
1561 gpu_array_tile_free(group
->shared_tile
);
1568 /* Compute a tiling for all the array reference groups.
1570 static void compute_group_tilings(struct gpu_gen
*gen
)
1574 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
1575 struct gpu_local_array_info
*array
= &gen
->kernel
->array
[i
];
1577 for (j
= 0; j
< array
->n_group
; ++j
)
1578 gpu_array_ref_group_compute_tiling(array
->groups
[j
]);
1582 /* Take tiled_sched, project it onto the shared tile loops and
1583 * the loops that will be wrapped over the threads and
1584 * store the result in gen->shared_sched.
1585 * Also compute a projection that projects out the loops that will be
1586 * wrapped over the threads and store this projection in gen->shared_proj.
1588 static void compute_shared_sched(struct gpu_gen
*gen
)
1593 isl_union_map
*sched
;
1595 sched
= isl_union_map_copy(gen
->tiled_sched
);
1597 dim
= isl_union_map_get_space(sched
);
1598 proj
= projection(dim
, gen
->tiled_len
,
1599 gen
->shared_len
+ gen
->kernel
->n_block
);
1600 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1602 dim
= isl_union_map_get_space(sched
);
1603 proj
= projection(dim
, gen
->shared_len
+ gen
->kernel
->n_block
,
1606 gen
->shared_sched
= sched
;
1607 gen
->shared_proj
= isl_union_map_from_map(proj
);
1610 /* Compute the size of a bounding box around the origin and "set",
1611 * where "set" is assumed to contain only non-negative elements.
1612 * In particular, compute the maximal value of "set" in each direction
1615 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
1616 __isl_take isl_set
*context
)
1619 isl_multi_pw_aff
*mpa
;
1621 context
= isl_set_params(context
);
1622 n
= isl_set_dim(set
, isl_dim_set
);
1623 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
1624 for (i
= 0; i
< n
; ++i
) {
1629 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
1630 bound
= isl_pw_aff_coalesce(bound
);
1631 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
1633 space
= isl_pw_aff_get_domain_space(bound
);
1634 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1635 one
= isl_aff_add_constant_si(one
, 1);
1636 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
1637 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
1640 isl_set_free(context
);
1645 /* Compute the effective grid size as a list of the sizes in each dimension.
1647 * The grid size specified by the user or set by default
1648 * in read_grid_sizes() and applied by the block filter,
1649 * may be too large for the given code in the sense that
1650 * it may contain blocks that don't need to execute anything.
1651 * We therefore don't return this grid size, but instead the
1652 * smallest grid size that ensures that all blocks that actually
1653 * execute code are included in the grid.
1655 * We first extract a description of the grid, i.e., the possible values
1656 * of the block ids, from the domain elements in "domain" and
1657 * kernel->block_filter.
1658 * The block ids are parameters in kernel->block_filter.
1659 * We simply need to change them into set dimensions.
1661 * Then, for each block dimension, we compute the maximal value of the block id
1664 static __isl_give isl_multi_pw_aff
*extract_grid_size(
1665 struct ppcg_kernel
*kernel
, __isl_take isl_union_set
*domain
)
1670 domain
= isl_union_set_intersect(domain
,
1671 isl_union_set_copy(kernel
->block_filter
));
1672 grid
= isl_union_set_params(domain
);
1673 grid
= isl_set_from_params(grid
);
1674 grid
= isl_set_add_dims(grid
, isl_dim_set
, kernel
->n_grid
);
1675 for (i
= 0; i
< kernel
->n_grid
; ++i
) {
1679 id
= isl_id_list_get_id(kernel
->block_ids
, i
);
1680 pos
= isl_set_find_dim_by_id(grid
, isl_dim_param
, id
);
1683 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
1684 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
1687 return extract_size(grid
, isl_set_copy(kernel
->context
));
1690 /* Compute the size of a fixed bounding box around the origin and "set",
1691 * where "set" is assumed to contain only non-negative elements,
1692 * and store the results in "size".
1693 * In particular, compute the maximal value of "set" in each direction
1696 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
1699 isl_local_space
*ls
;
1702 n
= isl_set_dim(set
, isl_dim_set
);
1703 ls
= isl_local_space_from_space(isl_set_get_space(set
));
1704 obj
= isl_aff_zero_on_domain(ls
);
1705 for (i
= 0; i
< n
; ++i
) {
1708 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
1709 max
= isl_set_max_val(set
, obj
);
1710 size
[i
] = isl_val_get_num_si(max
) + 1;
1712 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
1718 /* Compute the effective block size as a list of the sizes in each dimension
1719 * and store the sizes in kernel->block_dim.
1721 * The block size specified by the user or set by default
1722 * in read_block_sizes() and applied by the thread filter,
1723 * may be too large for the given code in the sense that
1724 * it may contain threads that don't need to execute anything.
1725 * We therefore update this block size in kernel->block_dim
1726 * to the smallest block size that ensures that all threads
1727 * that actually execute code are included in the block.
1729 * The possible values of the thread ids is obtained from
1730 * the domain elements "domain" and kernel->thread_filter.
1731 * The current implementation eliminates all parameters, ensuring
1732 * that the size is a fixed constant in each dimension.
1733 * In principle we could also compute parametric sizes.
1734 * We would have to make sure to project out all b%d and t%d parameters,
1737 static void extract_block_size(struct ppcg_kernel
*kernel
,
1738 __isl_take isl_union_set
*domain
)
1744 domain
= isl_union_set_intersect(domain
,
1745 isl_union_set_copy(kernel
->thread_filter
));
1746 block
= isl_union_set_params(domain
);
1747 block
= isl_set_from_params(block
);
1748 block
= isl_set_add_dims(block
, isl_dim_set
, kernel
->n_block
);
1749 for (i
= 0; i
< kernel
->n_block
; ++i
) {
1753 id
= isl_id_list_get_id(kernel
->thread_ids
, i
);
1754 pos
= isl_set_find_dim_by_id(block
, isl_dim_param
, id
);
1757 block
= isl_set_equate(block
, isl_dim_param
, pos
,
1760 nparam
= isl_set_dim(block
, isl_dim_param
);
1761 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
1763 extract_fixed_size(block
, kernel
->block_dim
);
1766 struct ppcg_kernel
*ppcg_kernel_free(struct ppcg_kernel
*kernel
)
1773 isl_id_list_free(kernel
->block_ids
);
1774 isl_id_list_free(kernel
->thread_ids
);
1775 isl_multi_pw_aff_free(kernel
->grid_size
);
1776 isl_set_free(kernel
->context
);
1777 isl_union_set_free(kernel
->core
);
1778 isl_union_set_free(kernel
->arrays
);
1779 isl_space_free(kernel
->space
);
1780 isl_ast_node_free(kernel
->tree
);
1781 isl_union_set_free(kernel
->block_filter
);
1782 isl_union_set_free(kernel
->thread_filter
);
1784 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1785 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1787 for (j
= 0; j
< array
->n_group
; ++j
)
1788 gpu_array_ref_group_free(array
->groups
[j
]);
1789 free(array
->groups
);
1791 isl_pw_aff_list_free(array
->bound
);
1793 free(kernel
->array
);
1795 for (i
= 0; i
< kernel
->n_var
; ++i
) {
1796 free(kernel
->var
[i
].name
);
1797 isl_vec_free(kernel
->var
[i
].size
);
1800 free(kernel
->tile_size
);
1807 /* Wrapper around ppcg_kernel_free for use as a isl_id_set_free_user callback.
1809 static void ppcg_kernel_free_wrap(void *user
)
1811 struct ppcg_kernel
*kernel
= user
;
1813 ppcg_kernel_free(kernel
);
1816 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
1817 struct ppcg_kernel_var
*var
)
1820 struct gpu_array_tile
*tile
;
1824 var
->array
= group
->array
;
1826 tile
= group
->private_tile
;
1827 var
->type
= ppcg_access_private
;
1829 tile
= group
->shared_tile
;
1830 var
->type
= ppcg_access_shared
;
1833 p
= isl_printer_to_str(ctx
);
1834 p
= gpu_array_ref_group_print_name(group
, p
);
1835 var
->name
= isl_printer_get_str(p
);
1836 isl_printer_free(p
);
1838 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
1840 for (j
= 0; j
< group
->array
->n_index
; ++j
)
1841 var
->size
= isl_vec_set_element_val(var
->size
, j
,
1842 isl_val_copy(tile
->bound
[j
].size
));
1845 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
1850 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1851 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1853 for (j
= 0; j
< array
->n_group
; ++j
) {
1854 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1855 if (group
->private_tile
|| group
->shared_tile
)
1861 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
1862 assert(kernel
->var
);
1865 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1866 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1868 for (j
= 0; j
< array
->n_group
; ++j
) {
1869 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1870 if (!group
->private_tile
&& !group
->shared_tile
)
1872 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
1878 /* Replace "pa" by the zero function defined over the universe domain
1879 * in the space of "pa".
1881 static __isl_give isl_pw_aff
*set_universally_zero(__isl_take isl_pw_aff
*pa
)
1886 space
= isl_space_domain(isl_pw_aff_get_space(pa
));
1887 isl_pw_aff_free(pa
);
1888 zero
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1890 return isl_pw_aff_from_aff(zero
);
1893 /* The sizes of the arrays on the host that have been computed by
1894 * extract_array_info may depend on the parameters. Use the extra
1895 * constraints on the parameters that are valid at "host_domain"
1896 * to simplify these expressions and store the results in kernel->array.
1898 * We only need these localized bounds for arrays that are accessed
1899 * by the current kernel. If we have found at least one reference group
1900 * then the array is accessed by the kernel. If the array has compound
1901 * elements then we skipped the construction of array reference groups.
1903 * The resulting sizes may be functions that are nowhere defined
1904 * in case the access function cannot possibly access anything inside
1905 * the kernel for some reason. If so, they are replaced by the zero
1906 * function. Since the access function cannot actually access anything,
1907 * there is no harm in printing the array sizes as zero.
1909 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
1910 __isl_keep isl_set
*host_domain
)
1915 context
= isl_set_copy(host_domain
);
1916 context
= isl_set_params(context
);
1918 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1919 struct gpu_local_array_info
*local
= &kernel
->array
[i
];
1920 isl_pw_aff_list
*bound
;
1923 if (local
->n_group
== 0 && !local
->array
->has_compound_element
)
1926 n_index
= local
->array
->n_index
;
1927 bound
= isl_pw_aff_list_alloc(gen
->ctx
, n_index
);
1929 for (j
= 0; j
< n_index
; ++j
) {
1933 pwaff
= isl_pw_aff_copy(local
->array
->bound
[j
]);
1934 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
1935 empty
= isl_pw_aff_is_empty(pwaff
);
1937 pwaff
= isl_pw_aff_free(pwaff
);
1939 pwaff
= set_universally_zero(pwaff
);
1940 bound
= isl_pw_aff_list_add(bound
, pwaff
);
1943 local
->n_index
= n_index
;
1944 local
->bound
= bound
;
1946 isl_set_free(context
);
1949 /* Create the array of gpu_local_array_info structures "array"
1950 * inside "kernel". The number of elements in this array is
1951 * the same as the number of arrays in "prog".
1952 * Initialize the "array" field of each local array to point
1953 * to the corresponding array in "prog".
1955 static struct ppcg_kernel
*ppcg_kernel_create_local_arrays(
1956 struct ppcg_kernel
*kernel
, struct gpu_prog
*prog
)
1961 ctx
= isl_set_get_ctx(prog
->context
);
1962 kernel
->array
= isl_calloc_array(ctx
,
1963 struct gpu_local_array_info
, prog
->n_array
);
1965 return ppcg_kernel_free(kernel
);
1966 kernel
->n_array
= prog
->n_array
;
1968 for (i
= 0; i
< prog
->n_array
; ++i
)
1969 kernel
->array
[i
].array
= &prog
->array
[i
];
1974 /* Find the element in gen->stmt that has the given "id".
1975 * Return NULL if no such gpu_stmt can be found.
1977 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
1981 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
1982 if (id
== prog
->stmts
[i
].id
)
1986 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
1989 void ppcg_kernel_stmt_free(void *user
)
1992 struct ppcg_kernel_stmt
*stmt
= user
;
1997 switch (stmt
->type
) {
1998 case ppcg_kernel_copy
:
1999 isl_ast_expr_free(stmt
->u
.c
.index
);
2000 isl_ast_expr_free(stmt
->u
.c
.local_index
);
2002 case ppcg_kernel_domain
:
2003 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
2005 case ppcg_kernel_sync
:
2012 /* Set the options of "context" to
2014 * { space -> [x] : x >= first }
2016 static __isl_give isl_ast_build
*set_unroll(
2017 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
2024 ctx
= isl_ast_build_get_ctx(build
);
2026 space
= isl_space_from_domain(space
);
2027 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
2028 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
2029 unroll
= isl_map_universe(space
);
2030 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
2031 opt
= isl_union_map_from_map(unroll
);
2033 build
= isl_ast_build_set_options(build
, opt
);
2038 /* Extend the schedule "schedule" with the part of "extension"
2039 * starting at "first" up to "len".
2041 static __isl_give isl_union_map
*extend_schedule(
2042 __isl_take isl_union_map
*schedule
,
2043 __isl_take isl_union_map
*extension
, int first
, int len
)
2047 isl_union_map
*umap
;
2050 space
= isl_union_map_get_space(schedule
);
2051 space
= isl_space_set_from_params(space
);
2052 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
2053 proj
= isl_set_identity(isl_set_universe(space
));
2054 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
2055 extension
= isl_union_map_apply_range(extension
,
2056 isl_union_map_from_map(proj
));
2058 schedule
= isl_union_map_range_product(schedule
, extension
);
2063 /* Return the gpu_stmt_access in the list "accesses" that corresponds
2066 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
2067 __isl_keep isl_id
*ref_id
)
2069 struct gpu_stmt_access
*access
;
2071 for (access
= accesses
; access
; access
= access
->next
)
2072 if (access
->ref_id
== ref_id
)
2078 /* Return the index of the array called "name" in the list of arrays.
2080 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
2084 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2085 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
2091 /* Internal data structure for the index and AST expression transformation
2092 * callbacks for pet_stmt_build_ast_exprs.
2094 * "accesses" is the list of gpu_stmt_access in the statement.
2095 * "iterator_map" expresses the statement iterators in terms of
2096 * the AST loop iterators.
2097 * "sched2shared" expresses the first shared_len dimensions of
2098 * the computed schedule in terms of the AST loop iterators.
2100 * The following fields are set in transform_index and used in transform_expr.
2101 * "array" is the array that is being accessed.
2102 * "global" is set if the global array is accessed (rather than
2103 * shared/private memory).
2104 * "local_array" refers to information on the array specialized
2105 * to the current kernel.
2107 struct ppcg_transform_data
{
2108 struct gpu_gen
*gen
;
2109 struct gpu_stmt_access
*accesses
;
2110 isl_pw_multi_aff
*iterator_map
;
2111 isl_pw_multi_aff
*sched2shared
;
2113 struct gpu_array_info
*array
;
2115 struct gpu_local_array_info
*local_array
;
2118 /* Return the name of the outer array (of structs) accessed by "access".
2120 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
2125 space
= isl_space_range(isl_map_get_space(access
));
2126 while (space
&& isl_space_is_wrapping(space
))
2127 space
= isl_space_domain(isl_space_unwrap(space
));
2128 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
2129 isl_space_free(space
);
2134 /* Return a pointer to the gpu_array_ref_group in "local"
2135 * that contains the reference "access".
2136 * Return NULL if no such group can be found.
2138 static struct gpu_array_ref_group
*find_ref_group(
2139 struct gpu_local_array_info
*local
, struct gpu_stmt_access
*access
)
2143 for (i
= 0; i
< local
->n_group
; ++i
) {
2144 struct gpu_array_ref_group
*group
= local
->groups
[i
];
2146 for (j
= 0; j
< group
->n_ref
; ++j
)
2147 if (group
->refs
[j
] == access
)
2154 /* Index transformation callback for pet_stmt_build_ast_exprs.
2156 * "index" expresses the array indices in terms of statement iterators
2158 * We first reformulate "index" in terms of the AST loop iterators.
2159 * Then we check if we are accessing the global array or
2160 * a shared/private copy. In the former case, we simply return
2161 * the updated index. If "index" is an affine expression rather
2162 * than an array access, then we also return the updated index here.
2164 * If no reference groups have been computed for the array,
2165 * then we can only be accessing the global array.
2167 * Otherwise, we apply the tiling to the index.
2168 * This tiling is of the form
2172 * The index is of the form
2176 * We update the tiling to refer to the AST loop iterators
2180 * and modify index to keep track of those iterators
2184 * Combining these two yields a tiled index expression in terms
2185 * of the AST loop iterators
2189 static __isl_give isl_multi_pw_aff
*transform_index(
2190 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
2193 struct ppcg_transform_data
*data
= user
;
2194 struct gpu_stmt_access
*access
;
2195 struct gpu_array_ref_group
*group
;
2196 struct gpu_array_tile
*tile
;
2197 isl_pw_multi_aff
*iterator_map
;
2201 isl_multi_pw_aff
*tiling
;
2202 isl_pw_multi_aff
*pma
;
2203 isl_multi_pw_aff
*mpa
;
2207 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
2208 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
2210 access
= find_access(data
->accesses
, ref_id
);
2213 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
2216 name
= get_outer_array_name(access
->access
);
2217 i
= find_array_index(data
->gen
, name
);
2219 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
2220 "cannot find array",
2221 return isl_multi_pw_aff_free(index
));
2222 data
->array
= &data
->gen
->prog
->array
[i
];
2223 data
->local_array
= &data
->gen
->kernel
->array
[i
];
2225 group
= find_ref_group(data
->local_array
, access
);
2231 tile
= group
->private_tile
;
2233 tile
= group
->shared_tile
;
2234 data
->global
= !tile
;
2238 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
2239 space
= isl_space_map_from_set(space
);
2240 pma
= isl_pw_multi_aff_identity(space
);
2241 pma
= isl_pw_multi_aff_product(
2242 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
2243 tiling
= isl_multi_pw_aff_from_multi_aff(
2244 isl_multi_aff_copy(tile
->tiling
));
2245 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
2247 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
2248 space
= isl_space_map_from_set(space
);
2249 mpa
= isl_multi_pw_aff_identity(space
);
2250 index
= isl_multi_pw_aff_range_product(mpa
, index
);
2251 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
2256 /* Dereference "expr" by adding an index [0].
2257 * The original "expr" is assumed not to have any indices.
2259 * If "expr" is a member access, then the dereferencing needs
2260 * to be applied to the structure argument of this member access.
2262 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
2265 isl_ast_expr
*arg0
, *res
;
2266 isl_ast_expr_list
*list
;
2268 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2270 return isl_ast_expr_free(expr
);
2271 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2272 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2275 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2276 arg
= dereference(arg
);
2277 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2278 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2282 isl_ast_expr_free(arg0
);
2284 ctx
= isl_ast_expr_get_ctx(expr
);
2285 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
2286 list
= isl_ast_expr_list_from_ast_expr(res
);
2287 res
= isl_ast_expr_get_op_arg(expr
, 0);
2288 res
= isl_ast_expr_access(res
, list
);
2289 isl_ast_expr_free(expr
);
2294 /* Linearize the index expression "expr" based on the array bounds
2297 * That is, transform expression
2299 * A[i_0][i_1]...[i_n]
2303 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
2305 * where b_0, b_1, ..., b_n are the bounds on the array.
2307 * If the base of "expr" is a member access, then the linearization needs
2308 * to be applied to the structure argument of this member access.
2310 * In the base case, if "expr" has no arguments (other than the name of
2311 * the array), then we are passing an entire array to a function.
2312 * In this case, there is nothing to linearize.
2313 * Note that at this point an expression with no arguments can
2314 * only be an entire array because the scalar case and
2315 * the case of single struct are handled by the caller.
2317 * If the number of specified index expressions in "expr"
2318 * is smaller than the dimension of the accessed array,
2319 * then the missing i_j also do not appear in the linearized expression.
2320 * Furthermore, since such an expression does not refer to a single
2321 * element while the default linearized expression would refer to
2322 * a single element, we return the expression
2324 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
2326 * instead. Note that because of the special case handling above,
2327 * we can assume here that here that there is at least one index expression.
2329 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
2330 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
2337 isl_ast_expr_list
*list
;
2338 isl_ast_build
*build
;
2340 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2341 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2342 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2345 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2346 arg
= gpu_local_array_info_linearize_index(array
, arg
);
2347 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2348 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2352 isl_ast_expr_free(arg0
);
2354 if (isl_ast_expr_get_op_n_arg(expr
) == 1)
2357 ctx
= isl_ast_expr_get_ctx(expr
);
2358 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
2359 build
= isl_ast_build_from_context(context
);
2361 n
= isl_ast_expr_get_op_n_arg(expr
);
2362 res
= isl_ast_expr_get_op_arg(expr
, 1);
2363 for (i
= 1; i
< array
->n_index
; ++i
) {
2364 isl_pw_aff
*bound_i
;
2365 isl_ast_expr
*expr_i
;
2367 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
);
2368 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
2369 res
= isl_ast_expr_mul(res
, expr_i
);
2373 expr_i
= isl_ast_expr_get_op_arg(expr
, i
+ 1);
2374 res
= isl_ast_expr_add(res
, expr_i
);
2377 isl_ast_build_free(build
);
2379 if (1 + array
->n_index
> n
) {
2380 res
= isl_ast_expr_add(isl_ast_expr_get_op_arg(expr
, 0), res
);
2382 list
= isl_ast_expr_list_from_ast_expr(res
);
2383 res
= isl_ast_expr_get_op_arg(expr
, 0);
2384 res
= isl_ast_expr_access(res
, list
);
2387 isl_ast_expr_free(expr
);
2392 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
2394 * If the AST expression refers to an array that is not accessed
2395 * at all, then this means the value of the expression is not used,
2396 * so we might as well print zero (NULL pointer) instead.
2398 * If the AST expression refers to a global scalar that is not
2399 * a read-only scalar, then its address was passed to the kernel and
2400 * we need to dereference it.
2402 * If the AST expression refers to an access to a global array,
2403 * then we linearize the access exploiting the bounds in data->local_array.
2405 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
2406 __isl_keep isl_id
*id
, void *user
)
2408 struct ppcg_transform_data
*data
= user
;
2412 if (!data
->array
->accessed
) {
2415 ctx
= isl_ast_expr_get_ctx(expr
);
2416 isl_ast_expr_free(expr
);
2417 return isl_ast_expr_from_val(isl_val_zero(ctx
));
2419 if (gpu_array_is_read_only_scalar(data
->array
))
2423 if (data
->array
->n_index
== 0)
2424 return dereference(expr
);
2425 if (!data
->array
->linearize
)
2428 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
2431 /* This function is called for each instance of a user statement
2434 * We attach a struct ppcg_kernel_stmt to the "node", containing
2435 * a computed AST expression for each access.
2436 * These AST expressions are computed from iterator_map,
2437 * which expresses the domain
2438 * elements in terms of the generated loops, and sched2shared,
2439 * which expresses the first shared_len dimensions of the schedule
2440 * computed by PPCG in terms of the generated loops.
2442 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
2443 __isl_keep isl_ast_build
*build
, void *user
)
2445 struct ppcg_transform_data data
;
2446 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2447 struct ppcg_kernel_stmt
*stmt
;
2449 isl_pw_multi_aff
*sched2shared
;
2451 isl_pw_multi_aff
*iterator_map
;
2452 isl_ast_expr
*expr
, *arg
;
2453 isl_union_map
*schedule
;
2455 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2457 return isl_ast_node_free(node
);
2459 expr
= isl_ast_node_user_get_expr(node
);
2460 arg
= isl_ast_expr_get_op_arg(expr
, 0);
2461 id
= isl_ast_expr_get_id(arg
);
2463 schedule
= isl_ast_build_get_schedule(build
);
2464 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
2465 iterator_map
= isl_pw_multi_aff_from_map(map
);
2466 sched2shared
= compute_sched_to_shared(gen
,
2467 isl_pw_multi_aff_copy(iterator_map
));
2469 stmt
->type
= ppcg_kernel_domain
;
2470 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
2471 if (!stmt
->u
.d
.stmt
)
2472 isl_die(gen
->ctx
, isl_error_internal
,
2473 "statement not found", goto error
);
2476 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
2477 data
.iterator_map
= iterator_map
;
2478 data
.sched2shared
= sched2shared
;
2479 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
2480 build
, &transform_index
, &data
,
2481 &transform_expr
, &data
);
2484 isl_pw_multi_aff_free(iterator_map
);
2485 isl_pw_multi_aff_free(sched2shared
);
2486 isl_ast_expr_free(arg
);
2487 isl_ast_expr_free(expr
);
2489 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2490 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2491 return isl_ast_node_set_annotation(node
, id
);
2494 isl_pw_multi_aff_free(iterator_map
);
2495 ppcg_kernel_stmt_free(stmt
);
2496 isl_pw_multi_aff_free(sched2shared
);
2497 return isl_ast_node_free(node
);
2500 /* This function is called when code has been generated for the shared
2501 * tile loops. The "schedule" refers only to the original statements.
2503 * We extend the schedule with that part of gen->local_sched that hasn't
2504 * been taken into account yet. This introduces parameters referring
2505 * to thread ids in the schedule, so we add them (with the appropriate
2506 * bounds to the context as well).
2507 * Finally, we set the appropriate unrolling options
2508 * if gen->first_unroll is set.
2510 static __isl_give isl_ast_node
*create_domain_leaf(
2511 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
2514 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2516 isl_union_map
*sched
;
2519 isl_id_list
*iterators
;
2522 schedule
= extend_schedule(schedule
,
2523 isl_union_map_copy(gen
->local_sched
),
2524 gen
->shared_len
, gen
->thread_tiled_len
);
2526 space
= isl_ast_build_get_schedule_space(build
);
2527 set
= isl_set_universe(space
);
2528 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2529 gen
->kernel
->thread_ids
);
2530 build
= isl_ast_build_restrict(build
, set
);
2532 n
= gen
->thread_tiled_len
- gen
->shared_len
;
2534 if (gen
->first_unroll
>= 0) {
2535 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
2536 build
= set_unroll(build
, space
, gen
->first_unroll
);
2538 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2539 build
= isl_ast_build_set_iterators(build
, iterators
);
2540 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
2541 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
2542 isl_ast_build_free(build
);
2547 /* This function is called for each statement node in the AST of the code
2548 * for copying to or from shared/private memory.
2549 * Attach a pointer to a ppcg_kernel_stmt representing the copy
2550 * statement to the node.
2551 * The statement name is "read" or "write", depending on whether we are
2552 * reading from global memory or writing to global memory.
2553 * The name of the T space is {shared,private}_<array>.
2555 * The schedule is of the form
2559 * where A refers to a piece of an array and T to the corresponding
2560 * shifted tile. We split this schedule into mappings L -> A and L -> T
2561 * and store the corresponding expressions in stmt->index and stmt->local_index,
2562 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
2564 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
2565 __isl_keep isl_ast_build
*build
, void *user
)
2567 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2568 struct ppcg_kernel_stmt
*stmt
;
2572 isl_map
*access
, *local_access
, *map
;
2573 isl_pw_multi_aff
*pma
;
2577 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2579 return isl_ast_node_free(node
);
2581 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
2582 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
2583 stmt
->u
.c
.read
= !strcmp(type
, "read");
2584 access
= isl_map_reverse(access
);
2585 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
2586 local_access
= isl_map_copy(access
);
2588 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
2589 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
2590 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2591 access
= isl_map_apply_range(access
, map
);
2592 pma
= isl_pw_multi_aff_from_map(access
);
2593 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2594 stmt
->u
.c
.index
= expr
;
2596 map
= isl_map_range_map(isl_map_universe(space
));
2597 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
2598 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2599 local_access
= isl_map_apply_range(local_access
, map
);
2600 pma
= isl_pw_multi_aff_from_map(local_access
);
2601 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2602 stmt
->u
.c
.local_index
= expr
;
2604 stmt
->u
.c
.array
= gen
->copy_group
->array
;
2605 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
2606 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
2607 stmt
->type
= ppcg_kernel_copy
;
2609 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2610 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2611 return isl_ast_node_set_annotation(node
, id
);
2614 /* Given a schedule of the form
2618 * (with S the first shared_len dimensions of the computed schedule,
2619 * A the array and L the schedule correponding to the generated loops),
2620 * indicating where to copy the array elements that need to be copied,
2621 * construct code for performing the copying.
2623 * "group" is the array reference group that is being copied
2624 * "type" is either "read" or "write"
2625 * private is set if copying needs to be performed to/from registers
2627 * We first construct a mapping to a shifted tile of the array,
2629 * [S -> A] -> T(S,A) (1)
2631 * If private is set, then we also use this mapping as a schedule
2632 * (which is already thread-specific and will be completely unrolled).
2633 * Otherwise, we wrap/tile the range over the threads.
2636 * [S -> A] -> T'(S,A)
2638 * Combined with the given schedule, we have
2640 * [S -> A] -> [L -> T'(S,A)] (2)
2642 * From the shifted tile mapping, we construct a mapping
2644 * [S -> A] -> [A -> T(S,A)]
2646 * and apply it to the schedule (2), obtaining
2648 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
2650 * Note that we can project out S because it is uniquely defined by L.
2652 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
2653 __isl_take isl_map
*sched
,
2654 const char *type
, struct gpu_array_ref_group
*group
,
2655 __isl_take isl_ast_build
*build
, int private)
2659 isl_map
*schedule
, *shift
, *map
;
2661 isl_id_list
*iterators
;
2664 shift
= shift_access(group
);
2666 schedule
= isl_map_copy(shift
);
2667 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
2669 schedule
= tile_access_schedule(gen
, schedule
);
2671 n
= isl_map_dim(schedule
, isl_dim_out
);
2672 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
2673 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2674 gen
->kernel
->thread_ids
);
2676 schedule
= isl_map_range_product(sched
, schedule
);
2678 space
= isl_space_domain(isl_map_get_space(shift
));
2679 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
2680 map
= isl_map_range_product(map
, shift
);
2682 schedule
= isl_map_apply_domain(schedule
, map
);
2684 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
2686 build
= isl_ast_build_restrict(build
, set
);
2688 gen
->copy_group
= group
;
2691 space
= isl_space_range(isl_map_get_space(schedule
));
2692 space
= isl_space_range(isl_space_unwrap(space
));
2693 build
= set_unroll(build
, space
, 0);
2695 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2696 build
= isl_ast_build_set_iterators(build
, iterators
);
2697 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
2698 tree
= isl_ast_build_node_from_schedule_map(build
,
2699 isl_union_map_from_map(schedule
));
2700 isl_ast_build_free(build
);
2705 /* Return code for reading into or writing from shared memory
2706 * the given array reference group.
2708 * If we are performing a read from global memory to shared memory and
2709 * if the array involved is not a scalar, then we copy
2710 * the entire tile to shared memory. This may result in some extra
2711 * elements getting copied, but it should lead to simpler code
2712 * (which means that fewer registers may be needed) and less divergence.
2714 * Otherwise, we only copy the elements that will be read or have been written
2718 * The input "sched" is of the form.
2722 * with S the first shared_len dimensions of the computed schedule,
2723 * A the array and L the schedule correponding to the generated loops.
2725 * We first drop "type",
2729 * If the above conditions are satisfied, we project out A,
2734 * and then introduce the group tile [S -> T], resulting in
2738 static __isl_give isl_ast_node
*copy_group_shared_accesses(
2739 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2740 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2744 isl_union_map
*access
;
2746 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2747 read
= !strcmp(type
, "read");
2749 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2751 if (read
&& !gpu_array_is_scalar(group
->array
)) {
2755 space
= isl_space_domain(isl_map_get_space(sched
));
2756 space
= isl_space_unwrap(space
);
2757 map
= isl_map_domain_map(isl_map_universe(space
));
2758 sched
= isl_map_apply_domain(sched
, map
);
2760 map
= group_tile(group
);
2761 map
= isl_map_reverse(isl_map_domain_map(map
));
2762 sched
= isl_map_apply_domain(sched
, map
);
2765 return copy_access(gen
, sched
, type
, group
, build
, 0);
2768 /* Return code for reading into or writing from private memory
2769 * the given array reference group.
2771 * Let S be the first shared_len dimensions of the computed schedule,
2772 * D the iteration domains, A the array and L the schedule correponding
2773 * to the generated loops.
2774 * "sched" is of the form
2778 * where type is either "read" or "write".
2779 * We apply the privatization D -> S(t), with t the thread ids,
2780 * to the access relation D -> A to obtain the privatized access relation
2784 * We drop the type from "sched" and intersect with the privatized access
2785 * relation to obtain
2789 static __isl_give isl_ast_node
*copy_group_private_accesses(
2790 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2791 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2795 isl_union_map
*priv
;
2796 isl_union_map
*access
;
2797 isl_map
*access_map
;
2799 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2800 read
= !strcmp(type
, "read");
2802 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2803 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2806 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
2807 access
= isl_union_map_apply_domain(access
, priv
);
2808 access_map
= isl_map_from_union_map(access
);
2810 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2811 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
2813 return copy_access(gen
, sched
, type
, group
, build
, 1);
2816 /* Return code for reading into or writing from shared or private memory.
2818 * "schedule" is of the form
2822 * with S be the first shared_len dimensions of the computed schedule,
2823 * A the array and L the schedule correponding to the generated loops.
2824 * The array reference group is attached to "type".
2826 static __isl_give isl_ast_node
*create_access_leaf(
2827 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2828 __isl_take isl_ast_build
*build
)
2830 struct gpu_array_ref_group
*group
;
2833 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
2834 group
= isl_id_get_user(id
);
2837 if (group
->private_tile
)
2838 return copy_group_private_accesses(gen
, group
, schedule
,
2841 return copy_group_shared_accesses(gen
, group
, schedule
,
2845 /* Create a domain node representing a synchronization.
2847 static __isl_give isl_ast_node
*create_sync_leaf(
2848 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2849 __isl_take isl_ast_build
*build
)
2851 struct ppcg_kernel_stmt
*stmt
;
2857 isl_map_free(schedule
);
2859 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2863 stmt
->type
= ppcg_kernel_sync
;
2865 space
= isl_ast_build_get_schedule_space(build
);
2866 space
= isl_space_from_domain(space
);
2867 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
2868 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
2869 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
2870 node
= isl_ast_node_alloc_user(expr
);
2871 isl_ast_build_free(build
);
2873 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2874 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2875 return isl_ast_node_set_annotation(node
, id
);
2878 /* This function is called during the code generation at the point
2879 * where the schedule domain element is completely determined by
2880 * the generated code. The input schedule contains the original
2881 * statements as well as synchronization and copy "statements".
2882 * The latter are scheduled at different points than any of the original
2883 * statements, so they will only arrive here in isolation.
2885 * If the current schedule only refers to a single statement,
2886 * we check if it is a copy or synchronization statement and
2887 * call the appropriate functions.
2888 * Otherwise, we assume we are dealing with the original statements
2889 * and we call create_domain_leaf.
2891 static __isl_give isl_ast_node
*create_kernel_leaf(
2892 __isl_take isl_ast_build
*build
, void *user
)
2894 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2896 isl_union_map
*schedule
;
2899 schedule
= isl_ast_build_get_schedule(build
);
2901 if (isl_union_map_n_map(schedule
) != 1)
2902 return create_domain_leaf(schedule
, build
, user
);
2904 map
= isl_map_from_union_map(schedule
);
2905 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
2906 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
2907 return create_access_leaf(gen
, map
, build
);
2908 if (!strcmp(name
, "sync"))
2909 return create_sync_leaf(gen
, map
, build
);
2911 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
2914 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
2915 * have value 0) and all even schedule dimensions as "unroll".
2917 * That is, the options look as follows
2919 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
2920 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
2922 * The even positions are used to be able to schedule copying blocks
2923 * and synchronization before or after each level of the shared memory
2924 * tile loops and we want to make sure that code for these is generated
2925 * separately (within each level).
2927 static __isl_give isl_ast_build
*set_atomic_and_unroll(
2928 __isl_take isl_ast_build
*build
,
2929 __isl_take isl_space
*space
, int sched_len
)
2935 isl_local_space
*ls
;
2938 ctx
= isl_ast_build_get_ctx(build
);
2940 space
= isl_space_params(space
);
2941 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
2942 space
= isl_space_from_domain(space
);
2943 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
2944 map
= isl_map_universe(isl_space_copy(space
));
2945 for (i
= 0; i
< sched_len
; i
+= 2)
2946 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
2947 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2948 c
= isl_equality_alloc(ls
);
2949 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2950 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2951 c
= isl_constraint_set_constant_si(c
, 1);
2952 map
= isl_map_add_constraint(map
, c
);
2953 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2954 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
2955 opt
= isl_union_map_from_map(map
);
2957 map
= isl_map_universe(space
);
2958 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2959 c
= isl_equality_alloc(ls
);
2960 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2961 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2962 map
= isl_map_add_constraint(map
, c
);
2963 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2964 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
2965 opt
= isl_union_map_add_map(opt
, map
);
2967 build
= isl_ast_build_set_options(build
, opt
);
2972 /* Return a map that maps a space of dimension gen->shared_len
2973 * to its last dimensions starting at gen->tile_first.
2974 * The range is of dimension
2976 * 2 * (gen->shared_len - gen->tile_first) + 1
2978 * The input dimensions are mapped to the odd dimensions in the output,
2979 * while the even dimensions (except 2*pos) are fixed to 0.
2980 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
2981 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
2982 * are mapped to the output. The remaining input dimensions are projected
2983 * out and the corresponding output dimensions are fixed to 0.
2985 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
2986 __isl_take isl_space
*space
, int pos
, int val
)
2991 space
= isl_space_set_from_params(space
);
2992 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
2993 space
= isl_space_map_from_set(space
);
2994 proj
= isl_map_identity(space
);
2995 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
2996 n
= gen
->shared_len
- gen
->tile_first
;
2997 for (i
= 0; i
<= n
; ++i
) {
2998 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
3000 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
3002 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
3008 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
3009 gen
->shared_len
- (gen
->tile_first
+ pos
));
3010 for (i
= pos
; i
< n
; ++i
)
3011 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
3016 /* Given the AST context schedule "schedule" and the mapping from
3017 * domains to the shared tile loops "shared_sched", add a schedule
3018 * for a synchronization operation at position "val" of loop level "pos".
3020 * schedule is of the form
3024 * (with D the iteration domains and L the already generated loops),
3025 * while shared_sched is of the form
3029 * We combine them into
3035 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3037 * and use the result as a schedule for "sync".
3039 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
3040 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3041 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
3044 isl_map
*proj
, *map
;
3046 shared_sched
= isl_union_map_copy(shared_sched
);
3047 schedule
= isl_union_map_copy(schedule
);
3049 space
= isl_union_map_get_space(shared_sched
);
3050 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
3051 map
= isl_map_from_union_map(schedule
);
3053 proj
= insert_even(gen
, space
, pos
, val
);
3054 map
= isl_map_apply_range(map
, proj
);
3055 map
= isl_map_from_range(isl_map_wrap(map
));
3056 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
3058 res
= isl_union_map_add_map(res
, map
);
3063 /* Given a set of wrapped references "ref", return the corresponding
3064 * access relations based on the tagged access relations "tagged".
3066 * The elements of "ref" are of the form
3070 * with D an iteration domains and R a reference.
3071 * The elements of "tagged" are of the form
3077 * Extend "tagged" to include the iteration domain in the range, i.e.,
3079 * [D -> R] -> [D -> A]
3081 * apply the result to "ref" and then unwrap the resulting set
3082 * to obtain relations of the form
3086 static __isl_give isl_union_map
*wrapped_reference_to_access(
3087 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
3089 isl_union_map
*tag2access
;
3091 tag2access
= isl_union_map_copy(tagged
);
3092 tag2access
= isl_union_map_universe(tag2access
);
3093 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
3094 tag2access
= isl_union_map_domain_map(tag2access
);
3095 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
3097 ref
= isl_union_set_coalesce(ref
);
3098 ref
= isl_union_set_apply(ref
, tag2access
);
3100 return isl_union_set_unwrap(ref
);
3103 /* Given an access relation "access" from "group", remove those reads
3104 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
3105 * communicate data within the same iteration of the last_shared dimension
3108 * If the access is a read then it is either an element of
3110 * live_in union (range flow)
3112 * where live_in and flow may be overapproximations, or
3113 * it reads an uninitialized value (that is not live-in because
3114 * there is an intermediate kill) or it reads a value that was
3115 * written within the same (compound) statement instance.
3116 * If the access is a write then it is either an element of
3118 * live_out union (domain flow)
3120 * or it writes a value that is never read (and is not live-out
3121 * because of an intermediate kill) or only
3122 * within the same (compound) statement instance.
3123 * In both cases, the access relation is also a subset of
3124 * the group access relation.
3126 * The cases where an uninitialized value is read or a value is written
3127 * that is never read or where the dataflow occurs within a statement
3128 * instance are also considered local and may also be removed.
3130 * Essentially, we compute the intersection of "access" with either
3132 * live_in union (range non-local-flow)
3136 * live_out union (domain non-local-flow)
3138 * We first construct a relation "local"
3140 * [[D -> R] -> [D' -> R']]
3142 * of pairs of domain iterations accessing the reference group
3143 * and references in the group that are scheduled to the same iteration
3144 * of the last_shared dimension.
3146 * If this relation does not intersect the dataflow dependences,
3147 * then there is nothing we can possibly remove, unless the dataflow
3148 * dependences themselves only relate a subset of the accesses.
3149 * In particular, the accesses may not be involved in any dataflow
3150 * dependences, either because they are uninitialized reads/dead writes
3151 * or because the dataflow occurs inside a statement instance.
3153 * Since the computation below may break up the access relation
3154 * into smaller pieces, we only perform the intersection with
3155 * the non-local dependent accesses if the local pairs
3156 * intersect the dataflow dependences. Otherwise, we intersect
3157 * with the universe of the non-local dependent accesses.
3158 * This should at least remove accesses from statements that
3159 * do not participate in any dependences.
3161 * In particular, we remove the "local" dataflow dependences from
3162 * the set of all dataflow dependences.
3163 * Note that if the potential dataflow dependences are an overapproximation
3164 * of the actual dataflow dependences, then the result remains an
3165 * overapproximation of the non-local dataflow dependences.
3166 * Copying to/from global memory is only needed for the references
3167 * in the domain/range of the result or for accesses that are live out/in
3168 * for the entire scop.
3170 * We therefore map the domain/range of the "external" relation
3171 * to the corresponding access relation and take the union with
3172 * the live out/in relation.
3174 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
3175 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
3179 isl_union_pw_multi_aff
*tagger
;
3180 isl_union_set
*domain
;
3182 isl_union_map
*sched
, *local
, *tagged
, *external
;
3183 isl_union_set
*tag_set
;
3186 if (isl_union_map_is_empty(access
))
3189 tagged
= group_tagged_access_relation(group
);
3191 sched
= isl_union_map_copy(gen
->sched
);
3193 space
= isl_union_map_get_space(sched
);
3194 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
3195 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3197 tagger
= isl_union_pw_multi_aff_copy(gen
->prog
->scop
->tagger
);
3198 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
3199 tagger
= isl_union_pw_multi_aff_intersect_domain(tagger
, domain
);
3200 sched
= isl_union_map_preimage_domain_union_pw_multi_aff(sched
, tagger
);
3202 local
= isl_union_map_apply_range(sched
,
3203 isl_union_map_reverse(isl_union_map_copy(sched
)));
3204 local
= isl_union_map_intersect(local
,
3205 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
3207 empty
= isl_union_map_is_empty(local
);
3209 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
3210 external
= isl_union_map_intersect_params(external
,
3211 isl_set_copy(gen
->prog
->scop
->context
));
3212 external
= isl_union_map_subtract(external
, local
);
3215 tag_set
= isl_union_map_range(external
);
3216 external
= wrapped_reference_to_access(tag_set
, tagged
);
3217 external
= isl_union_map_union(external
,
3218 isl_union_map_copy(gen
->prog
->scop
->live_in
));
3220 tag_set
= isl_union_map_domain(external
);
3221 external
= wrapped_reference_to_access(tag_set
, tagged
);
3222 external
= isl_union_map_union(external
,
3223 isl_union_map_copy(gen
->prog
->scop
->live_out
));
3227 external
= isl_union_map_free(external
);
3229 external
= isl_union_map_universe(external
);
3231 access
= isl_union_map_intersect(access
, external
);
3236 /* Given the AST context schedule "schedule" and the mapping from
3237 * domains to the shared tile loops "shared_sched", add a schedule
3238 * for copying an array reference group to/from shared/private memory.
3239 * "read" is set if data should be copied from global memory
3240 * to shared/private memory.
3241 * "k" represents the current group
3242 * "s" is the total number of groups
3244 * We schedule an operation before or after the innermost loop
3245 * of "shared_sched" that affects the tile of the array reference group.
3247 * schedule is of the form
3251 * (with D the iteration domains and L the already generated loops),
3252 * while shared_sched is of the form
3256 * We first compute the access relation for the reference group
3260 * and remove from this access relation those reads or writes
3261 * that only needed to communicate data within the same iteration
3262 * of the last_shared dimension of the group.
3263 * We then combine what is left with shared_sched into
3267 * If this results in an empty relation, no copying needs to be performed
3269 * Otherwise, we invert the relation and combine it with "schedule" into
3273 * The actual additional piece of the schedule is obtained from combining
3279 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3281 * The position of "val" corresponds to the innermost loop that affects
3282 * the tile and the value indicates where the copying is scheduled
3283 * with respect to the actual kernel code (at value 0).
3284 * Reads are schedule before the code, writes to global memory from
3285 * private memory are scheduled at values 1 to s, writes to global
3286 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
3288 * If we are scheduling a read from global memory to shared memory,
3289 * we insert a synchronization before the kernel code (at the innermost
3291 * If we are scheduling a write to global memory, then we add
3292 * a synchronization after all writes (at value 2 *s + 2).
3293 * However, there is no need for a synchronization after the outermost loop.
3294 * A write to global memory from private memory at the innermost level
3295 * does not require a synchronization, because it is covered by
3296 * the synchronization after the kernel inserted by body_schedule.
3298 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
3299 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3300 __isl_keep isl_union_map
*shared_sched
,
3301 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
3306 isl_union_map
*access
;
3307 isl_map
*map
, *proj
, *access_map
;
3310 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
3311 access
= remove_local_accesses(gen
, group
, access
, read
);
3312 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
3315 if (isl_union_map_is_empty(access
)) {
3316 isl_union_map_free(access
);
3320 access
= isl_union_map_reverse(access
);
3321 access
= isl_union_map_apply_range(access
,
3322 isl_union_map_copy(schedule
));
3323 access_map
= isl_map_from_union_map(access
);
3325 space
= isl_space_copy(group
->array
->space
);
3326 space
= isl_space_from_range(space
);
3327 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
3328 map
= isl_map_domain_map(isl_map_universe(space
));
3330 space
= isl_union_map_get_space(schedule
);
3331 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
3335 else if (group
->private_tile
)
3338 val
= 1 + s
+ 1 + k
;
3339 proj
= insert_even(gen
, space
, pos
, val
);
3340 map
= isl_map_apply_range(map
, proj
);
3342 access_map
= isl_map_range_product(access_map
, map
);
3344 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
3345 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
3347 res
= isl_union_map_add_map(res
, access_map
);
3349 n
= gen
->shared_len
- gen
->tile_first
;
3351 if (!group
->private_tile
)
3352 res
= add_sync_schedule(gen
, res
, schedule
,
3353 shared_sched
, n
, -1);
3357 if (pos
== n
&& group
->private_tile
)
3359 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3366 /* Return a schedule for the shared tile loops based on the current
3367 * AST context schedule.
3369 * We create a "shared_sched" that maps the domains to the first
3370 * shared_len dimensions of the computed schedule, project out the
3371 * first tile_first dimensions (as these are already covered by
3372 * the host code) and insert "statement-level" dimensions at even
3373 * positions so that we can schedule copy blocks and synchronization
3374 * before/after each level.
3376 * In particular, copy blocks are inserted inside the innermost
3377 * level that affect the tile. For the copying to global memory,
3378 * those from private memory are scheduled before those from shared
3379 * memory such that synchronization can be inserted between the two
3380 * at the innermost level.
3381 * Synchronization is inserted at the innermost level before the
3382 * actual kernel code if there is any copying from global memory
3383 * to shared memory. It is inserted unconditionally at the innermost
3384 * level after the actual kernel code and the copying to global memory
3385 * from private memory (if any). Finally, it is inserted after
3386 * any copying to global memory, except at the outermost level
3387 * and at the innermost level if there is no copying from shared
3388 * memory. The copying from private memory is covered by the unconditional
3389 * synchronization at the innermost level.
3391 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
3392 __isl_take isl_union_map
*schedule
)
3396 isl_union_map
*shared_sched
;
3397 isl_union_map
*sched
;
3398 isl_map
*proj
, *map
;
3401 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
3402 proj
= projection(isl_union_map_get_space(shared_sched
),
3403 gen
->tiled_len
, gen
->shared_len
);
3404 shared_sched
= isl_union_map_apply_range(shared_sched
,
3405 isl_union_map_from_map(proj
));
3406 space
= isl_union_map_get_space(shared_sched
);
3407 proj
= insert_even(gen
, space
, -1, 0);
3408 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
3409 isl_union_map_from_map(proj
));
3411 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
3414 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
)
3415 s
+= gen
->kernel
->array
[i
].n_group
;
3418 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
3419 struct gpu_local_array_info
*array
= &gen
->kernel
->array
[i
];
3421 for (j
= 0; j
< array
->n_group
; ++j
) {
3422 struct gpu_array_ref_group
*group
;
3424 group
= array
->groups
[j
];
3425 if (!group
->private_tile
&& !group
->shared_tile
)
3427 res
= add_group_schedule(gen
, res
, schedule
,
3428 shared_sched
, group
, 0, k
, s
);
3429 res
= add_group_schedule(gen
, res
, schedule
,
3430 shared_sched
, group
, 1, k
, s
);
3435 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3436 gen
->shared_len
- gen
->tile_first
, 1 + s
);
3438 isl_union_map_free(shared_sched
);
3439 isl_union_map_free(schedule
);
3444 /* Generate code for "kernel" in the given "context".
3446 * We first generate code for the shared tile loops (T1T, T1P and T2)
3447 * in a context that includes the block ids.
3448 * Within each iteration of these loops an additional code generation
3449 * is performed (within create_kernel_leaf) for the rest of the schedule
3450 * in a context that includes the thread ids.
3452 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
3453 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
3454 __isl_keep isl_multi_pw_aff
*grid_size
)
3458 isl_id_list
*iterators
;
3459 isl_union_map
*schedule
;
3463 schedule
= isl_ast_build_get_schedule(build
);
3465 build
= isl_ast_build_copy(build
);
3466 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
3467 space
= isl_ast_build_get_schedule_space(build
);
3468 set
= isl_set_universe(isl_space_copy(space
));
3469 set
= add_bounded_parameters_dynamic(set
, grid_size
,
3470 gen
->kernel
->block_ids
);
3471 build
= isl_ast_build_restrict(build
, set
);
3473 schedule
= body_schedule(gen
, schedule
);
3475 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
3477 build
= set_atomic_and_unroll(build
, space
, sched_len
);
3478 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, sched_len
, "g");
3479 build
= isl_ast_build_set_iterators(build
, iterators
);
3480 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
3481 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3482 isl_ast_build_free(build
);
3487 /* Attach "id" to the given node.
3489 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
3490 __isl_keep isl_ast_build
*build
, void *user
)
3494 node
= isl_ast_node_set_annotation(node
, id
);
3499 /* Construct an AST node for performing a kernel launch and attach
3500 * the information about the kernel to that node.
3501 * "kernel_id" has name "kernel" and contains a pointer
3502 * to the ppcg_kernel structure.
3504 * The kernel AST has been constructed in the context of the range
3505 * of "schedule". In particular, the grid size has been computed
3506 * in the context. We therefore still need to make sure that these
3507 * constraints are expressed in the code. We do this by creating a schedule
3509 * kernel[] -> [S -> []]
3511 * where S is the schedule domain, i.e., the range of "schedule".
3512 * The AST generation will then create a single call surrounded by
3513 * all the condition in "S" that have not been expressed yet.
3515 * The kernel information is attached to this node in attach_id.
3517 static __isl_give isl_ast_node
*construct_launch(
3518 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
3519 __isl_take isl_id
*kernel_id
)
3522 isl_union_set
*domain
;
3527 ctx
= isl_ast_build_get_ctx(build
);
3529 domain
= isl_union_map_range(schedule
);
3530 set
= isl_set_from_union_set(domain
);
3531 map
= isl_map_from_domain(set
);
3532 map
= isl_map_from_range(isl_map_wrap(map
));
3533 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
3534 schedule
= isl_union_map_from_map(map
);
3536 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, kernel_id
);
3537 node
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3538 isl_ast_build_free(build
);
3543 /* This function is called for each leaf in the AST of the host code.
3544 * We first specialize the schedule to the site of the leaf, compute
3545 * the size of shared memory and then construct the body of the host code
3546 * and the associated kernel.
3548 * The necessary information for printing the kernel launch is
3549 * stored in the struct ppcg_kernel that was created in create_kernel and
3550 * attached to an outer mark node in the schedule tree.
3551 * Note that this assumes that a kernel is only launched once.
3552 * The kernel pointer itself is stored in gen->kernel by before_mark,
3553 * while the isl_id containing this pointer is stored in gen->kernel_mark.
3554 * The latter is attached to the leaf AST node created to represent the launch.
3556 static __isl_give isl_ast_node
*create_host_leaf(
3557 __isl_take isl_ast_build
*build
, void *user
)
3559 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3562 struct ppcg_kernel
*kernel
;
3563 isl_set
*host_domain
;
3564 isl_union_map
*schedule
;
3565 isl_union_map
*local_sched
;
3566 isl_union_set
*domain
;
3569 schedule
= isl_ast_build_get_schedule(build
);
3571 kernel
= gen
->kernel
;
3575 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
3577 local_sched
= isl_union_map_copy(gen
->sched
);
3578 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
3580 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3581 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3582 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3584 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3585 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3586 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3588 kernel
->space
= isl_ast_build_get_schedule_space(build
);
3590 compute_shared_sched(gen
);
3591 gen
->privatization
= compute_privatization(gen
);
3592 if (gpu_group_references(gen
) < 0)
3593 schedule
= isl_union_map_free(schedule
);
3594 host_domain
= isl_set_from_union_set(isl_union_map_range(
3595 isl_union_map_copy(schedule
)));
3596 localize_bounds(gen
, kernel
, host_domain
);
3598 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3599 check_shared_memory_bound(gen
);
3600 compute_group_tilings(gen
);
3602 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
3604 create_kernel_vars(gen
, kernel
);
3606 isl_map_free(gen
->privatization
);
3607 isl_union_map_free(gen
->local_sched
);
3608 isl_union_map_free(gen
->tiled_sched
);
3609 isl_union_map_free(gen
->shared_sched
);
3610 isl_union_map_free(gen
->shared_proj
);
3611 isl_set_free(host_domain
);
3613 node
= construct_launch(build
, schedule
, isl_id_copy(gen
->kernel_mark
));
3617 isl_union_map_free(schedule
);
3621 /* This function is called before the AST generator starts traversing
3622 * the schedule subtree of a node with mark "mark".
3624 * If the mark is called "kernel", store the mark itself in gen->kernel_mark
3625 * and the kernel pointer in gen->kernel for use in create_host_leaf.
3627 static int before_mark(__isl_keep isl_id
*mark
,
3628 __isl_keep isl_ast_build
*build
, void *user
)
3630 struct gpu_gen
*gen
= user
;
3634 if (!strcmp(isl_id_get_name(mark
), "kernel")) {
3635 gen
->kernel_mark
= isl_id_copy(mark
);
3636 gen
->kernel
= isl_id_get_user(mark
);
3641 /* This function is called after the AST generator has finished traversing
3642 * the schedule subtree of a mark node. "node" points to the corresponding
3645 * If the mark is called "kernel", then clear kernel and gen->kernel_mark.
3647 static __isl_give isl_ast_node
*after_mark(__isl_take isl_ast_node
*node
,
3648 __isl_keep isl_ast_build
*build
, void *user
)
3650 struct gpu_gen
*gen
= user
;
3653 id
= isl_ast_node_mark_get_id(node
);
3655 return isl_ast_node_free(node
);
3656 if (!strcmp(isl_id_get_name(id
), "kernel") && gen
->kernel
) {
3657 gen
->kernel_mark
= isl_id_free(gen
->kernel_mark
);
3665 /* Use isl to generate host code from gen->host_schedule, which corresponds to
3666 * the outer gen->tile_first loops of the global schedule in gen->sched.
3667 * Within each iteration of this partial schedule, i.e., for each kernel
3668 * launch, create_host_leaf takes care of generating the kernel code.
3669 * The ppcg_kernel objects are stored in mark nodes in the schedule
3670 * tree and are extracted in before_mark.
3672 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
3674 isl_ast_build
*build
;
3676 isl_schedule
*schedule
;
3677 isl_id_list
*iterators
;
3679 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
3680 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
3681 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
,
3682 gen
->tile_first
, "h");
3683 build
= isl_ast_build_set_iterators(build
, iterators
);
3684 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
3685 build
= isl_ast_build_set_before_each_mark(build
, &before_mark
, gen
);
3686 build
= isl_ast_build_set_after_each_mark(build
, &after_mark
, gen
);
3687 schedule
= isl_schedule_copy(gen
->host_schedule
);
3688 tree
= isl_ast_build_node_from_schedule(build
, schedule
);
3689 isl_ast_build_free(build
);
3694 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
3698 return isl_union_map_read_from_str(ctx
, str
);
3701 /* Information about the outermost tilable bands in the forest of bands.
3703 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3705 * tile_first is the number of schedule dimensions in prefix.
3707 * suffix is the schedule of the outermost tilable bands and their descendants.
3710 struct gpu_gen
*gen
;
3712 isl_union_map
*prefix
;
3713 isl_union_map
*suffix
;
3716 /* Construct an isl_multi_val for use as tile sizes for tiling "node"
3717 * from the elements in "tile_size".
3719 static __isl_give isl_multi_val
*construct_band_tiles_sizes(
3720 __isl_keep isl_schedule_node
*node
, int *tile_size
)
3730 ctx
= isl_schedule_node_get_ctx(node
);
3731 space
= isl_schedule_node_band_get_space(node
);
3732 n
= isl_schedule_node_band_n_member(node
);
3733 mv
= isl_multi_val_zero(space
);
3734 for (i
= 0; i
< n
; ++i
) {
3737 v
= isl_val_int_from_si(ctx
, tile_size
[i
]);
3738 mv
= isl_multi_val_set_val(mv
, i
, v
);
3744 /* Tile "band" with tile size specified by "sizes".
3746 * Since the tile loops will be mapped to block ids, we forcibly
3747 * turn off tile loop scaling. We may want to enable tile loop scaling
3748 * at some later point, but then we would have to support the detection
3749 * of strides during the mapping to block ids.
3750 * Similarly, since the point loops will be mapped to thread ids,
3751 * we forcibly shift the point loops so that they start at zero.
3753 static __isl_give isl_schedule_node
*tile_band(
3754 __isl_take isl_schedule_node
*node
, __isl_take isl_multi_val
*sizes
)
3756 isl_ctx
*ctx
= isl_schedule_node_get_ctx(node
);
3760 scale_tile
= isl_options_get_tile_scale_tile_loops(ctx
);
3761 isl_options_set_tile_scale_tile_loops(ctx
, 0);
3762 shift_point
= isl_options_get_tile_shift_point_loops(ctx
);
3763 isl_options_set_tile_shift_point_loops(ctx
, 1);
3765 node
= isl_schedule_node_band_tile(node
, sizes
);
3767 isl_options_set_tile_scale_tile_loops(ctx
, scale_tile
);
3768 isl_options_set_tile_shift_point_loops(ctx
, shift_point
);
3773 /* Extract the set of parameter values and outer schedule dimensions
3774 * for which any statement instance
3775 * in the kernel inserted at "node" needs to be executed.
3776 * Intersect the set of parameter values derived from the host schedule
3777 * relation with the context of "prog".
3779 static __isl_give isl_set
*extract_context(__isl_keep isl_schedule_node
*node
,
3780 struct gpu_prog
*prog
)
3782 isl_union_map
*schedule
;
3783 isl_union_set
*schedule_domain
;
3787 schedule
= isl_schedule_node_get_prefix_schedule_relation(node
);
3788 schedule_domain
= isl_union_map_range(schedule
);
3789 empty
= isl_union_set_is_empty(schedule_domain
);
3791 isl_union_set_free(schedule_domain
);
3798 space
= isl_union_set_get_space(schedule_domain
);
3799 isl_union_set_free(schedule_domain
);
3800 space
= isl_space_set_from_params(space
);
3801 depth
= isl_schedule_node_get_schedule_depth(node
);
3802 space
= isl_space_add_dims(space
, isl_dim_set
, depth
);
3803 context
= isl_set_empty(space
);
3805 context
= isl_set_from_union_set(schedule_domain
);
3807 context
= isl_set_intersect_params(context
,
3808 isl_set_copy(prog
->context
));
3813 /* Return the set of outer array elements accessed by
3814 * by the statement instance in "domain" in "prog".
3816 static __isl_give isl_union_set
*accessed_by_domain(
3817 __isl_take isl_union_set
*domain
, struct gpu_prog
*prog
)
3819 isl_union_map
*access
;
3820 isl_union_set
*arrays
;
3822 access
= isl_union_map_union(isl_union_map_copy(prog
->read
),
3823 isl_union_map_copy(prog
->may_write
));
3824 access
= isl_union_map_intersect_domain(access
, domain
);
3825 arrays
= isl_union_map_range(access
);
3826 arrays
= isl_union_set_apply(arrays
,
3827 isl_union_map_copy(prog
->to_outer
));
3832 /* Return the number of outer band members of the band node "node"
3833 * that are marked coincident.
3835 static int n_outer_coincidence(__isl_keep isl_schedule_node
*node
)
3839 n
= isl_schedule_node_band_n_member(node
);
3841 for (i
= 0; i
< n
; ++i
)
3842 if (!isl_schedule_node_band_member_get_coincident(node
, i
))
3848 /* If the band node "node" has more than "n" members, then split off
3849 * the first "n" of them.
3851 static __isl_give isl_schedule_node
*split_band(
3852 __isl_take isl_schedule_node
*node
, int n
)
3856 dim
= isl_schedule_node_band_n_member(node
);
3858 node
= isl_schedule_node_band_split(node
, n
);
3863 /* Scale a band node that may have been split by split_band.
3864 * "sizes" are the scaling factors for the original node.
3865 * "node" either points to the original band node, or the outer
3866 * of the two pieces after splitting.
3868 * If the number of elements in "node" is smaller than the number of
3869 * elements in "sizes", then some splitting has occurred and we split
3870 * "sizes" in the same way.
3872 static __isl_give isl_schedule_node
*scale_band(
3873 __isl_take isl_schedule_node
*node
, __isl_take isl_multi_val
*sizes
)
3877 n
= isl_multi_val_dim(sizes
, isl_dim_set
);
3878 dim
= isl_schedule_node_band_n_member(node
);
3880 isl_multi_val
*sizes2
;
3882 sizes2
= isl_multi_val_copy(sizes
);
3883 sizes
= isl_multi_val_drop_dims(sizes
,
3884 isl_dim_set
, dim
, n
- dim
);
3885 sizes2
= isl_multi_val_drop_dims(sizes2
, isl_dim_set
, 0, dim
);
3886 node
= isl_schedule_node_child(node
, 0);
3887 node
= isl_schedule_node_band_scale(node
, sizes2
);
3888 node
= isl_schedule_node_parent(node
);
3891 return isl_schedule_node_band_scale(node
, sizes
);
3894 /* Return an isl_multi_aff, with as elements the parameters in "space"
3895 * that have the names specified by the elements in "names".
3896 * If (some of) these parameters do not already appear in "space",
3897 * then they are added first.
3899 static __isl_give isl_multi_aff
*parameter_vector(__isl_take isl_space
*space
,
3900 __isl_keep isl_id_list
*names
)
3903 isl_local_space
*ls
;
3907 space
= isl_space_free(space
);
3909 n
= isl_id_list_n_id(names
);
3910 for (i
= 0; i
< n
; ++i
) {
3914 id
= isl_id_list_get_id(names
, i
);
3915 pos
= isl_space_find_dim_by_id(space
, isl_dim_param
, id
);
3920 pos
= isl_space_dim(space
, isl_dim_param
);
3921 space
= isl_space_add_dims(space
, isl_dim_param
, 1);
3922 space
= isl_space_set_dim_id(space
, isl_dim_param
, pos
, id
);
3924 ma
= isl_multi_aff_zero(isl_space_copy(space
));
3925 ls
= isl_local_space_from_space(isl_space_domain(space
));
3926 for (i
= 0; i
< n
; ++i
) {
3931 id
= isl_id_list_get_id(names
, i
);
3932 pos
= isl_space_find_dim_by_id(space
, isl_dim_param
, id
);
3934 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
3935 isl_dim_param
, pos
);
3936 ma
= isl_multi_aff_set_aff(ma
, i
, aff
);
3938 isl_local_space_free(ls
);
3943 /* Return constraints on the domain elements that equate a sequence of
3944 * parameters called "names", to the partial schedule
3945 * of "node" modulo the integers in "size".
3946 * The number of elements in the array "size" should be equal
3947 * to the number of members of the band node "node" and
3948 * to the number of elements in "names".
3950 static __isl_give isl_union_set
*set_schedule_modulo(
3951 __isl_keep isl_schedule_node
*node
, __isl_keep isl_id_list
*names
,
3956 isl_multi_union_pw_aff
*mupa
, *mupa2
;
3958 isl_union_set
*domain
;
3962 if (isl_schedule_node_band_n_member(node
) == 0)
3963 return isl_schedule_node_get_universe_domain(node
);
3965 mupa
= isl_schedule_node_band_get_partial_schedule(node
);
3966 mv
= construct_band_tiles_sizes(node
, size
);
3967 mupa
= isl_multi_union_pw_aff_mod_multi_val(mupa
, mv
);
3969 space
= isl_multi_union_pw_aff_get_space(mupa
);
3970 ma
= parameter_vector(space
, names
);
3972 domain
= isl_schedule_node_get_universe_domain(node
);
3974 mupa2
= isl_multi_union_pw_aff_multi_aff_on_domain(domain
, ma
);
3975 mupa
= isl_multi_union_pw_aff_sub(mupa
, mupa2
);
3977 return isl_multi_union_pw_aff_zero_union_set(mupa
);
3980 /* Insert a context node at "node" introducing the block and thread
3981 * identifiers along with their bounds, which are stored in kernel->grid_size
3982 * and kernel->block_dim.
3983 * Note that the bounds on the block identifiers may implicitly impose
3984 * constraints on the parameters. A guard needs to be inserted
3985 * in the schedule tree to ensure that those bounds hold at "node".
3986 * This guard is inserted in insert_guard.
3988 static __isl_give isl_schedule_node
*insert_context(struct ppcg_kernel
*kernel
,
3989 __isl_take isl_schedule_node
*node
)
3993 context
= isl_set_universe(isl_set_get_space(kernel
->context
));
3995 context
= add_bounded_parameters_dynamic(context
,
3996 kernel
->grid_size
, kernel
->block_ids
);
3997 context
= add_bounded_parameters(context
,
3998 kernel
->block_dim
, kernel
->thread_ids
);
4000 node
= isl_schedule_node_insert_context(node
, context
);
4005 /* Insert a guard that eliminates kernel launches where the kernel
4006 * obviously does not have any work to do.
4008 * In particular, eliminate kernel launches where there are obviously
4010 * Use the same block size constraints that are used to create the context
4011 * to ensure that all constraints implicit in the constructed context
4012 * are imposed by the guard.
4014 * Additionally, add other constraints that are valid
4015 * for each executed instance ("context"), as long as this does not result
4018 static __isl_give isl_schedule_node
*insert_guard(
4019 __isl_take isl_schedule_node
*node
, __isl_keep isl_set
*context
,
4020 __isl_keep isl_multi_pw_aff
*size
, struct ppcg_scop
*scop
)
4026 guard
= isl_set_copy(context
);
4027 guard
= isl_set_compute_divs(guard
);
4028 guard
= isl_set_from_basic_set(isl_set_simple_hull(guard
));
4030 nparam
= isl_set_dim(guard
, isl_dim_param
);
4031 n
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
4032 ids
= ppcg_scop_generate_names(scop
, n
, "__ppcg_tmp");
4033 guard
= add_bounded_parameters_dynamic(guard
, size
, ids
);
4034 isl_id_list_free(ids
);
4035 guard
= isl_set_project_out(guard
, isl_dim_param
, nparam
, n
);
4037 node
= isl_schedule_node_insert_guard(node
, guard
);
4042 /* Mark all dimensions in the current band node atomic.
4044 static __isl_give isl_schedule_node
*atomic(__isl_take isl_schedule_node
*node
)
4048 n
= isl_schedule_node_band_n_member(node
);
4049 for (i
= 0; i
< n
; ++i
)
4050 node
= isl_schedule_node_band_member_set_ast_loop_type(node
, i
,
4051 isl_ast_loop_atomic
);
4056 /* Mark "node" atomic, if it is a band node.
4057 * Do the same for all ancestors.
4058 * Return a pointer to "node" (in the updated schedule tree).
4060 static __isl_give isl_schedule_node
*atomic_ancestors(
4061 __isl_take isl_schedule_node
*node
)
4067 if (!isl_schedule_node_has_parent(node
))
4070 pos
= isl_schedule_node_get_child_position(node
);
4071 node
= isl_schedule_node_parent(node
);
4072 if (isl_schedule_node_get_type(node
) == isl_schedule_node_band
)
4073 node
= atomic(node
);
4074 node
= atomic_ancestors(node
);
4075 node
= isl_schedule_node_child(node
, pos
);
4080 /* Group the domain elements into a single space, named kernelX,
4081 * with X the kernel sequence number "kernel_id".
4083 static __isl_give isl_schedule_node
*group_statements(
4084 __isl_take isl_schedule_node
*node
, int kernel_id
)
4092 snprintf(buffer
, sizeof(buffer
), "kernel%d", kernel_id
);
4093 id
= isl_id_alloc(isl_schedule_node_get_ctx(node
), buffer
, NULL
);
4094 return isl_schedule_node_group(node
, id
);
4097 /* Create a ppcg_kernel representing the domain instances that reach "node"
4098 * and replace the subtree at "node" by a mark node pointing
4099 * to the ppcg_kernel.
4100 * The band that "node" points to is the band that needs to be mapped
4101 * to block identifiers. The band that needs to be mapped to thread
4102 * identifiers should be marked by a "thread" mark by the caller.
4103 * If "scale" is set, then the band that "node" points to is scaled
4106 * Mark all outer band nodes as atomic to ensure each kernel is only
4108 * If the domain elements that reach "node" live in more than one space,
4109 * then group the domain elements into a single space, named kernelX,
4110 * with X the kernel sequence number.
4112 * Insert a guard node governing the kernel node to ensure that
4113 * no kernels with zero blocks are launched.
4115 * Temporarily adjust the schedule tree underneath the kernel mark as follows.
4116 * Insert a context node describing the block and thread
4117 * identifiers inside the kernel mark.
4118 * The context node needs to be inserted after the effective block size
4119 * has been determined such that the bounds on the thread identifiers
4120 * would reflect the effective block size.
4122 * Store a pointer to the created ppcg_kernel in gen->kernel.
4124 * We keep a copy of the isl_id that points to the kernel to ensure
4125 * that the kernel does not get destroyed if the schedule node
4126 * is freed due to some error condition.
4128 static __isl_give isl_schedule_node
*create_kernel(struct gpu_gen
*gen
,
4129 __isl_take isl_schedule_node
*node
, int scale
,
4130 __isl_keep isl_multi_val
*sizes
)
4132 struct ppcg_kernel
*kernel
;
4134 isl_schedule_node
*node_thread
;
4135 isl_union_set
*domain
;
4136 int single_statement
;
4138 kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4139 kernel
= ppcg_kernel_create_local_arrays(kernel
, gen
->prog
);
4141 return isl_schedule_node_free(node
);
4143 domain
= isl_schedule_node_get_domain(node
);
4144 single_statement
= isl_union_set_n_set(domain
) == 1;
4146 kernel
->ctx
= gen
->ctx
;
4147 kernel
->options
= gen
->options
;
4148 kernel
->context
= extract_context(node
, gen
->prog
);
4149 kernel
->core
= isl_union_set_universe(isl_union_set_copy(domain
));
4150 kernel
->arrays
= accessed_by_domain(isl_union_set_copy(domain
),
4152 kernel
->tile_len
= isl_schedule_node_band_n_member(node
);
4153 kernel
->n_parallel
= n_outer_coincidence(node
);
4154 kernel
->n_grid
= kernel
->n_parallel
;
4155 node_thread
= isl_schedule_node_copy(node
);
4156 node_thread
= gpu_tree_move_down_to_thread(node_thread
, kernel
->core
);
4157 node_thread
= isl_schedule_node_child(node_thread
, 0);
4158 kernel
->n_block
= n_outer_coincidence(node_thread
);
4159 isl_schedule_node_free(node_thread
);
4160 kernel
->id
= gen
->kernel_id
++;
4161 read_grid_and_block_sizes(kernel
, gen
);
4163 gen
->kernel
= kernel
;
4165 node
= atomic_ancestors(node
);
4167 id
= isl_id_alloc(gen
->ctx
, "kernel", kernel
);
4168 id
= isl_id_set_free_user(id
, &ppcg_kernel_free_wrap
);
4169 node
= isl_schedule_node_insert_mark(node
, isl_id_copy(id
));
4171 if (!single_statement
)
4172 node
= group_statements(node
, kernel
->id
);
4174 node
= isl_schedule_node_child(node
, 0);
4175 node
= split_band(node
, kernel
->n_grid
);
4176 kernel
->block_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
4177 kernel
->n_grid
, "b");
4178 kernel
->block_filter
= set_schedule_modulo(node
, kernel
->block_ids
,
4180 kernel
->grid_size
= extract_grid_size(kernel
,
4181 isl_union_set_copy(domain
));
4183 node
= scale_band(node
, isl_multi_val_copy(sizes
));
4184 node
= isl_schedule_node_parent(node
);
4185 if (!single_statement
)
4186 node
= isl_schedule_node_parent(node
);
4187 node
= insert_guard(node
, kernel
->context
, kernel
->grid_size
,
4189 node
= gpu_tree_move_down_to_thread(node
, kernel
->core
);
4190 node
= isl_schedule_node_child(node
, 0);
4191 node
= split_band(node
, kernel
->n_block
);
4192 kernel
->thread_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
4193 kernel
->n_block
, "t");
4194 kernel
->thread_filter
= set_schedule_modulo(node
, kernel
->thread_ids
,
4196 extract_block_size(kernel
, domain
);
4198 node
= gpu_tree_move_up_to_kernel(node
);
4199 node
= isl_schedule_node_child(node
, 0);
4200 node
= insert_context(kernel
, node
);
4202 node
= gpu_tree_move_up_to_kernel(node
);
4204 node
= isl_schedule_node_child(node
, 0);
4205 node
= isl_schedule_node_cut(node
);
4206 node
= isl_schedule_node_parent(node
);
4208 if (!single_statement
)
4209 node
= isl_schedule_node_parent(node
);
4210 node
= isl_schedule_node_parent(node
);
4216 /* Insert a zero-dimensional permutable band at "node".
4218 static __isl_give isl_schedule_node
*insert_empty_permutable_band(
4219 __isl_take isl_schedule_node
*node
)
4222 isl_schedule
*schedule
;
4223 isl_union_set
*domain
;
4224 isl_multi_union_pw_aff
*mupa
;
4226 schedule
= isl_schedule_node_get_schedule(node
);
4227 domain
= isl_schedule_get_domain(schedule
);
4228 space
= isl_union_set_get_space(domain
);
4229 isl_union_set_free(domain
);
4230 isl_schedule_free(schedule
);
4232 space
= isl_space_set_from_params(space
);
4233 mupa
= isl_multi_union_pw_aff_zero(space
);
4234 node
= isl_schedule_node_insert_partial_schedule(node
, mupa
);
4235 node
= isl_schedule_node_band_set_permutable(node
, 1);
4240 /* Mark "node" as outer permutable.
4242 * If "node" originally points to a leaf, then insert a zero-dimensional
4243 * permutable band such that we can assume that "node" always
4244 * points to a band node.
4246 * Tile "node" using user specified tile sizes, after splitting the band
4247 * if the number of specified tile sizes is smaller than the dimension
4248 * of the band. Mark the point band of this tiling as the band that
4249 * needs to be mapped to threads.
4250 * Create a kernel representing the domain instances that reach "node" and
4251 * replace the band node with a mark node pointing to the kernel.
4253 static __isl_give isl_schedule_node
*mark_outer_permutable(
4254 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
)
4256 struct ppcg_kernel
*kernel
;
4261 isl_multi_val
*sizes
;
4263 if (isl_schedule_node_get_type(node
) == isl_schedule_node_leaf
)
4264 node
= insert_empty_permutable_band(node
);
4266 tile_len
= isl_schedule_node_band_n_member(node
);
4267 tile_size
= read_tile_sizes(gen
, &tile_len
);
4269 return isl_schedule_node_free(node
);
4270 if (tile_len
< isl_schedule_node_band_n_member(node
))
4271 node
= isl_schedule_node_band_split(node
, tile_len
);
4272 sizes
= construct_band_tiles_sizes(node
, tile_size
);
4273 node
= tile_band(node
, isl_multi_val_copy(sizes
));
4274 node
= isl_schedule_node_child(node
, 0);
4275 id
= isl_id_alloc(gen
->ctx
, "thread", NULL
);
4276 node
= isl_schedule_node_insert_mark(node
, id
);
4277 node
= isl_schedule_node_parent(node
);
4279 scale
= gen
->options
->scale_tile_loops
;
4280 node
= create_kernel(gen
, node
, scale
, sizes
);
4281 isl_multi_val_free(sizes
);
4284 kernel
= gen
->kernel
;
4285 kernel
->tile_len
= tile_len
;
4286 kernel
->tile_size
= tile_size
;
4291 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
4292 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
);
4294 /* Check if this band node is tilable and has any parallel loops. If so,
4295 * take it as the outermost tilable band. If not, continue looking for the
4296 * outermost tilable band in the children of the current band.
4297 * Return a pointer to the same node in a tree where all outermost tilable
4298 * bands in the current subtree have been replaced by mark nodes
4299 * containing a pointer to a ppcg_kernel object.
4301 static __isl_give isl_schedule_node
*band_select_outer_band(struct gpu_gen
*gen
,
4302 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4304 int n
= isl_schedule_node_band_n_member(node
);
4307 n_parallel
= n_outer_coincidence(node
);
4309 if (!isl_schedule_node_band_get_permutable(node
) || n_parallel
== 0) {
4310 node
= isl_schedule_node_child(node
, 0);
4311 node
= select_outer_band(gen
, node
, pos
+ n
, info
);
4312 return isl_schedule_node_parent(node
);
4315 gen
->any_parallelism
= 1;
4317 info
->tile_first
= pos
;
4318 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
4319 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
4321 node
= mark_outer_permutable(gen
, node
);
4326 /* Extend "umap" with coordinates with fixed value "val"
4327 * to a total length of "dst_len", assuming the original dimension is "src_len".
4329 static __isl_give isl_union_map
*extend_range(
4330 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4336 dim
= isl_union_map_get_space(umap
);
4337 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4338 for (i
= src_len
; i
< dst_len
; ++i
)
4339 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4341 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4346 /* Select the outermost bands in the elements of the sequence or set
4347 * node "node", align their prefix schedules and combine the resulting
4348 * prefix and suffix schedules into a single pair of prefix and
4349 * suffix schedules for the entire list.
4350 * Return a pointer to the same node in a tree where all outermost tilable
4351 * bands in the current subtree have been replaced by mark nodes
4352 * containing a pointer to a ppcg_kernel object.
4354 static __isl_give isl_schedule_node
*list_select_outer_band(
4355 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
, int pos
,
4356 struct band_info
*list_info
)
4359 int n
= isl_schedule_node_n_children(node
);
4360 isl_ctx
*ctx
= isl_schedule_node_get_ctx(node
);
4361 struct band_info
*info
;
4363 isl_union_map
*prefix
;
4364 isl_union_map
*suffix
;
4367 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4371 for (i
= 0; i
< n
; ++i
) {
4372 node
= isl_schedule_node_child(node
, i
);
4373 node
= select_outer_band(gen
, node
, pos
, &info
[i
]);
4374 if (info
[i
].tile_first
> max_tile_first
)
4375 max_tile_first
= info
[i
].tile_first
;
4376 node
= isl_schedule_node_parent(node
);
4379 for (i
= 0; i
< n
; ++i
) {
4380 if (info
[i
].tile_first
== max_tile_first
)
4382 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4383 info
[i
].tile_first
, max_tile_first
, 0);
4384 info
[i
].tile_first
= max_tile_first
;
4387 prefix
= info
[0].prefix
;
4388 suffix
= info
[0].suffix
;
4390 for (i
= 1; i
< n
; ++i
) {
4391 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4392 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4395 list_info
->tile_first
= info
[0].tile_first
;
4396 list_info
->prefix
= prefix
;
4397 list_info
->suffix
= suffix
;
4403 /* If we reach a leaf node, then we have not found any outer tilable
4404 * band with parallel loops, so consider the leaf node as the outermost
4406 * Return a pointer to a mark node containing a pointer
4407 * to a ppcg_kernel object inserted at the original leaf node.
4409 static __isl_give isl_schedule_node
*leaf_select_outer_band(struct gpu_gen
*gen
,
4410 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4413 info
->tile_first
= pos
;
4414 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
4415 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
4417 node
= mark_outer_permutable(gen
, node
);
4422 /* Select the outermost tilable band in the subtree that "node" points to and
4423 * return a pointer to the same node in a tree where all outermost tilable
4424 * bands in the current subtree have been replaced by mark nodes
4425 * containing a pointer to a ppcg_kernel object.
4427 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
4428 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4430 enum isl_schedule_node_type type
;
4432 type
= isl_schedule_node_get_type(node
);
4434 case isl_schedule_node_domain
:
4435 case isl_schedule_node_filter
:
4436 node
= isl_schedule_node_child(node
, 0);
4437 node
= select_outer_band(gen
, node
, pos
, info
);
4438 return isl_schedule_node_parent(node
);
4439 case isl_schedule_node_leaf
:
4440 return leaf_select_outer_band(gen
, node
, pos
, info
);
4441 case isl_schedule_node_band
:
4442 return band_select_outer_band(gen
, node
, pos
, info
);
4443 case isl_schedule_node_set
:
4444 case isl_schedule_node_sequence
:
4445 return list_select_outer_band(gen
, node
, pos
, info
);
4447 isl_die(isl_schedule_node_get_ctx(node
),
4448 isl_error_unsupported
, "unhandled schedule node type",
4450 case isl_schedule_node_error
:
4451 info
->prefix
= NULL
;
4452 info
->suffix
= NULL
;
4456 return isl_schedule_node_free(node
);
4459 /* Select the outermost tilable band that (by construction)
4460 * has at least one parallel loop.
4461 * The starting position of the aligned band is stored in the pair
4463 * The sizes and number of parallel loops may be different in different
4464 * parts of the band forest and are therefore stored in the gpu_stmts.
4466 * Return the complete schedule, with the tilable bands aligned
4467 * at gen->tile_first and padded with zero, if needed.
4468 * Store a schedule tree corresponding to the outer gen->tile_first
4469 * dimensions, with mark nodes containing pointers to ppcg_kernel objects,
4470 * in gen->host_schedule.
4472 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4473 __isl_keep isl_schedule
*schedule
)
4475 isl_schedule_node
*node
;
4476 struct band_info info
;
4478 node
= isl_schedule_get_root(schedule
);
4479 node
= select_outer_band(gen
, node
, 0, &info
);
4480 gen
->host_schedule
= isl_schedule_node_get_schedule(node
);
4481 isl_schedule_node_free(node
);
4483 gen
->tile_first
= info
.tile_first
;
4484 info
.suffix
= align_range(info
.suffix
);
4486 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4489 /* Set gen->untiled_len to the number of scheduling dimensions
4490 * for the schedule of the first domain.
4491 * We assume here that this number is the same for all domains.
4493 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4495 unsigned *untiled_len
= user
;
4497 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4503 /* Compute an appropriate schedule based on the accesses in
4504 * gen->read and gen->write.
4506 * We use the dependences in gen->prog->scop to compute
4507 * a schedule that has a parallel loop in each tilable band.
4508 * Finally, we select the outermost tilable band.
4510 * If live range reordering is allowed, then we need to make sure
4511 * that live ranges on arrays are not run in parallel since doing
4512 * so would require array expansion. We therefore add the array
4513 * order dependences to the coincidence dependences. Non-zero array
4514 * order dependences will then prevent a schedule dimension from being
4515 * considered parallel.
4516 * Live ranges derived from scalars are allowed to be run in parallel
4517 * since we force the scalars to be mapped to private memory in
4518 * check_scalar_live_ranges.
4519 * If live range reordering is allowed, then the false dependences
4520 * are not added to the validity constraints as that would prevent
4521 * reordering. Instead, the external false dependences that enforce that reads
4522 * from potentially live-in data precede any later write and
4523 * that writes of potentially live-out data follow any other earlier write
4524 * are added to the validity and the coincidence constraints.
4525 * The false dependences are still added to the proximity constraints
4526 * for consistency with the case where live range reordering is not allowed.
4527 * The coincidence constraints then consist of flow dependences,
4528 * external false dependences and array order dependences.
4529 * The independences can be filtered out from the first two sets.
4530 * They have already been filtered out from the array order dependences
4531 * on a per array basis in collect_order_dependences.
4532 * There is no need for a per array handling of the other two sets
4533 * as there should be no flow or external false dependence on local
4534 * variables that can be filtered out.
4536 static void compute_schedule(struct gpu_gen
*gen
)
4538 isl_union_set
*domain
;
4539 isl_union_map
*dep_raw
, *dep
;
4540 isl_union_map
*validity
, *proximity
, *coincidence
;
4541 isl_union_map
*sched
;
4542 isl_schedule_constraints
*sc
;
4543 isl_schedule
*schedule
;
4545 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4546 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
4547 sc
= isl_schedule_constraints_set_context(sc
,
4548 isl_set_copy(gen
->prog
->scop
->context
));
4549 if (gen
->options
->live_range_reordering
) {
4550 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
4551 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
4552 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
4553 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4554 validity
= isl_union_map_copy(proximity
);
4555 validity
= isl_union_map_union(validity
,
4556 isl_union_map_copy(gen
->prog
->scop
->dep_forced
));
4557 proximity
= isl_union_map_union(proximity
,
4558 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
4559 coincidence
= isl_union_map_copy(validity
);
4560 coincidence
= isl_union_map_subtract(coincidence
,
4561 isl_union_map_copy(gen
->prog
->scop
->independence
));
4562 coincidence
= isl_union_map_union(coincidence
,
4563 isl_union_map_copy(gen
->prog
->array_order
));
4565 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4566 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4567 dep
= isl_union_map_union(dep
, dep_raw
);
4568 dep
= isl_union_map_coalesce(dep
);
4569 proximity
= isl_union_map_copy(dep
);
4570 coincidence
= isl_union_map_copy(dep
);
4573 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
4574 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
4575 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
4577 if (gen
->options
->debug
->dump_schedule_constraints
)
4578 isl_schedule_constraints_dump(sc
);
4579 schedule
= isl_schedule_constraints_compute_schedule(sc
);
4580 if (gen
->options
->debug
->dump_schedule
)
4581 isl_schedule_dump(schedule
);
4583 sched
= select_outer_tilable_band(gen
, schedule
);
4585 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4586 sched
= isl_union_map_intersect_domain(sched
, domain
);
4589 isl_schedule_free(schedule
);
4592 /* Compute the sets of outer array elements that need to be copied in and out.
4594 * In particular, for each array that is possibly written anywhere in
4595 * gen->prog and that is visible outside the corresponding scop,
4596 * we copy out its entire extent.
4598 * Any array elements that is read without first being written needs
4599 * to be copied in. Furthermore, if there are any array elements that
4600 * are copied out, but that may not be written inside gen->prog, then
4601 * they also need to be copied in to ensure that the value after execution
4602 * is the same as the value before execution, at least for those array
4603 * elements that may have their values preserved by the scop.
4604 * In case the array elements are structures, we need to take into
4605 * account that all members of the structures need to be written
4606 * by gen->prog before we can avoid copying the data structure in.
4608 * While computing the set of array elements that are copied out but
4609 * not necessarily written, we intersect both sets with the context.
4610 * This helps in those cases where the arrays are declared with a fixed size,
4611 * while the accesses are parametric and the context assigns a fixed value
4612 * to the parameters.
4614 * If an element from a local array is read without first being written,
4615 * then there is no point in copying it in since it cannot have been
4616 * written prior to the scop. Warn about the uninitialized read instead.
4618 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4621 isl_union_set
*local
;
4622 isl_union_set
*may_write
, *must_write
;
4623 isl_union_set
*copy_in
, *copy_out
;
4624 isl_union_set
*not_written
;
4625 isl_union_map
*uninitialized
;
4626 isl_union_map
*local_uninitialized
;
4628 must_write
= isl_union_map_range(
4629 isl_union_map_copy(gen
->prog
->must_write
));
4630 must_write
= isl_union_set_intersect_params(must_write
,
4631 isl_set_copy(gen
->prog
->context
));
4632 may_write
= isl_union_map_range(
4633 isl_union_map_copy(gen
->prog
->may_write
));
4634 may_write
= isl_union_set_intersect_params(may_write
,
4635 isl_set_copy(gen
->prog
->context
));
4636 may_write
= isl_union_set_universe(may_write
);
4637 may_write
= isl_union_set_apply(may_write
,
4638 isl_union_map_copy(gen
->prog
->to_outer
));
4639 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
4640 local
= isl_union_set_copy(copy_out
);
4642 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4647 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
4649 if (gen
->prog
->array
[i
].local
) {
4652 set
= isl_set_universe(space
);
4653 local
= isl_union_set_add_set(local
, set
);
4657 write_i
= isl_union_set_extract_set(may_write
, space
);
4658 empty
= isl_set_plain_is_empty(write_i
);
4659 isl_set_free(write_i
);
4663 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4664 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4666 isl_union_set_free(may_write
);
4668 copy_out
= isl_union_set_intersect_params(copy_out
,
4669 isl_set_copy(gen
->prog
->context
));
4671 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4673 copy_out
= isl_union_set_apply(copy_out
,
4674 isl_union_map_copy(gen
->prog
->to_inner
));
4675 copy_out
= isl_union_set_intersect(copy_out
,
4676 isl_union_set_copy(gen
->prog
->may_persist
));
4677 not_written
= isl_union_set_subtract(copy_out
, must_write
);
4679 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4680 local_uninitialized
= isl_union_map_copy(uninitialized
);
4682 local
= isl_union_set_apply(local
,
4683 isl_union_map_copy(gen
->prog
->to_inner
));
4684 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
4686 if (!isl_union_map_is_empty(local_uninitialized
)) {
4688 "possibly uninitialized reads (not copied in):\n");
4689 isl_union_map_dump(local_uninitialized
);
4691 uninitialized
= isl_union_map_subtract(uninitialized
,
4692 local_uninitialized
);
4693 copy_in
= isl_union_map_range(uninitialized
);
4694 copy_in
= isl_union_set_union(copy_in
, not_written
);
4695 copy_in
= isl_union_set_apply(copy_in
,
4696 isl_union_map_copy(gen
->prog
->to_outer
));
4698 gen
->prog
->copy_in
= copy_in
;
4701 /* Internal data structure for extract_access.
4702 * "next_access" points to the end of a linked list that is extended
4703 * by extract_access.
4704 * "single_expression" is set if the access expressions belong to
4705 * an expression statement (i.e., a statement without internal control).
4706 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4708 struct ppcg_extract_access_data
{
4709 struct gpu_stmt_access
**next_access
;
4710 int single_expression
;
4711 isl_union_map
*any_to_outer
;
4714 /* Given a tagged access relation to a single array "tagged", extract it
4715 * as a map, taking into account that the input may be empty.
4716 * If the access relation is empty, then it does not contain
4717 * any space information, so we try to recover it from the index
4719 * The space of the index expression is of the form I -> A,
4720 * with I the statement instances and A the array, or [I -> F] -> A,
4721 * with F the filters corresponding to arguments.
4722 * We first drop F, if present, obtaining I -> A.
4723 * Then we construct I -> R, with R the reference tag,
4724 * combine the two into I -> [R -> A] and uncurry to obtain
4725 * the final result [I -> R] -> A.
4726 * Note that the index expression may have a lower dimension
4727 * than that of the array, but this dimension is not used
4728 * if the access relation is empty.
4730 static __isl_give isl_map
*extract_single_tagged_access(
4731 __isl_take isl_union_map
*tagged
, __isl_keep pet_expr
*expr
)
4735 isl_space
*space
, *space2
;
4736 isl_multi_pw_aff
*index
;
4738 empty
= isl_union_map_is_empty(tagged
);
4742 return isl_map_from_union_map(tagged
);
4743 isl_union_map_free(tagged
);
4745 index
= pet_expr_access_get_index(expr
);
4746 space
= isl_multi_pw_aff_get_space(index
);
4747 isl_multi_pw_aff_free(index
);
4748 if (isl_space_domain_is_wrapping(space
))
4749 space
= isl_space_domain_factor_domain(space
);
4750 space2
= isl_space_copy(space
);
4751 space2
= isl_space_from_domain(isl_space_domain(space
));
4752 id
= pet_expr_access_get_ref_id(expr
);
4753 space2
= isl_space_set_tuple_id(space2
, isl_dim_out
, id
);
4754 space
= isl_space_range_product(space2
, space
);
4755 space
= isl_space_uncurry(space
);
4757 return isl_map_empty(space
);
4759 isl_union_map_free(tagged
);
4763 /* Extract a gpu_stmt_access from "expr", append it to the list
4764 * that ends in *data->next_access and update the end of the list.
4765 * If the access expression performs a write, then it is considered
4766 * exact only if it appears in a single expression statement and
4767 * if its may access relation is equal to its must access relation.
4769 * The combined set of may accesses may be union if member accesses
4770 * are involved, but the entire set is derived from a single reference and
4771 * therefore from a single index expression. These accesses therefore
4772 * all map to the same outer array.
4774 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
4776 struct ppcg_extract_access_data
*data
= user
;
4777 isl_union_map
*tagged
;
4778 struct gpu_stmt_access
*access
;
4779 isl_ctx
*ctx
= pet_expr_get_ctx(expr
);
4780 isl_multi_pw_aff
*index
;
4782 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4784 access
->next
= NULL
;
4785 access
->read
= pet_expr_access_is_read(expr
);
4786 access
->write
= pet_expr_access_is_write(expr
);
4787 tagged
= pet_expr_access_get_tagged_may_read(expr
);
4788 tagged
= isl_union_map_union(tagged
,
4789 pet_expr_access_get_tagged_may_write(expr
));
4790 tagged
= isl_union_map_apply_range(tagged
,
4791 isl_union_map_copy(data
->any_to_outer
));
4792 if (!access
->write
) {
4793 access
->exact_write
= 1;
4794 } else if (!data
->single_expression
) {
4795 access
->exact_write
= 0;
4797 isl_union_map
*must
, *may
;
4798 may
= isl_union_map_copy(tagged
);
4799 may
= isl_union_map_domain_factor_domain(may
);
4800 must
= pet_expr_access_get_must_write(expr
);
4801 access
->exact_write
= isl_union_map_is_equal(must
, may
);
4802 isl_union_map_free(must
);
4803 isl_union_map_free(may
);
4805 index
= pet_expr_access_get_index(expr
);
4806 access
->n_index
= isl_multi_pw_aff_dim(index
, isl_dim_out
);
4807 isl_multi_pw_aff_free(index
);
4808 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
4809 access
->tagged_access
= extract_single_tagged_access(tagged
, expr
);
4810 access
->access
= isl_map_copy(access
->tagged_access
);
4811 access
->access
= isl_map_domain_factor_domain(access
->access
);
4813 *data
->next_access
= access
;
4814 data
->next_access
= &(*data
->next_access
)->next
;
4816 if (!access
->access
)
4822 /* Construct a linked list of gpu_stmt_access objects,
4823 * one for each access expression in the statement body.
4824 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4826 static int pet_stmt_extract_accesses(struct gpu_stmt
*stmt
,
4827 __isl_keep isl_union_map
*any_to_outer
)
4829 struct ppcg_extract_access_data data
;
4831 stmt
->accesses
= NULL
;
4832 data
.next_access
= &stmt
->accesses
;
4833 data
.single_expression
=
4834 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
4835 data
.any_to_outer
= any_to_outer
;
4836 return pet_tree_foreach_access_expr(stmt
->stmt
->body
,
4837 &extract_access
, &data
);
4840 /* Return an array of gpu_stmt representing the statements in "scop".
4842 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4843 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*any_to_outer
)
4846 struct gpu_stmt
*stmts
;
4848 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->pet
->n_stmt
);
4852 for (i
= 0; i
< scop
->pet
->n_stmt
; ++i
) {
4853 struct gpu_stmt
*s
= &stmts
[i
];
4855 s
->id
= isl_set_get_tuple_id(scop
->pet
->stmts
[i
]->domain
);
4856 s
->stmt
= scop
->pet
->stmts
[i
];
4857 if (pet_stmt_extract_accesses(s
, any_to_outer
) < 0)
4858 return free_stmts(stmts
, i
+ 1);
4864 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
4866 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
4868 struct gpu_gen
*gen
= user
;
4870 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
4874 /* Generate CUDA code for "scop" and print it to "p".
4875 * After generating an AST for the transformed scop as explained below,
4876 * we call "gen->print" to print the AST in the desired output format
4879 * If it turns out that it does not make sense to generate GPU code,
4880 * then we generate CPU code instead.
4882 * The GPU code is generated in a context where at least one
4883 * statement instance is executed. The corresponding guard (if any) is printed
4884 * around the entire generated GPU code, except for the declaration
4885 * of the arrays that are visible outside of the scop and that therefore
4886 * cannot be declared inside the body of any possible guard.
4888 * We first compute a schedule that respects the dependences
4889 * of the original program and select the outermost band
4890 * of tilable dimensions that has at least one parallel loop.
4891 * We then have three blocks of dimensions
4895 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4900 * For each iteration of the T loop and for each array, we compute
4901 * the array elements accessed by that iteration, construct a rectangular
4902 * box around it and shift it to the origin. The result is used
4903 * as shared memory for the array.
4905 * We then split off at most 2 parallel loops from the T loops and
4906 * at most 3 parallel loops from the P loops
4910 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4911 * according to "grid"/"block" sizes.
4913 * H T1T T1P T2 P1T P1P P2 G
4915 * Finally, the T1P and P1P iterators are equated to the block and
4916 * thread dimensions respectively and so are effectively removed.
4917 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4918 * are run on the GPU.
4920 * Code is generated in three stages. We first generate code for the
4921 * host (the H loops), with iterators h%d. Then, for each leaf node
4922 * of the resulting AST, we generate code for the shared loops (up to
4923 * and including T2), with iterators g%d and after equating the H loops
4924 * to h%d parameters and the T1P loops to the block dimensions.
4925 * Finally, we generate code for the remaining loops in a similar fashion.
4927 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
4928 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
4929 struct ppcg_options
*options
)
4931 struct gpu_prog
*prog
;
4933 isl_set
*context
, *guard
;
4936 return isl_printer_free(p
);
4938 ctx
= isl_printer_get_ctx(p
);
4939 prog
= gpu_prog_alloc(ctx
, scop
);
4941 return isl_printer_free(p
);
4943 context
= isl_set_copy(prog
->context
);
4944 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
4945 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
4948 gen
->any_parallelism
= 0;
4949 compute_schedule(gen
);
4951 if (!gen
->any_parallelism
) {
4952 isl_set_free(context
);
4953 isl_set_free(guard
);
4954 p
= print_cpu(p
, scop
, options
);
4956 compute_copy_in_and_out(gen
);
4957 gen
->tree
= generate_host_code(gen
);
4958 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
4959 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
4960 isl_ast_node_free(gen
->tree
);
4963 isl_union_map_free(gen
->sched
);
4964 isl_schedule_free(gen
->host_schedule
);
4966 gpu_prog_free(prog
);
4971 /* Wrapper around generate for use as a ppcg_transform callback.
4973 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
4974 struct ppcg_scop
*scop
, void *user
)
4976 struct gpu_gen
*gen
= user
;
4978 return generate(p
, gen
, scop
, gen
->options
);
4981 /* Transform the code in the file called "input" by replacing
4982 * all scops by corresponding GPU code and write the results to "out".
4984 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
4985 struct ppcg_options
*options
,
4986 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
4987 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
4988 struct gpu_types
*types
, void *user
), void *user
)
4995 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
4996 gen
.options
= options
;
4999 gen
.print_user
= user
;
5001 gen
.types
.name
= NULL
;
5003 if (options
->debug
->dump_sizes
) {
5004 isl_space
*space
= isl_space_params_alloc(ctx
, 0);
5005 gen
.used_sizes
= isl_union_map_empty(space
);
5008 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5010 if (options
->debug
->dump_sizes
) {
5011 isl_union_map_dump(gen
.used_sizes
);
5012 isl_union_map_free(gen
.used_sizes
);
5015 isl_union_map_free(gen
.sizes
);
5016 for (i
= 0; i
< gen
.types
.n
; ++i
)
5017 free(gen
.types
.name
[i
]);
5018 free(gen
.types
.name
);
5023 /* Compute the set of inner array elements that may have their values
5024 * preserved by "prog". In particular, collect the array elements of
5025 * arrays that are not local to "prog" and remove those elements that
5026 * are definitely killed or definitely written by "prog".
5028 static __isl_give isl_union_set
*compute_may_persist(struct gpu_prog
*prog
)
5031 isl_union_set
*may_persist
, *killed
;
5032 isl_union_map
*must_kill
;
5034 may_persist
= isl_union_set_empty(isl_set_get_space(prog
->context
));
5035 for (i
= 0; i
< prog
->n_array
; ++i
) {
5038 if (prog
->array
[i
].local
)
5041 extent
= isl_set_copy(prog
->array
[i
].extent
);
5042 may_persist
= isl_union_set_add_set(may_persist
, extent
);
5045 may_persist
= isl_union_set_intersect_params(may_persist
,
5046 isl_set_copy(prog
->context
));
5047 may_persist
= isl_union_set_apply(may_persist
,
5048 isl_union_map_copy(prog
->to_inner
));
5049 must_kill
= isl_union_map_copy(prog
->tagged_must_kill
);
5050 killed
= isl_union_map_range(must_kill
);
5051 must_kill
= isl_union_map_copy(prog
->must_write
);
5052 killed
= isl_union_set_union(killed
, isl_union_map_range(must_kill
));
5054 may_persist
= isl_union_set_subtract(may_persist
, killed
);
5058 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5060 struct gpu_prog
*prog
;
5067 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5072 prog
->context
= isl_set_copy(scop
->context
);
5073 prog
->n_stmts
= scop
->pet
->n_stmt
;
5074 prog
->any_to_outer
= pet_scop_compute_outer_to_any(scop
->pet
);
5075 prog
->any_to_outer
= isl_union_map_reverse(prog
->any_to_outer
);
5076 space
= isl_union_map_get_space(prog
->any_to_outer
);
5077 space
= isl_space_set_from_params(space
);
5078 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
5079 space
= isl_space_map_from_set(space
);
5080 id
= isl_map_identity(space
);
5081 prog
->any_to_outer
= isl_union_map_add_map(prog
->any_to_outer
, id
);
5082 prog
->stmts
= extract_stmts(ctx
, scop
,
5083 prog
->context
, prog
->any_to_outer
);
5084 prog
->read
= isl_union_map_copy(scop
->reads
);
5085 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
5086 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
5087 prog
->tagged_must_kill
= isl_union_map_copy(scop
->tagged_must_kills
);
5088 prog
->to_inner
= pet_scop_compute_outer_to_inner(scop
->pet
);
5089 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5090 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5093 return gpu_prog_free(prog
);
5095 if (collect_array_info(prog
) < 0)
5096 return gpu_prog_free(prog
);
5097 prog
->may_persist
= compute_may_persist(prog
);
5102 void *gpu_prog_free(struct gpu_prog
*prog
)
5106 free_array_info(prog
);
5107 free_stmts(prog
->stmts
, prog
->n_stmts
);
5108 isl_union_map_free(prog
->any_to_outer
);
5109 isl_union_map_free(prog
->to_outer
);
5110 isl_union_map_free(prog
->to_inner
);
5111 isl_union_set_free(prog
->copy_in
);
5112 isl_union_set_free(prog
->copy_out
);
5113 isl_union_map_free(prog
->read
);
5114 isl_union_map_free(prog
->may_write
);
5115 isl_union_map_free(prog
->must_write
);
5116 isl_union_map_free(prog
->tagged_must_kill
);
5117 isl_union_map_free(prog
->array_order
);
5118 isl_union_set_free(prog
->may_persist
);
5119 isl_set_free(prog
->context
);