gpu: generate host code from schedule tree
[ppcg.git] / schedule.h
blobda6b1915cd92605673a6955eed81704880b5c5a5
1 #ifndef _SCHEDULE_H
2 #define _SCHEDULE_H
4 /* An access to an outer array element or an iterator.
5 * Accesses to iterators have an access relation that maps to an unnamed space.
6 * An access may be both read and write.
7 * If the access relation is empty, then the output dimension may
8 * not be equal to the dimension of the corresponding array.
9 */
10 struct gpu_stmt_access {
11 /* Access reads elements */
12 int read;
13 /* Access writes elements */
14 int write;
15 /* All writes are definite writes. */
16 int exact_write;
17 /* The number of index expressions specified in the access. */
18 int n_index;
20 /* May access relation */
21 isl_map *access;
22 /* May access relation with as domain a mapping from iteration domain
23 * to a reference identifier.
25 isl_map *tagged_access;
26 /* The reference id of the corresponding pet_expr. */
27 isl_id *ref_id;
29 struct gpu_stmt_access *next;
32 struct gpu_stmt {
33 isl_id *id;
34 struct pet_stmt *stmt;
36 /* Number of tile dimensions. */
37 int tile_len;
38 /* Number of initial parallel loops among tile dimensions. */
39 int n_parallel;
41 /* Linked list of accesses. */
42 struct gpu_stmt_access *accesses;
45 __isl_give isl_map *project_out(__isl_take isl_space *dim,
46 int len, int first, int n);
47 __isl_give isl_map *projection(__isl_take isl_space *dim,
48 int src_len, int dst_len);
49 __isl_give isl_set *parametrization(__isl_take isl_space *space,
50 int len, int first, __isl_keep isl_id_list *names);
51 __isl_give isl_set *extend(__isl_take isl_set *set, int dst_len);
52 __isl_give isl_union_map *align_range(__isl_take isl_union_map *umap);
53 int map_plain_is_fixed(isl_map *map, enum isl_dim_type type, unsigned pos);
55 #endif