2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride, shift and shift_map only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * shift_map contains the mapping
39 * i -> (i + shift)/stride
41 * Let D represent the initial shared_len dimensions of the computed schedule.
42 * The spaces of "lb" and "shift" are of the form
46 * "shift_map" is of the form
48 * [D -> i] -> [D -> (i + shift(D))/stride]
50 struct gpu_array_bound
{
56 isl_basic_map
*shift_map
;
59 /* A tile of an array.
61 * n is the dimension of the array.
62 * bound is an array of size "n" representing the lower bound
63 * and size for each index.
65 * tiling maps a tile in the global array to the corresponding
66 * shared/private memory tile and is of the form
68 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
70 * where D represents the initial shared_len dimensions
71 * of the computed schedule.
73 struct gpu_array_tile
{
75 struct gpu_array_bound
*bound
;
76 isl_multi_aff
*tiling
;
79 struct gpu_array_info
;
81 /* A group of array references in a kernel that should be handled together.
82 * If private_tile is not NULL, then it is mapped to registers.
83 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
84 * Otherwise, it is accessed from global memory.
86 struct gpu_array_ref_group
{
87 /* The references in this group access this array. */
88 struct gpu_array_info
*array
;
89 /* Position of this group in the list of reference groups of array. */
92 /* The following fields are use during the construction of the groups.
93 * access is the combined access relation relative to the shared
94 * memory tiling. In particular, the domain of the map corresponds
95 * to the first shared_len dimensions of the computed schedule.
96 * write is set if any access in the group is a write.
101 /* The shared memory tile, NULL if none. */
102 struct gpu_array_tile
*shared_tile
;
104 /* The private memory tile, NULL if none. */
105 struct gpu_array_tile
*private_tile
;
107 /* References in this group; point to elements of a linked list. */
109 struct gpu_stmt_access
**refs
;
111 /* Last shared memory tile dimension that affects tile of this group. */
117 struct ppcg_options
*options
;
119 /* Callback for printing of AST in appropriate format. */
120 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
121 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
122 struct gpu_types
*types
, void *user
);
125 struct gpu_prog
*prog
;
126 /* The generated AST. */
129 /* The sequence of types for which a definition has been printed. */
130 struct gpu_types types
;
132 /* tile, grid and block sizes for each kernel */
133 isl_union_map
*sizes
;
135 /* Identifier of current kernel. */
137 /* Pointer to the current kernel. */
138 struct ppcg_kernel
*kernel
;
139 /* Does the computed schedule exhibit any parallelism? */
142 /* First tile dimension. */
144 /* Number of tile dimensions. */
146 /* Number of initial parallel loops among tile dimensions. */
149 /* Number of dimensions determining shared memory. */
152 /* Number of rows in the untiled schedule. */
154 /* Number of rows in the tiled schedule. */
156 /* Number of rows in schedule after tiling/wrapping over threads. */
157 int thread_tiled_len
;
159 /* Global untiled schedule. */
160 isl_union_map
*sched
;
161 /* Local (per kernel launch) tiled schedule. */
162 isl_union_map
*tiled_sched
;
163 /* Local schedule per shared memory tile loop iteration. */
164 isl_union_map
*local_sched
;
166 /* Local tiled schedule projected onto the shared tile loops and
167 * the loops that will be wrapped over the threads,
168 * with all shared tile loops parametrized.
170 isl_union_map
*shared_sched
;
171 /* Projects out the loops that will be wrapped over the threads
174 isl_union_map
*shared_proj
;
176 /* A map that takes the range of shared_sched as input,
177 * wraps the appropriate loops over the threads and then projects
180 isl_map
*privatization
;
182 /* A map from the shared memory tile loops and the thread indices
183 * (as parameters) to the set of accessed memory elements that
184 * will be accessed through private copies.
186 isl_union_map
*private_access
;
188 /* The schedule for the current private/shared access
189 * (within print_private_access or print_shared_access).
192 /* The array reference group corresponding to copy_sched. */
193 struct gpu_array_ref_group
*copy_group
;
195 /* First loop to unroll (or -1 if none) in the current part of the
202 /* Note: in the input file, the sizes of the grid and the blocks
203 * are specified in the order x, y, z, but internally, the sizes
204 * are stored in reverse order, so that the last element always
205 * refers to the x dimension.
212 /* Print the name of the local copy of a given group of array references.
214 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
215 struct gpu_array_ref_group
*group
)
219 if (group
->private_tile
)
220 p
= isl_printer_print_str(p
, "private_");
221 else if (group
->shared_tile
)
222 p
= isl_printer_print_str(p
, "shared_");
225 p
= isl_printer_print_str(p
, group
->array
->name
);
226 if (!global
&& group
->array
->n_group
> 1) {
227 p
= isl_printer_print_str(p
, "_");
228 p
= isl_printer_print_int(p
, group
->nr
);
234 /* Collect all references to the given array and store pointers to them
237 * If the array contains structures, then there is no need to collect
238 * the references since we will not be computing any reference groups.
240 static void collect_references(struct gpu_prog
*prog
,
241 struct gpu_array_info
*array
)
246 if (array
->has_compound_element
)
250 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
251 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
252 struct gpu_stmt_access
*access
;
254 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
256 name
= isl_map_get_tuple_name(access
->access
,
258 if (name
&& !strcmp(array
->name
, name
))
264 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
268 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
269 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
270 struct gpu_stmt_access
*access
;
272 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
274 name
= isl_map_get_tuple_name(access
->access
,
276 if (!name
|| strcmp(array
->name
, name
))
279 array
->refs
[n
++] = access
;
284 /* Create a gpu_array_tile for an array of dimension "n_index".
286 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
289 struct gpu_array_tile
*tile
;
291 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
296 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
299 for (i
= 0; i
< n_index
; ++i
) {
300 tile
->bound
[i
].size
= NULL
;
301 tile
->bound
[i
].lb
= NULL
;
302 tile
->bound
[i
].stride
= NULL
;
303 tile
->bound
[i
].shift
= NULL
;
304 tile
->bound
[i
].shift_map
= NULL
;
310 static void *free_tile(struct gpu_array_tile
*tile
)
317 for (j
= 0; j
< tile
->n
; ++j
) {
318 isl_val_free(tile
->bound
[j
].size
);
319 isl_val_free(tile
->bound
[j
].stride
);
320 isl_aff_free(tile
->bound
[j
].lb
);
321 isl_aff_free(tile
->bound
[j
].shift
);
322 isl_basic_map_free(tile
->bound
[j
].shift_map
);
325 isl_multi_aff_free(tile
->tiling
);
331 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
332 __isl_keep isl_set
*accessed
)
337 id
= isl_set_get_tuple_id(accessed
);
339 for (i
= 0; i
< scop
->n_array
; ++i
) {
342 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
349 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
352 /* Compute and return the extent of "array", taking into account the set of
355 * In particular, the extent in the outer dimension is taken
356 * from "accessed", while then extent in the remaing dimensions
357 * are taken from array->extent.
359 * The extent in the outer dimension cannot be taken from array->extent
360 * because that may be unbounded. Furthermore, even if it is bounded,
361 * it may be larger than the piece of the array that is being accessed.
363 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
364 __isl_keep isl_set
*accessed
)
371 extent
= isl_set_copy(array
->extent
);
373 n_index
= isl_set_dim(accessed
, isl_dim_set
);
377 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
378 outer
= isl_set_copy(accessed
);
379 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
380 extent
= isl_set_flat_product(outer
, extent
);
381 id
= isl_set_get_tuple_id(accessed
);
382 extent
= isl_set_set_tuple_id(extent
, id
);
387 /* Is the array "array" being extracted a read-only scalar?
389 * That is, is "array" a scalar that is never written to.
390 * An array containing structures is never considered to be a scalar.
392 static int is_read_only_scalar(struct gpu_array_info
*array
,
393 struct gpu_prog
*prog
)
396 isl_union_map
*write
;
399 if (array
->has_compound_element
)
401 if (array
->n_index
!= 0)
404 write
= isl_union_map_copy(prog
->write
);
405 space
= isl_set_universe(isl_space_copy(array
->space
));
406 write
= isl_union_map_intersect_range(write
,
407 isl_union_set_from_set(space
));
408 empty
= isl_union_map_is_empty(write
);
409 isl_union_map_free(write
);
414 /* Compute bounds on the host arrays based on the accessed elements
415 * and collect all references to the array.
417 * If the array is zero-dimensional and does not contain structures,
418 * i.e., if the array is a scalar, we check whether it is read-only.
420 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
423 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
427 struct pet_array
*pa
;
428 struct gpu_array_info
*info
;
431 info
= &prog
->array
[prog
->n_array
];
434 n_index
= isl_set_dim(array
, isl_dim_set
);
435 name
= isl_set_get_tuple_name(array
);
436 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
437 isl_pw_aff
*, n_index
);
441 info
->space
= isl_set_get_space(array
);
442 info
->name
= strdup(name
);
443 info
->n_index
= n_index
;
444 info
->bound
= bounds
;
445 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
447 pa
= find_array(prog
->scop
, array
);
449 isl_die(isl_set_get_ctx(array
), isl_error_internal
,
450 "unable to find array in scop", goto error
);
452 info
->type
= strdup(pa
->element_type
);
453 info
->size
= pa
->element_size
;
454 info
->local
= pa
->declared
&& !pa
->exposed
;
455 info
->has_compound_element
= pa
->element_is_record
;
456 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
458 extent
= compute_extent(pa
, array
);
459 for (i
= 0; i
< n_index
; ++i
) {
465 bound
= isl_set_dim_max(isl_set_copy(extent
), i
);
467 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
468 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
469 one
= isl_aff_zero_on_domain(ls
);
470 one
= isl_aff_add_constant_si(one
, 1);
471 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
472 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
475 if (!isl_pw_aff_is_cst(bound
))
478 info
->extent
= extent
;
480 collect_references(prog
, info
);
489 /* Compute a mapping from all outer arrays (of structs) in scop
490 * to their innermost arrays.
492 * In particular, for each array of a primitive type, the result
493 * contains the identity mapping on that array.
494 * For each array involving member accesses, the result
495 * contains a mapping from the elements of the outer array of structs
496 * to all corresponding elements of the innermost nested arrays.
498 static __isl_give isl_union_map
*compute_to_inner(struct ppcg_scop
*scop
)
501 isl_union_map
*to_inner
;
503 to_inner
= isl_union_map_empty(isl_set_get_space(scop
->context
));
505 for (i
= 0; i
< scop
->n_array
; ++i
) {
506 struct pet_array
*array
= scop
->arrays
[i
];
510 if (array
->element_is_record
)
513 set
= isl_set_copy(array
->extent
);
514 map
= isl_set_identity(isl_set_copy(set
));
516 while (set
&& isl_set_is_wrapping(set
)) {
520 id
= isl_set_get_tuple_id(set
);
521 wrapped
= isl_set_unwrap(set
);
522 wrapped
= isl_map_domain_map(wrapped
);
523 wrapped
= isl_map_set_tuple_id(wrapped
, isl_dim_in
, id
);
524 map
= isl_map_apply_domain(map
, wrapped
);
525 set
= isl_map_domain(isl_map_copy(map
));
528 map
= isl_map_gist_domain(map
, set
);
530 to_inner
= isl_union_map_add_map(to_inner
, map
);
536 /* Construct a gpu_array_info for each array accessed by "prog" and
537 * collect them in prog->array.
539 * If there are any member accesses involved, then they are first mapped
540 * to the outer arrays of structs.
542 static int collect_array_info(struct gpu_prog
*prog
)
545 isl_union_set
*arrays
;
547 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
548 arrays
= isl_union_set_union(arrays
,
549 isl_union_map_range(isl_union_map_copy(prog
->write
)));
551 arrays
= isl_union_set_apply(arrays
,
552 isl_union_map_copy(prog
->to_outer
));
554 arrays
= isl_union_set_coalesce(arrays
);
556 prog
->n_array
= isl_union_set_n_set(arrays
);
557 prog
->array
= isl_calloc_array(prog
->ctx
,
558 struct gpu_array_info
, prog
->n_array
);
561 r
= isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
562 isl_union_set_free(arrays
);
567 static void free_array_info(struct gpu_prog
*prog
)
571 for (i
= 0; i
< prog
->n_array
; ++i
) {
572 int n_index
= prog
->array
[i
].n_index
;
573 free(prog
->array
[i
].type
);
574 free(prog
->array
[i
].name
);
575 for (j
= 0; j
< n_index
; ++j
)
576 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
577 isl_space_free(prog
->array
[i
].space
);
578 isl_set_free(prog
->array
[i
].extent
);
579 free(prog
->array
[i
].bound
);
580 free(prog
->array
[i
].refs
);
585 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
586 * as an array or through a pointer reference, but as a single data element.
587 * At the moment, scalars are represented as zero-dimensional arrays.
588 * A zero-dimensional array containing structures is not considered
591 int gpu_array_is_scalar(struct gpu_array_info
*array
)
593 return !array
->has_compound_element
&& array
->n_index
== 0;
596 /* Is "array" a read-only scalar?
598 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
600 return array
->read_only_scalar
;
603 /* Internal data structure for extract_size_of_type.
604 * "type" specifies the name of the space that we want to extract.
605 * "res" is used to store the subset of that space.
607 struct ppcg_extract_size_data
{
612 /* This function is called for each set in a union_set.
613 * If the name of the set matches data->type, we store the
616 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
618 struct ppcg_extract_size_data
*data
= user
;
621 name
= isl_set_get_tuple_name(size
);
622 if (name
&& !strcmp(name
, data
->type
)) {
631 /* Given a union map { kernel[i] -> *[...] },
632 * return the range in the space called "type" for the kernel with
633 * sequence number "id".
635 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
636 const char *type
, int id
)
640 isl_union_set
*local_sizes
;
641 struct ppcg_extract_size_data data
= { type
, NULL
};
646 space
= isl_union_map_get_space(sizes
);
647 space
= isl_space_set_from_params(space
);
648 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
649 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
650 dom
= isl_set_universe(space
);
651 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
653 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
654 isl_union_map_copy(sizes
));
655 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
656 isl_union_set_free(local_sizes
);
660 /* Given a singleton set, extract the first (at most *len) elements
661 * of the single integer tuple into *sizes and update *len if needed.
663 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
671 dim
= isl_set_dim(set
, isl_dim_set
);
675 for (i
= 0; i
< *len
; ++i
) {
678 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
681 sizes
[i
] = isl_val_get_num_si(v
);
688 /* Extract user specified "tile" sizes from the "sizes" command line option,
689 * defaulting to option->tile_size in each dimension.
691 static void read_tile_sizes(struct gpu_gen
*gen
)
696 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
697 assert(gen
->tile_size
);
698 for (n
= 0; n
< gen
->tile_len
; ++n
)
699 gen
->tile_size
[n
] = gen
->options
->tile_size
;
701 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
702 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
704 if (gen
->n_parallel
> gen
->tile_len
)
705 gen
->n_parallel
= gen
->tile_len
;
708 /* Extract user specified "block" sizes from the "sizes" command line option,
709 * after filling in some potentially useful defaults.
711 static void read_block_sizes(struct gpu_gen
*gen
)
717 gen
->n_block
= (n
<= 3) ? n
: 3;
718 switch (gen
->n_block
) {
720 gen
->block_dim
[0] = 512;
723 gen
->block_dim
[0] = 32;
724 gen
->block_dim
[1] = 16;
727 gen
->block_dim
[0] = 32;
728 gen
->block_dim
[1] = 4;
729 gen
->block_dim
[2] = 4;
733 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
734 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
737 /* Extract user specified "grid" sizes from the "sizes" command line option,
738 * after filling in some potentially useful defaults.
740 static void read_grid_sizes(struct gpu_gen
*gen
)
742 int n
= gen
->n_parallel
;
745 gen
->n_grid
= (n
<= 2) ? n
: 2;
746 switch (gen
->n_grid
) {
748 gen
->grid_dim
[0] = 32768;
751 gen
->grid_dim
[0] = 256;
752 gen
->grid_dim
[1] = 256;
756 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
757 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
760 /* Extract user specified sizes from the "sizes" command line option
761 * after filling in some potentially useful defaults.
763 static void read_sizes(struct gpu_gen
*gen
)
765 read_tile_sizes(gen
);
766 read_block_sizes(gen
);
767 read_grid_sizes(gen
);
770 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
777 for (i
= 0; i
< n
; ++i
) {
778 struct gpu_stmt_access
*access
, *next
;
780 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
782 isl_id_free(access
->ref_id
);
783 isl_map_free(access
->access
);
787 isl_id_free(stmts
[i
].id
);
794 /* Construct a map from a domain of dimensionality "len"
795 * to a domain of dimensionality "len" + "tile_len" that tiles
796 * the "tile_len" coordinates starting at "first".
797 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
798 * "dim" prescribes the parameters.
800 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
801 int first
, int tile_len
, int *tile_size
)
808 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
809 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
810 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
811 ls
= isl_local_space_from_space(dim
);
813 for (i
= 0; i
< len
- tile_len
; ++i
) {
814 int j
= i
< first
? i
: i
+ tile_len
;
815 int k
= i
< first
? i
: i
+ 2 * tile_len
;
817 c
= isl_equality_alloc(isl_local_space_copy(ls
));
818 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
819 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
820 bmap
= isl_basic_map_add_constraint(bmap
, c
);
823 for (i
= 0; i
< tile_len
; ++i
) {
824 c
= isl_equality_alloc(isl_local_space_copy(ls
));
825 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
827 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
828 first
+ i
, tile_size
[i
]);
829 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
830 first
+ i
+ tile_len
, 1);
831 bmap
= isl_basic_map_add_constraint(bmap
, c
);
833 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
834 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
835 first
+ i
+ tile_len
, 1);
836 bmap
= isl_basic_map_add_constraint(bmap
, c
);
838 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
839 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
840 first
+ i
+ tile_len
, -1);
841 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
842 bmap
= isl_basic_map_add_constraint(bmap
, c
);
845 isl_local_space_free(ls
);
847 return isl_map_from_basic_map(bmap
);
850 /* Construct a map from a domain of dimensionality "len"
851 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
852 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
853 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
854 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
855 * that are projected out at the end.
856 * "dim" prescribes the parameters.
858 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
859 int first
, int wrap_len
, int *wrap_size
)
866 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
867 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
868 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
869 ls
= isl_local_space_from_space(dim
);
871 for (i
= 0; i
< len
; ++i
) {
872 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
874 c
= isl_equality_alloc(isl_local_space_copy(ls
));
875 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
876 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
877 bmap
= isl_basic_map_add_constraint(bmap
, c
);
880 for (i
= 0; i
< wrap_len
; ++i
) {
881 c
= isl_equality_alloc(isl_local_space_copy(ls
));
882 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
884 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
885 first
+ wrap_len
+ i
, 1);
886 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
887 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
888 bmap
= isl_basic_map_add_constraint(bmap
, c
);
890 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
891 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
892 first
+ wrap_len
+ i
, 1);
893 bmap
= isl_basic_map_add_constraint(bmap
, c
);
895 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
896 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
897 first
+ wrap_len
+ i
, -1);
898 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
899 bmap
= isl_basic_map_add_constraint(bmap
, c
);
902 isl_local_space_free(ls
);
904 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
905 first
+ 2 * wrap_len
, wrap_len
);
907 return isl_map_from_basic_map(bmap
);
910 /* Add "n" parameters named prefix%d.
912 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
913 int n
, const char *prefix
)
919 nparam
= isl_set_dim(set
, isl_dim_param
);
920 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
922 for (i
= 0; i
< n
; ++i
) {
923 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
924 set
= isl_set_set_dim_name(set
, isl_dim_param
,
931 /* Equate the "n" dimensions of "set" starting at "first" to
932 * freshly created parameters named prefix%d.
934 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
935 int first
, int n
, const char *prefix
)
940 nparam
= isl_set_dim(set
, isl_dim_param
);
942 set
= add_params(set
, n
, prefix
);
944 for (i
= 0; i
< n
; ++i
)
945 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
946 isl_dim_set
, first
+ i
);
951 /* Given a parameter space "space", create a set of dimension "len"
952 * of which the "n" dimensions starting at "first" are equated to
953 * freshly created parameters named prefix%d.
955 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
956 int len
, int first
, int n
, const char *prefix
)
960 space
= isl_space_set_from_params(space
);
961 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
962 set
= isl_set_universe(space
);
964 return parametrize(set
, first
, n
, prefix
);
967 /* Tile the B loops over the tile sizes and then tile/wrap
968 * the T1 loops over the blocks.
970 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
971 __isl_take isl_union_map
*sched
)
974 isl_map
*tiling
, *block_tiling
;
976 dim
= isl_union_map_get_space(sched
);
977 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
978 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
980 if (gen
->options
->wrap
)
981 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
982 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
984 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
985 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
987 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
989 tiling
= isl_map_apply_range(tiling
, block_tiling
);
991 sched
= isl_union_map_apply_range(sched
,
992 isl_union_map_from_map(tiling
));
994 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
999 /* Equate the "T1P" iterators in the tiled schedule "sched"
1000 * to the block dimensions.
1002 static __isl_give isl_union_map
*parametrize_tiled_schedule(
1003 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
1008 dim
= isl_union_map_get_space(sched
);
1009 par
= parametrization(dim
, gen
->tiled_len
,
1010 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
1011 sched
= isl_union_map_intersect_range(sched
,
1012 isl_union_set_from_set(par
));
1017 /* Tile/wrap the P1 loops over the threads.
1019 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
1020 __isl_take isl_union_map
*sched
)
1026 dim
= isl_union_map_get_space(sched
);
1028 if (gen
->options
->wrap
)
1029 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
1030 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1032 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
1033 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1034 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
1036 sched
= isl_union_map_apply_range(sched
,
1037 isl_union_map_from_map(tiling
));
1039 par
= parametrization(dim
, gen
->thread_tiled_len
,
1040 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1042 sched
= isl_union_map_intersect_range(sched
,
1043 isl_union_set_from_set(par
));
1045 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1050 /* If the user asked for it, scale the shared memory tile loops
1051 * (T1T and T2) of "sched" by gen->tile_size[i].
1052 * If we are not performing "wrapping", then additionally scale the T1P
1053 * loops by gen->grid_dim[i].
1055 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
1056 __isl_take isl_union_map
*sched
)
1060 isl_basic_map
*scale
;
1062 isl_local_space
*ls
;
1064 if (!gen
->options
->scale_tile_loops
)
1067 dim
= isl_union_map_get_space(sched
);
1068 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
1069 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
1070 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1071 ls
= isl_local_space_from_space(dim
);
1073 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
1076 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
1077 f
= gen
->tile_size
[i
- gen
->tile_first
];
1078 if (!gen
->options
->wrap
)
1079 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
1080 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
1081 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
1082 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
1085 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1086 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1087 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1088 scale
= isl_basic_map_add_constraint(scale
, c
);
1091 isl_local_space_free(ls
);
1093 sched
= isl_union_map_apply_range(sched
,
1094 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1099 /* If we are not performing "wrapping" and if the user asked for it,
1100 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1102 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1103 __isl_take isl_union_map
*sched
)
1107 isl_basic_map
*scale
;
1109 isl_local_space
*ls
;
1111 if (gen
->options
->wrap
)
1113 if (!gen
->options
->scale_tile_loops
)
1116 dim
= isl_union_map_get_space(sched
);
1117 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1118 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1119 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1120 ls
= isl_local_space_from_space(dim
);
1122 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1125 if (i
>= gen
->shared_len
&&
1126 i
< gen
->shared_len
+ gen
->n_block
)
1127 f
= gen
->block_dim
[i
- gen
->shared_len
];
1129 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1130 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1131 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1132 scale
= isl_basic_map_add_constraint(scale
, c
);
1135 isl_local_space_free(ls
);
1137 sched
= isl_union_map_apply_range(sched
,
1138 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1143 /* If we are not performing "wrapping" and if the user asked for it,
1144 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1146 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1147 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1151 isl_basic_map
*scale
;
1153 isl_local_space
*ls
;
1155 if (gen
->options
->wrap
)
1157 if (!gen
->options
->scale_tile_loops
)
1160 dim
= isl_union_map_get_space(sched
);
1161 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1162 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1163 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1164 ls
= isl_local_space_from_space(dim
);
1166 for (i
= 0; i
< len
; ++i
) {
1169 if (i
>= first
&& i
< first
+ n_tile
)
1170 f
= gen
->kernel
->block_dim
[i
- first
];
1172 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1173 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1174 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1175 scale
= isl_basic_map_add_constraint(scale
, c
);
1178 isl_local_space_free(ls
);
1180 sched
= isl_union_map_apply_range(sched
,
1181 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1186 /* Add "len" parameters p[i] called prefix%d,
1187 * with bounds to 0 <= p[i] < size[i].
1189 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1190 int len
, int *size
, const char *prefix
)
1195 isl_basic_set
*bset
;
1197 isl_local_space
*ls
;
1200 nparam
= isl_set_dim(set
, isl_dim_param
);
1201 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1203 for (i
= 0; i
< len
; ++i
) {
1204 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1205 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1209 dim
= isl_set_get_space(set
);
1210 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1211 ls
= isl_local_space_from_space(dim
);
1213 for (i
= 0; i
< len
; ++i
) {
1214 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1215 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1217 bset
= isl_basic_set_add_constraint(bset
, c
);
1219 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1220 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1222 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1223 bset
= isl_basic_set_add_constraint(bset
, c
);
1226 isl_local_space_free(ls
);
1228 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1231 /* Add "len" parameters p[i] called prefix%d,
1232 * with bounds to 0 <= p[i] < size[i].
1234 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1235 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1241 isl_local_space
*ls
;
1244 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1245 nparam
= isl_set_dim(set
, isl_dim_param
);
1246 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1248 for (i
= 0; i
< len
; ++i
) {
1249 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1250 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1254 space
= isl_space_params(isl_set_get_space(set
));
1255 ls
= isl_local_space_from_space(space
);
1256 for (i
= 0; i
< len
; ++i
) {
1257 isl_pw_aff
*param
, *size_i
, *zero
;
1260 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1261 isl_dim_param
, nparam
+ i
);
1263 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1264 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1265 set
= isl_set_intersect_params(set
, bound
);
1267 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1268 bound
= isl_pw_aff_ge_set(param
, zero
);
1269 set
= isl_set_intersect_params(set
, bound
);
1271 isl_local_space_free(ls
);
1276 /* Construct a map from an access to group->array to the corresponding
1277 * shared/private memory tile.
1278 * The map is of the form
1280 * { [D[i] -> A[a]] -> T[t] }
1282 * where D represents the initial shared_len dimensions
1283 * of the computed schedule.
1285 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1287 struct gpu_array_tile
*tile
;
1288 isl_multi_aff
*tiling
;
1290 tile
= group
->private_tile
;
1292 tile
= group
->shared_tile
;
1294 tiling
= isl_multi_aff_copy(tile
->tiling
);
1296 return isl_map_from_multi_aff(tiling
);
1299 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1301 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1307 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1310 fixed
= isl_val_is_int(v
);
1316 /* Given a schedule that iterates over all elements in a piece of an array,
1317 * perform tiling/wrapping over the threads.
1319 * In particular, we tile the final iterators so that the final thread
1320 * dimension runs over the final array dimension.
1321 * However, if those final iterators have only a single iteration,
1322 * we try to tile earlier iterators instead.
1324 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1325 __isl_take isl_map
*sched
)
1328 isl_union_map
*usched
;
1331 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1335 n_tile
= gen
->kernel
->n_block
;
1336 if (n_tile
> nvar
) {
1338 sched
= isl_map_insert_dims(sched
,
1339 isl_dim_out
, 0, n_tile
- nvar
);
1340 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1341 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1345 first
= nvar
- n_tile
;
1347 for (; first
> 0; first
--)
1348 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1351 dim
= isl_map_get_space(sched
);
1352 dim
= isl_space_params(dim
);
1353 if (gen
->options
->wrap
)
1354 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1355 n_tile
, gen
->kernel
->block_dim
);
1357 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1358 n_tile
, gen
->kernel
->block_dim
);
1359 sched
= isl_map_apply_range(sched
, tiling
);
1361 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1362 sched
= isl_map_intersect_range(sched
, par
);
1364 usched
= isl_union_map_from_map(sched
);
1365 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1367 sched
= isl_map_from_union_map(usched
);
1372 /* Return the union of all read (read = 1) and/or write (write = 1)
1373 * access relations in the group.
1375 static __isl_give isl_union_map
*group_access_relation(
1376 struct gpu_array_ref_group
*group
, int read
, int write
)
1379 isl_union_map
*access
;
1381 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1382 for (i
= 0; i
< group
->n_ref
; ++i
) {
1385 if (!((read
&& group
->refs
[i
]->read
) ||
1386 (write
&& group
->refs
[i
]->write
)))
1388 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1389 access
= isl_union_map_union(access
,
1390 isl_union_map_from_map(map_i
));
1396 /* Return the extent of "array", recomputed from the bounds.
1397 * The recomputed extent may be simpler than the original extent.
1399 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1404 isl_local_space
*ls
;
1407 id
= isl_set_get_tuple_id(array
->extent
);
1408 space
= isl_set_get_space(array
->extent
);
1409 extent
= isl_set_universe(isl_space_copy(space
));
1410 ls
= isl_local_space_from_space(space
);
1411 for (i
= 0; i
< array
->n_index
; ++i
) {
1417 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1419 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1421 index
= isl_pw_aff_from_aff(aff
);
1422 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1423 bound
= isl_pw_aff_from_range(bound
);
1424 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1425 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1427 lt
= isl_pw_aff_lt_set(index
, bound
);
1428 extent
= isl_set_intersect(extent
, lt
);
1430 isl_local_space_free(ls
);
1436 /* Return a map from the first shared_len dimensions of the computed
1437 * schedule to the array tile in
1438 * global memory that corresponds to the shared memory copy.
1440 * In particular, return a map
1446 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1450 * 0 <= a <= array_size - 1 (2)
1452 * Note that if some stride has been detected (i.e., when
1453 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1454 * to the shifted and scaled down version.
1456 * Constraints (1) are obtained by mapping the size constraints on the
1457 * shared/private memory tile back to the access relation.
1458 * Constraints (2) are obtained from the (recomputed) extent.
1460 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1463 int n_index
= group
->array
->n_index
;
1469 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1470 space
= isl_space_range(space
);
1471 local
= isl_set_universe(space
);
1472 for (i
= 0; i
< n_index
; ++i
) {
1475 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1476 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1477 bound
= isl_val_sub_ui(bound
, 1);
1478 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1480 local
= isl_set_preimage_multi_aff(local
,
1481 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1482 tile
= isl_set_unwrap(local
);
1483 extent
= array_extent(group
->array
);
1484 tile
= isl_map_intersect_range(tile
, extent
);
1489 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1490 * return the corresponding mapping from the AST schedule to
1491 * to the first shared_len dimensions of the schedule computed by PPCG.
1493 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1494 __isl_take isl_pw_multi_aff
*iterator_map
)
1496 isl_union_map
*umap
;
1498 isl_map
*map
, *sched
;;
1500 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1501 space
= isl_space_from_domain(space
);
1502 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1504 umap
= isl_union_map_copy(gen
->shared_sched
);
1505 umap
= isl_union_map_apply_range(umap
,
1506 isl_union_map_copy(gen
->shared_proj
));
1507 map
= isl_union_map_extract_map(umap
, space
);
1508 isl_union_map_free(umap
);
1510 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1511 sched
= isl_map_detect_equalities(sched
);
1513 return isl_pw_multi_aff_from_map(sched
);
1516 /* Set unroll[j] if the input dimension j is involved in
1517 * the index expression represented by ma.
1519 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1523 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1524 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1527 for (i
= 0; i
< n_out
; ++i
) {
1530 aff
= isl_multi_aff_get_aff(ma
, i
);
1531 for (j
= 0; j
< n_in
; ++j
)
1532 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1538 isl_multi_aff_free(ma
);
1542 /* Given an array pos mapping input dimensions to the corresponding
1543 * output dimension, construct the corresponding map.
1545 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1550 isl_basic_map
*bmap
;
1551 isl_local_space
*ls
;
1553 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1554 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1555 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1556 ls
= isl_local_space_from_space(dim
);
1558 for (i
= 0; i
< len
; ++i
) {
1559 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1560 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1562 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1564 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1566 isl_local_space_free(ls
);
1568 return isl_map_from_basic_map(bmap
);
1571 /* Find all loops involved in any of the index expressions for any of
1572 * the private accesses, move them innermost and then mark them as
1573 * requiring unrolling by setting gen->first_unroll.
1574 * The loops involved should all be parallel because of the checks
1575 * we performed in check_private_group_access. Moving them innermost
1576 * is therefore a valid transformation.
1578 * Loops up to gen->shared_len are generated before the mapping to
1579 * threads is applied. They should therefore be ignored.
1581 * We compute the hidden equalities of the schedule first
1582 * since we will need them in our calls to isl_pw_multi_aff_from_map
1583 * and because we want to make sure that the same equalities
1584 * are also available to the code generator.
1586 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1587 __isl_take isl_union_map
*sched
)
1590 int unroll
[gen
->thread_tiled_len
];
1591 int perm
[gen
->thread_tiled_len
];
1594 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1596 gen
->first_unroll
= -1;
1598 sched
= isl_union_map_detect_equalities(sched
);
1599 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1601 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1602 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1604 for (j
= 0; j
< array
->n_group
; ++j
) {
1605 isl_union_map
*access
;
1607 isl_pw_multi_aff
*pma
;
1609 if (!array
->groups
[j
]->private_tile
)
1612 access
= group_access_relation(array
->groups
[j
], 1, 1);
1613 access
= isl_union_map_apply_domain(access
,
1614 isl_union_map_copy(sched
));
1616 acc
= isl_map_from_union_map(access
);
1617 pma
= isl_pw_multi_aff_from_map(acc
);
1618 isl_pw_multi_aff_foreach_piece(pma
,
1619 &check_unroll
, unroll
);
1621 isl_pw_multi_aff_free(pma
);
1625 for (i
= gen
->shared_len
; i
< len
; ++i
)
1632 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1637 for (i
= 0; i
< gen
->shared_len
; ++i
)
1639 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1642 gen
->first_unroll
= j
- gen
->shared_len
;
1643 for (i
= gen
->shared_len
; i
< len
; ++i
)
1647 dim
= isl_union_map_get_space(sched
);
1648 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1649 sched
= isl_union_map_apply_range(sched
,
1650 isl_union_map_from_map(permute
));
1655 /* Given a constraint
1657 * a(p,i) + j = g f(e)
1659 * or -a(p,i) - j = g f(e) if sign < 0,
1660 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1661 * a(p,i) is assumed to be an expression in only the parameters
1662 * and the input dimensions.
1664 static void extract_stride(__isl_keep isl_constraint
*c
,
1665 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1674 isl_val_free(bound
->stride
);
1675 bound
->stride
= isl_val_copy(stride
);
1677 space
= isl_constraint_get_space(c
);
1678 space
= isl_space_domain(space
);
1680 nparam
= isl_space_dim(space
, isl_dim_param
);
1681 nvar
= isl_space_dim(space
, isl_dim_set
);
1683 v
= isl_constraint_get_constant_val(c
);
1686 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1687 aff
= isl_aff_set_constant_val(aff
, v
);
1689 for (i
= 0; i
< nparam
; ++i
) {
1690 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1692 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1695 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1698 for (i
= 0; i
< nvar
; ++i
) {
1699 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1701 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1704 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1710 /* Given an equality constraint of a map with a single output dimension j,
1711 * check if the constraint is of the form
1713 * a(p,i) + j = g f(e)
1715 * with a(p,i) an expression in the parameters and input dimensions
1716 * and f(e) an expression in the existentially quantified variables.
1717 * If so, and if g is larger than any such g from a previously considered
1718 * constraint, then call extract_stride to record the stride information
1721 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1727 struct gpu_array_bound
*bound
= user
;
1729 ctx
= isl_constraint_get_ctx(c
);
1730 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1731 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1733 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1734 int s
= isl_val_sgn(v
);
1735 isl_val
*stride
= isl_val_zero(ctx
);
1738 for (i
= 0; i
< n_div
; ++i
) {
1739 v
= isl_constraint_get_coefficient_val(c
,
1741 stride
= isl_val_gcd(stride
, v
);
1743 if (!isl_val_is_zero(stride
) &&
1744 isl_val_gt(stride
, bound
->stride
))
1745 extract_stride(c
, bound
, stride
, s
);
1747 isl_val_free(stride
);
1751 isl_constraint_free(c
);
1755 /* Given contraints on an array index i, check if we can find
1756 * a shift a(p) and a stride g such that
1758 * a(p) + i = 0 mod g
1760 * If so, record the information in bound and apply the mapping
1761 * i -> (i + a(p))/g to the array index in bounds and return
1762 * the new constraints.
1763 * If not, simply return the original constraints.
1765 * If bounds is a subset of the space
1769 * then the bound recorded in bound->shift is of the form
1773 * with s(D) equal to a(p) above.
1774 * The mapping recorded in bound->shift_map is of the form
1776 * [D -> i] -> [D -> (i + S(D))/g]
1778 * This mapping is computed as follows.
1779 * We first introduce "i" in the domain through precomposition
1780 * with [D -> i] -> D obtaining
1784 * Adding [D -> i] -> i produces
1786 * [D -> i] -> i + s(D)
1788 * and the domain product with [D -> i] -> D yields
1790 * [D -> i] -> [D -> i + s(D)]
1792 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1794 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1795 __isl_take isl_basic_map
*bounds
)
1798 isl_basic_map
*hull
;
1799 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1800 isl_basic_set
*bset
;
1803 bound
->stride
= NULL
;
1805 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1807 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1809 isl_basic_map_free(hull
);
1814 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1815 space
= isl_basic_map_get_space(bounds
);
1816 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1817 shift
= isl_basic_map_apply_range(bmap
, shift
);
1818 space
= isl_basic_map_get_space(bounds
);
1819 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1820 shift
= isl_basic_map_sum(id
, shift
);
1821 space
= isl_basic_map_get_space(bounds
);
1822 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1823 shift
= isl_basic_map_range_product(id
, shift
);
1825 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1826 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1827 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1828 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1829 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1830 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
1831 scale
= isl_basic_map_from_aff(aff
);
1832 scale
= isl_basic_map_product(id
, scale
);
1834 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
1835 bmap
= isl_basic_map_copy(bound
->shift_map
);
1836 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
1837 bounds
= isl_basic_set_unwrap(bset
);
1842 /* Data used in compute_array_dim_size and compute_size_in_direction.
1844 * pos is the position of the variable representing the array index,
1845 * i.e., the variable for which want to compute the size. This variable
1846 * is also the last variable in the set.
1848 struct gpu_size_info
{
1849 isl_basic_set
*bset
;
1850 struct gpu_array_bound
*bound
;
1854 /* Given a constraint from the basic set describing the bounds on
1855 * an array index, check if it is a lower bound, say m i >= b(x), and,
1856 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
1857 * upper bound. If so, and if this bound is smaller than any bound
1858 * derived from earlier constraints, set the size to this bound on
1859 * the expression and the lower bound to ceil(b(x)/m).
1861 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
1863 struct gpu_size_info
*size
= user
;
1870 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
1871 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1873 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
1874 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
1875 isl_constraint_free(c
);
1879 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
1880 aff
= isl_aff_ceil(aff
);
1882 lb
= isl_aff_copy(aff
);
1884 aff
= isl_aff_neg(aff
);
1885 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
1887 v
= isl_basic_set_max_val(size
->bset
, aff
);
1890 if (isl_val_is_int(v
)) {
1891 v
= isl_val_add_ui(v
, 1);
1892 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
1893 isl_val_free(size
->bound
->size
);
1894 size
->bound
->size
= isl_val_copy(v
);
1895 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
1896 isl_aff_free(size
->bound
->lb
);
1897 size
->bound
->lb
= isl_aff_copy(lb
);
1903 isl_constraint_free(c
);
1908 /* Given a basic map "bounds" that maps parameters and input dimensions
1909 * to a single output dimension, look for an expression in the parameters
1910 * and input dimensions such that the range of the output dimension shifted
1911 * by this expression is a constant.
1913 * In particular, we currently only consider lower bounds on the output
1914 * dimension as candidate expressions.
1916 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
1917 __isl_take isl_basic_map
*bounds
)
1919 struct gpu_size_info size
;
1921 bounds
= isl_basic_map_detect_equalities(bounds
);
1922 bounds
= check_stride(bound
, bounds
);
1928 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
1929 size
.bset
= isl_basic_map_wrap(bounds
);
1930 size
.bset
= isl_basic_set_flatten(size
.bset
);
1931 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
1932 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
1934 isl_basic_set_free(size
.bset
);
1936 return bound
->size
? 0 : -1;
1939 /* Check if we can find a memory tile for the given array
1940 * based on the given accesses, and if so, put the results in "tile".
1942 * We project the accesses on each index in turn and look for a parametric
1943 * offset such that the size is constant.
1945 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
1949 for (i
= 0; i
< tile
->n
; ++i
) {
1951 isl_basic_map
*hull
;
1953 access_i
= isl_map_copy(access
);
1954 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
1955 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
1956 1, tile
->n
- (i
+ 1));
1957 access_i
= isl_map_compute_divs(access_i
);
1958 hull
= isl_map_simple_hull(access_i
);
1959 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
1966 /* Construct a map with input the shared tile loops and the loops that
1967 * will be wrapped around the threads that relates these later loops
1968 * to the thread indices and then projects them out.
1970 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
1978 dim
= isl_union_map_get_space(gen
->shared_sched
);
1980 if (gen
->options
->wrap
)
1981 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1982 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1984 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
1985 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1989 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
1990 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1993 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
1994 priv
= isl_map_intersect_range(priv
, par
);
1996 dim
= isl_map_get_space(priv
);
1997 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
1998 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
1999 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2002 priv
= isl_map_apply_range(priv
, proj
);
2007 /* Construct a map from domain_dim to domain_dim that increments
2008 * the dimension at position "pos" and leaves all other dimensions
2011 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2014 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2016 isl_basic_map
*next
;
2017 isl_local_space
*ls
;
2019 dim
= isl_space_map_from_set(domain_dim
);
2020 next
= isl_basic_map_universe(isl_space_copy(dim
));
2021 ls
= isl_local_space_from_space(dim
);
2023 for (i
= 0; i
< len
; ++i
) {
2026 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2027 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2028 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2030 c
= isl_constraint_set_constant_si(c
, 1);
2031 next
= isl_basic_map_add_constraint(next
, c
);
2034 isl_local_space_free(ls
);
2036 return isl_map_from_basic_map(next
);
2039 /* Check if the given access is coalesced.
2040 * That is, check whether incrementing the dimension that will get
2041 * wrapped over the last thread index results in incrementing
2042 * the last array index.
2044 * This function is only called for access relations without reuse.
2046 static int access_is_coalesced(struct gpu_gen
*gen
,
2047 __isl_keep isl_union_map
*access
)
2050 isl_map
*access_map
;
2051 isl_map
*next_thread_x
;
2052 isl_map
*next_element
;
2056 access
= isl_union_map_copy(access
);
2057 access
= isl_union_map_apply_domain(access
,
2058 isl_union_map_copy(gen
->tiled_sched
));
2059 access_map
= isl_map_from_union_map(access
);
2061 dim
= isl_map_get_space(access_map
);
2062 dim
= isl_space_domain(dim
);
2063 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2065 dim
= isl_map_get_space(access_map
);
2066 dim
= isl_space_range(dim
);
2067 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2069 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2070 map
= isl_map_apply_range(map
, access_map
);
2072 coalesced
= isl_map_is_subset(map
, next_element
);
2074 isl_map_free(next_element
);
2080 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2081 * dimensions of the computed schedule, check if it is bijective for
2082 * fixed values of the first gen->shared_len dimensions.
2083 * We perform this check by equating these dimensions to parameters.
2085 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2091 access
= isl_map_copy(access
);
2092 space
= isl_space_params(isl_map_get_space(access
));
2093 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2094 0, gen
->shared_len
, "s");
2095 access
= isl_map_intersect_domain(access
, par
);
2096 res
= isl_map_is_bijective(access
);
2097 isl_map_free(access
);
2102 /* Look for the last shared tile loop that affects the offset of "tile"
2103 * and return the result.
2104 * If there is no such loop, then return the index of the loop
2105 * before the first shared tile loop, in particular gen->tile_first - 1.
2107 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2108 struct gpu_array_tile
*tile
)
2112 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2113 for (i
= 0; i
< tile
->n
; ++i
) {
2117 lb
= tile
->bound
[i
].lb
;
2118 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2121 shift
= tile
->bound
[i
].shift
;
2124 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2134 /* Look for the last shared tile loop that affects the offset of the
2135 * shared or private tile and store the result in group->last_shared.
2136 * If there is no such loop, then group->last_shared is set to a value
2137 * before the first shared tile loop, in particular gen->tile_first - 1.
2138 * If there is no tile defined on the array reference group,
2139 * then set group->last_shared to gen->shared_len - 1.
2141 static void set_last_shared(struct gpu_gen
*gen
,
2142 struct gpu_array_ref_group
*group
)
2144 struct gpu_array_tile
*tile
;
2146 group
->last_shared
= gen
->shared_len
- 1;
2148 tile
= group
->private_tile
;
2150 tile
= group
->shared_tile
;
2154 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2157 /* Compute a privatized copy of all access relations from reference groups that
2158 * are mapped to private memory and store the result in gen->privatization.
2160 * Read-only scalars and arrays containing structures are not mapped
2161 * to private memory.
2163 static void compute_private_access(struct gpu_gen
*gen
)
2166 isl_union_map
*private;
2168 if (!gen
->options
->use_private_memory
)
2171 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2173 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2174 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2176 if (gpu_array_is_read_only_scalar(array
))
2178 if (array
->has_compound_element
)
2181 for (j
= 0; j
< array
->n_group
; ++j
) {
2182 if (!array
->groups
[j
]->private_tile
)
2185 private = isl_union_map_union(private,
2186 group_access_relation(array
->groups
[j
], 1, 1));
2190 if (isl_union_map_is_empty(private))
2191 isl_union_map_free(private);
2193 isl_union_map
*priv
;
2195 private = isl_union_map_apply_domain(private,
2196 isl_union_map_copy(gen
->shared_sched
));
2197 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2198 private = isl_union_map_apply_domain(private, priv
);
2199 gen
->private_access
= private;
2203 /* Compute the size of the tile specified by "tile"
2204 * in number of elements and return the result.
2206 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2211 size
= isl_val_one(ctx
);
2213 for (i
= 0; i
< tile
->n
; ++i
)
2214 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2219 /* If max_shared_memory is not set to infinity (-1), then make
2220 * sure that the total amount of shared memory required by the
2221 * array reference groups mapped to shared memory is no larger
2222 * than this maximum.
2224 * We apply a greedy approach and discard (keep in global memory)
2225 * those groups that would result in a total memory size that
2226 * is larger than the maximum.
2228 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2231 isl_val
*left
, *size
;
2233 if (gen
->options
->max_shared_memory
< 0)
2236 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2238 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2239 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2241 for (j
= 0; j
< array
->n_group
; ++j
) {
2242 struct gpu_array_ref_group
*group
;
2244 group
= array
->groups
[j
];
2245 if (group
->private_tile
)
2247 if (!group
->shared_tile
)
2250 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2251 size
= isl_val_mul_ui(size
, array
->size
);
2253 if (isl_val_le(size
, left
)) {
2254 left
= isl_val_sub(left
, size
);
2259 group
->shared_tile
= free_tile(group
->shared_tile
);
2266 /* Given a description of an array tile "tile" and the "space"
2270 * where D represents the first shared_len schedule dimensions
2271 * and A represents the array, construct an isl_multi_aff
2273 * { [D[i] -> A[a]] -> A'[a'] }
2275 * with A' a scaled down copy of A according to the shifts and strides
2276 * in "tile". In particular,
2278 * a' = (a + shift(i))/stride
2280 * "insert_array" represents
2284 * and is used to insert A into the domain of functions that only
2287 static __isl_give isl_multi_aff
*strided_tile(
2288 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2289 __isl_keep isl_multi_aff
*insert_array
)
2293 isl_multi_aff
*shift
;
2294 isl_multi_val
*stride
;
2296 isl_local_space
*ls
;
2297 isl_multi_aff
*tiling
;
2299 ctx
= isl_space_get_ctx(space
);
2300 space2
= isl_space_domain(isl_space_copy(space
));
2301 ls
= isl_local_space_from_space(space2
);
2302 space2
= isl_space_range(isl_space_copy(space
));
2303 stride
= isl_multi_val_zero(space2
);
2304 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2306 for (i
= 0; i
< tile
->n
; ++i
) {
2307 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2311 if (tile
->bound
[i
].shift
) {
2312 stride_i
= isl_val_copy(bound
->stride
);
2313 shift_i
= isl_aff_copy(bound
->shift
);
2315 stride_i
= isl_val_one(ctx
);
2316 shift_i
= isl_aff_zero_on_domain(
2317 isl_local_space_copy(ls
));
2320 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2321 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2323 isl_local_space_free(ls
);
2325 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2326 isl_multi_aff_copy(insert_array
));
2328 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2329 tiling
= isl_multi_aff_add(tiling
, shift
);
2330 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2335 /* Compute a tiling for the array reference group "group".
2337 * The tiling is of the form
2339 * { [D[i] -> A[a]] -> T[t] }
2341 * where D represents the first shared_len schedule dimensions,
2342 * A represents the global array and T represents the shared or
2343 * private memory tile. The name of T is the name of the local
2346 * If there is any stride in the accesses, then the mapping is
2348 * t = (a + shift(i))/stride - lb(i)
2350 * otherwise, it is simply
2354 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2357 struct gpu_array_tile
*tile
;
2358 struct gpu_array_info
*array
= group
->array
;
2360 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2364 tile
= group
->private_tile
;
2366 tile
= group
->shared_tile
;
2370 space
= isl_map_get_space(group
->access
);
2371 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2373 for (i
= 0; i
< tile
->n
; ++i
)
2374 if (tile
->bound
[i
].shift
)
2378 tiling
= strided_tile(tile
, space
, insert_array
);
2380 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2382 lb
= isl_multi_aff_zero(space
);
2383 for (i
= 0; i
< tile
->n
; ++i
) {
2384 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2385 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2387 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2389 tiling
= isl_multi_aff_sub(tiling
, lb
);
2391 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2392 p
= print_array_name(p
, group
);
2393 local_name
= isl_printer_get_str(p
);
2394 isl_printer_free(p
);
2395 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2398 tile
->tiling
= tiling
;
2401 /* Compute a tiling for all the array reference groups.
2403 static void compute_group_tilings(struct gpu_gen
*gen
)
2407 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2408 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2410 for (j
= 0; j
< array
->n_group
; ++j
)
2411 compute_group_tiling(array
->groups
[j
]);
2415 /* Fill up the groups array with singleton groups, i.e., one group
2416 * per reference, initializing the array, access, write, n_ref and refs fields.
2417 * In particular the access field is initialized to the scheduled
2418 * access relation of the array reference.
2420 * Return the number of elements initialized, i.e., the number of
2421 * active references in the current kernel.
2423 static int populate_array_references(struct gpu_array_info
*array
,
2424 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2428 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2431 for (i
= 0; i
< array
->n_ref
; ++i
) {
2432 isl_union_map
*umap
;
2434 struct gpu_array_ref_group
*group
;
2435 struct gpu_stmt_access
*access
= array
->refs
[i
];
2437 map
= isl_map_copy(access
->access
);
2438 umap
= isl_union_map_from_map(map
);
2439 umap
= isl_union_map_apply_domain(umap
,
2440 isl_union_map_copy(sched
));
2442 if (isl_union_map_is_empty(umap
)) {
2443 isl_union_map_free(umap
);
2447 map
= isl_map_from_union_map(umap
);
2448 map
= isl_map_detect_equalities(map
);
2450 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2452 group
->array
= array
;
2453 group
->access
= map
;
2454 group
->write
= access
->write
;
2455 group
->refs
= &array
->refs
[i
];
2458 groups
[n
++] = group
;
2464 /* If group->n_ref == 1, then group->refs was set by
2465 * populate_array_references to point directly into
2466 * group->array->refs and should not be freed.
2467 * If group->n_ref > 1, then group->refs was set by join_groups
2468 * to point to a newly allocated array.
2470 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2474 free_tile(group
->shared_tile
);
2475 free_tile(group
->private_tile
);
2476 isl_map_free(group
->access
);
2477 if (group
->n_ref
> 1)
2482 /* Given a map where the input dimensions represent the tile loops,
2483 * eliminate the innermost of those that have a fixed value
2484 * until we reach one that does not (obviously) have a fixed value.
2486 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2487 __isl_take isl_map
*access
)
2491 n
= isl_map_dim(access
, isl_dim_in
);
2493 for (i
= n
- 1; i
>= 0; --i
) {
2494 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2496 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2501 /* Check if the access relations of group1 and group2 overlap within
2502 * the innermost loop. In particular, ignore any inner dimension
2503 * with a fixed value.
2504 * The copying to and from shared memory will be performed within
2505 * the innermost actual loop so we are only allowed to consider
2506 * the dimensions up to that innermost loop while checking whether
2507 * two access relations overlap.
2509 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2510 struct gpu_array_ref_group
*group2
)
2513 isl_map
*access1
, *access2
;
2515 access1
= isl_map_copy(group1
->access
);
2516 access1
= eliminate_fixed_inner_loops(access1
);
2517 access2
= isl_map_copy(group2
->access
);
2518 access2
= eliminate_fixed_inner_loops(access2
);
2519 access1
= isl_map_intersect(access1
, access2
);
2520 empty
= isl_map_is_empty(access1
);
2521 isl_map_free(access1
);
2526 /* Combine the given two groups into a single group, containing
2527 * the references of both groups.
2529 static struct gpu_array_ref_group
*join_groups(
2530 struct gpu_array_ref_group
*group1
,
2531 struct gpu_array_ref_group
*group2
)
2535 struct gpu_array_ref_group
*group
;
2537 ctx
= isl_map_get_ctx(group1
->access
);
2538 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2540 group
->array
= group1
->array
;
2541 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2542 isl_map_copy(group2
->access
));
2543 group
->write
= group1
->write
|| group2
->write
;
2544 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2545 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2547 assert(group
->refs
);
2548 for (i
= 0; i
< group1
->n_ref
; ++i
)
2549 group
->refs
[i
] = group1
->refs
[i
];
2550 for (i
= 0; i
< group2
->n_ref
; ++i
)
2551 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2556 /* Combine the given two groups into a single group and free
2557 * the original two groups.
2559 static struct gpu_array_ref_group
*join_groups_and_free(
2560 struct gpu_array_ref_group
*group1
,
2561 struct gpu_array_ref_group
*group2
)
2563 struct gpu_array_ref_group
*group
;
2565 group
= join_groups(group1
, group2
);
2566 free_array_ref_group(group1
);
2567 free_array_ref_group(group2
);
2571 /* Compute the private and/or shared memory tiles for the array
2572 * reference group "group" of array "array".
2574 * If the array is a read-only scalar or if the user requested
2575 * not to use shared or private memory, then we do not need to do anything.
2577 * We only try to compute a shared memory tile if there is any reuse
2578 * or if the access is not coalesced.
2580 * For computing a private memory tile, we also require that there is
2581 * some reuse. Moreover, we require that the access is private
2582 * to the thread. That is, we check that any given array element
2583 * is only accessed by a single thread.
2584 * We compute an access relation that maps the shared tile loop iterators
2585 * and the shared point loop iterators that will be wrapped over the
2586 * threads to the array elements.
2587 * We actually check that those iterators that will be wrapped
2588 * partition the array space. This check is stricter than necessary
2589 * since several iterations may be mapped onto the same thread
2590 * and then they could be allowed to access the same memory elements,
2591 * but our check does not allow this situation.
2593 * We also check that the index expression only depends on parallel
2594 * loops. That way, we can move those loops innermost and unroll them.
2595 * Again, we use a test that is stricter than necessary.
2596 * We actually check whether the index expression only depends
2597 * on the iterators that are wrapped over the threads.
2598 * These are necessarily parallel, but there may be more parallel loops.
2600 * Combining the injectivity of the first test with the single-valuedness
2601 * of the second test, we simply test for bijectivity.
2603 * If it turns out we can use registers, we compute the private memory
2604 * tile size using can_tile, after introducing a dependence
2605 * on the thread indices.
2607 static void compute_group_bounds_core(struct gpu_gen
*gen
,
2608 struct gpu_array_ref_group
*group
)
2610 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->space
);
2611 isl_union_map
*access
;
2612 int n_index
= group
->array
->n_index
;
2615 int use_shared
= gen
->options
->use_shared_memory
;
2616 int use_private
= gen
->options
->use_private_memory
;
2618 if (!use_shared
&& !use_private
)
2620 if (gpu_array_is_read_only_scalar(group
->array
))
2623 access
= group_access_relation(group
, 1, 1);
2624 no_reuse
= isl_union_map_is_injective(access
);
2626 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2627 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2628 if (!can_tile(group
->access
, group
->shared_tile
))
2629 group
->shared_tile
= free_tile(group
->shared_tile
);
2632 if (!use_private
|| no_reuse
) {
2633 isl_union_map_free(access
);
2637 access
= isl_union_map_apply_domain(access
,
2638 isl_union_map_copy(gen
->shared_sched
));
2640 acc
= isl_map_from_union_map(access
);
2642 if (!access_is_bijective(gen
, acc
)) {
2647 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2648 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2649 if (!can_tile(acc
, group
->private_tile
))
2650 group
->private_tile
= free_tile(group
->private_tile
);
2655 /* Compute the private and/or shared memory tiles for the array
2656 * reference group "group" of array "array" and set last_shared.
2658 static void compute_group_bounds(struct gpu_gen
*gen
,
2659 struct gpu_array_ref_group
*group
)
2661 compute_group_bounds_core(gen
, group
);
2662 set_last_shared(gen
, group
);
2665 /* If two groups have overlapping access relations (as determined by
2666 * the "overlap" function) and if one of them involves a write,
2667 * then merge the two groups into one.
2668 * If "compute_bounds" is set, then call compute_group_bounds
2669 * on the merged groups.
2671 * Return the updated number of groups.
2673 static int group_writes(struct gpu_gen
*gen
,
2674 int n
, struct gpu_array_ref_group
**groups
,
2675 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2676 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2680 for (i
= 0; i
< n
; ++i
) {
2681 for (j
= n
- 1; j
> i
; --j
) {
2682 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2685 if (!overlap(groups
[i
], groups
[j
]))
2688 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2690 compute_group_bounds(gen
, groups
[i
]);
2692 groups
[j
] = groups
[n
- 1];
2700 /* If two groups have overlapping access relations (within the innermost
2701 * loop) and if one of them involves a write, then merge the two groups
2704 * Return the updated number of groups.
2706 static int group_overlapping_writes(struct gpu_gen
*gen
,
2707 int n
, struct gpu_array_ref_group
**groups
)
2709 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2712 /* Check if the access relations of group1 and group2 overlap within
2713 * the outermost min(group1->last_shared, group2->last_shared) loops.
2715 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2716 struct gpu_array_ref_group
*group2
)
2721 isl_map
*map_i
, *map_j
, *map
;
2723 last_shared
= group1
->last_shared
;
2724 if (group2
->last_shared
< last_shared
)
2725 last_shared
= group2
->last_shared
;
2726 map_i
= isl_map_copy(group1
->access
);
2727 dim
= isl_map_dim(map_i
, isl_dim_in
);
2728 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2729 last_shared
+ 1, dim
- (last_shared
+ 1));
2730 map_j
= isl_map_copy(group2
->access
);
2731 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2732 last_shared
+ 1, dim
- (last_shared
+ 1));
2733 map
= isl_map_intersect(map_i
, map_j
);
2734 empty
= isl_map_is_empty(map
);
2740 /* If two groups have overlapping access relations (within the outer
2741 * last_shared loops) and if one of them involves a write,
2742 * then merge the two groups into one.
2744 * Return the updated number of groups.
2746 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2747 struct gpu_array_ref_group
**groups
)
2749 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2752 /* Is the size of the tile specified by "tile" smaller than the sum of
2753 * the sizes of the tiles specified by "tile1" and "tile2"?
2755 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2756 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2759 isl_val
*size
, *size1
, *size2
;
2761 size
= tile_size(ctx
, tile
);
2762 size1
= tile_size(ctx
, tile1
);
2763 size2
= tile_size(ctx
, tile2
);
2765 size
= isl_val_sub(size
, size1
);
2766 size
= isl_val_sub(size
, size2
);
2767 smaller
= isl_val_is_neg(size
);
2774 /* Given an initial grouping of array references and shared memory tiles
2775 * for each group that allows for a shared memory tile, merge two groups
2776 * if both have a shared memory tile, the merged group also has
2777 * a shared memory tile and the size of the tile for the merge group
2778 * is smaller than the sum of the tile sizes of the individual groups.
2780 * If merging two groups decreases the "last_shared" dimension of
2781 * one or both of the two groups, then we need to check for overlapping
2784 * Return the number of groups after merging.
2786 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2787 struct gpu_array_info
*array
, int n
,
2788 struct gpu_array_ref_group
**groups
)
2791 int recompute_overlap
= 0;
2792 isl_ctx
*ctx
= isl_space_get_ctx(array
->space
);
2794 for (i
= 0; i
< n
; ++i
) {
2795 if (!groups
[i
]->shared_tile
)
2797 for (j
= n
- 1; j
> i
; --j
) {
2800 struct gpu_array_ref_group
*group
;
2802 if (!groups
[j
]->shared_tile
)
2805 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
2806 isl_map_copy(groups
[j
]->access
));
2807 empty
= isl_map_is_empty(map
);
2813 group
= join_groups(groups
[i
], groups
[j
]);
2814 compute_group_bounds(gen
, group
);
2815 if (!group
->shared_tile
||
2816 !smaller_tile(ctx
, group
->shared_tile
,
2817 groups
[i
]->shared_tile
,
2818 groups
[j
]->shared_tile
)) {
2819 free_array_ref_group(group
);
2823 if (group
->last_shared
< groups
[i
]->last_shared
||
2824 group
->last_shared
< groups
[j
]->last_shared
)
2825 recompute_overlap
= 1;
2826 free_array_ref_group(groups
[i
]);
2827 free_array_ref_group(groups
[j
]);
2830 groups
[j
] = groups
[n
- 1];
2835 if (recompute_overlap
)
2836 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2840 /* Set array->n_group and array->groups to n and groups.
2842 * Additionally, set the "nr" field of each group
2843 * and the "group" field of each reference in each group.
2845 static void set_array_groups(struct gpu_array_info
*array
,
2846 int n
, struct gpu_array_ref_group
**groups
)
2851 array
->groups
= groups
;
2853 for (i
= 0; i
< n
; ++i
) {
2856 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
2857 groups
[i
]->refs
[j
]->group
= i
;
2861 /* Group array references that should be considered together when
2862 * deciding whether to access them from private, shared or global memory.
2864 * In particular, if two array references overlap and if one of them
2865 * is a write, then the two references are grouped together.
2866 * We first perform an initial grouping based only on the access relation.
2867 * After computing shared and private memory tiles, we check for
2868 * overlapping writes again, but this time taking into account
2869 * the "last_shared" property.
2871 * Furthermore, if two groups admit a shared memory tile and if the
2872 * combination of the two also admits a shared memory tile, we merge
2875 * If the array contains structures, then there is no need to compute
2876 * reference groups since we do not map such arrays to private or shared
2879 static void group_array_references(struct gpu_gen
*gen
,
2880 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
2884 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2885 struct gpu_array_ref_group
**groups
;
2887 if (array
->has_compound_element
)
2890 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
2894 n
= populate_array_references(array
, sched
, groups
);
2896 n
= group_overlapping_writes(gen
, n
, groups
);
2898 for (i
= 0; i
< n
; ++i
)
2899 compute_group_bounds(gen
, groups
[i
]);
2901 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
2903 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
2905 set_array_groups(array
, n
, groups
);
2908 /* Take tiled_sched, project it onto the shared tile loops and
2909 * the loops that will be wrapped over the threads and
2910 * store the result in gen->shared_sched.
2911 * Also compute a projection that projects out the loops that will be
2912 * wrapped over the threads and store this projection in gen->shared_proj.
2914 static void compute_shared_sched(struct gpu_gen
*gen
)
2919 isl_union_map
*sched
;
2921 sched
= isl_union_map_copy(gen
->tiled_sched
);
2923 dim
= isl_union_map_get_space(sched
);
2924 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
2925 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2927 dim
= isl_union_map_get_space(sched
);
2928 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
2930 gen
->shared_sched
= sched
;
2931 gen
->shared_proj
= isl_union_map_from_map(proj
);
2934 /* Group references of all arrays in the program.
2936 static void group_references(struct gpu_gen
*gen
)
2939 isl_union_map
*sched
;
2941 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2942 isl_union_map_copy(gen
->shared_proj
));
2944 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
2945 group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
2947 isl_union_map_free(sched
);
2950 /* Free all array information that is local to the current kernel.
2952 static void free_local_array_info(struct gpu_gen
*gen
)
2956 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2957 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2959 for (j
= 0; j
< array
->n_group
; ++j
)
2960 free_array_ref_group(array
->groups
[j
]);
2961 free(array
->groups
);
2965 /* Compute the size of a bounding box around the origin and "set",
2966 * where "set" is assumed to contain only non-negative elements.
2967 * In particular, compute the maximal value of "set" in each direction
2970 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
2971 __isl_keep isl_set
*context
)
2974 isl_multi_pw_aff
*mpa
;
2976 n
= isl_set_dim(set
, isl_dim_set
);
2977 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
2978 for (i
= 0; i
< n
; ++i
) {
2983 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
2984 bound
= isl_pw_aff_coalesce(bound
);
2985 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
2987 space
= isl_pw_aff_get_domain_space(bound
);
2988 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2989 one
= isl_aff_add_constant_si(one
, 1);
2990 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
2991 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
2998 /* Compute the effective grid size as a list of the sizes in each dimension.
3000 * The grid size specified by the user or set by default
3001 * in read_grid_sizes() and applied in tile_schedule(),
3002 * may be too large for the given code in the sense that
3003 * it may contain blocks that don't need to execute anything.
3004 * We therefore don't return this grid size, but instead the
3005 * smallest grid size that ensures that all blocks that actually
3006 * execute code are included in the grid.
3008 * We first extract a description of the grid, i.e., the possible values
3009 * of the block ids, from gen->tiled_sched.
3010 * The block ids are parameters in gen->tiled_sched.
3011 * We simply need to change them into set dimensions.
3013 * Then, for each block dimension, we compute the maximal value of the block id
3016 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
3017 struct ppcg_kernel
*kernel
)
3022 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
3023 grid
= isl_set_from_params(grid
);
3024 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
3025 for (i
= 0; i
< gen
->n_grid
; ++i
) {
3029 snprintf(name
, sizeof(name
), "b%d", i
);
3030 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
3032 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
3033 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
3036 return extract_size(grid
, kernel
->context
);
3039 /* Compute the size of a fixed bounding box around the origin and "set",
3040 * where "set" is assumed to contain only non-negative elements,
3041 * and store the results in "size".
3042 * In particular, compute the maximal value of "set" in each direction
3045 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
3048 isl_local_space
*ls
;
3051 n
= isl_set_dim(set
, isl_dim_set
);
3052 ls
= isl_local_space_from_space(isl_set_get_space(set
));
3053 obj
= isl_aff_zero_on_domain(ls
);
3054 for (i
= 0; i
< n
; ++i
) {
3057 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
3058 max
= isl_set_max_val(set
, obj
);
3059 size
[i
] = isl_val_get_num_si(max
) + 1;
3061 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
3067 /* Compute the effective block size as a list of the sizes in each dimension
3068 * and store the sizes in kernel->block_dim.
3070 * The block size specified by the user or set by default
3071 * in read_block_sizes() and applied in thread_tile_schedule(),
3072 * may be too large for the given code in the sense that
3073 * it may contain threads that don't need to execute anything.
3074 * We therefore don't store this block size in kernel->block_dim,
3075 * but instead the smallest block size that ensures that all threads
3076 * that actually execute code are included in the block.
3078 * The current implementation eliminates all parameters, ensuring
3079 * that the size is a fixed constant in each dimension.
3080 * In principle we could also compute parametric sizes.
3081 * We would have to make sure to project out all b%d and t%d parameters,
3084 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3089 isl_multi_pw_aff
*mpa
;
3091 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3092 block
= isl_set_from_params(block
);
3093 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3094 kernel
->n_block
= gen
->n_block
;
3095 for (i
= 0; i
< gen
->n_block
; ++i
) {
3099 snprintf(name
, sizeof(name
), "t%d", i
);
3100 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3102 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3105 nparam
= isl_set_dim(block
, isl_dim_param
);
3106 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3108 extract_fixed_size(block
, kernel
->block_dim
);
3111 void ppcg_kernel_free(void *user
)
3113 struct ppcg_kernel
*kernel
= user
;
3119 isl_multi_pw_aff_free(kernel
->grid_size
);
3120 isl_set_free(kernel
->context
);
3121 isl_union_set_free(kernel
->arrays
);
3122 isl_space_free(kernel
->space
);
3123 isl_ast_node_free(kernel
->tree
);
3125 for (i
= 0; i
< kernel
->n_array
; ++i
)
3126 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3127 free(kernel
->array
);
3129 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3130 free(kernel
->var
[i
].name
);
3131 isl_vec_free(kernel
->var
[i
].size
);
3138 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3139 struct ppcg_kernel_var
*var
)
3142 struct gpu_array_tile
*tile
;
3146 var
->array
= group
->array
;
3148 tile
= group
->private_tile
;
3149 var
->type
= ppcg_access_private
;
3151 tile
= group
->shared_tile
;
3152 var
->type
= ppcg_access_shared
;
3155 p
= isl_printer_to_str(ctx
);
3156 p
= print_array_name(p
, group
);
3157 var
->name
= isl_printer_get_str(p
);
3158 isl_printer_free(p
);
3160 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3162 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3163 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3164 isl_val_copy(tile
->bound
[j
].size
));
3167 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3172 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3173 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3175 for (j
= 0; j
< array
->n_group
; ++j
) {
3176 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3177 if (group
->private_tile
|| group
->shared_tile
)
3183 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3184 assert(kernel
->var
);
3187 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3188 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3190 for (j
= 0; j
< array
->n_group
; ++j
) {
3191 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3192 if (!group
->private_tile
&& !group
->shared_tile
)
3194 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3200 /* The sizes of the arrays on the host that have been computed by
3201 * extract_array_info may depend on the parameters. Use the extra
3202 * constraints on the parameters that are valid at "host_domain"
3203 * to simplify these expressions and store the results in kernel->array.
3205 * We only need these localized bounds for arrays that are accessed
3206 * by the current kernel. If we have found at least one reference group
3207 * then the array is accessed by the kernel. If the array has compound
3208 * elements then we skipped the construction of array reference groups.
3210 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3211 __isl_keep isl_set
*host_domain
)
3216 kernel
->array
= isl_calloc_array(gen
->ctx
,
3217 struct gpu_local_array_info
, gen
->prog
->n_array
);
3218 assert(kernel
->array
);
3219 kernel
->n_array
= gen
->prog
->n_array
;
3221 context
= isl_set_copy(host_domain
);
3222 context
= isl_set_params(context
);
3224 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3225 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3226 isl_pw_aff_list
*local
;
3228 if (array
->n_group
== 0 && !array
->has_compound_element
)
3231 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3233 for (j
= 0; j
< array
->n_index
; ++j
) {
3236 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3237 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3238 local
= isl_pw_aff_list_add(local
, pwaff
);
3241 kernel
->array
[i
].bound
= local
;
3243 isl_set_free(context
);
3246 /* Find the element in gen->stmt that has the given "id".
3247 * Return NULL if no such gpu_stmt can be found.
3249 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3253 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3254 if (id
== prog
->stmts
[i
].id
)
3258 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3261 /* Set gen->tile_len and gen->n_parallel to those of the statement
3262 * affected by the first map (part of the schedule)
3263 * on which this function is called.
3264 * Because of the way the schedule is constructed, the other statements
3265 * in the list, if any, should have the same values for these properties.
3267 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3269 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3271 struct gpu_stmt
*stmt
;
3273 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3274 stmt
= find_stmt(gen
->prog
, id
);
3280 isl_die(gen
->ctx
, isl_error_unknown
,
3281 "statement not found", return -1);
3283 gen
->tile_len
= stmt
->tile_len
;
3284 gen
->n_parallel
= stmt
->n_parallel
;
3289 void ppcg_kernel_stmt_free(void *user
)
3292 struct ppcg_kernel_stmt
*stmt
= user
;
3297 switch (stmt
->type
) {
3298 case ppcg_kernel_copy
:
3299 isl_ast_expr_free(stmt
->u
.c
.index
);
3300 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3302 case ppcg_kernel_domain
:
3303 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3305 case ppcg_kernel_sync
:
3312 /* Set the options of "context" to
3314 * { space -> [x] : x >= first }
3316 static __isl_give isl_ast_build
*set_unroll(
3317 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3324 ctx
= isl_ast_build_get_ctx(build
);
3326 space
= isl_space_from_domain(space
);
3327 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3328 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3329 unroll
= isl_map_universe(space
);
3330 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3331 opt
= isl_union_map_from_map(unroll
);
3333 build
= isl_ast_build_set_options(build
, opt
);
3338 /* Return a list of isl_ids of the form "prefix%d".
3340 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3341 int n
, const char *prefix
)
3347 names
= isl_id_list_alloc(ctx
, n
);
3348 for (i
= 0; i
< n
; ++i
) {
3351 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3352 id
= isl_id_alloc(ctx
, name
, NULL
);
3353 names
= isl_id_list_add(names
, id
);
3359 /* Extend the schedule "schedule" with the part of "extension"
3360 * starting at "first" up to "len".
3362 static __isl_give isl_union_map
*extend_schedule(
3363 __isl_take isl_union_map
*schedule
,
3364 __isl_take isl_union_map
*extension
, int first
, int len
)
3368 isl_union_map
*umap
;
3371 space
= isl_union_map_get_space(schedule
);
3372 space
= isl_space_set_from_params(space
);
3373 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3374 proj
= isl_set_identity(isl_set_universe(space
));
3375 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3376 extension
= isl_union_map_apply_range(extension
,
3377 isl_union_map_from_map(proj
));
3379 schedule
= isl_union_map_range_product(schedule
, extension
);
3384 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3387 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3388 __isl_keep isl_id
*ref_id
)
3390 struct gpu_stmt_access
*access
;
3392 for (access
= accesses
; access
; access
= access
->next
)
3393 if (access
->ref_id
== ref_id
)
3399 /* Return the index of the array called "name" in the list of arrays.
3401 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3405 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3406 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3412 /* Internal data structure for the index and AST expression transformation
3413 * callbacks for pet_stmt_build_ast_exprs.
3415 * "accesses" is the list of gpu_stmt_access in the statement.
3416 * "iterator_map" expresses the statement iterators in terms of
3417 * the AST loop iterators.
3418 * "sched2shared" expresses the first shared_len dimensions of
3419 * the computed schedule in terms of the AST loop iterators.
3421 * The following fields are set in transform_index and used in transform_expr.
3422 * "array" is the array that is being accessed.
3423 * "global" is set if the global array is accessed (rather than
3424 * shared/private memory).
3425 * "local_array" refers to information on the array specialized
3426 * to the current kernel.
3428 struct ppcg_transform_data
{
3429 struct gpu_gen
*gen
;
3430 struct gpu_stmt_access
*accesses
;
3431 isl_pw_multi_aff
*iterator_map
;
3432 isl_pw_multi_aff
*sched2shared
;
3434 struct gpu_array_info
*array
;
3436 struct gpu_local_array_info
*local_array
;
3439 /* Return the name of the outer array (of structs) accessed by "access".
3441 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
3446 space
= isl_space_range(isl_map_get_space(access
));
3447 while (space
&& isl_space_is_wrapping(space
))
3448 space
= isl_space_domain(isl_space_unwrap(space
));
3449 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
3450 isl_space_free(space
);
3455 /* Index transformation callback for pet_stmt_build_ast_exprs.
3457 * "index" expresses the array indices in terms of statement iterators
3459 * We first reformulate "index" in terms of the AST loop iterators.
3460 * Then we check if we are accessing the global array or
3461 * a shared/private copy. In the former case, we simply return
3462 * the updated index. If "index" is an affine expression rather
3463 * than an array access, then we also return the updated index here.
3465 * If no reference groups have been computed for the array,
3466 * then we can only be accessing the global array.
3468 * Otherwise, we apply the tiling to the index.
3469 * This tiling is of the form
3473 * The index is of the form
3477 * We update the tiling to refer to the AST loop iteratos
3481 * and modify index to keep track of those iterators
3485 * Combining these two yields a tiled index expression in terms
3486 * of the AST loop iterators
3490 static __isl_give isl_multi_pw_aff
*transform_index(
3491 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3494 struct ppcg_transform_data
*data
= user
;
3495 struct gpu_stmt_access
*access
;
3496 struct gpu_array_ref_group
*group
;
3497 struct gpu_array_tile
*tile
;
3498 isl_pw_multi_aff
*iterator_map
;
3502 isl_multi_pw_aff
*tiling
;
3503 isl_pw_multi_aff
*pma
;
3504 isl_multi_pw_aff
*mpa
;
3508 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3509 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3511 access
= find_access(data
->accesses
, ref_id
);
3514 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3517 name
= get_outer_array_name(access
->access
);
3518 i
= find_array_index(data
->gen
, name
);
3520 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3521 "cannot find array",
3522 return isl_multi_pw_aff_free(index
));
3523 data
->array
= &data
->gen
->prog
->array
[i
];
3524 data
->local_array
= &data
->gen
->kernel
->array
[i
];
3526 if (access
->group
< 0) {
3531 group
= data
->array
->groups
[access
->group
];
3532 tile
= group
->private_tile
;
3534 tile
= group
->shared_tile
;
3535 data
->global
= !tile
;
3539 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3540 space
= isl_space_map_from_set(space
);
3541 pma
= isl_pw_multi_aff_identity(space
);
3542 pma
= isl_pw_multi_aff_product(
3543 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3544 tiling
= isl_multi_pw_aff_from_multi_aff(
3545 isl_multi_aff_copy(tile
->tiling
));
3546 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3548 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3549 space
= isl_space_map_from_set(space
);
3550 mpa
= isl_multi_pw_aff_identity(space
);
3551 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3552 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3557 /* Dereference "expr" by adding an index [0].
3558 * The original "expr" is assumed not to have any indices.
3560 * If "expr" is a member access, then the dereferencing needs
3561 * to be applied to the structure argument of this member access.
3563 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3567 isl_ast_expr_list
*list
;
3569 if (isl_ast_expr_get_op_type(expr
) == isl_ast_op_member
) {
3572 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3573 arg
= dereference(arg
);
3574 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg
);
3579 ctx
= isl_ast_expr_get_ctx(expr
);
3580 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3581 list
= isl_ast_expr_list_from_ast_expr(res
);
3582 res
= isl_ast_expr_get_op_arg(expr
, 0);
3583 res
= isl_ast_expr_access(res
, list
);
3584 isl_ast_expr_free(expr
);
3589 /* Linearize the index expression "expr" based on the array bounds
3592 * That is, transform expression
3594 * A[i_0][i_1]...[i_n]
3598 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
3600 * where b_0, b_1, ..., b_n are the bounds on the array.
3602 * If the base of "expr" is a member access, then the linearization needs
3603 * to be applied to the structure argument of this member access.
3605 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
3606 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
3613 isl_ast_expr_list
*list
;
3614 isl_ast_build
*build
;
3616 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
3617 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
3618 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
3621 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
3622 arg
= gpu_local_array_info_linearize_index(array
, arg
);
3623 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
3624 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
3628 isl_ast_expr_free(arg0
);
3630 ctx
= isl_ast_expr_get_ctx(expr
);
3631 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
3632 build
= isl_ast_build_from_context(context
);
3634 n
= isl_ast_expr_get_op_n_arg(expr
);
3635 res
= isl_ast_expr_get_op_arg(expr
, 1);
3636 for (i
= 2; i
< n
; ++i
) {
3637 isl_pw_aff
*bound_i
;
3638 isl_ast_expr
*expr_i
;
3640 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
- 1);
3641 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
3642 res
= isl_ast_expr_mul(res
, expr_i
);
3643 expr_i
= isl_ast_expr_get_op_arg(expr
, i
);
3644 res
= isl_ast_expr_add(res
, expr_i
);
3647 isl_ast_build_free(build
);
3649 list
= isl_ast_expr_list_from_ast_expr(res
);
3650 res
= isl_ast_expr_get_op_arg(expr
, 0);
3651 res
= isl_ast_expr_access(res
, list
);
3653 isl_ast_expr_free(expr
);
3658 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
3660 * If the AST expression refers to a global scalar that is not
3661 * a read-only scalar, then its address was passed to the kernel and
3662 * we need to dereference it.
3664 * If the AST expression refers to an access to a global array,
3665 * then we linearize the access exploiting the bounds in data->local_array.
3667 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
3668 __isl_keep isl_id
*id
, void *user
)
3670 struct ppcg_transform_data
*data
= user
;
3674 if (gpu_array_is_read_only_scalar(data
->array
))
3678 if (data
->array
->n_index
== 0)
3679 return dereference(expr
);
3680 if (!data
->array
->linearize
)
3683 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
3686 /* This function is called for each instance of a user statement
3689 * We attach a struct ppcg_kernel_stmt to the "node", containing
3690 * a computed AST expression for each access.
3691 * These AST expressions are computed from iterator_map,
3692 * which expresses the domain
3693 * elements in terms of the generated loops, and sched2shared,
3694 * which expresses the first shared_len dimensions of the schedule
3695 * computed by PPCG in terms of the generated loops.
3697 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
3698 __isl_keep isl_ast_build
*build
, void *user
)
3700 struct ppcg_transform_data data
;
3701 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3702 struct ppcg_kernel_stmt
*stmt
;
3704 isl_pw_multi_aff
*sched2shared
;
3706 isl_pw_multi_aff
*iterator_map
;
3707 isl_ast_expr
*expr
, *arg
;
3708 isl_union_map
*schedule
;
3710 struct gpu_stmt_access
*access
;
3712 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3714 return isl_ast_node_free(node
);
3716 expr
= isl_ast_node_user_get_expr(node
);
3717 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3718 id
= isl_ast_expr_get_id(arg
);
3720 schedule
= isl_ast_build_get_schedule(build
);
3721 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
3722 iterator_map
= isl_pw_multi_aff_from_map(map
);
3723 sched2shared
= compute_sched_to_shared(gen
,
3724 isl_pw_multi_aff_copy(iterator_map
));
3726 stmt
->type
= ppcg_kernel_domain
;
3727 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
3728 if (!stmt
->u
.d
.stmt
)
3732 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
3733 data
.iterator_map
= iterator_map
;
3734 data
.sched2shared
= sched2shared
;
3735 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
3736 build
, &transform_index
, &data
,
3737 &transform_expr
, &data
);
3740 isl_pw_multi_aff_free(iterator_map
);
3741 isl_pw_multi_aff_free(sched2shared
);
3742 isl_ast_expr_free(arg
);
3743 isl_ast_expr_free(expr
);
3745 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3746 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3747 return isl_ast_node_set_annotation(node
, id
);
3750 isl_pw_multi_aff_free(iterator_map
);
3751 ppcg_kernel_stmt_free(stmt
);
3752 isl_pw_multi_aff_free(sched2shared
);
3753 return isl_ast_node_free(node
);
3756 /* This function is called when code has been generated for the shared
3757 * tile loops. The "schedule" refers only to the original statements.
3759 * We extend the schedule with that part of gen->local_sched that hasn't
3760 * been taken into account yet. This introduces parameters referring
3761 * to thread ids in the schedule, so we add them (with the appropriate
3762 * bounds to the context as well).
3763 * Finally, we set the appropriate unrolling options
3764 * if gen->first_unroll is set.
3766 static __isl_give isl_ast_node
*create_domain_leaf(
3767 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
3770 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3772 isl_union_map
*sched
;
3775 isl_id_list
*iterators
;
3778 schedule
= extend_schedule(schedule
,
3779 isl_union_map_copy(gen
->local_sched
),
3780 gen
->shared_len
, gen
->thread_tiled_len
);
3782 space
= isl_ast_build_get_schedule_space(build
);
3783 set
= isl_set_universe(space
);
3784 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3785 gen
->kernel
->block_dim
, "t");
3786 build
= isl_ast_build_restrict(build
, set
);
3788 n
= gen
->thread_tiled_len
- gen
->shared_len
;
3790 if (gen
->first_unroll
>= 0) {
3791 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
3792 build
= set_unroll(build
, space
, gen
->first_unroll
);
3794 iterators
= generate_names(gen
->ctx
, n
, "c");
3795 build
= isl_ast_build_set_iterators(build
, iterators
);
3796 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
3797 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
3798 isl_ast_build_free(build
);
3803 /* This function is called for each statement node in the AST of the code
3804 * for copying to or from shared/private memory.
3805 * Attach a pointer to a ppcg_kernel_stmt representing the copy
3806 * statement to the node.
3807 * The statement name is "read" or "write", depending on whether we are
3808 * reading from global memory or writing to global memory.
3809 * The name of the T space is {shared,private}_<array>.
3811 * The schedule is of the form
3815 * where A refers to a piece of an array and T to the corresponding
3816 * shifted tile. We split this schedule into mappings L -> A and L -> T
3817 * and store the corresponding expressions in stmt->index and stmt->local_index,
3818 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
3820 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
3821 __isl_keep isl_ast_build
*build
, void *user
)
3823 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3824 struct ppcg_kernel_stmt
*stmt
;
3828 isl_map
*access
, *local_access
, *map
;
3829 isl_pw_multi_aff
*pma
;
3833 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
3835 return isl_ast_node_free(node
);
3837 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
3838 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
3839 stmt
->u
.c
.read
= !strcmp(type
, "read");
3840 access
= isl_map_reverse(access
);
3841 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
3842 local_access
= isl_map_copy(access
);
3844 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
3845 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
3846 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3847 access
= isl_map_apply_range(access
, map
);
3848 pma
= isl_pw_multi_aff_from_map(access
);
3849 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
3850 stmt
->u
.c
.index
= expr
;
3852 map
= isl_map_range_map(isl_map_universe(space
));
3853 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
3854 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
3855 local_access
= isl_map_apply_range(local_access
, map
);
3856 pma
= isl_pw_multi_aff_from_map(local_access
);
3857 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
3858 stmt
->u
.c
.local_index
= expr
;
3860 stmt
->u
.c
.array
= gen
->copy_group
->array
;
3861 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
3862 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
3863 stmt
->type
= ppcg_kernel_copy
;
3865 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
3866 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
3867 return isl_ast_node_set_annotation(node
, id
);
3870 /* Given a schedule of the form
3874 * (with S the first shared_len dimensions of the computed schedule,
3875 * A the array and L the schedule correponding to the generated loops),
3876 * indicating where to copy the array elements that need to be copied,
3877 * construct code for performing the copying.
3879 * "group" is the array reference group that is being copied
3880 * "type" is either "read" or "write"
3881 * private is set if copying needs to be performed to/from registers
3883 * We first construct a mapping to a shifted tile of the array,
3885 * [S -> A] -> T(S,A) (1)
3887 * If private is set, then we also use this mapping as a schedule
3888 * (which is already thread-specific and will be completely unrolled).
3889 * Otherwise, we wrap/tile the range over the threads.
3892 * [S -> A] -> T'(S,A)
3894 * Combined with the given schedule, we have
3896 * [S -> A] -> [L -> T'(S,A)] (2)
3898 * From the shifted tile mapping, we construct a mapping
3900 * [S -> A] -> [A -> T(S,A)]
3902 * and apply it to the schedule (2), obtaining
3904 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
3906 * Note that we can project out S because it is uniquely defined by L.
3908 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
3909 __isl_take isl_map
*sched
,
3910 const char *type
, struct gpu_array_ref_group
*group
,
3911 __isl_take isl_ast_build
*build
, int private)
3915 isl_map
*schedule
, *shift
, *map
;
3917 isl_id_list
*iterators
;
3920 shift
= shift_access(group
);
3922 schedule
= isl_map_copy(shift
);
3923 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
3925 schedule
= tile_access_schedule(gen
, schedule
);
3927 n
= isl_map_dim(schedule
, isl_dim_out
);
3928 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
3929 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
3930 gen
->kernel
->block_dim
, "t");
3932 schedule
= isl_map_range_product(sched
, schedule
);
3934 space
= isl_space_domain(isl_map_get_space(shift
));
3935 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
3936 map
= isl_map_range_product(map
, shift
);
3938 schedule
= isl_map_apply_domain(schedule
, map
);
3940 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
3942 build
= isl_ast_build_restrict(build
, set
);
3944 gen
->copy_group
= group
;
3947 space
= isl_space_range(isl_map_get_space(schedule
));
3948 space
= isl_space_range(isl_space_unwrap(space
));
3949 build
= set_unroll(build
, space
, 0);
3951 iterators
= generate_names(gen
->ctx
, n
, "c");
3952 build
= isl_ast_build_set_iterators(build
, iterators
);
3953 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
3954 tree
= isl_ast_build_ast_from_schedule(build
,
3955 isl_union_map_from_map(schedule
));
3956 isl_ast_build_free(build
);
3961 /* Return code for reading into or writing from shared memory
3962 * the given array reference group.
3964 * If we are performing a read from global memory to shared memory and
3965 * if the array involved is not a scalar, then we copy
3966 * the entire tile to shared memory. This may result in some extra
3967 * elements getting copied, but it should lead to simpler code
3968 * (which means that fewer registers may be needed) and less divergence.
3970 * Otherwise, we only copy the elements that will be read or have been written
3974 * The input "sched" is of the form.
3978 * with S the first shared_len dimensions of the computed schedule,
3979 * A the array and L the schedule correponding to the generated loops.
3981 * We first drop "type",
3985 * If the above conditions are satisfied, we project out A,
3990 * and then introduce the group tile [S -> T], resulting in
3994 static __isl_give isl_ast_node
*copy_group_shared_accesses(
3995 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3996 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4000 isl_union_map
*access
;
4002 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4003 read
= !strcmp(type
, "read");
4005 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4007 if (read
&& !gpu_array_is_scalar(group
->array
)) {
4011 space
= isl_space_domain(isl_map_get_space(sched
));
4012 space
= isl_space_unwrap(space
);
4013 map
= isl_map_domain_map(isl_map_universe(space
));
4014 sched
= isl_map_apply_domain(sched
, map
);
4016 map
= group_tile(group
);
4017 map
= isl_map_reverse(isl_map_domain_map(map
));
4018 sched
= isl_map_apply_domain(sched
, map
);
4021 return copy_access(gen
, sched
, type
, group
, build
, 0);
4024 /* Return code for reading into or writing from private memory
4025 * the given array reference group.
4027 * Let S be the first shared_len dimensions of the computed schedule,
4028 * D the iteration domains, A the array and L the schedule correponding
4029 * to the generated loops.
4030 * "sched" is of the form
4034 * where type is either "read" or "write".
4035 * We apply the privatization D -> S(t), with t the thread ids,
4036 * to the access relation D -> A to obtain the privatized access relation
4040 * We drop the type from "sched" and intersect with the privatized access
4041 * relation to obtain
4045 static __isl_give isl_ast_node
*copy_group_private_accesses(
4046 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4047 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4051 isl_union_map
*priv
;
4052 isl_union_map
*access
;
4053 isl_map
*access_map
;
4055 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4056 read
= !strcmp(type
, "read");
4058 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
4059 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
4062 access
= group_access_relation(group
, read
, !read
);
4063 access
= isl_union_map_apply_domain(access
, priv
);
4064 access_map
= isl_map_from_union_map(access
);
4066 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4067 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
4069 return copy_access(gen
, sched
, type
, group
, build
, 1);
4072 /* Return code for reading into or writing from shared or private memory.
4074 * "schedule" is of the form
4078 * with S be the first shared_len dimensions of the computed schedule,
4079 * A the array and L the schedule correponding to the generated loops.
4080 * The array reference group is attached to "type".
4082 static __isl_give isl_ast_node
*create_access_leaf(
4083 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4084 __isl_take isl_ast_build
*build
)
4086 struct gpu_array_ref_group
*group
;
4089 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
4090 group
= isl_id_get_user(id
);
4093 if (group
->private_tile
)
4094 return copy_group_private_accesses(gen
, group
, schedule
,
4097 return copy_group_shared_accesses(gen
, group
, schedule
,
4101 /* Create a domain node representing a synchronization.
4103 static __isl_give isl_ast_node
*create_sync_leaf(
4104 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4105 __isl_take isl_ast_build
*build
)
4107 struct ppcg_kernel_stmt
*stmt
;
4113 isl_map_free(schedule
);
4115 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4119 stmt
->type
= ppcg_kernel_sync
;
4121 space
= isl_ast_build_get_schedule_space(build
);
4122 space
= isl_space_from_domain(space
);
4123 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
4124 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
4125 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
4126 node
= isl_ast_node_alloc_user(expr
);
4127 isl_ast_build_free(build
);
4129 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4130 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4131 return isl_ast_node_set_annotation(node
, id
);
4134 /* This function is called during the code generation at the point
4135 * where the schedule domain element is completely determined by
4136 * the generated code. The input schedule contains the original
4137 * statements as well as synchronization and copy "statements".
4138 * The latter are scheduled at different points than any of the original
4139 * statements, so they will only arrive here in isolation.
4141 * If the current schedule only refers to a single statement,
4142 * we check if it is a copy or synchronization statement and
4143 * call the appropriate functions.
4144 * Otherwise, we assume we are dealing with the original statements
4145 * and we call create_domain_leaf.
4147 static __isl_give isl_ast_node
*create_kernel_leaf(
4148 __isl_take isl_ast_build
*build
, void *user
)
4150 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4152 isl_union_map
*schedule
;
4155 schedule
= isl_ast_build_get_schedule(build
);
4157 if (isl_union_map_n_map(schedule
) != 1)
4158 return create_domain_leaf(schedule
, build
, user
);
4160 map
= isl_map_from_union_map(schedule
);
4161 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
4162 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
4163 return create_access_leaf(gen
, map
, build
);
4164 if (!strcmp(name
, "sync"))
4165 return create_sync_leaf(gen
, map
, build
);
4167 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
4170 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
4171 * have value 0) and all even schedule dimensions as "unroll".
4173 * That is, the options look as follows
4175 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
4176 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
4178 * The even positions are used to be able to schedule copying blocks
4179 * and synchronization before or after each level of the shared memory
4180 * tile loops and we want to make sure that code for these is generated
4181 * separately (within each level).
4183 static __isl_give isl_ast_build
*set_atomic_and_unroll(
4184 __isl_take isl_ast_build
*build
,
4185 __isl_take isl_space
*space
, int sched_len
)
4191 isl_local_space
*ls
;
4194 ctx
= isl_ast_build_get_ctx(build
);
4196 space
= isl_space_params(space
);
4197 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4198 space
= isl_space_from_domain(space
);
4199 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4200 map
= isl_map_universe(isl_space_copy(space
));
4201 for (i
= 0; i
< sched_len
; i
+= 2)
4202 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4203 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4204 c
= isl_equality_alloc(ls
);
4205 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4206 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4207 c
= isl_constraint_set_constant_si(c
, 1);
4208 map
= isl_map_add_constraint(map
, c
);
4209 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4210 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4211 opt
= isl_union_map_from_map(map
);
4213 map
= isl_map_universe(space
);
4214 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4215 c
= isl_equality_alloc(ls
);
4216 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4217 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4218 map
= isl_map_add_constraint(map
, c
);
4219 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4220 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4221 opt
= isl_union_map_add_map(opt
, map
);
4223 build
= isl_ast_build_set_options(build
, opt
);
4228 /* Return a map that maps a space of dimension gen->shared_len
4229 * to its last dimensions starting at gen->tile_first.
4230 * The range is of dimension
4232 * 2 * (gen->shared_len - gen->tile_first) + 1
4234 * The input dimensions are mapped to the odd dimensions in the output,
4235 * while the even dimensions (except 2*pos) are fixed to 0.
4236 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4237 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4238 * are mapped to the output. The remaining input dimensions are projected
4239 * out and the corresponding output dimensions are fixed to 0.
4241 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4242 __isl_take isl_space
*space
, int pos
, int val
)
4247 space
= isl_space_set_from_params(space
);
4248 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4249 space
= isl_space_map_from_set(space
);
4250 proj
= isl_map_identity(space
);
4251 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4252 n
= gen
->shared_len
- gen
->tile_first
;
4253 for (i
= 0; i
<= n
; ++i
) {
4254 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4256 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4258 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4264 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4265 gen
->shared_len
- (gen
->tile_first
+ pos
));
4266 for (i
= pos
; i
< n
; ++i
)
4267 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4272 /* Given the AST context schedule "schedule" and the mapping from
4273 * domains to the shared tile loops "shared_sched", add a schedule
4274 * for a synchronization operation at position "val" of loop level "pos".
4276 * schedule is of the form
4280 * (with D the iteration domains and L the already generated loops),
4281 * while shared_sched is of the form
4285 * We combine them into
4291 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4293 * and use the result as a schedule for "sync".
4295 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4296 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4297 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4300 isl_map
*proj
, *map
;
4302 shared_sched
= isl_union_map_copy(shared_sched
);
4303 schedule
= isl_union_map_copy(schedule
);
4305 space
= isl_union_map_get_space(shared_sched
);
4306 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4307 map
= isl_map_from_union_map(schedule
);
4309 proj
= insert_even(gen
, space
, pos
, val
);
4310 map
= isl_map_apply_range(map
, proj
);
4311 map
= isl_map_from_range(isl_map_wrap(map
));
4312 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4314 res
= isl_union_map_add_map(res
, map
);
4319 /* Given the AST context schedule "schedule" and the mapping from
4320 * domains to the shared tile loops "shared_sched", add a schedule
4321 * for copying an array reference group to/from shared/private memory.
4322 * "read" is set if data should be copied from global memory
4323 * to shared/private memory.
4324 * "k" represents the current group
4325 * "s" is the total number of groups
4327 * We schedule an operation before or after the innermost loop
4328 * of "shared_sched" that affects the tile of the array reference group.
4330 * schedule is of the form
4334 * (with D the iteration domains and L the already generated loops),
4335 * while shared_sched is of the form
4339 * We first compute the access relation for the reference group
4343 * and combine it with shared_sched into
4347 * If this results in an empty relation, no copying needs to be performed
4349 * Otherwise, we invert the relation and combine it with "schedule" into
4353 * The actual additional piece of the schedule is obtained from combining
4359 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4361 * The position of "val" corresponds to the innermost loop that affects
4362 * the tile and the value indicates where the copying is scheduled
4363 * with respect to the actual kernel code (at value 0).
4364 * Reads are schedule before the code, writes to global memory from
4365 * private memory are scheduled at values 1 to s, writes to global
4366 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4368 * If we are scheduling a read from global memory to shared memory,
4369 * we insert a synchronization before the kernel code (at the innermost
4371 * If we are scheduling a write to global memory, then we add
4372 * a synchronization after all writes (at value 2 *s + 2).
4373 * However, there is no need for a synchronization after the outermost loop.
4374 * A write to global memory from private memory at the innermost level
4375 * does not require a synchronization, because it is covered by
4376 * the synchronization after the kernel inserted by body_schedule.
4378 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4379 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4380 __isl_keep isl_union_map
*shared_sched
,
4381 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4386 isl_union_map
*access
;
4387 isl_map
*map
, *proj
, *access_map
;
4390 access
= group_access_relation(group
, read
, !read
);
4391 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4394 if (isl_union_map_is_empty(access
)) {
4395 isl_union_map_free(access
);
4399 access
= isl_union_map_reverse(access
);
4400 access
= isl_union_map_apply_range(access
,
4401 isl_union_map_copy(schedule
));
4402 access_map
= isl_map_from_union_map(access
);
4404 space
= isl_space_copy(group
->array
->space
);
4405 space
= isl_space_from_range(space
);
4406 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4407 map
= isl_map_domain_map(isl_map_universe(space
));
4409 space
= isl_union_map_get_space(schedule
);
4410 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4414 else if (group
->private_tile
)
4417 val
= 1 + s
+ 1 + k
;
4418 proj
= insert_even(gen
, space
, pos
, val
);
4419 map
= isl_map_apply_range(map
, proj
);
4421 access_map
= isl_map_range_product(access_map
, map
);
4423 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4424 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4426 res
= isl_union_map_add_map(res
, access_map
);
4428 n
= gen
->shared_len
- gen
->tile_first
;
4430 if (!group
->private_tile
)
4431 res
= add_sync_schedule(gen
, res
, schedule
,
4432 shared_sched
, n
, -1);
4436 if (pos
== n
&& group
->private_tile
)
4438 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4445 /* Return a schedule for the shared tile loops based on the current
4446 * AST context schedule.
4448 * We create a "shared_sched" that maps the domains to the first
4449 * shared_len dimensions of the computed schedule, project out the
4450 * first tile_first dimensions (as these are already covered by
4451 * the host code) and insert "statement-level" dimensions at even
4452 * positions so that we can schedule copy blocks and synchronization
4453 * before/after each level.
4455 * In particular, copy blocks are inserted inside the innermost
4456 * level that affect the tile. For the copying to global memory,
4457 * those from private memory are scheduled before those from shared
4458 * memory such that synchronization can be inserted between the two
4459 * at the innermost level.
4460 * Synchronization is inserted at the innermost level before the
4461 * actual kernel code if there is any copying from global memory
4462 * to shared memory. It is inserted unconditionally at the innermost
4463 * level after the actual kernel code and the copying to global memory
4464 * from private memory (if any). Finally, it is inserted after
4465 * any copying to global memory, except at the outermost level
4466 * and at the innermost level if there is no copying from shared
4467 * memory. The copying from private memory is covered by the unconditional
4468 * synchronization at the innermost level.
4470 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4471 __isl_take isl_union_map
*schedule
)
4475 isl_union_map
*shared_sched
;
4476 isl_union_map
*sched
;
4477 isl_map
*proj
, *map
;
4480 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4481 proj
= projection(isl_union_map_get_space(shared_sched
),
4482 gen
->tiled_len
, gen
->shared_len
);
4483 shared_sched
= isl_union_map_apply_range(shared_sched
,
4484 isl_union_map_from_map(proj
));
4485 space
= isl_union_map_get_space(shared_sched
);
4486 proj
= insert_even(gen
, space
, -1, 0);
4487 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4488 isl_union_map_from_map(proj
));
4490 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4493 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4494 s
+= gen
->prog
->array
[i
].n_group
;
4497 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4498 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4500 for (j
= 0; j
< array
->n_group
; ++j
) {
4501 struct gpu_array_ref_group
*group
;
4503 group
= array
->groups
[j
];
4504 if (!group
->private_tile
&& !group
->shared_tile
)
4506 res
= add_group_schedule(gen
, res
, schedule
,
4507 shared_sched
, group
, 0, k
, s
);
4508 res
= add_group_schedule(gen
, res
, schedule
,
4509 shared_sched
, group
, 1, k
, s
);
4514 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4515 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4517 isl_union_map_free(shared_sched
);
4518 isl_union_map_free(schedule
);
4523 /* Generate code for "kernel" in the given "context".
4525 * We first generate code for the shared tile loops (T1T, T1P and T2)
4526 * in a context that includes the block ids.
4527 * Within each iteration of these loops an additional code generation
4528 * is performed (within create_kernel_leaf) for the rest of the schedule
4529 * in a context that includes the thread ids.
4531 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4532 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4533 __isl_keep isl_multi_pw_aff
*grid_size
)
4537 isl_id_list
*iterators
;
4538 isl_union_map
*schedule
;
4542 schedule
= isl_ast_build_get_schedule(build
);
4544 build
= isl_ast_build_copy(build
);
4545 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
4546 space
= isl_ast_build_get_schedule_space(build
);
4547 set
= isl_set_universe(isl_space_copy(space
));
4548 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
4549 build
= isl_ast_build_restrict(build
, set
);
4551 schedule
= body_schedule(gen
, schedule
);
4553 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
4555 build
= set_atomic_and_unroll(build
, space
, sched_len
);
4556 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
4557 build
= isl_ast_build_set_iterators(build
, iterators
);
4558 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
4559 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4560 isl_ast_build_free(build
);
4565 /* Attach "id" to the given node.
4567 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
4568 __isl_keep isl_ast_build
*build
, void *user
)
4572 node
= isl_ast_node_set_annotation(node
, id
);
4577 /* Construct an AST node for performing a kernel launch and attach
4578 * the information about the kernel to that node.
4580 * The kernel AST has been constructed in the context of the range
4581 * of "schedule". In particular, the grid size has been computed
4582 * in the context. We therefore still need to make sure that these
4583 * constraints are expressed in the code. We do this by creating a schedule
4585 * kernel[] -> [S -> []]
4587 * where S is the schedule domain, i.e., the range of "schedule".
4588 * The AST generation will then create a single call surrounded by
4589 * all the condition in "S" that have not been expressed yet.
4591 * The kernel information is attached to this node in attach_id.
4593 static __isl_give isl_ast_node
*construct_launch(
4594 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
4595 __isl_take
struct ppcg_kernel
*kernel
)
4599 isl_union_set
*domain
;
4604 ctx
= isl_ast_build_get_ctx(build
);
4606 id
= isl_id_alloc(ctx
, NULL
, kernel
);
4607 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
4609 domain
= isl_union_map_range(schedule
);
4610 set
= isl_set_from_union_set(domain
);
4611 map
= isl_map_from_domain(set
);
4612 map
= isl_map_from_range(isl_map_wrap(map
));
4613 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
4614 schedule
= isl_union_map_from_map(map
);
4616 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
4617 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
4618 isl_ast_build_free(build
);
4623 /* This function is called for each leaf in the AST of the host code.
4624 * We first specialize the schedule to the site of the leaf, compute
4625 * the size of shared memory and then construct the body of the host code
4626 * and the associated kernel.
4628 * The necessary information for printing the kernel launch is
4629 * stored in a struct ppcg_kernel and attached to the leaf node
4630 * created to represent the launch.
4632 static __isl_give isl_ast_node
*create_host_leaf(
4633 __isl_take isl_ast_build
*build
, void *user
)
4635 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4638 struct ppcg_kernel
*kernel
;
4639 isl_set
*host_domain
;
4640 isl_union_map
*schedule
;
4641 isl_union_map
*local_sched
;
4642 isl_union_map
*access
;
4643 isl_union_set
*domain
;
4646 schedule
= isl_ast_build_get_schedule(build
);
4648 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
4651 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
4653 local_sched
= isl_union_map_copy(gen
->sched
);
4654 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
4655 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
4656 isl_union_map_copy(gen
->prog
->write
));
4657 access
= isl_union_map_apply_domain(access
,
4658 isl_union_map_copy(local_sched
));
4660 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
4661 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
4662 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
4664 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
4665 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
4666 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
4668 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4672 kernel
->id
= gen
->kernel_id
++;
4673 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
4674 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
4675 extract_block_size(gen
, kernel
);
4676 kernel
->arrays
= isl_union_map_range(access
);
4677 kernel
->arrays
= isl_union_set_apply(kernel
->arrays
,
4678 isl_union_map_copy(gen
->prog
->to_outer
));
4679 kernel
->space
= isl_ast_build_get_schedule_space(build
);
4681 gen
->private_access
= NULL
;
4682 compute_shared_sched(gen
);
4683 gen
->privatization
= compute_privatization(gen
);
4684 group_references(gen
);
4685 compute_private_access(gen
);
4686 check_shared_memory_bound(gen
);
4687 compute_group_tilings(gen
);
4688 host_domain
= isl_set_from_union_set(isl_union_map_range(
4689 isl_union_map_copy(schedule
)));
4690 localize_bounds(gen
, kernel
, host_domain
);
4692 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
4694 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
4696 create_kernel_vars(gen
, kernel
);
4698 free_local_array_info(gen
);
4699 isl_map_free(gen
->privatization
);
4700 isl_union_map_free(gen
->private_access
);
4701 isl_union_map_free(gen
->local_sched
);
4702 isl_union_map_free(gen
->tiled_sched
);
4703 isl_union_map_free(gen
->shared_sched
);
4704 isl_union_map_free(gen
->shared_proj
);
4705 isl_set_free(host_domain
);
4706 free(gen
->tile_size
);
4708 node
= construct_launch(build
, schedule
, kernel
);
4712 isl_union_map_free(schedule
);
4716 /* Use isl to generate code for the outer gen->tile_first loops
4717 * of the global schedule in gen->sched, resulting in the host code.
4718 * Within each iteration of this partial schedule, i.e., for each kernel
4719 * launch, create_host_leaf takes care of generating the kernel code.
4721 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
4723 isl_ast_build
*build
;
4725 isl_union_map
*sched
;
4727 isl_id_list
*iterators
;
4729 sched
= isl_union_map_copy(gen
->sched
);
4730 proj
= projection(isl_union_map_get_space(sched
),
4731 gen
->untiled_len
, gen
->tile_first
);
4732 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4734 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
4735 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
4736 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
4737 build
= isl_ast_build_set_iterators(build
, iterators
);
4738 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
4739 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
4740 isl_ast_build_free(build
);
4745 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
4749 return isl_union_map_read_from_str(ctx
, str
);
4752 /* Information about the outermost tilable bands in the forest of bands.
4754 * tile_len and n_parallel are only sets on band_info structures
4755 * that correspond to outermost bands. For other bands (in particular,
4756 * ancestors of the outermost bands), n_parallal is set to 0.
4758 * prefix is the (padded) schedule leading up to the outermost tilable bands.
4760 * tile_first is the number of schedule dimensions in prefix.
4762 * suffix is the schedule of the outermost tilable bands and their descendants.
4765 struct gpu_gen
*gen
;
4769 isl_union_map
*prefix
;
4770 isl_union_map
*suffix
;
4773 /* Set tile_len and n_parallel of the statement to that of
4774 * their outermost band, recorded in the band_info.
4776 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
4778 struct band_info
*info
= user
;
4779 struct gpu_stmt
*stmt
;
4782 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
4783 stmt
= find_stmt(info
->gen
->prog
, id
);
4786 stmt
->tile_len
= info
->tile_len
;
4787 stmt
->n_parallel
= info
->n_parallel
;
4794 static void list_select_outer_band(struct gpu_gen
*gen
,
4795 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
4797 /* Check if this band has any parallel loops. If so, take it as
4798 * the outermost tilable band. If not, continue looking for the
4799 * outermost tilable band in the children of the current band.
4801 static void band_select_outer_band(struct gpu_gen
*gen
,
4802 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
4804 int n
= isl_band_n_member(band
);
4807 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
4808 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
4811 info
->n_parallel
= n_parallel
;
4813 gen
->any_parallelism
= 1;
4815 info
->tile_first
= pos
;
4817 info
->prefix
= isl_band_get_prefix_schedule(band
);
4818 info
->suffix
= isl_union_map_flat_range_product(
4819 isl_band_get_partial_schedule(band
),
4820 isl_band_get_suffix_schedule(band
));
4821 isl_union_map_foreach_map(info
->prefix
,
4822 &set_stmt_tile_len
, info
);
4823 } else if (isl_band_has_children(band
)) {
4824 isl_band_list
*children
;
4825 children
= isl_band_get_children(band
);
4826 list_select_outer_band(gen
, children
, pos
+ n
, info
);
4829 info
->tile_first
= pos
+ n
;
4831 info
->prefix
= isl_union_map_flat_range_product(
4832 isl_band_get_prefix_schedule(band
),
4833 isl_band_get_partial_schedule(band
));
4834 info
->suffix
= isl_band_get_suffix_schedule(band
);
4835 isl_union_map_foreach_map(info
->prefix
,
4836 &set_stmt_tile_len
, info
);
4839 isl_band_free(band
);
4842 /* Comparison function that returns a non-zero value for band_infos
4843 * with different tile_len fields or different n_parallel fields.
4845 static int cmp_band(const void *p1
, const void *p2
)
4847 const struct band_info
*info1
= p1
;
4848 const struct band_info
*info2
= p2
;
4850 if (info1
->tile_len
!= info2
->tile_len
)
4851 return info1
->tile_len
- info2
->tile_len
;
4853 return info1
->n_parallel
- info2
->n_parallel
;
4856 /* Extend "umap" with coordinates with fixed value "val"
4857 * to a total length of "dst_len", assuming the original dimension is "src_len".
4859 static __isl_give isl_union_map
*extend_range(
4860 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4866 dim
= isl_union_map_get_space(umap
);
4867 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4868 for (i
= src_len
; i
< dst_len
; ++i
)
4869 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4871 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4876 /* Group bands with the same values for tile_len and n_parallel.
4877 * The prefix schedule is then extended with a fixed coordinate that
4878 * is different for each such group.
4879 * Note that the actual values for this coordinate are not important.
4880 * The bands have already been effectively separated at a higher level
4881 * or they are independent and may be executed in parallel.
4882 * The list of band_info has been sorted before this functions is called.
4884 static void separate_bands(struct band_info
*info
, int n
)
4889 for (i
= 0; i
< n
; ++i
) {
4890 int l
= info
[i
].tile_first
;
4893 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
4894 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
4897 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4899 info
[i
].tile_first
= l
+ 1;
4903 /* Select the outermost bands in the elements of the list, align
4904 * their prefix schedules, separate bands with different values
4905 * for tile_len and/or n_parallel and then combine the resulting
4906 * prefix and suffix schedules into a single pair of prefix and
4907 * suffix schedules for the entire list.
4909 static void list_select_outer_band(struct gpu_gen
*gen
,
4910 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
4914 int n
= isl_band_list_n_band(list
);
4915 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
4916 struct band_info
*info
;
4918 isl_union_map
*prefix
;
4919 isl_union_map
*suffix
;
4922 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4926 for (i
= 0; i
< n
; ++i
) {
4927 band
= isl_band_list_get_band(list
, i
);
4928 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
4929 if (info
[i
].tile_first
> max_tile_first
)
4930 max_tile_first
= info
[i
].tile_first
;
4933 for (i
= 0; i
< n
; ++i
) {
4934 if (info
[i
].tile_first
== max_tile_first
)
4936 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4937 info
[i
].tile_first
, max_tile_first
, 0);
4938 info
[i
].tile_first
= max_tile_first
;
4941 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
4943 for (i
= 0; i
< n
- 1; ++i
)
4944 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
4945 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
4949 separate_bands(info
, n
);
4951 prefix
= info
[0].prefix
;
4952 suffix
= info
[0].suffix
;
4954 for (i
= 1; i
< n
; ++i
) {
4955 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4956 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4959 list_info
->tile_first
= info
[0].tile_first
;
4960 list_info
->tile_len
= -1;
4961 list_info
->prefix
= prefix
;
4962 list_info
->suffix
= suffix
;
4964 isl_band_list_free(list
);
4968 /* Select the outermost tilable band that (by construction)
4969 * has at least one parallel loop.
4970 * The starting position of the aligned band is stored in the pair
4972 * The sizes and number of parallel loops may be different in different
4973 * parts of the band forest and are therefore stored in the gpu_stmts.
4975 * Return the complete schedule, with the tilable bands aligned
4976 * at gen->tile_first and padded with zero, if needed.
4978 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4979 __isl_keep isl_schedule
*schedule
)
4981 isl_band_list
*list
;
4982 struct band_info info
;
4984 gen
->n_parallel
= 0;
4987 list
= isl_schedule_get_band_forest(schedule
);
4989 if (isl_band_list_n_band(list
) == 0) {
4990 isl_band_list_free(list
);
4991 return isl_schedule_get_map(schedule
);
4994 list_select_outer_band(gen
, list
, 0, &info
);
4996 gen
->tile_first
= info
.tile_first
;
4997 info
.suffix
= align_range(info
.suffix
);
4999 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
5002 /* Set gen->untiled_len to the number of scheduling dimensions
5003 * for the schedule of the first domain.
5004 * We assume here that this number is the same for all domains.
5006 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
5008 unsigned *untiled_len
= user
;
5010 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
5016 /* Compute an appropriate schedule based on the accesses in
5017 * gen->read and gen->write.
5019 * We use the dependences in gen->prog->scop to compute
5020 * a schedule that has a parallel loop in each tilable band.
5021 * Finally, we select the outermost tilable band.
5023 static void compute_schedule(struct gpu_gen
*gen
)
5025 isl_union_set
*domain
;
5026 isl_union_map
*dep_raw
, *dep
;
5027 isl_union_map
*sched
;
5028 isl_schedule_constraints
*sc
;
5029 isl_schedule
*schedule
;
5031 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5033 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
5034 dep
= isl_union_map_union(dep
, dep_raw
);
5035 dep
= isl_union_map_coalesce(dep
);
5037 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
5038 domain
= isl_union_set_intersect_params(domain
,
5039 isl_set_copy(gen
->prog
->scop
->context
));
5040 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
5041 sc
= isl_schedule_constraints_set_validity(sc
, isl_union_map_copy(dep
));
5042 sc
= isl_schedule_constraints_set_proximity(sc
, dep
);
5044 if (gen
->options
->debug
->dump_schedule_constraints
)
5045 isl_schedule_constraints_dump(sc
);
5046 schedule
= isl_schedule_constraints_compute_schedule(sc
);
5047 if (gen
->options
->debug
->dump_schedule
)
5048 isl_schedule_dump(schedule
);
5050 sched
= select_outer_tilable_band(gen
, schedule
);
5052 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
5053 sched
= isl_union_map_intersect_domain(sched
, domain
);
5056 isl_schedule_free(schedule
);
5059 /* Compute the sets of outer array elements that need to be copied in and out.
5061 * In particular, for each array that is written anywhere in gen->prog and
5062 * that is visible outside the corresponding scop, we copy out its entire
5065 * Any array elements that is read without first being written needs
5066 * to be copied in. Furthermore, if there are any array elements that
5067 * are copied out, but that are not written inside gen->prog, then
5068 * they also need to be copied in to ensure that the value after execution
5069 * is the same as the value before execution.
5070 * In case the array elements are structures, we need to take into
5071 * account that all members of the structures need to be written
5072 * by gen->prog before we can avoid copying the data structure in.
5074 * While computing the set of array elements that
5075 * are copied out but not written, we intersect both sets with the context.
5076 * This helps in those cases where the arrays are declared with a fixed size,
5077 * while the accesses are parametric and the context assigns a fixed value
5078 * to the parameters.
5080 * If an element from a local array is read without first being written,
5081 * then there is no point in copying it in since it cannot have been
5082 * written prior to the scop. Warn about the uninitialized read instead.
5084 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
5087 isl_union_set
*local
;
5088 isl_union_set
*may_write
, *write
;
5089 isl_union_set
*copy_in
, *copy_out
;
5090 isl_union_set
*not_written
;
5091 isl_union_map
*uninitialized
;
5092 isl_union_map
*local_uninitialized
;
5094 write
= isl_union_map_range(isl_union_map_copy(gen
->prog
->write
));
5095 write
= isl_union_set_intersect_params(write
,
5096 isl_set_copy(gen
->prog
->context
));
5097 may_write
= isl_union_set_universe(isl_union_set_copy(write
));
5098 may_write
= isl_union_set_apply(may_write
,
5099 isl_union_map_copy(gen
->prog
->to_outer
));
5100 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
5101 local
= isl_union_set_copy(copy_out
);
5103 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5108 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
5110 if (gen
->prog
->array
[i
].local
) {
5113 set
= isl_set_universe(space
);
5114 local
= isl_union_set_add_set(local
, set
);
5118 write_i
= isl_union_set_extract_set(may_write
, space
);
5119 empty
= isl_set_fast_is_empty(write_i
);
5120 isl_set_free(write_i
);
5124 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
5125 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
5127 isl_union_set_free(may_write
);
5129 copy_out
= isl_union_set_intersect_params(copy_out
,
5130 isl_set_copy(gen
->prog
->context
));
5132 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
5134 copy_out
= isl_union_set_apply(copy_out
,
5135 isl_union_map_copy(gen
->prog
->to_inner
));
5136 not_written
= isl_union_set_subtract(copy_out
, write
);
5138 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
5139 local_uninitialized
= isl_union_map_copy(uninitialized
);
5141 local
= isl_union_set_apply(local
,
5142 isl_union_map_copy(gen
->prog
->to_inner
));
5143 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
5145 if (!isl_union_map_is_empty(local_uninitialized
)) {
5146 fprintf(stderr
, "uninitialized reads (not copied in):\n");
5147 isl_union_map_dump(local_uninitialized
);
5149 uninitialized
= isl_union_map_subtract(uninitialized
,
5150 local_uninitialized
);
5151 copy_in
= isl_union_map_range(uninitialized
);
5152 copy_in
= isl_union_set_union(copy_in
, not_written
);
5153 copy_in
= isl_union_set_apply(copy_in
,
5154 isl_union_map_copy(gen
->prog
->to_outer
));
5156 gen
->prog
->copy_in
= copy_in
;
5159 static struct gpu_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
5160 struct gpu_stmt_access
**next_access
)
5162 struct gpu_stmt_access
*access
;
5163 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
5165 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
5167 access
->next
= NULL
;
5168 access
->read
= expr
->acc
.read
;
5169 access
->write
= expr
->acc
.write
;
5170 access
->access
= isl_map_copy(expr
->acc
.access
);
5171 access
->ref_id
= isl_id_copy(expr
->acc
.ref_id
);
5174 *next_access
= access
;
5175 next_access
= &(*next_access
)->next
;
5179 static struct gpu_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
5180 struct gpu_stmt_access
**next_access
)
5184 for (i
= 0; i
< expr
->n_arg
; ++i
)
5185 next_access
= expr_extract_accesses(expr
->args
[i
],
5188 if (expr
->type
== pet_expr_access
)
5189 next_access
= expr_extract_access(expr
, next_access
);
5194 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
5196 struct gpu_stmt_access
**next_access
= &stmt
->accesses
;
5198 stmt
->accesses
= NULL
;
5199 expr_extract_accesses(stmt
->stmt
->body
, next_access
);
5202 /* Return an array of gpu_stmt representing the statements in "scop".
5204 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
5205 __isl_keep isl_set
*context
)
5208 struct gpu_stmt
*stmts
;
5210 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
5214 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
5215 struct gpu_stmt
*s
= &stmts
[i
];
5217 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
5218 s
->stmt
= scop
->stmts
[i
];
5219 pet_stmt_extract_accesses(s
);
5225 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5227 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
5229 struct gpu_gen
*gen
= user
;
5231 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
5235 /* Generate CUDA code for "scop" and print it to "p".
5236 * After generating an AST for the transformed scop as explained below,
5237 * we call "gen->print" to print the AST in the desired output format
5240 * If it turns out that it does not make sense to generate GPU code,
5241 * then we generate CPU code instead.
5243 * The GPU code is generated in a context where at least one
5244 * statement instance is executed. The corresponding guard (if any) is printed
5245 * around the entire generated GPU code, except for the declaration
5246 * of the arrays that are visible outside of the scop and that therefore
5247 * cannot be declared inside the body of any possible guard.
5249 * We first compute a schedule that respects the dependences
5250 * of the original program and select the outermost band
5251 * of tilable dimensions that has at least one parallel loop.
5252 * We then have three blocks of dimensions
5256 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5261 * For each iteration of the T loop and for each array, we compute
5262 * the array elements accessed by that iteration, construct a rectangular
5263 * box around it and shift it to the origin. The result is used
5264 * as shared memory for the array.
5266 * We then split off at most 2 parallel loops from the T loops and
5267 * at most 3 parallel loops from the P loops
5271 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5272 * according to "grid"/"block" sizes.
5274 * H T1T T1P T2 P1T P1P P2 G
5276 * Finally, the T1P and P1P iterators are equated to the block and
5277 * thread dimensions respectively and so are effectively removed.
5278 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5279 * are run on the GPU.
5281 * Code is generated in three stages. We first generate code for the
5282 * host (the H loops), with iterators h%d. Then, for each leaf node
5283 * of the resulting AST, we generate code for the shared loops (up to
5284 * and including T2), with iterators g%d and after equating the H loops
5285 * to h%d parameters and the T1P loops to the block dimensions.
5286 * Finally, we generate code for the remaining loops in a similar fashion.
5288 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5289 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5290 struct ppcg_options
*options
)
5292 struct gpu_prog
*prog
;
5294 isl_set
*context
, *guard
;
5297 return isl_printer_free(p
);
5299 ctx
= isl_printer_get_ctx(p
);
5300 prog
= gpu_prog_alloc(ctx
, scop
);
5302 return isl_printer_free(p
);
5304 context
= isl_set_copy(prog
->context
);
5305 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5306 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5309 gen
->any_parallelism
= 0;
5310 compute_schedule(gen
);
5312 if (!gen
->any_parallelism
) {
5313 isl_set_free(context
);
5314 isl_set_free(guard
);
5315 p
= print_cpu(p
, scop
, options
);
5317 compute_copy_in_and_out(gen
);
5318 gen
->tree
= generate_host_code(gen
);
5319 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5320 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5321 isl_ast_node_free(gen
->tree
);
5324 isl_union_map_free(gen
->sched
);
5326 gpu_prog_free(prog
);
5331 /* Wrapper around generate for use as a ppcg_transform callback.
5333 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5334 struct ppcg_scop
*scop
, void *user
)
5336 struct gpu_gen
*gen
= user
;
5338 return generate(p
, gen
, scop
, gen
->options
);
5341 /* Transform the code in the file called "input" by replacing
5342 * all scops by corresponding GPU code and write the results to "out".
5344 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5345 struct ppcg_options
*options
,
5346 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5347 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5348 struct gpu_types
*types
, void *user
), void *user
)
5355 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5356 gen
.options
= options
;
5359 gen
.print_user
= user
;
5361 gen
.types
.name
= NULL
;
5363 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5365 isl_union_map_free(gen
.sizes
);
5366 for (i
= 0; i
< gen
.types
.n
; ++i
)
5367 free(gen
.types
.name
[i
]);
5368 free(gen
.types
.name
);
5373 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5375 struct gpu_prog
*prog
;
5380 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5385 prog
->context
= isl_set_copy(scop
->context
);
5386 prog
->n_stmts
= scop
->n_stmt
;
5387 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
5388 prog
->read
= isl_union_map_copy(scop
->reads
);
5389 prog
->write
= isl_union_map_copy(scop
->writes
);
5390 prog
->to_inner
= compute_to_inner(scop
);
5391 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5392 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5395 return gpu_prog_free(prog
);
5397 if (collect_array_info(prog
) < 0)
5398 return gpu_prog_free(prog
);
5403 void *gpu_prog_free(struct gpu_prog
*prog
)
5407 free_array_info(prog
);
5408 free_stmts(prog
->stmts
, prog
->n_stmts
);
5409 isl_union_map_free(prog
->to_outer
);
5410 isl_union_map_free(prog
->to_inner
);
5411 isl_union_set_free(prog
->copy_in
);
5412 isl_union_set_free(prog
->copy_out
);
5413 isl_union_map_free(prog
->read
);
5414 isl_union_map_free(prog
->write
);
5415 isl_set_free(prog
->context
);