gpu_group.h

   1 #ifndef GPU_GROUP_H
   2 #define GPU_GROUP_H
   3
   4 #include <isl/schedule_node.h>
   5 #include "gpu.h"
   6
   7 /* A group of array references in a kernel that should be handled together.
   8  * If private_tile is not NULL, then it is mapped to registers.
   9  * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
  10  * Otherwise, it is accessed from global memory.
  11  * Note that if both private_tile and shared_tile are set, then shared_tile
  12  * is only used inside group_common_shared_memory_tile.
  13  * "depth" reflects the number of schedule dimensions that affect the tile
  14  * (private_tile if set; shared_tile if shared_tile is set and private_tile
  15  * is not).  The copying into and/or out of the tile is performed at that
  16  * depth.
  17  */
  18 struct gpu_array_ref_group {
  19         /* The references in this group access this local array. */
  20         struct gpu_local_array_info *local_array;
  21         /* This is the corresponding array. */
  22         struct gpu_array_info *array;
  23         /* Position of this group in the list of reference groups of array. */
  24         int nr;
  25
  26         /* The following fields are use during the construction of the groups.
  27          * access is the combined access relation relative to the shared
  28          * memory tiling.  In particular, the domain of the map corresponds
  29          * to the first shared_schedule_dim dimensions of the kernel schedule.
  30          * write is set if any access in the group is a write.
  31          * exact_write is set if all writes are definite writes.
  32          * slice is set if there is at least one access in the group
  33          * that refers to more than one element
  34          */
  35         isl_map *access;
  36         int write;
  37         int exact_write;
  38         int slice;
  39
  40         /* The shared memory tile, NULL if none. */
  41         struct gpu_array_tile *shared_tile;
  42
  43         /* The private memory tile, NULL if none. */
  44         struct gpu_array_tile *private_tile;
  45
  46         int depth;
  47
  48         /* References in this group; point to elements of a linked list. */
  49         int n_ref;
  50         struct gpu_stmt_access **refs;
  51 };
  52
  53 int gpu_group_references(struct ppcg_kernel *kernel,
  54         __isl_keep isl_schedule_node *node);
  55
  56 __isl_give isl_printer *gpu_array_ref_group_print_name(
  57         struct gpu_array_ref_group *group, __isl_take isl_printer *p);
  58 void gpu_array_ref_group_compute_tiling(struct gpu_array_ref_group *group);
  59 __isl_give isl_union_map *gpu_array_ref_group_access_relation(
  60         struct gpu_array_ref_group *group, int read, int write);
  61 int gpu_array_ref_group_requires_unroll(struct gpu_array_ref_group *group);
  62 struct gpu_array_tile *gpu_array_ref_group_tile(
  63         struct gpu_array_ref_group *group);
  64 struct gpu_array_ref_group *gpu_array_ref_group_free(
  65         struct gpu_array_ref_group *group);
  66
  67 #endif