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[ppcg.git] / gpu_group.h
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1 #ifndef GPU_GROUP_H
2 #define GPU_GROUP_H
4 #include <isl/schedule_node.h>
5 #include "gpu.h"
7 /* A group of array references in a kernel that should be handled together.
8 * If private_tile is not NULL, then it is mapped to registers.
9 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
10 * Otherwise, it is accessed from global memory.
11 * Note that if both private_tile and shared_tile are set, then shared_tile
12 * is only used inside group_common_shared_memory_tile.
14 struct gpu_array_ref_group {
15 /* The references in this group access this local array. */
16 struct gpu_local_array_info *local_array;
17 /* This is the corresponding array. */
18 struct gpu_array_info *array;
19 /* Position of this group in the list of reference groups of array. */
20 int nr;
22 /* The following fields are use during the construction of the groups.
23 * access is the combined access relation relative to the private
24 * memory tiling. In particular, the domain of the map corresponds
25 * to the first thread_depth dimensions of the kernel schedule.
26 * write is set if any access in the group is a write.
27 * exact_write is set if all writes are definite writes.
28 * slice is set if there is at least one access in the group
29 * that refers to more than one element
30 * "min_depth" is the minimum of the tile depths and thread_depth.
32 isl_map *access;
33 int write;
34 int exact_write;
35 int slice;
36 int min_depth;
38 /* The shared memory tile, NULL if none. */
39 struct gpu_array_tile *shared_tile;
41 /* The private memory tile, NULL if none. */
42 struct gpu_array_tile *private_tile;
44 /* References in this group; point to elements of a linked list. */
45 int n_ref;
46 struct gpu_stmt_access **refs;
49 int gpu_group_references(struct ppcg_kernel *kernel,
50 __isl_keep isl_schedule_node *node);
52 __isl_give isl_printer *gpu_array_ref_group_print_name(
53 struct gpu_array_ref_group *group, __isl_take isl_printer *p);
54 void gpu_array_ref_group_compute_tiling(struct gpu_array_ref_group *group);
55 __isl_give isl_union_map *gpu_array_ref_group_access_relation(
56 struct gpu_array_ref_group *group, int read, int write);
57 int gpu_array_ref_group_requires_unroll(struct gpu_array_ref_group *group);
58 enum ppcg_group_access_type gpu_array_ref_group_type(
59 struct gpu_array_ref_group *group);
60 struct gpu_array_tile *gpu_array_ref_group_tile(
61 struct gpu_array_ref_group *group);
62 struct gpu_array_ref_group *gpu_array_ref_group_free(
63 struct gpu_array_ref_group *group);
65 #endif