2 * Copyright 2010-2011 INRIA Saclay
4 * Use of this software is governed by the GNU LGPLv2.1 license
6 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
7 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
14 #include <isl/polynomial.h>
15 #include <isl/union_set.h>
20 #include <isl/schedule.h>
21 #include <isl/options.h>
22 #include <cloog/isl/cloog.h>
25 #include "cuda_common.h"
28 #include "ppcg_options.h"
30 /* The fields stride, shift and shift_map only contain valid information
32 * If so, they express that current index is such that if you add shift,
33 * then the result is always a multiple of stride.
34 * shift_map contains the mapping
36 * i -> (i + shift)/stride
38 struct cuda_array_bound
{
44 isl_basic_map
*shift_map
;
47 struct cuda_array_info
;
49 /* A group of array references in a kernel that should be handled together.
50 * If private_bound is not NULL, then it is mapped to registers.
51 * Otherwise, if shared_bound is not NULL, it is mapped to shared memory.
52 * Otherwise, it is accessed from global memory.
54 struct cuda_array_ref_group
{
55 /* The references in this group access this array. */
56 struct cuda_array_info
*array
;
57 /* Position of this group in the list of reference groups of array. */
60 /* The following fields are use during the construction of the groups.
61 * access is the combined access relation relative to the shared
63 * write is set if any access in the group is a write.
68 /* For each index, size and offset of piece in shared memory. */
69 struct cuda_array_bound
*shared_bound
;
71 /* For each index, size and offset of piece in private memory. */
72 struct cuda_array_bound
*private_bound
;
74 /* References in this group; point to elements of a linked list. */
76 struct cuda_stmt_access
**refs
;
79 struct cuda_array_info
{
83 /* Name of the array. */
85 /* Number of indices. */
87 /* For each index, a bound on the array in that direction. */
89 /* For each index, bound[i] specialized to the current kernel. */
90 isl_pw_aff
**local_bound
;
92 /* All references to this array; point to elements of a linked list. */
94 struct cuda_stmt_access
**refs
;
96 /* The reference groups associated to this array. */
98 struct cuda_array_ref_group
**groups
;
100 /* Last shared memory tile dimension that affects tile of this array. */
102 /* Dimension at which copying to/from shared memory is printed.
103 * if >= 0, then the value is >= last_shared
104 * if -1, then the copying is done at the leaf level.
106 int print_shared_level
;
109 /* Print the name of the local copy of a given group of array references.
111 static void print_array_name(FILE *out
, struct cuda_array_ref_group
*group
)
115 if (group
->private_bound
)
116 fprintf(out
, "private_");
117 else if (group
->shared_bound
)
118 fprintf(out
, "shared_");
121 fprintf(out
, "%s", group
->array
->name
);
122 if (!global
&& group
->array
->n_group
> 1)
123 fprintf(out
, "_%d", group
->nr
);
126 /* Collect all references to the given array and store pointers to them
129 static void collect_references(struct cuda_gen
*gen
,
130 struct cuda_array_info
*array
)
136 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
137 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
138 struct cuda_stmt_access
*access
;
140 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
142 name
= isl_map_get_tuple_name(access
->access
,
144 if (name
&& !strcmp(array
->name
, name
))
150 array
->refs
= isl_alloc_array(gen
->ctx
, struct cuda_stmt_access
*, n
);
154 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
155 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
156 struct cuda_stmt_access
*access
;
158 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
160 name
= isl_map_get_tuple_name(access
->access
,
162 if (!name
|| strcmp(array
->name
, name
))
165 array
->refs
[n
++] = access
;
170 static struct cuda_array_bound
*create_bound_list(isl_ctx
*ctx
, int n_index
)
173 struct cuda_array_bound
*bound
;
175 bound
= isl_alloc_array(ctx
, struct cuda_array_bound
, n_index
);
178 for (i
= 0; i
< n_index
; ++i
) {
179 isl_int_init(bound
[i
].size
);
181 isl_int_init(bound
[i
].stride
);
182 bound
[i
].shift
= NULL
;
183 bound
[i
].shift_map
= NULL
;
189 static void free_bound_list(struct cuda_array_bound
*bound
, int n_index
)
196 for (j
= 0; j
< n_index
; ++j
) {
197 isl_int_clear(bound
[j
].size
);
198 isl_int_clear(bound
[j
].stride
);
199 isl_aff_free(bound
[j
].lb
);
200 isl_aff_free(bound
[j
].shift
);
201 isl_basic_map_free(bound
[j
].shift_map
);
206 static struct pet_array
*find_array(struct pet_scop
*scop
,
207 __isl_keep isl_set
*accessed
)
212 id
= isl_set_get_tuple_id(accessed
);
214 for (i
= 0; i
< scop
->n_array
; ++i
) {
217 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
224 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
227 /* Compute bounds on the host arrays based on the accessed elements
228 * and collect all references to the array.
230 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
233 struct cuda_gen
*gen
= (struct cuda_gen
*)user
;
237 isl_pw_aff
**local_bounds
;
238 struct pet_array
*pa
;
240 n_index
= isl_set_dim(array
, isl_dim_set
);
241 name
= isl_set_get_tuple_name(array
);
242 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
243 isl_pw_aff
*, n_index
);
245 local_bounds
= isl_calloc_array(isl_set_get_ctx(array
),
246 isl_pw_aff
*, n_index
);
247 assert(local_bounds
);
248 gen
->array
[gen
->n_array
].dim
= isl_set_get_space(array
);
249 gen
->array
[gen
->n_array
].name
= strdup(name
);
250 gen
->array
[gen
->n_array
].n_index
= n_index
;
251 gen
->array
[gen
->n_array
].bound
= bounds
;
252 gen
->array
[gen
->n_array
].local_bound
= local_bounds
;
254 pa
= find_array(gen
->scop
, array
);
257 gen
->array
[gen
->n_array
].type
= strdup(pa
->element_type
);
259 for (i
= 0; i
< n_index
; ++i
) {
264 isl_set
*size
= i
== 0 ? array
: pa
->extent
;
266 bound
= isl_set_dim_max(isl_set_copy(size
), i
);
268 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
269 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
270 one
= isl_aff_zero_on_domain(ls
);
271 one
= isl_aff_add_constant_si(one
, 1);
272 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
273 bound
= isl_pw_aff_gist(bound
, isl_set_copy(gen
->context
));
278 collect_references(gen
, &gen
->array
[gen
->n_array
]);
286 void collect_array_info(struct cuda_gen
*gen
)
288 isl_union_set
*arrays
;
290 arrays
= isl_union_map_range(isl_union_map_copy(gen
->read
));
291 arrays
= isl_union_set_union(arrays
,
292 isl_union_map_range(isl_union_map_copy(gen
->write
)));
293 arrays
= isl_union_set_coalesce(arrays
);
295 gen
->n_array
= isl_union_set_n_set(arrays
);
296 gen
->array
= isl_alloc_array(gen
->ctx
,
297 struct cuda_array_info
, gen
->n_array
);
300 isl_union_set_foreach_set(arrays
, &extract_array_info
, gen
);
301 isl_union_set_free(arrays
);
304 static void free_array_info(struct cuda_gen
*gen
)
308 for (i
= 0; i
< gen
->n_array
; ++i
) {
309 int n_index
= gen
->array
[i
].n_index
;
310 free(gen
->array
[i
].type
);
311 free(gen
->array
[i
].name
);
312 for (j
= 0; j
< n_index
; ++j
) {
313 isl_pw_aff_free(gen
->array
[i
].bound
[j
]);
314 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
316 isl_space_free(gen
->array
[i
].dim
);
317 free(gen
->array
[i
].bound
);
318 free(gen
->array
[i
].local_bound
);
319 free(gen
->array
[i
].refs
);
324 static void declare_device_arrays(struct cuda_gen
*gen
)
328 for (i
= 0; i
< gen
->n_array
; ++i
)
329 fprintf(gen
->cuda
.host_c
, "%s *dev_%s;\n",
330 gen
->array
[i
].type
, gen
->array
[i
].name
);
331 fprintf(gen
->cuda
.host_c
, "\n");
334 static void print_array_size(struct cuda_gen
*gen
, FILE *out
,
335 struct cuda_array_info
*array
)
340 prn
= isl_printer_to_file(gen
->ctx
, out
);
341 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
342 for (i
= 0; i
< array
->n_index
; ++i
) {
343 prn
= isl_printer_print_str(prn
, "(");
344 prn
= isl_printer_print_pw_aff(prn
, array
->bound
[i
]);
345 prn
= isl_printer_print_str(prn
, ") * ");
347 prn
= isl_printer_print_str(prn
, "sizeof(");
348 prn
= isl_printer_print_str(prn
, array
->type
);
349 prn
= isl_printer_print_str(prn
, ")");
350 isl_printer_free(prn
);
353 static void allocate_device_arrays(struct cuda_gen
*gen
)
357 for (i
= 0; i
< gen
->n_array
; ++i
) {
358 fprintf(gen
->cuda
.host_c
,
359 "cudaCheckReturn(cudaMalloc((void **) &dev_%s, ",
361 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
362 fprintf(gen
->cuda
.host_c
, "));\n");
364 fprintf(gen
->cuda
.host_c
, "\n");
367 static void free_device_arrays(struct cuda_gen
*gen
)
371 for (i
= 0; i
< gen
->n_array
; ++i
)
372 fprintf(gen
->cuda
.host_c
, "cudaCheckReturn(cudaFree(dev_%s));\n",
376 /* Check if a cuda array is a scalar. A scalar is a value that is not stored
377 * as an array or through a pointer reference, but as single data element. At
378 * the moment, scalars are represented as zero dimensional arrays.
380 static int cuda_array_is_scalar(struct cuda_array_info
*array
)
382 return (array
->n_index
== 0);
385 static void copy_arrays_to_device(struct cuda_gen
*gen
)
389 for (i
= 0; i
< gen
->n_array
; ++i
) {
394 dim
= isl_space_copy(gen
->array
[i
].dim
);
395 read_i
= isl_union_set_extract_set(gen
->copy_in
, dim
);
396 empty
= isl_set_fast_is_empty(read_i
);
397 isl_set_free(read_i
);
401 fprintf(gen
->cuda
.host_c
, "cudaCheckReturn(cudaMemcpy(dev_%s,",
404 if (cuda_array_is_scalar(&(gen
->array
[i
])))
405 fprintf(gen
->cuda
.host_c
, " &%s, ",
408 fprintf(gen
->cuda
.host_c
, " %s, ", gen
->array
[i
].name
);
410 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
411 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyHostToDevice));\n");
413 fprintf(gen
->cuda
.host_c
, "\n");
416 static void copy_arrays_from_device(struct cuda_gen
*gen
)
419 isl_union_set
*write
;
420 write
= isl_union_map_range(isl_union_map_copy(gen
->write
));
422 for (i
= 0; i
< gen
->n_array
; ++i
) {
427 dim
= isl_space_copy(gen
->array
[i
].dim
);
428 write_i
= isl_union_set_extract_set(write
, dim
);
429 empty
= isl_set_fast_is_empty(write_i
);
430 isl_set_free(write_i
);
434 fprintf(gen
->cuda
.host_c
, "cudaCheckReturn(cudaMemcpy(");
435 if (cuda_array_is_scalar(&gen
->array
[i
]))
436 fprintf(gen
->cuda
.host_c
, "&%s, ", gen
->array
[i
].name
);
438 fprintf(gen
->cuda
.host_c
, "%s, ", gen
->array
[i
].name
);
439 fprintf(gen
->cuda
.host_c
, "dev_%s, ", gen
->array
[i
].name
);
440 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
441 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyDeviceToHost));\n");
444 isl_union_set_free(write
);
445 fprintf(gen
->cuda
.host_c
, "\n");
448 static void read_sizes_from_file(struct cuda_gen
*gen
, const char *filename
,
454 file
= fopen(filename
, "r");
458 for (i
= 0; i
< len
; ++i
)
459 if (fscanf(file
, "%d", &sizes
[i
]) < 1)
465 static void reverse_list(int *list
, int len
)
470 for (i
= 0; 2 * i
< len
; ++i
) {
472 list
[i
] = list
[len
- 1 - i
];
473 list
[len
- 1 - i
] = t
;
477 /* Read user specified sizes from "tile.sizes", "block.sizes" and "grid.sizes"
478 * after filling in some potentially useful defaults.
480 static void read_sizes(struct cuda_gen
*gen
)
484 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
485 assert(gen
->tile_size
);
486 for (n
= 0; n
< gen
->tile_len
; ++n
)
487 gen
->tile_size
[n
] = gen
->options
->tile_size
;
488 read_sizes_from_file(gen
, "tile.sizes", gen
->tile_size
, gen
->tile_len
);
491 gen
->n_block
= (n
<= 3) ? n
: 3;
492 switch (gen
->n_block
) {
494 gen
->block_dim
[0] = 512;
497 gen
->block_dim
[0] = 32;
498 gen
->block_dim
[1] = 16;
501 gen
->block_dim
[0] = 32;
502 gen
->block_dim
[1] = 4;
503 gen
->block_dim
[2] = 4;
506 read_sizes_from_file(gen
, "block.sizes", gen
->block_dim
, gen
->n_block
);
507 reverse_list(gen
->block_dim
, gen
->n_block
);
509 gen
->n_grid
= (n
<= 2) ? n
: 2;
510 switch (gen
->n_grid
) {
512 gen
->grid_dim
[0] = 32768;
515 gen
->grid_dim
[0] = 256;
516 gen
->grid_dim
[1] = 256;
519 read_sizes_from_file(gen
, "grid.sizes", gen
->grid_dim
, gen
->n_grid
);
520 reverse_list(gen
->grid_dim
, gen
->n_grid
);
523 static void free_stmts(struct cuda_stmt
*stmts
, int n
)
527 for (i
= 0; i
< n
; ++i
) {
528 struct cuda_stmt_access
*access
, *next
;
530 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
532 isl_map_free(access
->access
);
536 isl_set_free(stmts
[i
].domain
);
541 void clear_cuda_gen(struct cuda_gen
*gen
)
543 free_stmts(gen
->stmts
, gen
->n_stmts
);
544 free_array_info(gen
);
545 isl_set_free(gen
->context
);
546 isl_union_set_free(gen
->copy_in
);
547 isl_union_map_free(gen
->sched
);
548 isl_union_map_free(gen
->read
);
549 isl_union_map_free(gen
->write
);
552 static void print_reverse_list(FILE *out
, int len
, int *list
)
560 for (i
= 0; i
< len
; ++i
) {
563 fprintf(out
, "%d", list
[len
- 1 - i
]);
568 static void print_kernel_launch(struct cuda_gen
*gen
,
569 __isl_keep isl_union_set
*arrays
)
576 print_indent(gen
->code
.dst
, gen
->code
.indent
);
577 fprintf(gen
->code
.dst
, "kernel%d <<<k%d_dimGrid, k%d_dimBlock>>> (",
578 gen
->kernel_id
, gen
->kernel_id
, gen
->kernel_id
);
579 fprintf(gen
->cuda
.kernel_c
, "__global__ void kernel%d(",
581 fprintf(gen
->cuda
.kernel_h
, "__global__ void kernel%d(",
584 for (i
= 0; i
< gen
->n_array
; ++i
) {
589 dim
= isl_space_copy(gen
->array
[i
].dim
);
590 arr
= isl_union_set_extract_set(arrays
, dim
);
591 empty
= isl_set_fast_is_empty(arr
);
597 fprintf(gen
->code
.dst
, ", ");
598 fprintf(gen
->cuda
.kernel_c
, ", ");
599 fprintf(gen
->cuda
.kernel_h
, ", ");
602 fprintf(gen
->code
.dst
, "dev_%s", gen
->array
[i
].name
);
603 fprintf(gen
->cuda
.kernel_c
, "%s *%s",
604 gen
->array
[i
].type
, gen
->array
[i
].name
);
605 fprintf(gen
->cuda
.kernel_h
, "%s *%s",
606 gen
->array
[i
].type
, gen
->array
[i
].name
);
611 dim
= isl_union_set_get_space(arrays
);
612 nparam
= isl_space_dim(dim
, isl_dim_param
);
613 for (i
= 0; i
< nparam
; ++i
) {
614 const char *name
= isl_space_get_dim_name(dim
, isl_dim_param
, i
);
616 fprintf(gen
->code
.dst
, ", ");
617 fprintf(gen
->cuda
.kernel_c
, ", ");
618 fprintf(gen
->cuda
.kernel_h
, ", ");
620 fprintf(gen
->code
.dst
, "%s", name
);
621 fprintf(gen
->cuda
.kernel_c
, "int %s", name
);
622 fprintf(gen
->cuda
.kernel_h
, "int %s", name
);
627 for (i
= 0; i
< gen
->tile_first
; ++i
) {
629 fprintf(gen
->code
.dst
, ", ");
630 fprintf(gen
->cuda
.kernel_c
, ", ");
631 fprintf(gen
->cuda
.kernel_h
, ", ");
633 fprintf(gen
->code
.dst
, "h%d", i
);
634 fprintf(gen
->cuda
.kernel_c
, "int h%d", i
);
635 fprintf(gen
->cuda
.kernel_h
, "int h%d", i
);
639 fprintf(gen
->code
.dst
, ");\n");
640 fprintf(gen
->cuda
.kernel_c
, ")\n");
641 fprintf(gen
->cuda
.kernel_h
, ");\n");
643 fprintf(gen
->code
.dst
, "cudaCheckKernel();\n");
646 /* Construct a map from a domain of dimensionality "len"
647 * to a domain of dimensionality "len" + "tile_len" that tiles
648 * the "tile_len" coordinates starting at "first".
649 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
650 * "dim" prescribes the parameters.
652 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
653 int first
, int tile_len
, int *tile_size
)
663 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
664 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
665 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
666 ls
= isl_local_space_from_space(dim
);
668 for (i
= 0; i
< len
- tile_len
; ++i
) {
669 int j
= i
< first
? i
: i
+ tile_len
;
670 int k
= i
< first
? i
: i
+ 2 * tile_len
;
672 c
= isl_equality_alloc(isl_local_space_copy(ls
));
673 isl_int_set_si(v
, -1);
674 isl_constraint_set_coefficient(c
, isl_dim_in
, j
, v
);
675 isl_int_set_si(v
, 1);
676 isl_constraint_set_coefficient(c
, isl_dim_out
, k
, v
);
677 bmap
= isl_basic_map_add_constraint(bmap
, c
);
680 for (i
= 0; i
< tile_len
; ++i
) {
681 c
= isl_equality_alloc(isl_local_space_copy(ls
));
682 isl_int_set_si(v
, -1);
683 isl_constraint_set_coefficient(c
, isl_dim_in
, first
+ i
, v
);
684 isl_int_set_si(v
, tile_size
[i
]);
685 isl_constraint_set_coefficient(c
, isl_dim_out
, first
+ i
, v
);
686 isl_int_set_si(v
, 1);
687 isl_constraint_set_coefficient(c
, isl_dim_out
,
688 first
+ i
+ tile_len
, v
);
689 bmap
= isl_basic_map_add_constraint(bmap
, c
);
691 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
692 isl_int_set_si(v
, 1);
693 isl_constraint_set_coefficient(c
, isl_dim_out
,
694 first
+ i
+ tile_len
, v
);
695 bmap
= isl_basic_map_add_constraint(bmap
, c
);
697 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
698 isl_int_set_si(v
, -1);
699 isl_constraint_set_coefficient(c
, isl_dim_out
,
700 first
+ i
+ tile_len
, v
);
701 isl_int_set_si(v
, tile_size
[i
] - 1);
702 isl_constraint_set_constant(c
, v
);
703 bmap
= isl_basic_map_add_constraint(bmap
, c
);
706 isl_local_space_free(ls
);
709 return isl_map_from_basic_map(bmap
);
712 /* Construct a map from a domain of dimensionality "len"
713 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
714 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
715 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
716 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
717 * that are projected out at the end.
718 * "dim" prescribes the parameters.
720 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
721 int first
, int wrap_len
, int *wrap_size
)
728 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
729 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
730 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
731 ls
= isl_local_space_from_space(dim
);
733 for (i
= 0; i
< len
; ++i
) {
734 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
736 c
= isl_equality_alloc(isl_local_space_copy(ls
));
737 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
738 isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
739 bmap
= isl_basic_map_add_constraint(bmap
, c
);
742 for (i
= 0; i
< wrap_len
; ++i
) {
743 c
= isl_equality_alloc(isl_local_space_copy(ls
));
744 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
746 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
747 first
+ wrap_len
+ i
, 1);
748 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
749 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
750 bmap
= isl_basic_map_add_constraint(bmap
, c
);
752 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
753 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
754 first
+ wrap_len
+ i
, 1);
755 bmap
= isl_basic_map_add_constraint(bmap
, c
);
757 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
758 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
759 first
+ wrap_len
+ i
, -1);
760 isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
761 bmap
= isl_basic_map_add_constraint(bmap
, c
);
764 isl_local_space_free(ls
);
766 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
767 first
+ 2 * wrap_len
, wrap_len
);
769 return isl_map_from_basic_map(bmap
);
772 /* Add "n" parameters named prefix%d.
774 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
775 int n
, const char *prefix
)
781 nparam
= isl_set_dim(set
, isl_dim_param
);
782 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
784 for (i
= 0; i
< n
; ++i
) {
785 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
786 set
= isl_set_set_dim_name(set
, isl_dim_param
,
793 /* Equate the "n" dimensions of "set" starting at "first" to
794 * freshly created parameters named prefix%d.
796 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
797 int first
, int n
, const char *prefix
)
807 nparam
= isl_set_dim(set
, isl_dim_param
);
809 set
= add_params(set
, n
, prefix
);
811 dim
= isl_set_get_space(set
);
812 bset
= isl_basic_set_universe(isl_space_copy(dim
));
813 ls
= isl_local_space_from_space(dim
);
817 for (i
= 0; i
< n
; ++i
) {
818 c
= isl_equality_alloc(isl_local_space_copy(ls
));
819 isl_int_set_si(v
, -1);
820 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
821 isl_int_set_si(v
, 1);
822 isl_constraint_set_coefficient(c
, isl_dim_set
, first
+ i
, v
);
823 bset
= isl_basic_set_add_constraint(bset
, c
);
827 isl_local_space_free(ls
);
829 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
832 static __isl_give isl_set
*parametrization(__isl_take isl_space
*dim
,
833 int len
, int first
, int n
, const char *prefix
)
837 dim
= isl_space_add_dims(dim
, isl_dim_set
, len
);
838 set
= isl_set_universe(dim
);
840 return parametrize(set
, first
, n
, prefix
);
843 /* Tile the B loops over the tile sizes and then tile/wrap
844 * the T1 loops over the blocks.
846 static __isl_give isl_union_map
*tile_schedule(struct cuda_gen
*gen
,
847 __isl_take isl_union_map
*sched
)
850 isl_map
*tiling
, *block_tiling
;
852 dim
= isl_union_map_get_space(sched
);
853 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
854 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
856 if (gen
->options
->wrap
)
857 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
858 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
860 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
861 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
863 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
865 tiling
= isl_map_apply_range(tiling
, block_tiling
);
867 sched
= isl_union_map_apply_range(sched
,
868 isl_union_map_from_map(tiling
));
870 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
875 static __isl_give isl_union_map
*parametrize_tiled_schedule(
876 struct cuda_gen
*gen
, __isl_take isl_union_map
*sched
)
881 dim
= isl_union_map_get_space(sched
);
882 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->tile_first
, "h");
883 sched
= isl_union_map_intersect_range(sched
,
884 isl_union_set_from_set(par
));
886 dim
= isl_union_map_get_space(sched
);
887 par
= parametrization(dim
, gen
->tiled_len
,
888 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
889 sched
= isl_union_map_intersect_range(sched
,
890 isl_union_set_from_set(par
));
895 /* Tile/wrap the P1 loops over the threads.
897 static __isl_give isl_union_map
*thread_tile_schedule(struct cuda_gen
*gen
,
898 __isl_take isl_union_map
*sched
)
904 dim
= isl_union_map_get_space(sched
);
906 if (gen
->options
->wrap
)
907 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
908 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
910 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
911 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
912 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
914 sched
= isl_union_map_apply_range(sched
,
915 isl_union_map_from_map(tiling
));
917 par
= parametrization(dim
, gen
->thread_tiled_len
,
918 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
920 sched
= isl_union_map_intersect_range(sched
,
921 isl_union_set_from_set(par
));
923 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
928 /* If the user asked for it, scale the shared memory tile loops
929 * (T1P and T2) of "sched" by gen->tile_size[i].
930 * If we are not performing "wrapping", then additionally scale the T1P
931 * loops by gen->grid_dim[i].
933 static __isl_give isl_union_map
*scale_tile_loops(struct cuda_gen
*gen
,
934 __isl_take isl_union_map
*sched
)
938 isl_basic_map
*scale
;
942 if (!gen
->options
->scale_tile_loops
)
945 dim
= isl_union_map_get_space(sched
);
946 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
947 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
948 scale
= isl_basic_map_universe(isl_space_copy(dim
));
949 ls
= isl_local_space_from_space(dim
);
951 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
954 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
955 f
= gen
->tile_size
[i
- gen
->tile_first
];
956 if (!gen
->options
->wrap
)
957 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
958 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
959 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
960 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
963 c
= isl_equality_alloc(isl_local_space_copy(ls
));
964 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
965 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
966 scale
= isl_basic_map_add_constraint(scale
, c
);
969 isl_local_space_free(ls
);
971 sched
= isl_union_map_apply_range(sched
,
972 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
977 /* If we are not performing "wrapping" and if the user asked for it,
978 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
980 static __isl_give isl_union_map
*scale_thread_tile_loops(struct cuda_gen
*gen
,
981 __isl_take isl_union_map
*sched
)
985 isl_basic_map
*scale
;
989 if (gen
->options
->wrap
)
991 if (!gen
->options
->scale_tile_loops
)
994 dim
= isl_union_map_get_space(sched
);
995 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
996 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
997 scale
= isl_basic_map_universe(isl_space_copy(dim
));
998 ls
= isl_local_space_from_space(dim
);
1000 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1003 if (i
>= gen
->shared_len
&&
1004 i
< gen
->shared_len
+ gen
->n_block
)
1005 f
= gen
->block_dim
[i
- gen
->shared_len
];
1007 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1008 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1009 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1010 scale
= isl_basic_map_add_constraint(scale
, c
);
1013 isl_local_space_free(ls
);
1015 sched
= isl_union_map_apply_range(sched
,
1016 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1021 /* If we are not performing "wrapping" and if the user asked for it,
1022 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1024 static __isl_give isl_union_map
*scale_access_tile_loops(struct cuda_gen
*gen
,
1025 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1029 isl_basic_map
*scale
;
1031 isl_local_space
*ls
;
1033 if (gen
->options
->wrap
)
1035 if (!gen
->options
->scale_tile_loops
)
1038 dim
= isl_union_map_get_space(sched
);
1039 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1040 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1041 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1042 ls
= isl_local_space_from_space(dim
);
1044 for (i
= 0; i
< len
; ++i
) {
1047 if (i
>= first
&& i
< first
+ n_tile
)
1048 f
= gen
->block_dim
[i
- first
];
1050 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1051 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1052 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1053 scale
= isl_basic_map_add_constraint(scale
, c
);
1056 isl_local_space_free(ls
);
1058 sched
= isl_union_map_apply_range(sched
,
1059 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1064 /* If print_user_stmt is set, we want to print the statements ourselves,
1065 * instead of relying on the C preprocessor. If so, we need to use
1066 * the stop option so that the domains will be saved on the statement
1069 static void print_cloog_shared_body(struct cuda_gen
*gen
,
1070 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
, int len
,
1071 void (*print_user_stmt
)(struct gpucode_info
*info
,
1072 struct clast_user_stmt
*s
),
1076 CloogOptions
*options
;
1077 CloogDomain
*cloog_context
;
1078 CloogUnionDomain
*ud
;
1080 struct clast_stmt
*stmt
;
1083 sched
= isl_union_map_copy(sched
);
1084 sched
= isl_union_map_align_params(sched
, isl_set_get_space(context
));
1086 options
= cloog_options_malloc(gen
->state
);
1087 options
->language
= CLOOG_LANGUAGE_C
;
1088 options
->strides
= 1;
1092 options
->override
= 1;
1093 options
->save_domains
= 1;
1094 options
->noscalars
= 1;
1095 options
->first_unroll
= first_unroll
;
1097 ud
= cloog_union_domain_from_isl_union_map(sched
);
1098 for (i
= 0; i
< len
; ++i
) {
1099 snprintf(name
, sizeof(name
), "c%d", i
);
1100 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
1102 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
1103 input
= cloog_input_alloc(cloog_context
, ud
);
1105 stmt
= cloog_clast_create_from_input(input
, options
);
1107 gen
->stmt_code
.indent
= gen
->kernel_code
.indent
;
1108 gen
->stmt_code
.dst
= gen
->cuda
.kernel_c
;
1109 gen
->stmt_code
.print_user_stmt
= print_user_stmt
;
1110 gen
->stmt_code
.print_user_stmt_list
= NULL
;
1111 gen
->stmt_code
.print_for_head
= NULL
;
1112 gen
->stmt_code
.print_for_foot
= NULL
;
1113 gen
->stmt_code
.user
= gen
;
1114 gpu_print_host_stmt(&gen
->stmt_code
, stmt
);
1116 cloog_clast_free(stmt
);
1117 cloog_options_free(options
);
1120 /* Add "len" parameters p[i] called prefix%d,
1121 * with bounds to 0 <= p[i] < size[i].
1123 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1124 int len
, int *size
, const char *prefix
)
1130 isl_basic_set
*bset
;
1132 isl_local_space
*ls
;
1135 nparam
= isl_set_dim(set
, isl_dim_param
);
1136 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1138 for (i
= 0; i
< len
; ++i
) {
1139 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1140 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1144 dim
= isl_set_get_space(set
);
1145 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1146 ls
= isl_local_space_from_space(dim
);
1150 for (i
= 0; i
< len
; ++i
) {
1151 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1152 isl_int_set_si(v
, 1);
1153 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1154 bset
= isl_basic_set_add_constraint(bset
, c
);
1156 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1157 isl_int_set_si(v
, -1);
1158 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1159 isl_int_set_si(v
, size
[i
] - 1);
1160 isl_constraint_set_constant(c
, v
);
1161 bset
= isl_basic_set_add_constraint(bset
, c
);
1165 isl_local_space_free(ls
);
1167 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1170 static void print_shared_body(struct cuda_gen
*gen
,
1171 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
,
1172 int len
, void (*print_user_stmt
)(struct gpucode_info
*info
,
1173 struct clast_user_stmt
*s
),
1178 context
= isl_set_copy(shared_domain
);
1179 context
= parametrize(context
, 0, gen
->shared_len
, "g");
1180 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->shared_len
);
1181 context
= add_bounded_parameters(context
,
1182 gen
->n_block
, gen
->block_dim
, "t");
1184 print_cloog_shared_body(gen
, context
, sched
, len
, print_user_stmt
,
1187 isl_set_free(context
);
1190 /* Given a tile of an array, construct a map that maps each element
1191 * of the tile to a copy of the tile shifted to the origin
1192 * (based on the lower bounds in group->private_bound or group->shared_bound).
1193 * If any of the indices is strided, then {private,shared}_bound[i].shift_map
1194 * is applied to the index first.
1195 * The domain of the resulting map is "access",
1196 * while the range space is anonymous.
1198 static __isl_give isl_map
*shift_access(__isl_take isl_set
*access
,
1199 struct cuda_array_ref_group
*group
)
1203 isl_basic_set
*bset
;
1204 isl_basic_map
*bmap
;
1206 isl_basic_set
*offset
;
1207 isl_basic_map
*shift
;
1208 isl_basic_map
*pre_shift
;
1211 struct cuda_array_bound
*bounds
;
1212 int n_index
= group
->array
->n_index
;
1214 bounds
= group
->private_bound
;
1216 bounds
= group
->shared_bound
;
1218 dim
= isl_set_get_space(access
);
1219 dim
= isl_space_drop_dims(dim
, isl_dim_set
, 0, n_index
);
1220 offset
= isl_basic_set_universe(dim
);
1221 for (i
= 0; i
< n_index
; ++i
) {
1222 lb
= isl_aff_copy(bounds
[i
].lb
);
1223 bmap
= isl_basic_map_from_aff(lb
);
1224 bset
= isl_basic_map_range(bmap
);
1225 offset
= isl_basic_set_flat_product(offset
, bset
);
1227 offset
= isl_basic_set_neg(offset
);
1229 dim
= isl_space_map_from_set(isl_set_get_space(access
));
1230 shift
= isl_basic_map_identity(dim
);
1231 shift
= isl_basic_map_set_tuple_name(shift
, isl_dim_out
, NULL
);
1233 bset
= isl_basic_set_universe(isl_set_get_space(access
));
1234 bmap
= isl_basic_map_from_domain_and_range(bset
, offset
);
1236 shift
= isl_basic_map_sum(shift
, bmap
);
1238 dim
= isl_set_get_space(access
);
1239 dim
= isl_space_drop_dims(dim
, isl_dim_set
, 0, n_index
);
1240 dim
= isl_space_map_from_set(dim
);
1241 pre_shift
= isl_basic_map_universe(isl_space_copy(dim
));
1242 dim
= isl_space_add_dims(dim
, isl_dim_in
, 1);
1243 dim
= isl_space_add_dims(dim
, isl_dim_out
, 1);
1244 for (i
= 0; i
< n_index
; ++i
) {
1245 if (!bounds
[i
].shift_map
)
1246 bmap
= isl_basic_map_identity(isl_space_copy(dim
));
1248 bmap
= isl_basic_map_copy(bounds
[i
].shift_map
);
1249 pre_shift
= isl_basic_map_flat_product(pre_shift
, bmap
);
1251 isl_space_free(dim
);
1252 name
= isl_basic_map_get_tuple_name(shift
, isl_dim_in
);
1253 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_in
, name
);
1254 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_out
, name
);
1255 shift
= isl_basic_map_apply_range(pre_shift
, shift
);
1257 sched
= isl_map_from_basic_map(shift
);
1258 sched
= isl_map_intersect_domain(sched
, access
);
1263 /* Construct a schedule for iterating over all elements in the given
1264 * piece of an array. The schedule iterates over a copy of the piece
1265 * that is shifted to the origin.
1266 * We subsequently also perform the tiling/wrapping over the threads.
1268 * In particular, we tile the final iterators so that the final thread
1269 * dimension runs over the final array dimension.
1270 * However, if those final iterators have only a single iteration,
1271 * we try to tile earlier iterators instead.
1273 static __isl_give isl_union_map
*access_schedule(struct cuda_gen
*gen
,
1274 __isl_take isl_set
*access
, struct cuda_array_ref_group
*group
)
1278 isl_union_map
*usched
;
1281 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1285 sched
= shift_access(access
, group
);
1287 n_tile
= gen
->n_block
;
1288 if (n_tile
> nvar
) {
1290 sched
= isl_map_insert_dims(sched
,
1291 isl_dim_out
, 0, n_tile
- nvar
);
1292 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1293 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1297 first
= nvar
- n_tile
;
1299 for (; first
> 0; first
--)
1300 if (!isl_map_plain_is_fixed(sched
, isl_dim_out
,
1301 first
+ n_tile
- 1, NULL
))
1304 dim
= isl_map_get_space(sched
);
1305 dim
= isl_space_params(dim
);
1306 if (gen
->options
->wrap
)
1307 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1308 n_tile
, gen
->block_dim
);
1310 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1311 n_tile
, gen
->block_dim
);
1312 sched
= isl_map_apply_range(sched
, tiling
);
1314 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1315 usched
= isl_union_map_from_map(sched
);
1316 usched
= isl_union_map_intersect_range(usched
,
1317 isl_union_set_from_set(par
));
1319 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1325 /* Print an access to the element in the global memory copy of the
1326 * given array that corresponds to the element described by "pma".
1327 * of the original array.
1328 * The copy in global memory has been linearized, so we need to take
1329 * the array size into account.
1331 static void print_global_index(FILE *out
,
1332 struct cuda_array_info
*array
, __isl_keep isl_pw_multi_aff
*pma
)
1335 isl_ctx
*ctx
= isl_pw_multi_aff_get_ctx(pma
);
1338 if (cuda_array_is_scalar(array
)) {
1339 fprintf(out
, "*%s", array
->name
);
1343 fprintf(out
, "%s[", array
->name
);
1344 prn
= isl_printer_to_file(ctx
, out
);
1345 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1346 for (i
= 0; i
+ 1 < array
->n_index
; ++i
)
1347 prn
= isl_printer_print_str(prn
, "(");
1348 for (i
= 0; i
< array
->n_index
; ++i
) {
1349 isl_pw_aff
*pa
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
1350 pa
= isl_pw_aff_coalesce(pa
);
1352 prn
= isl_printer_print_str(prn
, ") * (");
1353 prn
= isl_printer_print_pw_aff(prn
,
1354 array
->local_bound
[i
]);
1355 prn
= isl_printer_print_str(prn
, ") + ");
1357 prn
= isl_printer_print_pw_aff(prn
, pa
);
1358 isl_pw_aff_free(pa
);
1360 isl_printer_free(prn
);
1364 /* Given an index expression into a tile of an array, adjust the expression
1365 * to a shift of the tile to the origin
1366 * (based on the lower bounds in array->shared_bound).
1367 * If the index is strided, then we first add
1368 * bound->shift and divide by bound->stride.
1370 static __isl_give isl_pw_aff
*shift_index(__isl_take isl_pw_aff
*pa
,
1371 struct cuda_array_info
*array
,
1372 struct cuda_array_bound
*bound
, __isl_take isl_set
*domain
)
1379 shift
= bound
->shift
;
1380 shift
= isl_aff_copy(shift
);
1381 shift
= isl_aff_project_domain_on_params(shift
);
1382 shift
= isl_aff_align_params(shift
, isl_pw_aff_get_space(pa
));
1383 tmp
= isl_pw_aff_alloc(isl_set_copy(domain
), shift
);
1384 pa
= isl_pw_aff_add(pa
, tmp
);
1385 pa
= isl_pw_aff_scale_down(pa
, bound
->stride
);
1388 lb
= isl_aff_copy(bound
->lb
);
1389 lb
= isl_aff_project_domain_on_params(lb
);
1391 lb
= isl_aff_align_params(lb
, isl_pw_aff_get_space(pa
));
1393 tmp
= isl_pw_aff_alloc(isl_set_copy(domain
), lb
);
1394 pa
= isl_pw_aff_sub(pa
, tmp
);
1395 pa
= isl_pw_aff_coalesce(pa
);
1396 pa
= isl_pw_aff_gist(pa
, domain
);
1401 /* Print an access to the element in the private/shared memory copy of the
1402 * given array reference group that corresponds to the element described
1403 * by "pma" of the original array.
1404 * Since the array in private/shared memory is just a shifted copy of part
1405 * of the original array, we simply need to subtract the lower bound,
1406 * which was computed in can_tile_for_shared_memory.
1407 * If any of the indices is strided, then we first add
1408 * bounds[i].shift and divide by bounds[i].stride.
1410 static void print_local_index(FILE *out
,
1411 struct cuda_array_ref_group
*group
, struct cuda_array_bound
*bounds
,
1412 __isl_keep isl_pw_multi_aff
*pma
, __isl_keep isl_set
*domain
)
1415 isl_ctx
*ctx
= isl_pw_multi_aff_get_ctx(pma
);
1417 struct cuda_array_info
*array
= group
->array
;
1419 print_array_name(out
, group
);
1420 for (i
= 0; i
< array
->n_index
; ++i
) {
1421 isl_pw_aff
*pa
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
1423 pa
= shift_index(pa
, array
, &bounds
[i
], isl_set_copy(domain
));
1426 prn
= isl_printer_to_file(ctx
, out
);
1427 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1428 prn
= isl_printer_print_pw_aff(prn
, pa
);
1429 isl_printer_free(prn
);
1431 isl_pw_aff_free(pa
);
1435 /* This function is called for each leaf in the clast of the code
1436 * for copying to or from shared/private memory.
1437 * The statement name is {read,write}_{shared,private}_<array>.
1439 * The schedule iterates over the array elements, so we can use
1440 * the domain of copy_sched at the current scheduling position
1441 * as the index of the array.
1443 static void print_copy_statement(struct gpucode_info
*code
,
1444 struct clast_user_stmt
*u
)
1446 struct cuda_gen
*gen
= code
->user
;
1449 struct cuda_array_ref_group
*group
= gen
->copy_group
;
1450 struct cuda_array_bound
*bounds
= gen
->copy_bound
;
1457 isl_pw_multi_aff
*pma
;
1460 read
= !strncmp(u
->statement
->name
, "read", 4);
1462 domain
= extract_host_domain(u
);
1465 sched
= isl_map_copy(gen
->copy_sched
);
1466 sched
= isl_map_reverse(sched
);
1467 sched
= isl_map_intersect_domain(sched
, domain
);
1468 n_in
= isl_map_dim(sched
, isl_dim_in
);
1469 n_out
= isl_map_dim(sched
, isl_dim_out
);
1470 dim
= isl_map_get_space(sched
);
1471 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, n_in
);
1472 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, n_out
);
1473 param
= parametrization(dim
, n_in
, 0, n_in
, "c");
1474 sched
= isl_map_align_params(sched
, isl_set_get_space(param
));
1475 sched
= isl_map_intersect_domain(sched
, param
);
1476 index
= isl_map_range(sched
);
1477 domain
= isl_set_copy(index
);
1478 pma
= isl_pw_multi_aff_from_set(index
);
1479 pma
= isl_pw_multi_aff_coalesce(pma
);
1480 domain
= isl_set_params(domain
);
1482 print_indent(code
->dst
, code
->indent
);
1484 print_local_index(code
->dst
, group
, bounds
, pma
, domain
);
1485 fprintf(code
->dst
, " = ");
1486 print_global_index(code
->dst
, group
->array
, pma
);
1488 print_global_index(code
->dst
, group
->array
, pma
);
1489 fprintf(code
->dst
, " = ");
1490 print_local_index(code
->dst
, group
, bounds
, pma
, domain
);
1492 fprintf(code
->dst
, ";\n");
1494 isl_pw_multi_aff_free(pma
);
1495 isl_set_free(domain
);
1498 static void print_shared_access(struct cuda_gen
*gen
,
1499 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
1500 const char *type
, struct cuda_array_ref_group
*group
)
1502 const char *array_name
;
1505 isl_union_map
*sched
;
1506 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1509 ctx
= isl_set_get_ctx(access
);
1510 array_name
= isl_set_get_tuple_name(access
);
1511 name
= isl_alloc_array(ctx
, char,
1512 strlen(type
) + sizeof("_shared_") + strlen(array_name
) + 20);
1513 if (group
->array
->n_group
> 1)
1514 sprintf(name
, "%s_shared_%s_%d", type
, array_name
, group
->nr
);
1516 sprintf(name
, "%s_shared_%s", type
, array_name
);
1517 access
= isl_set_set_tuple_name(access
, name
);
1520 sched
= access_schedule(gen
, access
, group
);
1522 n_tile
= gen
->n_block
;
1526 gen
->copy_sched
= isl_map_from_union_map(isl_union_map_copy(sched
));
1527 gen
->copy_group
= group
;
1528 gen
->copy_bound
= group
->shared_bound
;
1530 print_shared_body(gen
, shared_domain
, sched
, nvar
+ n_tile
,
1531 &print_copy_statement
, -1);
1533 isl_union_map_free(sched
);
1534 isl_map_free(gen
->copy_sched
);
1537 /* Return the union of all read (read = 1) and/or write (write = 1)
1538 * access relations in the group.
1540 static __isl_give isl_union_map
*group_access_relation(
1541 struct cuda_array_ref_group
*group
, int read
, int write
)
1544 isl_union_map
*access
;
1546 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1547 for (i
= 0; i
< group
->n_ref
; ++i
) {
1550 if (!((read
&& group
->refs
[i
]->read
) ||
1551 (write
&& group
->refs
[i
]->write
)))
1553 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1554 access
= isl_union_map_union(access
,
1555 isl_union_map_from_map(map_i
));
1561 /* Check that none of the shared memory tiles involve any strides.
1563 static int no_strides(struct cuda_array_ref_group
*group
)
1566 int n_index
= group
->array
->n_index
;
1568 for (i
= 0; i
< n_index
; ++i
)
1569 if (group
->shared_bound
[i
].shift
)
1575 /* Return a set containing the values of the given index i
1576 * of the elements in the array tile in global memory that corresponds
1577 * to the shared memory copy.
1578 * In particular, if a is the index, we return a set with constraints
1580 * tile_offset <= a <= tile_offset + tile_size - 1
1584 * 0 <= a <= array_size - 1
1587 static __isl_give isl_set
*group_tile_dim(struct cuda_array_ref_group
*group
,
1590 isl_basic_set
*tile
;
1593 isl_local_space
*ls
;
1598 aff
= isl_aff_copy(group
->shared_bound
[i
].lb
);
1599 aff
= isl_aff_add_dims(aff
, isl_dim_in
, 1);
1600 ls
= isl_aff_get_domain_local_space(aff
);
1601 aff
= isl_aff_neg(aff
);
1602 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1603 c
= isl_inequality_from_aff(isl_aff_copy(aff
));
1604 tile
= isl_basic_set_from_constraint(c
);
1606 aff
= isl_aff_neg(aff
);
1607 aff
= isl_aff_add_constant(aff
, group
->shared_bound
[i
].size
);
1608 aff
= isl_aff_add_constant_si(aff
, -1);
1609 c
= isl_inequality_from_aff(aff
);
1610 tile
= isl_basic_set_add_constraint(tile
, c
);
1612 aff
= isl_aff_zero_on_domain(ls
);
1613 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1614 c
= isl_inequality_from_aff(aff
);
1615 tile
= isl_basic_set_add_constraint(tile
, c
);
1617 bound
= isl_pw_aff_copy(group
->array
->bound
[i
]);
1618 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, 1);
1619 ls
= isl_local_space_from_space(isl_pw_aff_get_domain_space(bound
));
1620 aff
= isl_aff_zero_on_domain(ls
);
1621 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
1622 aff
= isl_aff_add_constant_si(aff
, 1);
1623 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
1625 tile_set
= isl_pw_aff_ge_set(bound
, isl_pw_aff_alloc(dom
, aff
));
1626 tile_set
= isl_set_align_params(tile_set
, isl_basic_set_get_space(tile
));
1627 tile_set
= isl_set_intersect(tile_set
, isl_set_from_basic_set(tile
));
1632 /* Return a set containing the elements in the array tile in
1633 * global memory that corresponds to the shared memory copy.
1635 static __isl_give isl_set
*group_tile(struct cuda_array_ref_group
*group
)
1638 int n_index
= group
->array
->n_index
;
1641 tile
= group_tile_dim(group
, 0);
1642 for (i
= 1; i
< n_index
; ++i
) {
1645 tile_i
= group_tile_dim(group
, i
);
1646 tile
= isl_set_flat_product(tile
, tile_i
);
1649 tile
= isl_set_set_tuple_name(tile
, group
->array
->name
);
1654 /* Print code for reading into or writing from shared memory
1655 * the given array reference group.
1657 * sched maps the original iteration domains to the shared memory tile loops.
1659 * If we are performing a read from global memory to shared memory,
1660 * if the array involved is not a scalar and if the definition of the
1661 * shared memory tiles does not involve any strides, then we copy
1662 * the entire tile to shared memory. This may result in some extra
1663 * elements getting copied, but it should lead to simpler code
1664 * (which means that fewer registers may be needed) and less divergence.
1666 * Otherwise, we only copy the elements that will be read or have been written
1669 * Note that the absence of stride requirement can easily be lifted.
1670 * We would just need to add constraints of the form
1672 * shift + a = stride * alpha
1674 static int print_group_shared_accesses(struct cuda_gen
*gen
,
1675 struct cuda_array_ref_group
*group
, const char *type
,
1676 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
)
1679 isl_union_map
*access
;
1680 isl_union_set
*uset
;
1681 isl_set
*access_set
;
1683 if (group
->private_bound
)
1685 if (!group
->shared_bound
)
1688 read
= !strcmp(type
, "read");
1690 access
= group_access_relation(group
, read
, !read
);
1691 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
1692 uset
= isl_union_map_range(access
);
1694 if (isl_union_set_is_empty(uset
)) {
1695 isl_union_set_free(uset
);
1699 if (read
&& group
->array
->n_index
> 0 && no_strides(group
)) {
1700 isl_union_set_free(uset
);
1701 access_set
= group_tile(group
);
1702 print_shared_access(gen
, shared_domain
, access_set
,
1707 access_set
= isl_set_from_union_set(uset
);
1708 access_set
= isl_set_coalesce(access_set
);
1710 print_shared_access(gen
, shared_domain
, access_set
, type
, group
);
1715 /* Print code for reading into or writing from shared memory at
1716 * the given level (-1 for innermost).
1718 * If we are not printing at the innermost level, then the dimensionality
1719 * of shared_domain may be smaller than gen->shared_len.
1720 * As the rest of the code assumes that the domain of access has
1721 * gen->shared_len dimensions, we therefore may need to embed this domain
1722 * in a higher dimensional space after intersection with shared_domain.
1724 static void print_shared_accesses(struct cuda_gen
*gen
,
1725 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
1726 const char *type
, int level
)
1732 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
1734 isl_union_map
*sched
;
1736 shared_domain
= isl_set_copy(shared_domain
);
1737 sched
= isl_union_map_copy(gen
->tiled_sched
);
1738 dim
= isl_union_map_get_space(sched
);
1739 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
1740 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1741 sched
= isl_union_map_intersect_range(sched
,
1742 isl_union_set_from_set(isl_set_copy(shared_domain
)));
1743 if (shared_len
!= gen
->shared_len
) {
1744 dim
= isl_union_map_get_space(sched
);
1745 proj
= projection(dim
, gen
->shared_len
, shared_len
);
1746 proj
= isl_map_reverse(proj
);
1747 shared_domain
= isl_set_apply(shared_domain
,
1748 isl_map_copy(proj
));
1749 sched
= isl_union_map_apply_range(sched
,
1750 isl_union_map_from_map(proj
));
1753 dim
= isl_union_map_get_space(sched
);
1754 par
= parametrization(dim
, gen
->shared_len
, 0, gen
->shared_len
, "g");
1755 sched
= isl_union_map_intersect_range(sched
,
1756 isl_union_set_from_set(par
));
1758 for (i
= 0; i
< gen
->n_array
; ++i
) {
1759 struct cuda_array_info
*array
= &gen
->array
[i
];
1761 if (gen
->array
[i
].print_shared_level
!= level
)
1764 for (j
= 0; j
< array
->n_group
; ++j
) {
1765 if (print_group_shared_accesses(gen
, array
->groups
[j
],
1766 type
, shared_domain
, sched
))
1771 isl_union_map_free(sched
);
1772 isl_set_free(shared_domain
);
1775 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
1776 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
1780 /* This function is called for each access to an array in some statement
1781 * in the original code.
1782 * Replace that access by an access to shared or (linearized) global memory.
1783 * Since the array in shared memory is just
1784 * a shifted copy of part of the original array, we simply need
1785 * to subtract the lower bound, which was computed
1786 * in can_tile_for_shared_memory.
1787 * If any of the indices is strided, then we first add
1788 * shared_bound[i].shift and divide by shared_bound[i].stride.
1790 * If the given array is accessed directly from global memory,
1791 * we don't need to perform any shifting and simply simplify
1792 * expression in the context of the domain instead.
1794 * If the array space (range of access) has no name, then we are
1795 * accessing an iterator in the original program.
1797 static void print_access(struct cuda_gen
*gen
, __isl_take isl_map
*access
,
1803 struct cuda_array_info
*array
= NULL
;
1805 isl_pw_multi_aff
*pma
;
1808 struct cuda_array_bound
*bounds
= NULL
;
1810 access
= isl_map_align_params(access
,
1811 isl_set_get_space(gen
->stmt_domain
));
1813 data_set
= isl_set_apply(isl_set_copy(gen
->stmt_domain
), access
);
1815 name
= isl_set_get_tuple_name(data_set
);
1818 fprintf(gen
->cuda
.kernel_c
, "(");
1820 struct cuda_array_ref_group
*group
;
1822 for (i
= 0; i
< gen
->n_array
; ++i
) {
1823 if (strcmp(name
, gen
->array
[i
].name
))
1825 array
= &gen
->array
[i
];
1828 group
= array
->groups
[group_nr
];
1829 bounds
= group
->private_bound
;
1831 bounds
= group
->shared_bound
;
1833 if (!bounds
&& cuda_array_is_scalar(array
))
1834 fprintf(gen
->cuda
.kernel_c
, "*");
1835 print_array_name(gen
->cuda
.kernel_c
, group
);
1837 if (cuda_array_is_scalar(array
)) {
1838 isl_set_free(data_set
);
1842 fprintf(gen
->cuda
.kernel_c
, "[");
1846 n_index
= isl_set_dim(data_set
, isl_dim_set
);
1847 pma
= isl_pw_multi_aff_from_set(data_set
);
1848 pma
= isl_pw_multi_aff_coalesce(pma
);
1850 prn
= isl_printer_to_file(gen
->ctx
, gen
->cuda
.kernel_c
);
1851 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1854 for (i
= 0; i
+ 1 < n_index
; ++i
)
1855 prn
= isl_printer_print_str(prn
, "(");
1857 for (i
= 0; i
< n_index
; ++i
) {
1860 index
= isl_pw_multi_aff_get_pw_aff(pma
, i
);
1863 prn
= isl_printer_print_pw_aff(prn
, index
);
1864 isl_pw_aff_free(index
);
1868 domain
= isl_set_copy(gen
->stmt_domain
);
1869 domain
= isl_set_params(domain
);
1871 index
= isl_pw_aff_coalesce(index
);
1872 index
= isl_pw_aff_gist(index
, domain
);
1874 index
= shift_index(index
, array
, &bounds
[i
], domain
);
1878 prn
= isl_printer_print_str(prn
, ") * (");
1879 prn
= isl_printer_print_pw_aff(prn
,
1880 array
->local_bound
[i
]);
1881 prn
= isl_printer_print_str(prn
, ") + ");
1883 prn
= isl_printer_print_str(prn
, "][");
1885 prn
= isl_printer_print_pw_aff(prn
, index
);
1886 isl_pw_aff_free(index
);
1889 prn
= isl_printer_print_str(prn
, ")");
1891 prn
= isl_printer_print_str(prn
, "]");
1892 isl_printer_free(prn
);
1894 isl_pw_multi_aff_free(pma
);
1897 static struct cuda_stmt_access
*print_expr(struct cuda_gen
*gen
, FILE *out
,
1898 struct pet_expr
*expr
, struct cuda_stmt_access
*access
, int outer
)
1902 switch (expr
->type
) {
1903 case pet_expr_double
:
1904 fprintf(out
, "%g", expr
->d
);
1906 case pet_expr_access
:
1907 print_access(gen
, isl_map_copy(access
->access
), access
->group
);
1908 access
= access
->next
;
1910 case pet_expr_unary
:
1913 fprintf(out
, " %s ", pet_op_str(expr
->op
));
1914 access
= print_expr(gen
, out
, expr
->args
[pet_un_arg
],
1919 case pet_expr_binary
:
1922 access
= print_expr(gen
, out
, expr
->args
[pet_bin_lhs
],
1924 fprintf(out
, " %s ", pet_op_str(expr
->op
));
1925 access
= print_expr(gen
, out
, expr
->args
[pet_bin_rhs
],
1930 case pet_expr_ternary
:
1933 access
= print_expr(gen
, out
, expr
->args
[pet_ter_cond
],
1935 fprintf(out
, " ? ");
1936 access
= print_expr(gen
, out
, expr
->args
[pet_ter_true
],
1938 fprintf(out
, " : ");
1939 access
= print_expr(gen
, out
, expr
->args
[pet_ter_false
],
1945 fprintf(out
, "%s(", expr
->name
);
1946 for (i
= 0; i
< expr
->n_arg
; ++i
) {
1949 access
= print_expr(gen
, out
, expr
->args
[i
],
1957 static void print_stmt_body(struct cuda_gen
*gen
,
1958 FILE *out
, struct cuda_stmt
*stmt
)
1960 print_expr(gen
, out
, stmt
->body
, stmt
->accesses
, 1);
1961 fprintf(out
, ";\n");
1964 /* This function is called for each leaf in the innermost clast,
1965 * i.e., for each statement.
1966 * We print the statement body, simplifying the accesses based
1969 static void print_statement(struct gpucode_info
*code
,
1970 struct clast_user_stmt
*u
)
1972 struct cuda_gen
*gen
= code
->user
;
1975 isl_set
*stmt_domain
;
1976 isl_union_map
*stmt_sched
;
1977 isl_union_set
*uset
;
1979 struct cuda_stmt
*stmt
;
1981 nr
= atoi(u
->statement
->name
+ 2);
1982 stmt
= &gen
->stmts
[nr
];
1984 stmt_domain
= extract_host_domain(u
);
1986 stmt_sched
= isl_union_map_intersect_range(
1987 isl_union_map_copy(gen
->local_sched
),
1988 isl_union_set_from_set(extend(stmt_domain
,
1989 gen
->thread_tiled_len
)));
1990 dim
= isl_union_map_get_space(stmt_sched
);
1991 par
= parametrization(dim
, gen
->thread_tiled_len
, 0,
1992 gen
->thread_tiled_len
, "c");
1993 stmt_sched
= isl_union_map_intersect_range(stmt_sched
,
1994 isl_union_set_from_set(par
));
1996 uset
= isl_union_map_domain(stmt_sched
);
1997 dim
= isl_union_set_get_space(uset
);
1998 dim
= isl_space_add_dims(dim
, isl_dim_set
,
1999 isl_set_dim(stmt
->domain
, isl_dim_set
));
2000 dim
= isl_space_set_tuple_name(dim
, isl_dim_set
, u
->statement
->name
);
2001 gen
->stmt_domain
= isl_union_set_extract_set(uset
, dim
);
2002 isl_union_set_free(uset
);
2004 print_indent(code
->dst
, code
->indent
);
2005 print_stmt_body(gen
, code
->dst
, stmt
);
2007 isl_set_free(gen
->stmt_domain
);
2010 static void print_private_access(struct cuda_gen
*gen
,
2011 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
2012 const char *type
, struct cuda_array_ref_group
*group
)
2014 const char *array_name
;
2017 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
2018 isl_union_map
*usched
;
2020 if (isl_set_fast_is_empty(access
)) {
2021 isl_set_free(access
);
2025 ctx
= isl_set_get_ctx(access
);
2026 array_name
= isl_set_get_tuple_name(access
);
2027 name
= isl_alloc_array(ctx
, char,
2028 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
2029 if (group
->array
->n_group
> 1)
2030 sprintf(name
, "%s_private_%s_%d", type
, array_name
, group
->nr
);
2032 sprintf(name
, "%s_private_%s", type
, array_name
);
2033 access
= isl_set_set_tuple_name(access
, name
);
2036 gen
->copy_sched
= shift_access(access
, group
);
2037 gen
->copy_group
= group
;
2038 gen
->copy_bound
= group
->private_bound
;
2040 usched
= isl_union_map_from_map(isl_map_copy(gen
->copy_sched
));
2041 print_shared_body(gen
, shared_domain
, usched
, nvar
,
2042 &print_copy_statement
, 1);
2043 isl_union_map_free(usched
);
2045 isl_map_free(gen
->copy_sched
);
2048 /* Print code for reading into or writing from private memory
2049 * the given array reference group.
2051 * sched maps the original iteration domains to the shared memory tile loops.
2053 static void print_group_private_accesses(struct cuda_gen
*gen
,
2054 struct cuda_array_ref_group
*group
,
2055 const char *type
, __isl_keep isl_set
*shared_domain
,
2056 unsigned first_shared
, int shared_len
, __isl_keep isl_union_map
*sched
)
2059 isl_union_map
*access
;
2060 isl_union_set
*uset
;
2061 isl_set
*access_set
;
2063 if (!group
->private_bound
)
2066 read
= !strcmp(type
, "read");
2068 access
= group_access_relation(group
, read
, !read
);
2069 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
2070 access
= isl_union_map_intersect(access
,
2071 isl_union_map_copy(gen
->private_access
));
2072 uset
= isl_union_map_range(access
);
2074 if (isl_union_set_is_empty(uset
)) {
2075 isl_union_set_free(uset
);
2079 access_set
= isl_set_from_union_set(uset
);
2080 access_set
= isl_set_coalesce(access_set
);
2081 access_set
= isl_set_eliminate(access_set
, isl_dim_param
,
2082 first_shared
+ shared_len
,
2083 gen
->shared_len
- shared_len
);
2085 print_private_access(gen
, shared_domain
, access_set
, type
, group
);
2088 /* Print code for reading into or writing from private memory at
2089 * the given level (-1 for innermost).
2091 * If we are not printing at the innermost level, then the dimensionality
2092 * of shared_domain may be smaller than gen->shared_len.
2093 * As the rest of the code assumes that the domain of access has
2094 * gen->shared_len dimensions, we therefore may need to embed this domain
2095 * in a higher dimensional space after intersection with shared_domain.
2097 * This code is very similar to print_shared_accesses.
2098 * The main difference is that we to take into account gen->private_access.
2100 static void print_private_accesses(struct cuda_gen
*gen
,
2101 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
2102 const char *type
, int level
)
2107 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
2108 unsigned first_shared
;
2109 isl_union_map
*sched
;
2111 shared_domain
= isl_set_copy(shared_domain
);
2112 sched
= isl_union_map_copy(gen
->tiled_sched
);
2113 dim
= isl_union_map_get_space(sched
);
2114 first_shared
= isl_space_dim(dim
, isl_dim_param
);
2115 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
2116 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2117 sched
= isl_union_map_intersect_range(sched
,
2118 isl_union_set_from_set(isl_set_copy(shared_domain
)));
2119 if (shared_len
!= gen
->shared_len
) {
2120 dim
= isl_union_map_get_space(sched
);
2121 proj
= projection(dim
, gen
->shared_len
, shared_len
);
2122 proj
= isl_map_reverse(proj
);
2123 shared_domain
= isl_set_apply(shared_domain
,
2124 isl_map_copy(proj
));
2125 sched
= isl_union_map_apply_range(sched
,
2126 isl_union_map_from_map(proj
));
2129 for (i
= 0; i
< gen
->n_array
; ++i
) {
2130 struct cuda_array_info
*array
= &gen
->array
[i
];
2132 if (gen
->array
[i
].print_shared_level
!= level
)
2135 for (j
= 0; j
< array
->n_group
; ++j
)
2136 print_group_private_accesses(gen
, array
->groups
[j
],
2137 type
, shared_domain
,
2138 first_shared
, shared_len
, sched
);
2141 isl_union_map_free(sched
);
2142 isl_set_free(shared_domain
);
2145 /* Set unroll[j] if the input dimension j is involved in
2146 * the index expression represented by bmap.
2148 static int check_unroll(__isl_take isl_basic_map
*bmap
, void *user
)
2151 int n_in
= isl_basic_map_dim(bmap
, isl_dim_in
);
2152 int n_out
= isl_basic_map_dim(bmap
, isl_dim_out
);
2155 for (i
= 0; i
< n_out
; ++i
) {
2159 ok
= isl_basic_map_has_defining_equality(bmap
,
2160 isl_dim_out
, i
, &c
);
2162 for (j
= 0; j
< n_in
; ++j
)
2163 if (isl_constraint_involves_dims(c
, isl_dim_in
, j
, 1))
2165 isl_constraint_free(c
);
2168 isl_basic_map_free(bmap
);
2172 /* Given an array pos mapping input dimensions to the corresponding
2173 * output dimension, construct the corresponding map.
2175 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
2180 isl_basic_map
*bmap
;
2181 isl_local_space
*ls
;
2183 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
2184 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
2185 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
2186 ls
= isl_local_space_from_space(dim
);
2188 for (i
= 0; i
< len
; ++i
) {
2189 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2190 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
2191 isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
], 1);
2192 bmap
= isl_basic_map_add_constraint(bmap
, c
);
2194 isl_local_space_free(ls
);
2196 return isl_map_from_basic_map(bmap
);
2199 /* Find all loops involved in any of the index expressions for any of
2200 * the private accesses, move them innermost and then mark them as
2201 * requiring unrolling by setting gen->first_unroll.
2202 * The loops involved should all be parallel because of the checks
2203 * we performed in check_private_group_access. Moving them innermost
2204 * is therefore a valid transformation.
2206 static __isl_give isl_union_map
*interchange_for_unroll(struct cuda_gen
*gen
,
2207 __isl_take isl_union_map
*sched
)
2210 int unroll
[gen
->thread_tiled_len
];
2211 int perm
[gen
->thread_tiled_len
];
2214 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
2216 gen
->first_unroll
= -1;
2218 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
2220 for (i
= 0; i
< gen
->n_array
; ++i
) {
2221 struct cuda_array_info
*array
= &gen
->array
[i
];
2223 for (j
= 0; j
< array
->n_group
; ++j
) {
2224 isl_union_map
*access
;
2227 if (!array
->groups
[j
]->private_bound
)
2230 access
= group_access_relation(array
->groups
[j
], 1, 1);
2231 access
= isl_union_map_apply_domain(access
,
2232 isl_union_map_copy(sched
));
2234 acc
= isl_map_from_union_map(access
);
2235 isl_map_foreach_basic_map(acc
, &check_unroll
, unroll
);
2241 for (i
= 0; i
< gen
->shared_len
; ++i
)
2245 for (i
= gen
->shared_len
; i
< len
; ++i
)
2252 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
2257 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
2260 gen
->first_unroll
= 1 + j
;
2261 for (i
= 0; i
< len
; ++i
)
2265 dim
= isl_union_map_get_space(sched
);
2266 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
2267 sched
= isl_union_map_apply_range(sched
,
2268 isl_union_map_from_map(permute
));
2273 /* This function is called for each leaf in the clast of the kernel code.
2274 * We first specialize the schedule to the site of the leaf and
2275 * print code for reading into shared memory, performing the actual
2276 * computations and writing from shared memory, with the required
2279 static void print_kernel_user(struct gpucode_info
*code
,
2280 struct clast_user_stmt
*u
)
2282 struct cuda_gen
*gen
= code
->user
;
2283 isl_set
*shared_domain
;
2285 shared_domain
= extract_entire_host_domain(u
);
2287 print_shared_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2289 print_private_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2291 print_shared_body(gen
, shared_domain
, gen
->local_sched
,
2292 gen
->thread_tiled_len
, &print_statement
,
2295 print_private_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2297 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
2298 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
2300 print_shared_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2302 isl_set_free(shared_domain
);
2305 /* Check if we need to perform any copying to shared memory at this level
2306 * and if so, print the copying instructions.
2307 * Any array for which we are allowed to print copying instructions at
2308 * this level, but haven't done so already, is printed.
2310 static void print_kernel_for_head(struct gpucode_info
*code
,
2311 struct clast_for
*f
)
2314 struct cuda_gen
*gen
= code
->user
;
2319 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2320 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2322 for (i
= 0; i
< gen
->n_array
; ++i
) {
2323 if (gen
->array
[i
].print_shared_level
>= 0)
2325 if (gen
->array
[i
].last_shared
> level
)
2327 gen
->array
[i
].print_shared_level
= level
;
2332 print_shared_accesses(gen
, domain
, gen
->read
, "read", level
);
2333 print_private_accesses(gen
, domain
, gen
->read
, "read", level
);
2336 isl_set_free(domain
);
2339 /* Print instructions for copying from shared memory for each array
2340 * for which print_kernel_for_head has added copying instructions
2343 static void print_kernel_for_foot(struct gpucode_info
*code
,
2344 struct clast_for
*f
)
2347 struct cuda_gen
*gen
= code
->user
;
2352 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2353 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2355 for (i
= 0; i
< gen
->n_array
; ++i
) {
2356 if (gen
->array
[i
].print_shared_level
!= level
)
2363 print_private_accesses(gen
, domain
, gen
->write
, "write", level
);
2364 print_shared_accesses(gen
, domain
, gen
->write
, "write", level
);
2367 isl_set_free(domain
);
2370 /* Use CLooG to generate code for the outer gen->shared_first loops
2371 * of the local schedule "sched".
2372 * The pretty printing of this code is handled by gpu_print_host_stmt,
2373 * which calls print_kernel_user for each iteration of the shared tile loops.
2375 static void print_cloog_kernel_body(struct cuda_gen
*gen
,
2376 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
)
2379 CloogOptions
*options
;
2380 CloogDomain
*cloog_context
;
2381 CloogUnionDomain
*ud
;
2383 struct clast_stmt
*stmt
;
2386 sched
= isl_union_map_copy(sched
);
2387 sched
= isl_union_map_align_params(sched
, isl_set_get_space(context
));
2389 options
= cloog_options_malloc(gen
->state
);
2390 options
->language
= CLOOG_LANGUAGE_C
;
2391 options
->strides
= 1;
2393 options
->stop
= gen
->shared_len
;
2394 options
->f
= gen
->tiled_len
;
2395 options
->l
= gen
->tiled_len
;
2396 options
->save_domains
= 1;
2397 options
->noscalars
= 1;
2399 ud
= cloog_union_domain_from_isl_union_map(sched
);
2400 for (i
= 0; i
< gen
->shared_len
; ++i
) {
2401 snprintf(name
, sizeof(name
), "g%d", i
);
2402 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
2404 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
2405 input
= cloog_input_alloc(cloog_context
, ud
);
2407 stmt
= cloog_clast_create_from_input(input
, options
);
2409 gen
->kernel_code
.indent
= 4;
2410 gen
->kernel_code
.dst
= gen
->cuda
.kernel_c
;
2411 gen
->kernel_code
.print_user_stmt
= NULL
;
2412 gen
->kernel_code
.print_user_stmt_list
= &print_kernel_user
;
2413 gen
->kernel_code
.print_for_head
= &print_kernel_for_head
;
2414 gen
->kernel_code
.print_for_foot
= &print_kernel_for_foot
;
2415 gen
->kernel_code
.user
= gen
;
2416 gpu_print_host_stmt(&gen
->kernel_code
, stmt
);
2418 cloog_clast_free(stmt
);
2419 cloog_options_free(options
);
2422 static void print_kernel_iterators(struct cuda_gen
*gen
)
2425 const char *block_dims
[] = { "blockIdx.x", "blockIdx.y" };
2426 const char *thread_dims
[] = { "threadIdx.x", "threadIdx.y",
2429 if (gen
->n_grid
> 0) {
2430 print_indent(gen
->cuda
.kernel_c
, 4);
2431 fprintf(gen
->cuda
.kernel_c
, "int ");
2432 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2434 fprintf(gen
->cuda
.kernel_c
, ", ");
2435 fprintf(gen
->cuda
.kernel_c
, "b%d = %s",
2436 i
, block_dims
[gen
->n_grid
- 1 - i
]);
2438 fprintf(gen
->cuda
.kernel_c
, ";\n");
2441 if (gen
->n_block
> 0) {
2442 print_indent(gen
->cuda
.kernel_c
, 4);
2443 fprintf(gen
->cuda
.kernel_c
, "int ");
2444 for (i
= 0; i
< gen
->n_block
; ++i
) {
2446 fprintf(gen
->cuda
.kernel_c
, ", ");
2447 fprintf(gen
->cuda
.kernel_c
, "t%d = %s",
2448 i
, thread_dims
[gen
->n_block
- 1 - i
]);
2450 fprintf(gen
->cuda
.kernel_c
, ";\n");
2454 static void print_group_shared_array(struct cuda_gen
*gen
,
2455 struct cuda_array_ref_group
*group
)
2458 struct cuda_array_bound
*bounds
;
2460 bounds
= group
->private_bound
;
2462 bounds
= group
->shared_bound
;
2466 print_indent(gen
->cuda
.kernel_c
, 4);
2467 fprintf(gen
->cuda
.kernel_c
, "%s%s ",
2468 group
->private_bound
? "" : "__shared__ ", group
->array
->type
);
2469 print_array_name(gen
->cuda
.kernel_c
, group
);
2470 for (j
= 0; j
< group
->array
->n_index
; ++j
) {
2471 fprintf(gen
->cuda
.kernel_c
, "[");
2472 isl_int_print(gen
->cuda
.kernel_c
, bounds
[j
].size
, 0);
2473 fprintf(gen
->cuda
.kernel_c
, "]");
2475 fprintf(gen
->cuda
.kernel_c
, ";\n");
2478 static void print_shared_arrays(struct cuda_gen
*gen
)
2482 for (i
= 0; i
< gen
->n_array
; ++i
) {
2483 struct cuda_array_info
*array
= &gen
->array
[i
];
2485 for (j
= 0; j
< array
->n_group
; ++j
)
2486 print_group_shared_array(gen
, array
->groups
[j
]);
2490 static void print_kernel_body(struct cuda_gen
*gen
,
2491 __isl_keep isl_set
*host_domain
, __isl_keep isl_union_map
*sched
)
2495 context
= isl_set_copy(host_domain
);
2496 context
= parametrize(context
, 0, gen
->tile_first
, "h");
2497 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->tile_first
);
2498 context
= add_bounded_parameters(context
,
2499 gen
->n_grid
, gen
->grid_dim
, "b");
2501 print_kernel_iterators(gen
);
2502 print_shared_arrays(gen
);
2504 fprintf(gen
->cuda
.kernel_c
, "\n");
2506 print_cloog_kernel_body(gen
, context
, sched
);
2508 isl_set_free(context
);
2511 /* Given a constraint
2513 * a(p,i) + j = g f(e)
2515 * or -a(p,i) - j = g f(e) if sign < 0,
2516 * store a(p,i) in bound->shift and g (stride) in bound->stride.
2517 * a(p,i) is assumed to be an expression in only the parameters.
2519 static void extract_stride(__isl_keep isl_constraint
*c
,
2520 struct cuda_array_bound
*bound
, isl_int stride
, int sign
)
2528 isl_int_set(bound
->stride
, stride
);
2530 dim
= isl_constraint_get_space(c
);
2531 dim
= isl_space_params(dim
);
2533 nparam
= isl_space_dim(dim
, isl_dim_param
);
2537 isl_constraint_get_constant(c
, &v
);
2540 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(dim
));
2541 aff
= isl_aff_set_constant(aff
, v
);
2543 for (i
= 0; i
< nparam
; ++i
) {
2544 isl_constraint_get_coefficient(c
, isl_dim_param
, i
, &v
);
2545 if (isl_int_is_zero(v
))
2549 aff
= isl_aff_add_coefficient(aff
, isl_dim_param
, i
, v
);
2557 /* Given an equality constraint of a map with a single output dimension j,
2558 * check if the constraint is of the form
2560 * a(p,i) + j = g f(e)
2562 * with a(p,i) an expression in the parameters and input dimensions
2563 * and f(e) an expression in the existentially quantified variables.
2564 * If so, and if g is larger than any such g from a previously considered
2565 * constraint, then call extract_stride. to record the stride information
2568 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
2573 struct cuda_array_bound
*bound
= user
;
2576 isl_int_init(stride
);
2578 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2579 isl_constraint_get_coefficient(c
, isl_dim_out
, 0, &v
);
2581 if (n_div
&& (isl_int_is_one(v
) || isl_int_is_negone(v
))) {
2582 int s
= isl_int_sgn(v
);
2583 isl_int_set_si(stride
, 0);
2584 for (i
= 0; i
< n_div
; ++i
) {
2585 isl_constraint_get_coefficient(c
, isl_dim_div
, i
, &v
);
2586 isl_int_gcd(stride
, stride
, v
);
2588 if (!isl_int_is_zero(stride
) &&
2589 isl_int_gt(stride
, bound
->stride
))
2590 extract_stride(c
, bound
, stride
, s
);
2593 isl_int_clear(stride
);
2596 isl_constraint_free(c
);
2600 /* Given contraints on an array index i, check if we can find
2601 * a shift a(p) and a stride g such that
2603 * a(p) + i = 0 mod g
2605 * If so, record the information in bound and apply the mapping
2606 * i -> (i + a(p))/g to the array index in bounds and return
2607 * the new constraints.
2608 * If not, simply return the original constraints.
2610 static __isl_give isl_basic_map
*check_stride(struct cuda_gen
*gen
,
2611 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2614 isl_basic_map
*shift
;
2617 isl_int_set_si(bound
->stride
, -1);
2619 aff
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
2621 isl_basic_map_foreach_constraint(aff
, &check_stride_constraint
, bound
);
2623 isl_basic_map_free(aff
);
2625 if (isl_int_is_neg(bound
->stride
))
2628 aff_shift
= isl_aff_copy(bound
->shift
);
2629 aff_shift
= isl_aff_add_dims(aff_shift
, isl_dim_in
, 1);
2630 aff_shift
= isl_aff_add_coefficient_si(aff_shift
, isl_dim_in
, 0, 1);
2631 aff_shift
= isl_aff_scale_down(aff_shift
, bound
->stride
);
2632 shift
= isl_basic_map_from_aff(aff_shift
);
2634 bound
->shift_map
= isl_basic_map_copy(shift
);
2635 bounds
= isl_basic_map_apply_range(bounds
, shift
);
2640 struct cuda_size_info
{
2641 isl_basic_set
*bset
;
2642 struct cuda_array_bound
*bound
;
2646 /* Given a constraint from the basic set describing the bounds on
2647 * an array index, check if it is a lower bound, say m i >= b(x), and,
2648 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2649 * upper bound. If so, and if this bound is smaller than any bound
2650 * derived from earlier constraints, set the size to this bound on
2651 * the expression and the lower bound to ceil(b(x)/m).
2653 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2655 struct cuda_size_info
*size
= user
;
2660 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2661 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2663 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
)) {
2664 isl_constraint_free(c
);
2670 isl_constraint_get_coefficient(c
, isl_dim_set
, size
->pos
, &v
);
2672 if (isl_int_is_pos(v
)) {
2675 enum isl_lp_result res
;
2677 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2678 aff
= isl_aff_ceil(aff
);
2680 lb
= isl_aff_copy(aff
);
2682 aff
= isl_aff_neg(aff
);
2683 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
2685 res
= isl_basic_set_max(size
->bset
, aff
, &v
);
2688 if (res
== isl_lp_ok
) {
2689 isl_int_add_ui(v
, v
, 1);
2690 if (isl_int_is_neg(size
->bound
->size
) ||
2691 isl_int_lt(v
, size
->bound
->size
)) {
2692 isl_int_set(size
->bound
->size
, v
);
2693 lb
= isl_aff_drop_dims(lb
, isl_dim_in
,
2695 isl_aff_free(size
->bound
->lb
);
2696 size
->bound
->lb
= isl_aff_copy(lb
);
2703 isl_constraint_free(c
);
2708 /* Given a basic map "bounds" that maps parameters and input dimensions
2709 * to a single output dimension, look for an expression in the parameters
2710 * and input dimensions such that the range of the output dimension shifted
2711 * by this expression is a constant.
2713 * In particular, we currently only consider lower bounds on the output
2714 * dimension as candidate expressions.
2716 static int compute_array_dim_size(struct cuda_gen
*gen
,
2717 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2719 struct cuda_size_info size
;
2721 bounds
= isl_basic_map_detect_equalities(bounds
);
2722 bounds
= check_stride(gen
, bound
, bounds
);
2724 isl_int_set_si(bound
->size
, -1);
2728 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2729 size
.bset
= isl_basic_map_wrap(bounds
);
2730 size
.bset
= isl_basic_set_flatten(size
.bset
);
2731 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2732 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2734 isl_basic_set_free(size
.bset
);
2736 return isl_int_is_nonneg(bound
->size
) ? 0 : -1;
2739 /* Check if we can find a shared memory tile for the given array
2740 * based on the given accesses, and if so, put the results
2741 * in array->shared_bound.
2743 * We project the accesses on each index in turn and look for a parametric
2744 * offset such that the size is constant.
2746 static int can_tile_for_shared_memory(struct cuda_gen
*gen
,
2747 struct cuda_array_info
*array
, __isl_keep isl_map
*access
,
2748 struct cuda_array_bound
*bounds
)
2752 for (i
= 0; i
< array
->n_index
; ++i
) {
2754 isl_basic_map
*hull
;
2756 access_i
= isl_map_copy(access
);
2757 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2758 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2759 1, array
->n_index
- (i
+ 1));
2760 access_i
= isl_map_compute_divs(access_i
);
2761 hull
= isl_map_simple_hull(access_i
);
2762 if (compute_array_dim_size(gen
, &bounds
[i
], hull
) < 0)
2769 /* Construct a map with input the shared tile loops and the loops that
2770 * will be wrapped around the threads that relates these later loops
2771 * to the thread indices and the projects them out.
2773 static __isl_give isl_map
*compute_privatization(struct cuda_gen
*gen
)
2781 dim
= isl_union_map_get_space(gen
->shared_sched
);
2783 if (gen
->options
->wrap
)
2784 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2785 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2787 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2788 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2792 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2793 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2796 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2797 priv
= isl_map_intersect_range(priv
, par
);
2799 dim
= isl_map_get_space(priv
);
2800 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2801 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2802 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2805 priv
= isl_map_apply_range(priv
, proj
);
2810 /* Construct a map from domain_dim to domain_dim that increments
2811 * the dimension at position "pos" and leaves all other dimensions
2814 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2817 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2819 isl_basic_map
*next
;
2820 isl_local_space
*ls
;
2822 dim
= isl_space_map_from_set(domain_dim
);
2823 next
= isl_basic_map_universe(isl_space_copy(dim
));
2824 ls
= isl_local_space_from_space(dim
);
2826 for (i
= 0; i
< len
; ++i
) {
2829 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2830 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2831 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2833 isl_constraint_set_constant_si(c
, 1);
2834 next
= isl_basic_map_add_constraint(next
, c
);
2837 isl_local_space_free(ls
);
2839 return isl_map_from_basic_map(next
);
2842 /* Check if the given access is coalesced.
2843 * That is, check whether incrementing the dimension that will get
2844 * wrapped over the last thread index results in incrementing
2845 * the last array index.
2847 * This function is only called for access relations without reuse.
2849 static int access_is_coalesced(struct cuda_gen
*gen
,
2850 __isl_keep isl_union_map
*access
)
2853 isl_map
*access_map
;
2854 isl_map
*next_thread_x
;
2855 isl_map
*next_element
;
2859 access
= isl_union_map_copy(access
);
2860 access
= isl_union_map_apply_domain(access
,
2861 isl_union_map_copy(gen
->tiled_sched
));
2862 access_map
= isl_map_from_union_map(access
);
2864 dim
= isl_map_get_space(access_map
);
2865 dim
= isl_space_domain(dim
);
2866 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2868 dim
= isl_map_get_space(access_map
);
2869 dim
= isl_space_range(dim
);
2870 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2872 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2873 map
= isl_map_apply_range(map
, access_map
);
2875 coalesced
= isl_map_is_subset(map
, next_element
);
2877 isl_map_free(next_element
);
2883 /* For the given array reference group, check whether the access is private
2884 * to the thread. That is, check that any given array element
2885 * is only accessed by a single thread.
2886 * We compute an access relation that maps the shared tile loop iterators
2887 * and the shared point loop iterators that will be wrapped over the
2888 * threads to the array elements.
2889 * We actually check that those iterators that will be wrapped
2890 * partition the array space. This check is stricter than necessary
2891 * since several iterations may be mapped onto the same thread
2892 * and then they could be allowed to access the same memory elements,
2893 * but our check does not allow this situation.
2895 * We also check that the index expression only depends on parallel
2896 * loops. That way, we can move those loops innermost and unroll them.
2897 * Again, we use a test that is stricter than necessary.
2898 * We actually check whether the index expression only depends
2899 * on the iterators that are wrapped over the threads.
2900 * These are necessarily parallel, but there may be more parallel loops.
2902 * Combining the injectivity of the first test with the single-valuedness
2903 * of the second test, we simply test for bijectivity.
2905 * If it turns out we can use registers, we compute the private memory
2906 * tile size using can_tile_for_shared_memory, after introducing a dependence
2907 * on the thread indices.
2909 * Before performing any of the above computations, we first check
2910 * if there is any reuse on the reference group. If not, we simply
2911 * return. If, moreover, the access is coalesced then we also remove
2912 * the shared memory tiling since we should just use global memory instead.
2914 static void check_private_group_access(struct cuda_gen
*gen
,
2915 struct cuda_array_ref_group
*group
)
2918 isl_union_map
*access
;
2919 int n_index
= group
->array
->n_index
;
2921 access
= group_access_relation(group
, 1, 1);
2922 if (isl_union_map_is_injective(access
)) {
2923 if (group
->shared_bound
&& access_is_coalesced(gen
, access
)) {
2924 free_bound_list(group
->shared_bound
, n_index
);
2925 group
->shared_bound
= NULL
;
2927 isl_union_map_free(access
);
2930 access
= isl_union_map_apply_domain(access
,
2931 isl_union_map_copy(gen
->shared_sched
));
2933 acc
= isl_map_from_union_map(access
);
2935 if (!isl_map_is_bijective(acc
)) {
2940 group
->private_bound
= create_bound_list(gen
->ctx
, n_index
);
2941 acc
= isl_map_align_params(acc
, isl_map_get_space(gen
->privatization
));
2942 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2943 if (!can_tile_for_shared_memory(gen
, group
->array
, acc
,
2944 group
->private_bound
)) {
2945 free_bound_list(group
->private_bound
, n_index
);
2946 group
->private_bound
= NULL
;
2952 /* Look for the last shared tile loop that affects the offset of the
2953 * shared or private tile and store the result in array->last_shared.
2955 static void set_last_shared(struct cuda_gen
*gen
,
2956 struct cuda_array_ref_group
*group
)
2959 struct cuda_array_bound
*bounds
;
2960 unsigned first_shared
= gen
->first_shared
;
2961 int n_index
= group
->array
->n_index
;
2963 bounds
= group
->private_bound
;
2965 bounds
= group
->shared_bound
;
2969 for (j
= gen
->shared_len
- 1; j
>= 0; --j
) {
2970 for (i
= 0; i
< n_index
; ++i
) {
2975 if (isl_aff_involves_dims(lb
, isl_dim_param
,
2976 first_shared
+ j
, 1))
2979 shift
= bounds
[i
].shift
;
2982 if (isl_aff_involves_dims(shift
, isl_dim_param
,
2983 first_shared
+ j
, 1))
2989 group
->array
->last_shared
= j
;
2992 /* Compute the sizes of all private arrays for the current kernel,
2993 * as well as the offsets of the private pieces in the original arrays.
2994 * If we cannot or don't want to privatize a given array group,
2995 * we use the shared memory tile sizes computed in
2996 * compute_group_shared_bound instead.
2998 * If a given Array only has a single reference group and if we have
2999 * been able to find a privated or shared tile,
3000 * we also look for the last shared tile loop that affects the offset
3001 * (and therefore the array tile) and store the result in array->last_shared.
3003 * A privatized copy of all access relations from reference groups that
3004 * are mapped to private memory is stored in gen->privatization.
3006 static void compute_private_size(struct cuda_gen
*gen
)
3009 isl_union_map
*private;
3011 if (!gen
->options
->use_private_memory
)
3014 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
3016 for (i
= 0; i
< gen
->n_array
; ++i
) {
3017 struct cuda_array_info
*array
= &gen
->array
[i
];
3019 for (j
= 0; j
< array
->n_group
; ++j
) {
3020 check_private_group_access(gen
, array
->groups
[j
]);
3022 if (!array
->groups
[j
]->private_bound
)
3025 private = isl_union_map_union(private,
3026 group_access_relation(array
->groups
[j
], 1, 1));
3029 array
->last_shared
= gen
->shared_len
- 1;
3030 array
->print_shared_level
= -1;
3032 if (array
->n_group
!= 1)
3034 set_last_shared(gen
, array
->groups
[0]);
3037 if (isl_union_map_is_empty(private))
3038 isl_union_map_free(private);
3040 isl_union_map
*priv
;
3042 private = isl_union_map_apply_domain(private,
3043 isl_union_map_copy(gen
->shared_sched
));
3044 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3045 private = isl_union_map_apply_domain(private, priv
);
3046 gen
->private_access
= private;
3050 /* Fill up the groups array with singleton groups, i.e., one group
3051 * per reference, initializing the array, access, write and refs fields.
3052 * In particular the access field is initialized to the scheduled
3053 * access relation of the array reference.
3055 * Return the number of elements initialized, i.e., the number of
3056 * active references in the current kernel.
3058 static int populate_array_references(struct cuda_gen
*gen
,
3059 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
,
3060 struct cuda_array_ref_group
**groups
)
3064 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3067 for (i
= 0; i
< array
->n_ref
; ++i
) {
3068 isl_union_map
*umap
;
3070 struct cuda_array_ref_group
*group
;
3071 struct cuda_stmt_access
*access
= array
->refs
[i
];
3073 map
= isl_map_copy(access
->access
);
3074 umap
= isl_union_map_from_map(map
);
3075 umap
= isl_union_map_apply_domain(umap
,
3076 isl_union_map_copy(sched
));
3078 if (isl_union_map_is_empty(umap
)) {
3079 isl_union_map_free(umap
);
3083 map
= isl_map_from_union_map(umap
);
3085 group
= isl_calloc_type(ctx
, struct cuda_array_ref_group
);
3087 group
->array
= array
;
3088 group
->access
= map
;
3089 group
->write
= access
->write
;
3090 group
->refs
= &array
->refs
[i
];
3092 groups
[n
++] = group
;
3098 static void free_array_ref_group(struct cuda_array_ref_group
*group
,
3103 free_bound_list(group
->shared_bound
, n_index
);
3104 free_bound_list(group
->private_bound
, n_index
);
3105 isl_map_free(group
->access
);
3110 /* If two groups have overlapping access relations and if one of them
3111 * involves a write, then merge the two groups into one.
3113 * We keep track of the grouping in "leader". leader[j] points to
3114 * an earlier group array element that belongs to the same group,
3115 * or the array element j itself if this element is the first in the group.
3117 * Return the number of group leaders.
3119 static int group_overlapping_writes(int n
,
3120 struct cuda_array_ref_group
**groups
, int *leader
)
3125 for (i
= 0; i
< n
; ++i
) {
3127 groups
[l
]->n_ref
= 1;
3128 for (j
= i
- 1; j
>= 0; --j
) {
3134 if (!groups
[l
]->write
&& !groups
[j
]->write
)
3137 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
3138 isl_map_copy(groups
[j
]->access
));
3139 empty
= isl_map_is_empty(map
);
3145 groups
[j
]->access
= isl_map_union(groups
[j
]->access
,
3147 groups
[j
]->write
= 1;
3148 groups
[l
]->access
= NULL
;
3149 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
3159 /* Compute the size of the shared array corresponding to the given array
3160 * array refrence group, based on the accesses from the current kernel,
3161 * as well as the offset of the shared piece in the original array.
3163 static void compute_group_shared_bound(struct cuda_gen
*gen
,
3164 struct cuda_array_info
*array
, struct cuda_array_ref_group
*group
)
3166 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
3168 if (!gen
->options
->use_shared_memory
)
3171 group
->shared_bound
= create_bound_list(ctx
, array
->n_index
);
3172 if (!can_tile_for_shared_memory(gen
, array
, group
->access
,
3173 group
->shared_bound
)) {
3174 free_bound_list(group
->shared_bound
, array
->n_index
);
3175 group
->shared_bound
= NULL
;
3179 /* Given an initial grouping of array references and shared memory tiles
3180 * for each group that allows for a shared memory tile, merge two groups
3181 * if both have a shared memory tile and if the merged group also has
3182 * a shared memory tile.
3184 * Return the number of group leaders after merging.
3186 static int group_common_shared_memory_tile(struct cuda_gen
*gen
,
3187 struct cuda_array_info
*array
, int n
,
3188 struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
3191 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
3193 for (i
= 0; n_group
> 1 && i
< n
; ++i
) {
3197 if (!groups
[i
]->shared_bound
)
3199 for (j
= i
- 1; j
>= 0; --j
) {
3202 struct cuda_array_bound
*shared_bound
;
3206 if (!groups
[j
]->shared_bound
)
3209 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
3210 isl_map_copy(groups
[j
]->access
));
3211 empty
= isl_map_is_empty(map
);
3217 map
= isl_map_union(isl_map_copy(groups
[l
]->access
),
3218 isl_map_copy(groups
[j
]->access
));
3219 shared_bound
= create_bound_list(ctx
, array
->n_index
);
3220 if (!can_tile_for_shared_memory(gen
, array
, map
,
3223 free_bound_list(shared_bound
, array
->n_index
);
3227 free_bound_list(groups
[j
]->shared_bound
,
3229 groups
[j
]->shared_bound
= shared_bound
;
3230 isl_map_free(groups
[j
]->access
);
3231 groups
[j
]->access
= map
;
3232 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
3241 /* Extract an array of array reference groups from the array of references
3242 * and the grouping information in "leader".
3244 * Store the results in array->n_group and array->groups.
3246 static void extract_array_groups(isl_ctx
*ctx
, struct cuda_array_info
*array
,
3247 int n
, struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
3251 for (i
= 2; i
< n
; ++i
)
3252 leader
[i
] = leader
[leader
[i
]];
3254 array
->n_group
= n_group
;
3255 array
->groups
= isl_alloc_array(ctx
, struct cuda_array_ref_group
*,
3257 assert(array
->groups
);
3260 for (i
= 0; i
< n
; ++i
) {
3262 struct cuda_stmt_access
**refs
;
3264 if (leader
[i
] != i
) {
3265 groups
[i
]->refs
= NULL
;
3266 free_array_ref_group(groups
[i
], array
->n_index
);
3270 refs
= isl_alloc_array(ctx
, struct cuda_stmt_access
*,
3274 for (k
= i
; k
< n
; ++k
)
3275 if (leader
[k
] == i
) {
3276 refs
[l
++] = *groups
[k
]->refs
;
3277 (*groups
[k
]->refs
)->group
= j
;
3280 groups
[i
]->refs
= refs
;
3282 array
->groups
[j
++] = groups
[i
];
3286 /* Group array references that should be considered together when
3287 * deciding whether to access them from private, shared or global memory.
3289 * In particular, if two array references overlap and if one of them
3290 * is a write, then the two references are grouped together.
3291 * Furthermore, if two groups admit a shared memory tile and if the
3292 * combination of the two also admits a shared memory tile, we merge
3295 * During the construction the group->refs field points to a single
3296 * array reference inside the array of array references, while
3297 * group->n_ref contains the number of element in leader that
3298 * (directly or indirectly) point to this group, provided the group
3301 static void group_array_references(struct cuda_gen
*gen
,
3302 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
)
3306 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3307 struct cuda_array_ref_group
**groups
;
3310 groups
= isl_calloc_array(ctx
, struct cuda_array_ref_group
*,
3314 n
= populate_array_references(gen
, array
, sched
, groups
);
3316 leader
= isl_alloc_array(ctx
, int, n
);
3319 n_group
= group_overlapping_writes(n
, groups
, leader
);
3321 for (i
= 0; i
< n
; ++i
)
3323 compute_group_shared_bound(gen
, array
, groups
[i
]);
3325 n_group
= group_common_shared_memory_tile(gen
, array
, n
, groups
,
3328 extract_array_groups(ctx
, array
, n
, groups
, leader
, n_group
);
3334 /* Take tiled_sched, project it onto the shared tile loops and
3335 * the loops that will be wrapped over the threads,
3336 * parametrize the shared tile loops and store the result in gen->shared_sched.
3337 * The position of the first of these parameters is stored in gen->first_shared.
3338 * Also compute a projection that projects out the loops that will be
3339 * wrapped over the threads and store this projection in gen->shared_proj.
3341 static void compute_shared_sched(struct cuda_gen
*gen
)
3346 isl_union_map
*sched
;
3348 sched
= isl_union_map_copy(gen
->tiled_sched
);
3350 dim
= isl_union_map_get_space(sched
);
3351 gen
->first_shared
= isl_space_dim(dim
, isl_dim_param
);
3352 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3353 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3355 dim
= isl_union_map_get_space(sched
);
3356 par
= parametrization(dim
, gen
->shared_len
+ gen
->n_block
,
3357 0, gen
->shared_len
, "g");
3358 sched
= isl_union_map_intersect_range(sched
,
3359 isl_union_set_from_set(par
));
3361 dim
= isl_union_map_get_space(sched
);
3362 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3364 gen
->shared_sched
= sched
;
3365 gen
->shared_proj
= isl_union_map_from_map(proj
);
3368 /* Group references of all arrays in the program.
3370 static void group_references(struct cuda_gen
*gen
)
3373 isl_union_map
*sched
;
3375 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3376 isl_union_map_copy(gen
->shared_proj
));
3378 for (i
= 0; i
< gen
->n_array
; ++i
)
3379 group_array_references(gen
, &gen
->array
[i
], sched
);
3381 isl_union_map_free(sched
);
3384 /* Free all array information that is local to the current kernel.
3386 static void free_local_array_info(struct cuda_gen
*gen
)
3390 for (i
= 0; i
< gen
->n_array
; ++i
) {
3391 struct cuda_array_info
*array
= &gen
->array
[i
];
3393 for (j
= 0; j
< array
->n_group
; ++j
)
3394 free_array_ref_group(array
->groups
[j
], array
->n_index
);
3395 free(array
->groups
);
3397 if (array
->n_group
== 0)
3399 for (j
= 0; j
< gen
->array
[i
].n_index
; ++j
) {
3400 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
3401 gen
->array
[i
].local_bound
[j
] = NULL
;
3406 static void print_iterator_list(FILE *out
, int len
, const char *prefix
,
3412 for (i
= 0; i
< len
; ++i
) {
3416 fprintf(out
, "(%s%d)", prefix
, i
);
3418 fprintf(out
, "%s%d", prefix
, i
);
3423 /* The sizes of the arrays on the host that have been computed by
3424 * extract_array_info may depend on the parameters. Use the extra
3425 * constraints on the parameters that are valid at "host_domain"
3426 * to simplify these expressions.
3428 static void localize_bounds(struct cuda_gen
*gen
,
3429 __isl_keep isl_set
*host_domain
)
3434 context
= isl_set_copy(host_domain
);
3435 context
= isl_set_params(host_domain
);
3437 for (i
= 0; i
< gen
->n_array
; ++i
) {
3438 struct cuda_array_info
*array
= &gen
->array
[i
];
3440 if (array
->n_group
== 0)
3443 for (j
= 0; j
< array
->n_index
; ++j
) {
3446 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3447 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3448 array
->local_bound
[j
] = pwaff
;
3451 isl_set_free(context
);
3454 /* Set gen->tile_len and gen->n_parallel to those of the first statement
3455 * in the statement list u.
3456 * Because of the way the schedule is constructed, the other statements
3457 * in the list, if any, should have the same values for these properties.
3459 static void set_tile_len(struct cuda_gen
*gen
, struct clast_user_stmt
*u
)
3462 struct cuda_stmt
*stmt
;
3464 nr
= atoi(u
->statement
->name
+ 2);
3465 stmt
= &gen
->stmts
[nr
];
3467 gen
->tile_len
= stmt
->tile_len
;
3468 gen
->n_parallel
= stmt
->n_parallel
;
3471 /* This function is called for each leaf in the clast of the host code.
3472 * We first specialize the schedule to the site of the leaf, compute
3473 * the size of shared memory and then print the body of host code
3474 * and the associated kernel (through a call to print_kernel_body).
3476 static void print_host_user(struct gpucode_info
*code
,
3477 struct clast_user_stmt
*u
)
3479 struct cuda_gen
*gen
= code
->user
;
3482 isl_set
*host_domain
;
3483 isl_union_map
*access
;
3484 isl_union_map
*local_sched
;
3485 isl_union_set
*arrays
;
3487 set_tile_len(gen
, u
);
3490 host_domain
= extract_entire_host_domain(u
);
3492 local_sched
= isl_union_map_intersect_range(
3493 isl_union_map_copy(gen
->sched
),
3494 isl_union_set_from_set(extend(isl_set_copy(host_domain
),
3495 gen
->untiled_len
)));
3496 access
= isl_union_map_union(isl_union_map_copy(gen
->read
),
3497 isl_union_map_copy(gen
->write
));
3498 access
= isl_union_map_apply_domain(access
,
3499 isl_union_map_copy(local_sched
));
3500 arrays
= isl_union_map_range(access
);
3502 print_indent(code
->dst
, code
->indent
);
3503 fprintf(code
->dst
, "dim3 k%d_dimBlock", gen
->kernel_id
);
3504 print_reverse_list(code
->dst
, gen
->n_block
, gen
->block_dim
);
3505 fprintf(code
->dst
, ";\n");
3507 print_indent(code
->dst
, code
->indent
);
3508 fprintf(code
->dst
, "dim3 k%d_dimGrid", gen
->kernel_id
);
3509 print_reverse_list(code
->dst
, gen
->n_grid
, gen
->grid_dim
);
3510 fprintf(code
->dst
, ";\n");
3512 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3513 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3514 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3516 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3518 dim
= isl_union_map_get_space(gen
->local_sched
);
3519 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->shared_len
, "g");
3520 gen
->local_sched
= isl_union_map_intersect_range(gen
->local_sched
,
3521 isl_union_set_from_set(par
));
3523 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3524 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3526 gen
->private_access
= NULL
;
3527 compute_shared_sched(gen
);
3528 gen
->privatization
= compute_privatization(gen
);
3529 group_references(gen
);
3530 compute_private_size(gen
);
3531 localize_bounds(gen
, host_domain
);
3533 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3535 print_kernel_launch(gen
, arrays
);
3537 fprintf(gen
->cuda
.kernel_c
, "{\n");
3539 print_kernel_body(gen
, host_domain
, gen
->tiled_sched
);
3541 fprintf(gen
->cuda
.kernel_c
, "}\n");
3543 free_local_array_info(gen
);
3544 isl_map_free(gen
->privatization
);
3545 isl_union_map_free(gen
->private_access
);
3546 isl_union_map_free(gen
->local_sched
);
3547 isl_union_map_free(gen
->tiled_sched
);
3548 isl_union_map_free(gen
->shared_sched
);
3549 isl_union_map_free(gen
->shared_proj
);
3550 isl_union_set_free(arrays
);
3551 isl_set_free(host_domain
);
3553 free(gen
->tile_size
);
3557 /* Use CLooG to generate code for the outer gen->tile_first loops
3558 * of the global schedule in gen->sched.
3559 * The pretty printing of this code is handled by gpu_print_host_stmt,
3560 * which calls print_host_user for each kernel invocation location.
3562 static void print_cloog_host_code(struct cuda_gen
*gen
)
3566 isl_union_map
*sched
;
3567 CloogOptions
*options
;
3568 CloogDomain
*cloog_context
;
3569 CloogUnionDomain
*ud
;
3571 struct clast_stmt
*stmt
;
3574 options
= cloog_options_malloc(gen
->state
);
3575 options
->language
= CLOOG_LANGUAGE_C
;
3577 options
->strides
= 1;
3578 options
->stop
= gen
->tile_first
;
3579 options
->f
= gen
->untiled_len
;
3580 options
->l
= gen
->untiled_len
;
3581 options
->save_domains
= 1;
3582 options
->noscalars
= 1;
3584 sched
= isl_union_map_copy(gen
->sched
);
3585 ud
= cloog_union_domain_from_isl_union_map(sched
);
3586 for (i
= 0; i
< options
->stop
; ++i
) {
3587 snprintf(name
, sizeof(name
), "h%d", i
);
3588 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
3590 context
= isl_set_copy(gen
->context
);
3591 cloog_context
= cloog_domain_from_isl_set(context
);
3592 input
= cloog_input_alloc(cloog_context
, ud
);
3594 stmt
= cloog_clast_create_from_input(input
, options
);
3596 gen
->code
.indent
= 0;
3597 gen
->code
.dst
= gen
->cuda
.host_c
;
3598 gen
->code
.print_user_stmt
= NULL
;
3599 gen
->code
.print_user_stmt_list
= &print_host_user
;
3600 gen
->code
.print_for_head
= NULL
;
3601 gen
->code
.print_for_foot
= NULL
;
3602 gen
->code
.user
= gen
;
3603 gpu_print_host_stmt(&gen
->code
, stmt
);
3605 cloog_clast_free(stmt
);
3606 cloog_options_free(options
);
3607 fprintf(gen
->cuda
.host_c
, "\n");
3610 void print_cuda_macros(struct cuda_gen
*gen
)
3612 const char *macros
=
3613 "#define cudaCheckReturn(ret) assert((ret) == cudaSuccess)\n"
3614 "#define cudaCheckKernel()"
3615 " assert(cudaGetLastError() == cudaSuccess)\n\n";
3616 fputs(macros
, gen
->cuda
.host_c
);
3619 void print_host_code(struct cuda_gen
*gen
)
3621 fprintf(gen
->cuda
.host_c
, "{\n");
3622 print_cloog_macros(gen
->cuda
.host_c
);
3623 print_cloog_macros(gen
->cuda
.kernel_c
);
3625 print_cuda_macros(gen
);
3627 declare_device_arrays(gen
);
3629 allocate_device_arrays(gen
);
3630 copy_arrays_to_device(gen
);
3633 print_cloog_host_code(gen
);
3635 copy_arrays_from_device(gen
);
3636 free_device_arrays(gen
);
3638 fprintf(gen
->cuda
.host_c
, "}\n");
3641 __isl_give isl_set
*add_context_from_str(__isl_take isl_set
*set
,
3650 ctx
= isl_set_get_ctx(set
);
3651 context
= isl_set_read_from_str(ctx
, str
);
3652 context
= isl_set_align_params(context
, isl_set_get_space(set
));
3653 set
= isl_set_intersect(set
, context
);
3658 /* Return the union of all iteration domains of the gen->stmts[i].
3660 static __isl_give isl_union_set
*extract_domain(struct cuda_gen
*gen
)
3663 isl_union_set
*domain
;
3665 domain
= isl_union_set_empty(isl_set_get_space(gen
->context
));
3666 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
3669 domain_i
= isl_set_copy(gen
->stmts
[i
].domain
);
3670 domain
= isl_union_set_union(domain
,
3671 isl_union_set_from_set(domain_i
));
3677 /* Information about the outermost tilable bands in the forest of bands.
3679 * tile_len and n_parallel are only sets on band_info structures
3680 * that correspond to outermost bands. For other bands (in particular,
3681 * ancestors of the outermost bands), n_parallal is set to 0.
3683 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3685 * tile_first is the number of schedule dimensions in prefix.
3687 * suffix is the schedule of the outermost tilable bands and their descendants.
3690 struct cuda_gen
*gen
;
3694 isl_union_map
*prefix
;
3695 isl_union_map
*suffix
;
3698 /* Set tile_len and n_parallel of the statement to that of
3699 * their outermost band, recorded in the band_info.
3701 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
3703 struct band_info
*info
= user
;
3705 struct cuda_stmt
*stmt
;
3707 nr
= atoi(isl_map_get_tuple_name(map
, isl_dim_in
) + 2);
3708 stmt
= &info
->gen
->stmts
[nr
];
3710 stmt
->tile_len
= info
->tile_len
;
3711 stmt
->n_parallel
= info
->n_parallel
;
3718 static void list_select_outer_band(struct cuda_gen
*gen
,
3719 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
3721 /* Check if this band has any parallel loops. If so, take it as
3722 * the outermost tilable band. If not, continue looking for the
3723 * outermost tilable band in the children of the current band.
3725 static void band_select_outer_band(struct cuda_gen
*gen
,
3726 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
3728 int n
= isl_band_n_member(band
);
3731 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
3732 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
3735 info
->n_parallel
= n_parallel
;
3738 info
->tile_first
= pos
;
3740 info
->prefix
= isl_band_get_prefix_schedule(band
);
3741 info
->suffix
= isl_union_map_flat_range_product(
3742 isl_band_get_partial_schedule(band
),
3743 isl_band_get_suffix_schedule(band
));
3744 isl_union_map_foreach_map(info
->prefix
,
3745 &set_stmt_tile_len
, info
);
3746 } else if (isl_band_has_children(band
)) {
3747 isl_band_list
*children
;
3748 children
= isl_band_get_children(band
);
3749 list_select_outer_band(gen
, children
, pos
+ n
, info
);
3752 info
->tile_first
= pos
+ n
;
3754 info
->prefix
= isl_union_map_flat_range_product(
3755 isl_band_get_prefix_schedule(band
),
3756 isl_band_get_partial_schedule(band
));
3757 info
->suffix
= isl_band_get_suffix_schedule(band
);
3758 isl_union_map_foreach_map(info
->prefix
,
3759 &set_stmt_tile_len
, info
);
3762 isl_band_free(band
);
3765 /* Comparison function that returns a non-zero value for band_infos
3766 * with different tile_len fields or different n_parallel fields.
3768 static int cmp_band(const void *p1
, const void *p2
)
3770 const struct band_info
*info1
= p1
;
3771 const struct band_info
*info2
= p2
;
3773 if (info1
->tile_len
!= info2
->tile_len
)
3774 return info1
->tile_len
- info2
->tile_len
;
3776 return info1
->n_parallel
- info2
->n_parallel
;
3779 /* Extend "umap" with coordinates with fixed value "val"
3780 * to a total length of "dst_len", assuming the original dimension is "src_len".
3782 static __isl_give isl_union_map
*extend_range(__isl_take isl_union_map
*umap
,
3783 int src_len
, int dst_len
, int val
)
3789 dim
= isl_union_map_get_space(umap
);
3790 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
3791 for (i
= src_len
; i
< dst_len
; ++i
)
3792 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
3794 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
3799 /* Group bands with the same values for tile_len and n_parallel.
3800 * The prefix schedule is then extended with a fixed coordinate that
3801 * is different for each such group.
3802 * Note that the actual values for this coordinate are not important.
3803 * The bands have already been effectively separated at a higher level
3804 * or they are independent and may be executed in parallel.
3805 * The list of band_info has been sorted before this functions is called.
3807 static void separate_bands(struct band_info
*info
, int n
)
3812 for (i
= 0; i
< n
; ++i
) {
3813 int l
= info
[i
].tile_first
;
3816 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
3817 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
3820 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3822 info
[i
].tile_first
= l
+ 1;
3826 /* Select the outermost bands in the elements of the list, align
3827 * their prefix schedules, separate bands with different values
3828 * for tile_len and/or n_parallel and then combine the resulting
3829 * prefix and suffix schedules into a single pair of prefix and
3830 * suffix schedules for the entire list.
3832 static void list_select_outer_band(struct cuda_gen
*gen
,
3833 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
3837 int n
= isl_band_list_n_band(list
);
3838 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
3839 struct band_info
*info
;
3841 isl_union_map
*prefix
;
3842 isl_union_map
*suffix
;
3845 info
= isl_calloc_array(ctx
, struct band_info
, n
);
3849 for (i
= 0; i
< n
; ++i
) {
3850 band
= isl_band_list_get_band(list
, i
);
3851 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
3852 if (info
[i
].tile_first
> max_tile_first
)
3853 max_tile_first
= info
[i
].tile_first
;
3856 for (i
= 0; i
< n
; ++i
) {
3857 if (info
[i
].tile_first
== max_tile_first
)
3859 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3860 info
[i
].tile_first
, max_tile_first
, 0);
3861 info
[i
].tile_first
= max_tile_first
;
3864 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
3866 for (i
= 0; i
< n
- 1; ++i
)
3867 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
3868 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
3872 separate_bands(info
, n
);
3874 prefix
= info
[0].prefix
;
3875 suffix
= info
[0].suffix
;
3877 for (i
= 1; i
< n
; ++i
) {
3878 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
3879 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
3882 list_info
->tile_first
= info
[0].tile_first
;
3883 list_info
->tile_len
= -1;
3884 list_info
->prefix
= prefix
;
3885 list_info
->suffix
= suffix
;
3887 isl_band_list_free(list
);
3891 /* Set max_out to the maximal number of output dimensions over
3894 static int update_max_out(__isl_take isl_map
*map
, void *user
)
3896 int *max_out
= user
;
3897 int n_out
= isl_map_dim(map
, isl_dim_out
);
3899 if (n_out
> *max_out
)
3906 struct align_range_data
{
3911 /* Extend the dimension of the range of the given map to data->max_out and
3912 * then add the result to data->res.
3914 static int map_align_range(__isl_take isl_map
*map
, void *user
)
3916 struct align_range_data
*data
= user
;
3920 int n_out
= isl_map_dim(map
, isl_dim_out
);
3922 dim
= isl_union_map_get_space(data
->res
);
3923 proj
= isl_map_reverse(projection(dim
, data
->max_out
, n_out
));
3924 for (i
= n_out
; i
< data
->max_out
; ++i
)
3925 proj
= isl_map_fix_si(proj
, isl_dim_out
, i
, 0);
3927 map
= isl_map_apply_range(map
, proj
);
3929 data
->res
= isl_union_map_add_map(data
->res
, map
);
3934 /* Extend the ranges of the maps in the union map such they all have
3935 * the same dimension.
3937 static __isl_give isl_union_map
*align_range(__isl_take isl_union_map
*umap
)
3939 struct align_range_data data
;
3942 isl_union_map_foreach_map(umap
, &update_max_out
, &data
.max_out
);
3944 data
.res
= isl_union_map_empty(isl_union_map_get_space(umap
));
3945 isl_union_map_foreach_map(umap
, &map_align_range
, &data
);
3947 isl_union_map_free(umap
);
3951 /* Select the outermost tilable band that (by construction)
3952 * has at least one parallel loop.
3953 * The starting position of the aligned band is stored in the pair
3955 * The sizes and number of parallel loops may be different in different
3956 * parts of the band forest and are therefore stored in the cuda_stmts.
3958 * Return the complete schedule, with the tilable bands aligned
3959 * at gen->tile_first and padded with zero, if needed.
3961 static __isl_give isl_union_map
*select_outer_tilable_band(struct cuda_gen
*gen
,
3962 __isl_keep isl_schedule
*schedule
)
3964 isl_band_list
*list
;
3965 struct band_info info
;
3967 gen
->n_parallel
= 0;
3970 list
= isl_schedule_get_band_forest(schedule
);
3972 list_select_outer_band(gen
, list
, 0, &info
);
3974 gen
->tile_first
= info
.tile_first
;
3975 info
.suffix
= align_range(info
.suffix
);
3977 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
3980 /* Set gen->untiled_len to the number of scheduling dimensions
3981 * for the schedule of the first domain.
3982 * We assume here that this number is the same for all domains.
3984 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
3986 unsigned *untiled_len
= user
;
3988 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
3994 /* Compute an appropriate schedule based on the accesses in
3995 * gen->read and gen->write.
3997 * We first compute dependences and then use those to compute
3998 * a schedule that has a parallel loop in each tilable band.
3999 * Finally, we select the outermost tilable band.
4001 static void compute_schedule(struct cuda_gen
*gen
,
4002 __isl_take isl_union_map
*sched
)
4004 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
4005 isl_union_set
*domain
;
4006 isl_union_map
*empty
;
4007 isl_union_map
*dep_raw
, *dep2
, *dep3
, *dep
;
4008 isl_union_map
*uninitialized
;
4009 isl_schedule
*schedule
;
4011 empty
= isl_union_map_empty(isl_union_map_get_space(sched
));
4013 isl_union_map_compute_flow(isl_union_map_copy(gen
->read
),
4014 isl_union_map_copy(gen
->write
), empty
,
4015 isl_union_map_copy(sched
),
4016 &dep_raw
, NULL
, &uninitialized
, NULL
);
4017 isl_union_map_compute_flow(isl_union_map_copy(gen
->write
),
4018 isl_union_map_copy(gen
->write
),
4019 isl_union_map_copy(gen
->read
),
4020 isl_union_map_copy(sched
),
4021 &dep2
, &dep3
, NULL
, NULL
);
4022 isl_union_map_free(sched
);
4024 gen
->copy_in
= isl_union_map_range(uninitialized
);
4026 dep
= isl_union_map_union(dep2
, dep3
);
4027 dep
= isl_union_map_union(dep
, dep_raw
);
4028 dep
= isl_union_map_coalesce(dep
);
4030 domain
= extract_domain(gen
);
4031 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4032 isl_union_map_copy(dep
), dep
);
4034 sched
= select_outer_tilable_band(gen
, schedule
);
4036 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4037 sched
= isl_union_map_intersect_domain(sched
, domain
);
4040 isl_schedule_free(schedule
);
4043 static struct cuda_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4044 struct cuda_stmt_access
**next_access
)
4046 struct cuda_stmt_access
*access
;
4047 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4049 access
= isl_alloc_type(ctx
, struct cuda_stmt_access
);
4051 access
->next
= NULL
;
4052 access
->read
= expr
->acc
.read
;
4053 access
->write
= expr
->acc
.write
;
4054 access
->access
= isl_map_copy(expr
->acc
.access
);
4056 *next_access
= access
;
4057 next_access
= &(*next_access
)->next
;
4061 static struct cuda_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4062 struct cuda_stmt_access
**next_access
)
4066 for (i
= 0; i
< expr
->n_arg
; ++i
)
4067 next_access
= expr_extract_accesses(expr
->args
[i
],
4070 if (expr
->type
== pet_expr_access
)
4071 next_access
= expr_extract_access(expr
, next_access
);
4076 static void pet_stmt_extract_accesses(struct cuda_stmt
*stmt
)
4078 struct cuda_stmt_access
**next_access
= &stmt
->accesses
;
4080 stmt
->accesses
= NULL
;
4081 expr_extract_accesses(stmt
->body
, next_access
);
4084 /* Return an array of cuda_stmt representing the statements in "scop".
4086 static struct cuda_stmt
*extract_stmts(isl_ctx
*ctx
, struct pet_scop
*scop
,
4087 __isl_keep isl_set
*context
)
4090 struct cuda_stmt
*stmts
;
4092 stmts
= isl_calloc_array(ctx
, struct cuda_stmt
, scop
->n_stmt
);
4095 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4096 struct cuda_stmt
*s
= &stmts
[i
];
4098 s
->domain
= isl_set_copy(scop
->stmts
[i
]->domain
);
4099 s
->domain
= isl_set_intersect_params(s
->domain
,
4100 isl_set_copy(context
));
4101 s
->body
= scop
->stmts
[i
]->body
;
4102 pet_stmt_extract_accesses(s
);
4108 /* Replace the scop in the "input" file by equivalent code
4109 * that uses the GPU. "scop" is assumed to correspond to this scop.
4111 * We first compute a schedule that respects the dependences
4112 * of the original program and select the outermost band
4113 * of tilable dimensions that has at least one parallel loop.
4114 * We then have three blocks of dimensions
4118 * The tilable band "B" is first tiled according to "tile.sizes", resulting
4123 * For each iteration of the T loop and for each array, we compute
4124 * the array elements accessed by that iteration, construct a rectangular
4125 * box around it and shift it to the origin. The result is used
4126 * as shared memory for the array.
4128 * We then split off at most 2 parallel loops from the T loops and
4129 * at most 3 parallel loops from the P loops
4133 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4134 * according to "grid.sizes"/"block.sizes".
4136 * H T1T T1P T2 P1T P1P P2 G
4138 * Finally, the T1P and P1P iterators are equated to the block and
4139 * thread dimensions respectively and so are effectively removed.
4140 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4141 * are run on the GPU.
4143 * Code is generated in three stages. We first generate code for the
4144 * host (the H loops), with iterators h%d. Then, for each leaf node
4145 * of the resulting AST, we generate code for the shared loops (up to
4146 * and including T2), with iterators g%d and after equating the H loops
4147 * to h%d parameters and the T1P loops to the block dimensions.
4148 * Finally, we generate code for the remaining loops in a similar fashion.
4150 int cuda_pet(isl_ctx
*ctx
, struct pet_scop
*scop
, struct ppcg_options
*options
,
4153 isl_union_map
*sched
;
4154 struct cuda_gen gen
;
4159 scop
= pet_scop_align_params(scop
);
4162 gen
.context
= isl_set_copy(scop
->context
);
4163 gen
.context
= add_context_from_str(gen
.context
, options
->ctx
);
4164 gen
.n_stmts
= scop
->n_stmt
;
4165 gen
.stmts
= extract_stmts(ctx
, scop
, gen
.context
);
4166 gen
.read
= pet_scop_collect_reads(scop
);
4167 gen
.write
= pet_scop_collect_writes(scop
);
4168 gen
.options
= options
;
4169 gen
.state
= cloog_isl_state_malloc(gen
.ctx
);
4172 cuda_open_files(&gen
.cuda
, input
);
4174 collect_array_info(&gen
);
4176 sched
= pet_scop_collect_schedule(scop
);
4178 compute_schedule(&gen
, sched
);
4180 print_host_code(&gen
);
4182 cloog_state_free(gen
.state
);
4183 clear_cuda_gen(&gen
);
4185 cuda_close_files(&gen
.cuda
);