cuda backend: fix declarations of block and thread identifier variables
[ppcg.git] / schedule.h
blobcb8c2b0b61434764d980f74c46897cfc5dbd2c20
1 #ifndef _SCHEDULE_H
2 #define _SCHEDULE_H
4 /* An access to an outer array element or an iterator.
5 * Accesses to iterators have an access relation that maps to an unnamed space.
6 * An access may be both read and write.
7 */
8 struct gpu_stmt_access {
9 /* Access reads elements */
10 int read;
11 /* Access writes elements */
12 int write;
13 /* All writes are definite writes. */
14 int exact_write;
15 /* The number of index expressions specified in the access. */
16 int n_index;
18 /* Index of the array reference group this reference belong to.
19 * -1 if no reference groups have been computed for the array.
21 int group;
23 /* May access relation */
24 isl_map *access;
25 /* May access relation with as domain a mapping from iteration domain
26 * to a reference identifier.
28 isl_map *tagged_access;
29 /* The reference id of the corresponding pet_expr. */
30 isl_id *ref_id;
32 struct gpu_stmt_access *next;
35 struct gpu_stmt {
36 isl_id *id;
37 struct pet_stmt *stmt;
39 /* Number of tile dimensions. */
40 int tile_len;
41 /* Number of initial parallel loops among tile dimensions. */
42 int n_parallel;
44 /* Linked list of accesses. */
45 struct gpu_stmt_access *accesses;
48 __isl_give isl_map *project_out(__isl_take isl_space *dim,
49 int len, int first, int n);
50 __isl_give isl_map *projection(__isl_take isl_space *dim,
51 int src_len, int dst_len);
52 __isl_give isl_set *extend(__isl_take isl_set *set, int dst_len);
53 __isl_give isl_union_map *align_range(__isl_take isl_union_map *umap);
55 #endif