2 * Copyright 2010-2011 INRIA Saclay
4 * Use of this software is governed by the GNU LGPLv2.1 license
6 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
7 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
14 #include <isl/polynomial.h>
15 #include <isl/union_set.h>
19 #include <isl/schedule.h>
20 #include <isl/options.h>
21 #include <cloog/isl/cloog.h>
24 #include "cuda_common.h"
27 #include "scoplib_isl.h"
28 #include "ppcg_options.h"
30 /* The fields stride, shift and shift_map only contain valid information
32 * If so, they express that current index is such that if you add shift,
33 * then the result is always a multiple of stride.
34 * shift_map contains the mapping
36 * i -> (i + shift)/stride
38 struct cuda_array_bound
{
43 isl_qpolynomial
*shift
;
44 isl_basic_map
*shift_map
;
47 struct cuda_array_info
;
49 /* A group of array references in a kernel that should be handled together.
50 * If private_bound is not NULL, then it is mapped to registers.
51 * Otherwise, if shared_bound is not NULL, it is mapped to shared memory.
52 * Otherwise, it is accesses from global memory.
54 struct cuda_array_ref_group
{
55 /* The references in this group access this array. */
56 struct cuda_array_info
*array
;
57 /* Position of this group in the list of reference groups of array. */
60 /* The following fields are use during the construction of the groups.
61 * access is the combined access relation relative to the shared
63 * write is set if any access in the group is a write.
68 /* For each index, size and offset of piece in shared memory. */
69 struct cuda_array_bound
*shared_bound
;
71 /* For each index, size and offset of piece in private memory. */
72 struct cuda_array_bound
*private_bound
;
74 /* References in this group; point to elements of a linked list. */
76 struct cuda_stmt_access
**refs
;
79 struct cuda_array_info
{
81 /* Name of the array. */
83 /* Number of indices. */
85 /* For each index, a bound on the array in that direction. */
87 /* For each index, bound[i] specialized to the current kernel. */
88 isl_pw_aff
**local_bound
;
90 /* All references to this array; point to elements of a linked list. */
92 struct cuda_stmt_access
**refs
;
94 /* The reference groups associated to this array. */
96 struct cuda_array_ref_group
**groups
;
98 /* Last shared memory tile dimension that affects tile of this array. */
100 /* Dimension at which copying to/from shared memory is printed.
101 * if >= 0, then the value is >= last_shared
102 * if -1, then the copying is done at the leaf level.
104 int print_shared_level
;
107 /* Print the name of the local copy of a given group of array references.
109 static void print_array_name(FILE *out
, struct cuda_array_ref_group
*group
)
113 if (group
->private_bound
)
114 fprintf(out
, "private_");
115 else if (group
->shared_bound
)
116 fprintf(out
, "shared_");
119 fprintf(out
, "%s", group
->array
->name
);
120 if (!global
&& group
->array
->n_group
> 1)
121 fprintf(out
, "_%d", group
->nr
);
124 /* Collect all references to the given array and store pointers to them
127 static void collect_references(struct cuda_gen
*gen
,
128 struct cuda_array_info
*array
)
134 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
135 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
136 struct cuda_stmt_access
*access
;
138 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
140 name
= isl_map_get_tuple_name(access
->access
,
142 if (name
&& !strcmp(array
->name
, name
))
148 array
->refs
= isl_alloc_array(gen
->ctx
, struct cuda_stmt_access
*, n
);
152 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
153 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
154 struct cuda_stmt_access
*access
;
156 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
158 name
= isl_map_get_tuple_name(access
->access
,
160 if (!name
|| strcmp(array
->name
, name
))
163 array
->refs
[n
++] = access
;
168 static struct cuda_array_bound
*create_bound_list(isl_ctx
*ctx
, int n_index
)
171 struct cuda_array_bound
*bound
;
173 bound
= isl_alloc_array(ctx
, struct cuda_array_bound
, n_index
);
176 for (i
= 0; i
< n_index
; ++i
) {
177 isl_int_init(bound
[i
].size
);
179 isl_int_init(bound
[i
].stride
);
180 bound
[i
].shift
= NULL
;
181 bound
[i
].shift_map
= NULL
;
187 static void free_bound_list(struct cuda_array_bound
*bound
, int n_index
)
194 for (j
= 0; j
< n_index
; ++j
) {
195 isl_int_clear(bound
[j
].size
);
196 isl_int_clear(bound
[j
].stride
);
197 isl_aff_free(bound
[j
].lb
);
198 isl_qpolynomial_free(bound
[j
].shift
);
199 isl_basic_map_free(bound
[j
].shift_map
);
204 /* Compute bounds on the host arrays based on the accessed elements
205 * and collect all references to the array.
207 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
210 struct cuda_gen
*gen
= (struct cuda_gen
*)user
;
214 isl_pw_aff
**local_bounds
;
216 n_index
= isl_set_dim(array
, isl_dim_set
);
217 name
= isl_set_get_tuple_name(array
);
218 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
219 isl_pw_aff
*, n_index
);
221 local_bounds
= isl_calloc_array(isl_set_get_ctx(array
),
222 isl_pw_aff
*, n_index
);
223 assert(local_bounds
);
224 gen
->array
[gen
->n_array
].dim
= isl_set_get_dim(array
);
225 gen
->array
[gen
->n_array
].name
= strdup(name
);
226 gen
->array
[gen
->n_array
].n_index
= n_index
;
227 gen
->array
[gen
->n_array
].bound
= bounds
;
228 gen
->array
[gen
->n_array
].local_bound
= local_bounds
;
230 for (i
= 0; i
< n_index
; ++i
) {
236 bound
= isl_set_dim_max(isl_set_copy(array
), i
);
237 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
238 ls
= isl_local_space_from_dim(isl_set_get_dim(dom
));
239 one
= isl_aff_zero(ls
);
240 one
= isl_aff_add_constant_si(one
, 1);
241 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
242 bound
= isl_pw_aff_gist(bound
, isl_set_copy(gen
->context
));
247 collect_references(gen
, &gen
->array
[gen
->n_array
]);
255 void collect_array_info(struct cuda_gen
*gen
)
257 isl_union_set
*arrays
;
259 arrays
= isl_union_map_range(isl_union_map_copy(gen
->read
));
260 arrays
= isl_union_set_union(arrays
,
261 isl_union_map_range(isl_union_map_copy(gen
->write
)));
262 arrays
= isl_union_set_coalesce(arrays
);
264 gen
->n_array
= isl_union_set_n_set(arrays
);
265 gen
->array
= isl_alloc_array(gen
->ctx
,
266 struct cuda_array_info
, gen
->n_array
);
269 isl_union_set_foreach_set(arrays
, &extract_array_info
, gen
);
270 isl_union_set_free(arrays
);
273 static void free_array_info(struct cuda_gen
*gen
)
277 for (i
= 0; i
< gen
->n_array
; ++i
) {
278 int n_index
= gen
->array
[i
].n_index
;
279 free(gen
->array
[i
].name
);
280 for (j
= 0; j
< n_index
; ++j
) {
281 isl_pw_aff_free(gen
->array
[i
].bound
[j
]);
282 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
284 isl_dim_free(gen
->array
[i
].dim
);
285 free(gen
->array
[i
].bound
);
286 free(gen
->array
[i
].local_bound
);
287 free(gen
->array
[i
].refs
);
292 static void declare_device_arrays(struct cuda_gen
*gen
)
296 for (i
= 0; i
< gen
->n_array
; ++i
)
297 fprintf(gen
->cuda
.host_c
, "%s *dev_%s;\n",
298 gen
->options
->type
, gen
->array
[i
].name
);
301 static void print_array_size(struct cuda_gen
*gen
, FILE *out
,
302 struct cuda_array_info
*array
)
307 prn
= isl_printer_to_file(gen
->ctx
, out
);
308 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
309 for (i
= 0; i
< array
->n_index
; ++i
) {
310 prn
= isl_printer_print_str(prn
, "(");
311 prn
= isl_printer_print_pw_aff(prn
, array
->bound
[i
]);
312 prn
= isl_printer_print_str(prn
, ") * ");
314 prn
= isl_printer_print_str(prn
, "sizeof(");
315 prn
= isl_printer_print_str(prn
, gen
->options
->type
);
316 prn
= isl_printer_print_str(prn
, ")");
317 isl_printer_free(prn
);
320 static void allocate_device_arrays(struct cuda_gen
*gen
)
324 for (i
= 0; i
< gen
->n_array
; ++i
) {
325 fprintf(gen
->cuda
.host_c
, "cudaMalloc(&dev_%s, ",
327 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
328 fprintf(gen
->cuda
.host_c
, ");\n");
332 static void free_device_arrays(struct cuda_gen
*gen
)
336 for (i
= 0; i
< gen
->n_array
; ++i
)
337 fprintf(gen
->cuda
.host_c
, "cudaFree(dev_%s);\n",
341 static void copy_arrays_to_device(struct cuda_gen
*gen
)
345 for (i
= 0; i
< gen
->n_array
; ++i
) {
350 dim
= isl_dim_copy(gen
->array
[i
].dim
);
351 read_i
= isl_union_set_extract_set(gen
->copy_in
, dim
);
352 empty
= isl_set_fast_is_empty(read_i
);
353 isl_set_free(read_i
);
357 fprintf(gen
->cuda
.host_c
, "assert(sizeof(%s) == ",
359 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
360 fprintf(gen
->cuda
.host_c
, ");\n");
361 fprintf(gen
->cuda
.host_c
, "cudaMemcpy(dev_%s, %s, ",
362 gen
->array
[i
].name
, gen
->array
[i
].name
);
363 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
364 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyHostToDevice);\n");
368 static void copy_arrays_from_device(struct cuda_gen
*gen
)
371 isl_union_set
*write
;
372 write
= isl_union_map_range(isl_union_map_copy(gen
->write
));
374 for (i
= 0; i
< gen
->n_array
; ++i
) {
379 dim
= isl_dim_copy(gen
->array
[i
].dim
);
380 write_i
= isl_union_set_extract_set(write
, dim
);
381 empty
= isl_set_fast_is_empty(write_i
);
382 isl_set_free(write_i
);
386 fprintf(gen
->cuda
.host_c
, "cudaMemcpy(%s, dev_%s, ",
387 gen
->array
[i
].name
, gen
->array
[i
].name
);
388 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
389 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyDeviceToHost);\n");
392 isl_union_set_free(write
);
395 static void read_sizes_from_file(struct cuda_gen
*gen
, const char *filename
,
401 file
= fopen(filename
, "r");
405 for (i
= 0; i
< len
; ++i
)
406 if (fscanf(file
, "%d", &sizes
[i
]) < 1)
412 static void reverse_list(int *list
, int len
)
417 for (i
= 0; 2 * i
< len
; ++i
) {
419 list
[i
] = list
[len
- 1 - i
];
420 list
[len
- 1 - i
] = t
;
424 /* Read user specified sizes from "tile.sizes", "block.sizes" and "grid.sizes"
425 * after filling in some potentially useful defaults.
427 static void read_sizes(struct cuda_gen
*gen
)
431 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
432 assert(gen
->tile_size
);
433 for (n
= 0; n
< gen
->tile_len
; ++n
)
434 gen
->tile_size
[n
] = gen
->options
->tile_size
;
435 read_sizes_from_file(gen
, "tile.sizes", gen
->tile_size
, gen
->tile_len
);
438 gen
->n_block
= (n
<= 3) ? n
: 3;
439 switch (gen
->n_block
) {
441 gen
->block_dim
[0] = 512;
444 gen
->block_dim
[0] = 32;
445 gen
->block_dim
[1] = 16;
448 gen
->block_dim
[0] = 32;
449 gen
->block_dim
[1] = 4;
450 gen
->block_dim
[2] = 4;
453 read_sizes_from_file(gen
, "block.sizes", gen
->block_dim
, gen
->n_block
);
454 reverse_list(gen
->block_dim
, gen
->n_block
);
456 gen
->n_grid
= (n
<= 2) ? n
: 2;
457 switch (gen
->n_grid
) {
459 gen
->grid_dim
[0] = 65536;
462 gen
->grid_dim
[0] = 256;
463 gen
->grid_dim
[1] = 256;
466 read_sizes_from_file(gen
, "grid.sizes", gen
->grid_dim
, gen
->n_grid
);
467 reverse_list(gen
->grid_dim
, gen
->n_grid
);
470 static void free_stmts(struct cuda_stmt
*stmts
, int n
)
474 for (i
= 0; i
< n
; ++i
) {
475 struct cuda_stmt_access
*access
, *next
;
477 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
479 isl_map_free(access
->access
);
483 isl_set_free(stmts
[i
].domain
);
489 void clear_cuda_gen(struct cuda_gen
*gen
)
491 free_stmts(gen
->stmts
, gen
->n_stmts
);
492 free_array_info(gen
);
493 isl_set_free(gen
->context
);
494 isl_union_set_free(gen
->copy_in
);
495 isl_union_map_free(gen
->sched
);
496 isl_union_map_free(gen
->read
);
497 isl_union_map_free(gen
->write
);
500 static void print_reverse_list(FILE *out
, int len
, int *list
)
504 for (i
= 0; i
< len
; ++i
) {
507 fprintf(out
, "%d", list
[len
- 1 - i
]);
511 static void print_kernel_launch(struct cuda_gen
*gen
,
512 __isl_keep isl_union_set
*arrays
)
519 print_indent(gen
->code
.dst
, gen
->code
.indent
);
520 fprintf(gen
->code
.dst
, "kernel%d <<<k%d_dimGrid, k%d_dimBlock>>> (",
521 gen
->kernel_id
, gen
->kernel_id
, gen
->kernel_id
);
522 fprintf(gen
->cuda
.kernel_c
, "__global__ void kernel%d(",
524 fprintf(gen
->cuda
.kernel_h
, "__global__ void kernel%d(",
527 for (i
= 0; i
< gen
->n_array
; ++i
) {
532 dim
= isl_dim_copy(gen
->array
[i
].dim
);
533 arr
= isl_union_set_extract_set(arrays
, dim
);
534 empty
= isl_set_fast_is_empty(arr
);
540 fprintf(gen
->code
.dst
, ", ");
541 fprintf(gen
->cuda
.kernel_c
, ", ");
542 fprintf(gen
->cuda
.kernel_h
, ", ");
545 fprintf(gen
->code
.dst
, "dev_%s", gen
->array
[i
].name
);
546 fprintf(gen
->cuda
.kernel_c
, "%s *%s",
547 gen
->options
->type
, gen
->array
[i
].name
);
548 fprintf(gen
->cuda
.kernel_h
, "%s *%s",
549 gen
->options
->type
, gen
->array
[i
].name
);
554 dim
= isl_union_set_get_dim(arrays
);
555 nparam
= isl_dim_size(dim
, isl_dim_param
);
556 for (i
= 0; i
< nparam
; ++i
) {
557 const char *name
= isl_dim_get_name(dim
, isl_dim_param
, i
);
559 fprintf(gen
->code
.dst
, ", ");
560 fprintf(gen
->cuda
.kernel_c
, ", ");
561 fprintf(gen
->cuda
.kernel_h
, ", ");
563 fprintf(gen
->code
.dst
, "%s", name
);
564 fprintf(gen
->cuda
.kernel_c
, "int %s", name
);
565 fprintf(gen
->cuda
.kernel_h
, "int %s", name
);
570 for (i
= 0; i
< gen
->tile_first
; ++i
) {
572 fprintf(gen
->code
.dst
, ", ");
573 fprintf(gen
->cuda
.kernel_c
, ", ");
574 fprintf(gen
->cuda
.kernel_h
, ", ");
576 fprintf(gen
->code
.dst
, "h%d", i
);
577 fprintf(gen
->cuda
.kernel_c
, "int h%d", i
);
578 fprintf(gen
->cuda
.kernel_h
, "int h%d", i
);
582 fprintf(gen
->code
.dst
, ");\n");
583 fprintf(gen
->cuda
.kernel_c
, ")\n");
584 fprintf(gen
->cuda
.kernel_h
, ");\n");
587 /* Construct a map from a domain of dimensionality "len"
588 * to a domain of dimensionality "len" + "tile_len" that tiles
589 * the "tile_len" coordinates starting at "first".
590 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
591 * "dim" prescribes the parameters.
593 static __isl_give isl_map
*tile(__isl_take isl_dim
*dim
, int len
,
594 int first
, int tile_len
, int *tile_size
)
603 dim
= isl_dim_add(dim
, isl_dim_in
, len
);
604 dim
= isl_dim_add(dim
, isl_dim_out
, len
+ tile_len
);
605 bmap
= isl_basic_map_universe(isl_dim_copy(dim
));
607 for (i
= 0; i
< len
- tile_len
; ++i
) {
608 int j
= i
< first
? i
: i
+ tile_len
;
609 int k
= i
< first
? i
: i
+ 2 * tile_len
;
611 c
= isl_equality_alloc(isl_dim_copy(dim
));
612 isl_int_set_si(v
, -1);
613 isl_constraint_set_coefficient(c
, isl_dim_in
, j
, v
);
614 isl_int_set_si(v
, 1);
615 isl_constraint_set_coefficient(c
, isl_dim_out
, k
, v
);
616 bmap
= isl_basic_map_add_constraint(bmap
, c
);
619 for (i
= 0; i
< tile_len
; ++i
) {
620 c
= isl_equality_alloc(isl_dim_copy(dim
));
621 isl_int_set_si(v
, -1);
622 isl_constraint_set_coefficient(c
, isl_dim_in
, first
+ i
, v
);
623 isl_int_set_si(v
, tile_size
[i
]);
624 isl_constraint_set_coefficient(c
, isl_dim_out
, first
+ i
, v
);
625 isl_int_set_si(v
, 1);
626 isl_constraint_set_coefficient(c
, isl_dim_out
,
627 first
+ i
+ tile_len
, v
);
628 bmap
= isl_basic_map_add_constraint(bmap
, c
);
630 c
= isl_inequality_alloc(isl_dim_copy(dim
));
631 isl_int_set_si(v
, 1);
632 isl_constraint_set_coefficient(c
, isl_dim_out
,
633 first
+ i
+ tile_len
, v
);
634 bmap
= isl_basic_map_add_constraint(bmap
, c
);
636 c
= isl_inequality_alloc(isl_dim_copy(dim
));
637 isl_int_set_si(v
, -1);
638 isl_constraint_set_coefficient(c
, isl_dim_out
,
639 first
+ i
+ tile_len
, v
);
640 isl_int_set_si(v
, tile_size
[i
] - 1);
641 isl_constraint_set_constant(c
, v
);
642 bmap
= isl_basic_map_add_constraint(bmap
, c
);
648 return isl_map_from_basic_map(bmap
);
651 /* Construct a map from a domain of dimensionality "len"
652 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
653 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
654 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
655 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
656 * that are projected out at the end.
657 * "dim" prescribes the parameters.
659 static __isl_give isl_map
*wrap(__isl_take isl_dim
*dim
, int len
,
660 int first
, int wrap_len
, int *wrap_size
)
666 dim
= isl_dim_add(dim
, isl_dim_in
, len
);
667 dim
= isl_dim_add(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
668 bmap
= isl_basic_map_universe(isl_dim_copy(dim
));
670 for (i
= 0; i
< len
; ++i
) {
671 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
673 c
= isl_equality_alloc(isl_dim_copy(dim
));
674 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
675 isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
676 bmap
= isl_basic_map_add_constraint(bmap
, c
);
679 for (i
= 0; i
< wrap_len
; ++i
) {
680 c
= isl_equality_alloc(isl_dim_copy(dim
));
681 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
683 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
684 first
+ wrap_len
+ i
, 1);
685 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
686 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
687 bmap
= isl_basic_map_add_constraint(bmap
, c
);
689 c
= isl_inequality_alloc(isl_dim_copy(dim
));
690 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
691 first
+ wrap_len
+ i
, 1);
692 bmap
= isl_basic_map_add_constraint(bmap
, c
);
694 c
= isl_inequality_alloc(isl_dim_copy(dim
));
695 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
696 first
+ wrap_len
+ i
, -1);
697 isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
698 bmap
= isl_basic_map_add_constraint(bmap
, c
);
703 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
704 first
+ 2 * wrap_len
, wrap_len
);
706 return isl_map_from_basic_map(bmap
);
709 /* Add "n" parameters named prefix%d.
711 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
712 int n
, const char *prefix
)
718 nparam
= isl_set_dim(set
, isl_dim_param
);
719 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
721 for (i
= 0; i
< n
; ++i
) {
722 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
723 set
= isl_set_set_dim_name(set
, isl_dim_param
,
730 /* Equate the "n" dimensions of "set" starting at "first" to
731 * freshly created parameters named prefix%d.
733 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
734 int first
, int n
, const char *prefix
)
743 nparam
= isl_set_dim(set
, isl_dim_param
);
745 set
= add_params(set
, n
, prefix
);
747 dim
= isl_set_get_dim(set
);
748 bset
= isl_basic_set_universe(isl_dim_copy(dim
));
752 for (i
= 0; i
< n
; ++i
) {
753 c
= isl_equality_alloc(isl_dim_copy(dim
));
754 isl_int_set_si(v
, -1);
755 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
756 isl_int_set_si(v
, 1);
757 isl_constraint_set_coefficient(c
, isl_dim_set
, first
+ i
, v
);
758 bset
= isl_basic_set_add_constraint(bset
, c
);
764 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
767 static __isl_give isl_set
*parametrization(__isl_take isl_dim
*dim
,
768 int len
, int first
, int n
, const char *prefix
)
772 dim
= isl_dim_add(dim
, isl_dim_set
, len
);
773 set
= isl_set_universe(dim
);
775 return parametrize(set
, first
, n
, prefix
);
778 /* Tile the B loops over the tile sizes and then tile/wrap
779 * the T1 loops over the blocks.
781 static __isl_give isl_union_map
*tile_schedule(struct cuda_gen
*gen
,
782 __isl_take isl_union_map
*sched
)
785 isl_map
*tiling
, *block_tiling
;
787 dim
= isl_union_map_get_dim(sched
);
788 tiling
= tile(isl_dim_copy(dim
), gen
->untiled_len
,
789 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
791 if (gen
->options
->wrap
)
792 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
793 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
795 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
796 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
798 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
800 tiling
= isl_map_apply_range(tiling
, block_tiling
);
802 sched
= isl_union_map_apply_range(sched
,
803 isl_union_map_from_map(tiling
));
805 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
810 static __isl_give isl_union_map
*parametrize_tiled_schedule(
811 struct cuda_gen
*gen
, __isl_take isl_union_map
*sched
)
816 dim
= isl_union_map_get_dim(sched
);
817 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->tile_first
, "h");
818 sched
= isl_union_map_intersect_range(sched
,
819 isl_union_set_from_set(par
));
821 dim
= isl_union_map_get_dim(sched
);
822 par
= parametrization(dim
, gen
->tiled_len
,
823 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
824 sched
= isl_union_map_intersect_range(sched
,
825 isl_union_set_from_set(par
));
830 /* Tile/wrap the P1 loops over the threads.
832 static __isl_give isl_union_map
*thread_tile_schedule(struct cuda_gen
*gen
,
833 __isl_take isl_union_map
*sched
)
839 dim
= isl_union_map_get_dim(sched
);
841 if (gen
->options
->wrap
)
842 tiling
= wrap(isl_dim_copy(dim
), gen
->tiled_len
,
843 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
845 tiling
= tile(isl_dim_copy(dim
), gen
->tiled_len
,
846 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
847 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
849 sched
= isl_union_map_apply_range(sched
,
850 isl_union_map_from_map(tiling
));
852 par
= parametrization(dim
, gen
->thread_tiled_len
,
853 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
855 sched
= isl_union_map_intersect_range(sched
,
856 isl_union_set_from_set(par
));
858 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
863 /* If the user asked for it, scale the shared memory tile loops
864 * (T1P and T2) of "sched" by gen->tile_size[i].
865 * If we are not performing "wrapping", then additionally scale the T1P
866 * loops by gen->grid_dim[i].
868 static __isl_give isl_union_map
*scale_tile_loops(struct cuda_gen
*gen
,
869 __isl_take isl_union_map
*sched
)
873 isl_basic_map
*scale
;
876 if (!gen
->options
->scale_tile_loops
)
879 dim
= isl_union_map_get_dim(sched
);
880 dim
= isl_dim_add(dim
, isl_dim_in
, gen
->tiled_len
);
881 dim
= isl_dim_add(dim
, isl_dim_out
, gen
->tiled_len
);
882 scale
= isl_basic_map_universe(isl_dim_copy(dim
));
884 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
887 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
888 f
= gen
->tile_size
[i
- gen
->tile_first
];
889 if (!gen
->options
->wrap
)
890 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
891 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
892 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
893 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
896 c
= isl_equality_alloc(isl_dim_copy(dim
));
897 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
898 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
899 scale
= isl_basic_map_add_constraint(scale
, c
);
904 sched
= isl_union_map_apply_range(sched
,
905 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
910 /* If we are not performing "wrapping" and if the user asked for it,
911 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
913 static __isl_give isl_union_map
*scale_thread_tile_loops(struct cuda_gen
*gen
,
914 __isl_take isl_union_map
*sched
)
918 isl_basic_map
*scale
;
921 if (gen
->options
->wrap
)
923 if (!gen
->options
->scale_tile_loops
)
926 dim
= isl_union_map_get_dim(sched
);
927 dim
= isl_dim_add(dim
, isl_dim_in
, gen
->thread_tiled_len
);
928 dim
= isl_dim_add(dim
, isl_dim_out
, gen
->thread_tiled_len
);
929 scale
= isl_basic_map_universe(isl_dim_copy(dim
));
931 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
934 if (i
>= gen
->shared_len
&&
935 i
< gen
->shared_len
+ gen
->n_block
)
936 f
= gen
->block_dim
[i
- gen
->shared_len
];
938 c
= isl_equality_alloc(isl_dim_copy(dim
));
939 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
940 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
941 scale
= isl_basic_map_add_constraint(scale
, c
);
946 sched
= isl_union_map_apply_range(sched
,
947 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
952 /* If we are not performing "wrapping" and if the user asked for it,
953 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
955 static __isl_give isl_union_map
*scale_access_tile_loops(struct cuda_gen
*gen
,
956 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
960 isl_basic_map
*scale
;
963 if (gen
->options
->wrap
)
965 if (!gen
->options
->scale_tile_loops
)
968 dim
= isl_union_map_get_dim(sched
);
969 dim
= isl_dim_add(dim
, isl_dim_in
, len
);
970 dim
= isl_dim_add(dim
, isl_dim_out
, len
);
971 scale
= isl_basic_map_universe(isl_dim_copy(dim
));
973 for (i
= 0; i
< len
; ++i
) {
976 if (i
>= first
&& i
< first
+ n_tile
)
977 f
= gen
->block_dim
[i
- first
];
979 c
= isl_equality_alloc(isl_dim_copy(dim
));
980 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
981 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
982 scale
= isl_basic_map_add_constraint(scale
, c
);
987 sched
= isl_union_map_apply_range(sched
,
988 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
993 /* If print_user_stmt is set, we want to print the statements ourselves,
994 * instead of relying on the C preprocessor. If so, we need to use
995 * the stop option so that the domains will be saved on the statement
998 static void print_cloog_shared_body(struct cuda_gen
*gen
,
999 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
, int len
,
1000 void (*print_user_stmt
)(struct gpucode_info
*info
,
1001 struct clast_user_stmt
*s
),
1005 CloogOptions
*options
;
1006 CloogDomain
*cloog_context
;
1007 CloogUnionDomain
*ud
;
1009 struct clast_stmt
*stmt
;
1012 sched
= isl_union_map_copy(sched
);
1013 sched
= isl_union_map_align_params(sched
, isl_set_get_dim(context
));
1015 options
= cloog_options_malloc(gen
->state
);
1016 options
->language
= LANGUAGE_C
;
1017 options
->strides
= 1;
1021 options
->override
= 1;
1022 options
->save_domains
= 1;
1023 options
->noscalars
= 1;
1024 options
->first_unroll
= first_unroll
;
1026 ud
= cloog_union_domain_from_isl_union_map(sched
);
1027 for (i
= 0; i
< len
; ++i
) {
1028 snprintf(name
, sizeof(name
), "c%d", i
);
1029 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
1031 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
1032 input
= cloog_input_alloc(cloog_context
, ud
);
1034 stmt
= cloog_clast_create_from_input(input
, options
);
1036 gen
->stmt_code
.indent
= gen
->kernel_code
.indent
;
1037 gen
->stmt_code
.dst
= gen
->cuda
.kernel_c
;
1038 gen
->stmt_code
.print_user_stmt
= print_user_stmt
;
1039 gen
->stmt_code
.print_user_stmt_list
= NULL
;
1040 gen
->stmt_code
.print_for_head
= NULL
;
1041 gen
->stmt_code
.print_for_foot
= NULL
;
1042 gen
->stmt_code
.user
= gen
;
1043 gpu_print_host_stmt(&gen
->stmt_code
, stmt
);
1045 cloog_clast_free(stmt
);
1046 cloog_options_free(options
);
1049 /* Add "len" parameters p[i] called prefix%d,
1050 * with bounds to 0 <= p[i] < size[i].
1052 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1053 int len
, int *size
, const char *prefix
)
1059 isl_basic_set
*bset
;
1063 nparam
= isl_set_dim(set
, isl_dim_param
);
1064 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1066 for (i
= 0; i
< len
; ++i
) {
1067 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1068 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1072 dim
= isl_set_get_dim(set
);
1073 bset
= isl_basic_set_universe(isl_dim_copy(dim
));
1077 for (i
= 0; i
< len
; ++i
) {
1078 c
= isl_inequality_alloc(isl_dim_copy(dim
));
1079 isl_int_set_si(v
, 1);
1080 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1081 bset
= isl_basic_set_add_constraint(bset
, c
);
1083 c
= isl_inequality_alloc(isl_dim_copy(dim
));
1084 isl_int_set_si(v
, -1);
1085 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1086 isl_int_set_si(v
, size
[i
] - 1);
1087 isl_constraint_set_constant(c
, v
);
1088 bset
= isl_basic_set_add_constraint(bset
, c
);
1094 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1097 static void print_shared_body(struct cuda_gen
*gen
,
1098 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
,
1099 int len
, void (*print_user_stmt
)(struct gpucode_info
*info
,
1100 struct clast_user_stmt
*s
),
1105 context
= isl_set_copy(shared_domain
);
1106 context
= parametrize(context
, 0, gen
->shared_len
, "g");
1107 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->shared_len
);
1108 context
= add_bounded_parameters(context
,
1109 gen
->n_block
, gen
->block_dim
, "t");
1111 print_cloog_shared_body(gen
, context
, sched
, len
, print_user_stmt
,
1114 isl_set_free(context
);
1117 /* Given a tile of an array, construct a map that maps each element
1118 * of the tile to a copy of the tile shifted to the origin
1119 * (based on the lower bounds in group->private_bound or group->shared_bound).
1120 * If any of the indices is strided, then {private,shared}_bound[i].shift_map
1121 * is applied to the index first.
1122 * The domain of the resulting map is "access",
1123 * while the range space is anonymous.
1125 static __isl_give isl_map
*shift_access(__isl_take isl_set
*access
,
1126 struct cuda_array_ref_group
*group
)
1130 isl_basic_set
*bset
;
1131 isl_basic_map
*bmap
;
1133 isl_basic_set
*offset
;
1134 isl_basic_map
*shift
;
1135 isl_basic_map
*pre_shift
;
1138 struct cuda_array_bound
*bounds
;
1139 int n_index
= group
->array
->n_index
;
1141 bounds
= group
->private_bound
;
1143 bounds
= group
->shared_bound
;
1145 dim
= isl_set_get_dim(access
);
1146 dim
= isl_dim_drop(dim
, isl_dim_set
, 0, n_index
);
1147 offset
= isl_basic_set_universe(dim
);
1148 for (i
= 0; i
< n_index
; ++i
) {
1149 lb
= isl_aff_copy(bounds
[i
].lb
);
1150 bmap
= isl_basic_map_from_aff(lb
);
1151 bset
= isl_basic_map_range(bmap
);
1152 offset
= isl_basic_set_flat_product(offset
, bset
);
1154 offset
= isl_basic_set_neg(offset
);
1156 dim
= isl_dim_map_from_set(isl_set_get_dim(access
));
1157 shift
= isl_basic_map_identity(dim
);
1158 shift
= isl_basic_map_set_tuple_name(shift
, isl_dim_out
, NULL
);
1160 bset
= isl_basic_set_universe(isl_set_get_dim(access
));
1161 bmap
= isl_basic_map_from_domain_and_range(bset
, offset
);
1163 shift
= isl_basic_map_sum(shift
, bmap
);
1165 dim
= isl_set_get_dim(access
);
1166 dim
= isl_dim_drop(dim
, isl_dim_set
, 0, n_index
);
1167 dim
= isl_dim_map_from_set(dim
);
1168 pre_shift
= isl_basic_map_universe(isl_dim_copy(dim
));
1169 dim
= isl_dim_add(dim
, isl_dim_in
, 1);
1170 dim
= isl_dim_add(dim
, isl_dim_out
, 1);
1171 for (i
= 0; i
< n_index
; ++i
) {
1172 if (!bounds
[i
].shift_map
)
1173 bmap
= isl_basic_map_identity(isl_dim_copy(dim
));
1175 bmap
= isl_basic_map_copy(bounds
[i
].shift_map
);
1176 pre_shift
= isl_basic_map_flat_product(pre_shift
, bmap
);
1179 name
= isl_basic_map_get_tuple_name(shift
, isl_dim_in
);
1180 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_in
, name
);
1181 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_out
, name
);
1182 shift
= isl_basic_map_apply_range(pre_shift
, shift
);
1184 sched
= isl_map_from_basic_map(shift
);
1185 sched
= isl_map_intersect_domain(sched
, access
);
1190 /* Construct a schedule for iterating over all elements in the given
1191 * piece of an array. The schedule iterates over a copy of the piece
1192 * that is shifted to the origin.
1193 * We subsequently also perform the tiling/wrapping over the threads.
1195 * In particular, we tile the final iterators so that the final thread
1196 * dimension runs over the final array dimension.
1197 * However, if those final iterators have only a single iteration,
1198 * we try to tile earlier iterators instead.
1200 static __isl_give isl_union_map
*access_schedule(struct cuda_gen
*gen
,
1201 __isl_take isl_set
*access
, struct cuda_array_ref_group
*group
)
1205 isl_union_map
*usched
;
1208 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1212 sched
= shift_access(access
, group
);
1214 n_tile
= gen
->n_block
;
1215 if (n_tile
> nvar
) {
1217 sched
= isl_map_insert(sched
, isl_dim_out
, 0, n_tile
- nvar
);
1218 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1219 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1223 first
= nvar
- n_tile
;
1225 for (; first
> 0; first
--)
1226 if (!isl_map_plain_is_fixed(sched
, isl_dim_out
,
1227 first
+ n_tile
- 1, NULL
))
1230 dim
= isl_map_get_dim(sched
);
1231 dim
= isl_dim_drop(dim
, isl_dim_in
, 0, isl_dim_size(dim
, isl_dim_in
));
1232 dim
= isl_dim_drop(dim
, isl_dim_out
, 0, nvar
);
1233 if (gen
->options
->wrap
)
1234 tiling
= wrap(isl_dim_copy(dim
), nvar
, first
,
1235 n_tile
, gen
->block_dim
);
1237 tiling
= tile(isl_dim_copy(dim
), nvar
, first
,
1238 n_tile
, gen
->block_dim
);
1239 sched
= isl_map_apply_range(sched
, tiling
);
1241 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1242 usched
= isl_union_map_from_map(sched
);
1243 usched
= isl_union_map_intersect_range(usched
,
1244 isl_union_set_from_set(par
));
1246 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1252 static void print_shared_access(struct cuda_gen
*gen
,
1253 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
1254 const char *type
, struct cuda_array_ref_group
*group
)
1256 const char *array_name
;
1259 isl_union_map
*sched
;
1260 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1263 ctx
= isl_set_get_ctx(access
);
1264 array_name
= isl_set_get_tuple_name(access
);
1265 name
= isl_alloc_array(ctx
, char,
1266 strlen(type
) + sizeof("_shared_") + strlen(array_name
) + 20);
1267 if (group
->array
->n_group
> 1)
1268 sprintf(name
, "%s_shared_%s_%d", type
, array_name
, group
->nr
);
1270 sprintf(name
, "%s_shared_%s", type
, array_name
);
1271 access
= isl_set_set_tuple_name(access
, name
);
1274 sched
= access_schedule(gen
, access
, group
);
1276 n_tile
= gen
->n_block
;
1280 print_shared_body(gen
, shared_domain
, sched
, nvar
+ n_tile
, NULL
, -1);
1282 isl_union_map_free(sched
);
1285 /* Return the union of all read (read = 1) and/or write (write = 1)
1286 * access relations in the group.
1288 static __isl_give isl_union_map
*group_access_relation(
1289 struct cuda_array_ref_group
*group
, int read
, int write
)
1292 isl_union_map
*access
;
1294 access
= isl_union_map_empty(isl_map_get_dim(group
->access
));
1295 for (i
= 0; i
< group
->n_ref
; ++i
) {
1298 if (!((read
&& group
->refs
[i
]->read
) ||
1299 (write
&& group
->refs
[i
]->write
)))
1301 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1302 access
= isl_union_map_union(access
,
1303 isl_union_map_from_map(map_i
));
1309 /* Print code for reading into or writing from shared memory
1310 * the given array reference group.
1312 * sched maps the original iteration domains to the shared memory tile loops.
1314 static int print_group_shared_accesses(struct cuda_gen
*gen
,
1315 struct cuda_array_ref_group
*group
, const char *type
,
1316 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
)
1319 isl_union_map
*access
;
1320 isl_union_set
*uset
;
1321 isl_set
*access_set
;
1323 if (group
->private_bound
)
1325 if (!group
->shared_bound
)
1328 read
= !strcmp(type
, "read");
1330 access
= group_access_relation(group
, read
, !read
);
1331 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
1332 uset
= isl_union_map_range(access
);
1334 if (isl_union_set_is_empty(uset
)) {
1335 isl_union_set_free(uset
);
1339 access_set
= isl_union_set_copy_set(uset
);
1340 isl_union_set_free(uset
);
1341 access_set
= isl_set_coalesce(access_set
);
1343 print_shared_access(gen
, shared_domain
, access_set
, type
, group
);
1348 /* Print code for reading into or writing from shared memory at
1349 * the given level (-1 for innermost).
1351 * If we are not printing at the innermost level, then the dimensionality
1352 * of shared_domain may be smaller than gen->shared_len.
1353 * As the rest of the code assumes that the domain of access has
1354 * gen->shared_len dimensions, we therefore may need to embed this domain
1355 * in a higher dimensional space after intersection with shared_domain.
1357 static void print_shared_accesses(struct cuda_gen
*gen
,
1358 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
1359 const char *type
, int level
)
1365 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
1367 isl_union_map
*sched
;
1369 shared_domain
= isl_set_copy(shared_domain
);
1370 sched
= isl_union_map_copy(gen
->tiled_sched
);
1371 dim
= isl_union_map_get_dim(sched
);
1372 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
1373 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1374 sched
= isl_union_map_intersect_range(sched
,
1375 isl_union_set_from_set(isl_set_copy(shared_domain
)));
1376 if (shared_len
!= gen
->shared_len
) {
1377 dim
= isl_union_map_get_dim(sched
);
1378 proj
= projection(dim
, gen
->shared_len
, shared_len
);
1379 proj
= isl_map_reverse(proj
);
1380 shared_domain
= isl_set_apply(shared_domain
,
1381 isl_map_copy(proj
));
1382 sched
= isl_union_map_apply_range(sched
,
1383 isl_union_map_from_map(proj
));
1386 dim
= isl_union_map_get_dim(sched
);
1387 par
= parametrization(dim
, gen
->shared_len
, 0, gen
->shared_len
, "g");
1388 sched
= isl_union_map_intersect_range(sched
,
1389 isl_union_set_from_set(par
));
1391 for (i
= 0; i
< gen
->n_array
; ++i
) {
1392 struct cuda_array_info
*array
= &gen
->array
[i
];
1394 if (gen
->array
[i
].print_shared_level
!= level
)
1397 for (j
= 0; j
< array
->n_group
; ++j
) {
1398 if (print_group_shared_accesses(gen
, array
->groups
[j
],
1399 type
, shared_domain
, sched
))
1404 isl_union_map_free(sched
);
1405 isl_set_free(shared_domain
);
1408 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
1409 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
1413 /* Given an index expression into a tile of an array, adjust the expression
1414 * to a shift of the tile to the origin
1415 * (based on the lower bounds in array->shared_bound).
1416 * If the index is strided, then we first add
1417 * bound->shift and divide by bound->stride.
1419 static __isl_give isl_qpolynomial
*shift_index(__isl_take isl_qpolynomial
*qp
,
1420 struct cuda_array_info
*array
,
1421 struct cuda_array_bound
*bound
, __isl_take isl_set
*domain
)
1423 isl_qpolynomial
*lb
;
1426 isl_qpolynomial
*shift
, *t
;
1429 shift
= bound
->shift
;
1430 shift
= isl_qpolynomial_copy(shift
);
1431 shift
= isl_qpolynomial_drop_dims(shift
, isl_dim_set
, 0,
1432 isl_qpolynomial_dim(shift
, isl_dim_set
));
1433 shift
= isl_qpolynomial_align_params(shift
,
1434 isl_qpolynomial_get_dim(qp
));
1435 qp
= isl_qpolynomial_add(qp
, shift
);
1436 dim
= isl_qpolynomial_get_dim(qp
);
1438 isl_int_set_si(one
, 1);
1439 t
= isl_qpolynomial_rat_cst(dim
, one
, bound
->stride
);
1441 qp
= isl_qpolynomial_mul(qp
, t
);
1444 lb
= isl_qpolynomial_from_aff(isl_aff_copy(bound
->lb
));
1445 lb
= isl_qpolynomial_drop_dims(lb
, isl_dim_set
, 0,
1446 isl_qpolynomial_dim(lb
, isl_dim_set
));
1448 lb
= isl_qpolynomial_align_params(lb
, isl_qpolynomial_get_dim(qp
));
1450 qp
= isl_qpolynomial_sub(qp
, lb
);
1451 qp
= isl_qpolynomial_gist(qp
, domain
);
1456 /* This function is called for each access to an array in some statement
1457 * in the original code.
1458 * Replace that access by an access to shared or (linearized) global memory.
1459 * Since the array in shared memory is just
1460 * a shifted copy of part of the original array, we simply need
1461 * to subtract the lower bound, which was computed
1462 * in can_tile_for_shared_memory.
1463 * If any of the indices is strided, then we first add
1464 * shared_bound[i].shift and divide by shared_bound[i].stride.
1466 * If the given array is accessed directly from global memory,
1467 * we don't need to perform any shifting and simply simplify
1468 * expression in the context of the domain instead.
1470 * If the array space (range of access) has no name, then we are
1471 * accessing an iterator in the original program.
1473 static void print_access(struct cuda_gen
*gen
, __isl_take isl_map
*access
,
1479 struct cuda_array_info
*array
= NULL
;
1484 struct cuda_array_bound
*bounds
= NULL
;
1486 access
= isl_map_align_params(access
,
1487 isl_set_get_dim(gen
->stmt_domain
));
1489 data_set
= isl_set_apply(isl_set_copy(gen
->stmt_domain
), access
);
1491 name
= isl_set_get_tuple_name(data_set
);
1494 fprintf(gen
->cuda
.kernel_c
, "(");
1496 struct cuda_array_ref_group
*group
;
1498 for (i
= 0; i
< gen
->n_array
; ++i
) {
1499 if (strcmp(name
, gen
->array
[i
].name
))
1501 array
= &gen
->array
[i
];
1504 group
= array
->groups
[group_nr
];
1505 bounds
= group
->private_bound
;
1507 bounds
= group
->shared_bound
;
1509 print_array_name(gen
->cuda
.kernel_c
, group
);
1510 fprintf(gen
->cuda
.kernel_c
, "[");
1514 n_index
= isl_set_dim(data_set
, isl_dim_set
);
1515 aff
= isl_set_affine_hull(data_set
);
1517 prn
= isl_printer_to_file(gen
->ctx
, gen
->cuda
.kernel_c
);
1518 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1521 for (i
= 0; i
+ 1 < n_index
; ++i
)
1522 prn
= isl_printer_print_str(prn
, "(");
1524 for (i
= 0; i
< n_index
; ++i
) {
1526 isl_qpolynomial
*qp
;
1529 ok
= isl_basic_set_has_defining_equality(aff
,
1530 isl_dim_out
, i
, &c
);
1532 qp
= isl_qpolynomial_from_constraint(c
, isl_dim_out
, i
);
1533 qp
= isl_qpolynomial_drop_dims(qp
, isl_dim_set
, 0,
1534 isl_qpolynomial_dim(qp
, isl_dim_set
));
1537 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1538 isl_qpolynomial_free(qp
);
1542 domain
= isl_set_copy(gen
->stmt_domain
);
1543 domain
= isl_set_project_out(domain
, isl_dim_set
, 0,
1544 isl_set_dim(domain
, isl_dim_set
));
1546 qp
= isl_qpolynomial_gist(qp
, domain
);
1548 qp
= shift_index(qp
, array
, &bounds
[i
], domain
);
1552 prn
= isl_printer_print_str(prn
, ") * (");
1553 prn
= isl_printer_print_pw_aff(prn
,
1554 array
->local_bound
[i
]);
1555 prn
= isl_printer_print_str(prn
, ") + ");
1557 prn
= isl_printer_print_str(prn
, "][");
1559 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1560 isl_qpolynomial_free(qp
);
1563 prn
= isl_printer_print_str(prn
, ")");
1565 prn
= isl_printer_print_str(prn
, "]");
1566 isl_printer_free(prn
);
1568 isl_basic_set_free(aff
);
1571 static void print_stmt_body(struct cuda_gen
*gen
,
1572 FILE *out
, struct cuda_stmt
*stmt
)
1575 struct cuda_stmt_access
*access
;
1577 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
1578 fwrite(stmt
->text
+ last
, 1, access
->text_offset
- last
, out
);
1579 last
= access
->text_offset
+ access
->text_len
;
1581 print_access(gen
, isl_map_copy(access
->access
),
1585 fprintf(out
, "%s\n", stmt
->text
+ last
);
1588 /* This function is called for each leaf in the innermost clast,
1589 * i.e., for each statemetn.
1590 * We print the statement body, simplifying the accesses based
1593 static void print_statement(struct gpucode_info
*code
,
1594 struct clast_user_stmt
*u
)
1596 struct cuda_gen
*gen
= code
->user
;
1599 isl_set
*stmt_domain
;
1600 isl_union_map
*stmt_sched
;
1601 isl_union_set
*uset
;
1603 struct cuda_stmt
*stmt
;
1605 nr
= atoi(u
->statement
->name
+ 2);
1606 stmt
= &gen
->stmts
[nr
];
1608 stmt_domain
= extract_host_domain(u
);
1610 stmt_sched
= isl_union_map_intersect_range(
1611 isl_union_map_copy(gen
->local_sched
),
1612 isl_union_set_from_set(extend(stmt_domain
,
1613 gen
->thread_tiled_len
)));
1614 dim
= isl_union_map_get_dim(stmt_sched
);
1615 par
= parametrization(dim
, gen
->thread_tiled_len
, 0,
1616 gen
->thread_tiled_len
, "c");
1617 stmt_sched
= isl_union_map_intersect_range(stmt_sched
,
1618 isl_union_set_from_set(par
));
1620 uset
= isl_union_map_domain(stmt_sched
);
1621 dim
= isl_union_set_get_dim(uset
);
1622 dim
= isl_dim_add(dim
, isl_dim_set
,
1623 isl_set_dim(stmt
->domain
, isl_dim_set
));
1624 dim
= isl_dim_set_tuple_name(dim
, isl_dim_set
, u
->statement
->name
);
1625 gen
->stmt_domain
= isl_union_set_extract_set(uset
, dim
);
1626 isl_union_set_free(uset
);
1628 print_indent(code
->dst
, code
->indent
);
1629 print_stmt_body(gen
, code
->dst
, stmt
);
1631 isl_set_free(gen
->stmt_domain
);
1634 /* Print an access to the element in the global memory copy of the
1635 * given array that corresponds to element [qp[0]][qp[1]]...
1636 * of the original array.
1637 * The copy in global memory has been linearized, so we need to take
1638 * the array size into account.
1640 static void print_private_global_index(isl_ctx
*ctx
, FILE *out
,
1641 struct cuda_array_info
*array
, __isl_keep isl_qpolynomial
**qp
)
1646 fprintf(out
, "%s[", array
->name
);
1647 prn
= isl_printer_to_file(ctx
, out
);
1648 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1649 for (i
= 0; i
+ 1 < array
->n_index
; ++i
)
1650 prn
= isl_printer_print_str(prn
, "(");
1651 for (i
= 0; i
< array
->n_index
; ++i
) {
1653 prn
= isl_printer_print_str(prn
, ") * (");
1654 prn
= isl_printer_print_pw_aff(prn
,
1655 array
->local_bound
[i
]);
1656 prn
= isl_printer_print_str(prn
, ") + ");
1658 prn
= isl_printer_print_qpolynomial(prn
, qp
[i
]);
1660 isl_printer_free(prn
);
1664 /* Print an access to the element in the shared memory copy of the
1665 * given array reference group that corresponds to element [qps[0]][qps[1]]...
1666 * of the original array.
1667 * Since the array in shared memory is just a shifted copy of part
1668 * of the original array, we simply need to subtract the lower bound,
1669 * which was computed in can_tile_for_shared_memory.
1670 * If any of the indices is strided, then we first add
1671 * shared_bound[i].shift and divide by shared_bound[i].stride.
1673 static void print_private_local_index(isl_ctx
*ctx
, FILE *out
,
1674 struct cuda_array_ref_group
*group
,
1675 __isl_keep isl_qpolynomial
**qps
, __isl_keep isl_set
*domain
)
1679 struct cuda_array_info
*array
= group
->array
;
1680 struct cuda_array_bound
*bounds
= group
->private_bound
;
1682 print_array_name(out
, group
);
1683 for (i
= 0; i
< array
->n_index
; ++i
) {
1684 isl_qpolynomial
*qp
= isl_qpolynomial_copy(qps
[i
]);
1686 qp
= shift_index(qp
, array
, &bounds
[i
], isl_set_copy(domain
));
1689 prn
= isl_printer_to_file(ctx
, out
);
1690 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1691 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1692 isl_printer_free(prn
);
1694 isl_qpolynomial_free(qp
);
1698 /* This function is called for each leaf in the clast of the code
1699 * for copying to or from private memory.
1700 * The statement name is read_private_<array> or write_private_<array>.
1702 * The schedule iterates over the array elements, so we can use
1703 * the domain of private_sched at the current scheduling position
1704 * as the index of the array.
1706 static void print_private_copy_statement(struct gpucode_info
*code
,
1707 struct clast_user_stmt
*u
)
1709 struct cuda_gen
*gen
= code
->user
;
1712 struct cuda_array_ref_group
*group
= gen
->private_group
;
1721 isl_qpolynomial
**qp
;
1724 read
= !strncmp(u
->statement
->name
, "read", 4);
1726 domain
= extract_host_domain(u
);
1729 sched
= isl_map_copy(gen
->private_sched
);
1730 sched
= isl_map_reverse(sched
);
1731 sched
= isl_map_intersect_domain(sched
, domain
);
1732 n_in
= isl_map_dim(sched
, isl_dim_in
);
1733 n_out
= isl_map_dim(sched
, isl_dim_out
);
1734 dim
= isl_map_get_dim(sched
);
1735 dim
= isl_dim_drop(dim
, isl_dim_in
, 0, n_in
);
1736 dim
= isl_dim_drop(dim
, isl_dim_out
, 0, n_out
);
1737 param
= parametrization(dim
, n_in
, 0, n_in
, "c");
1738 sched
= isl_map_align_params(sched
, isl_set_get_dim(param
));
1739 sched
= isl_map_intersect_domain(sched
, param
);
1740 index
= isl_map_range(sched
);
1741 domain
= isl_set_copy(index
);
1742 aff
= isl_set_affine_hull(index
);
1743 domain
= isl_set_project_out(domain
, isl_dim_set
, 0, n_out
);
1745 ctx
= isl_basic_set_get_ctx(aff
);
1746 qp
= isl_alloc_array(ctx
, isl_qpolynomial
*, n_out
);
1749 for (i
= 0; i
< n_out
; ++i
) {
1753 ok
= isl_basic_set_has_defining_equality(aff
,
1754 isl_dim_set
, i
, &c
);
1756 qp
[i
] = isl_qpolynomial_from_constraint(c
, isl_dim_set
, i
);
1757 qp
[i
] = isl_qpolynomial_drop_dims(qp
[i
], isl_dim_set
, 0, n_out
);
1760 print_indent(code
->dst
, code
->indent
);
1762 print_private_local_index(ctx
, code
->dst
, group
, qp
, domain
);
1763 fprintf(code
->dst
, " = ");
1764 print_private_global_index(ctx
, code
->dst
, group
->array
, qp
);
1766 print_private_global_index(ctx
, code
->dst
, group
->array
, qp
);
1767 fprintf(code
->dst
, " = ");
1768 print_private_local_index(ctx
, code
->dst
, group
, qp
, domain
);
1770 fprintf(code
->dst
, ";\n");
1772 for (i
= 0; i
< n_out
; ++i
)
1773 isl_qpolynomial_free(qp
[i
]);
1776 isl_basic_set_free(aff
);
1777 isl_set_free(domain
);
1780 static void print_private_access(struct cuda_gen
*gen
,
1781 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
1782 const char *type
, struct cuda_array_ref_group
*group
)
1784 const char *array_name
;
1787 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1788 isl_union_map
*usched
;
1790 if (isl_set_fast_is_empty(access
)) {
1791 isl_set_free(access
);
1795 ctx
= isl_set_get_ctx(access
);
1796 array_name
= isl_set_get_tuple_name(access
);
1797 name
= isl_alloc_array(ctx
, char,
1798 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
1799 if (group
->array
->n_group
> 1)
1800 sprintf(name
, "%s_private_%s_%d", type
, array_name
, group
->nr
);
1802 sprintf(name
, "%s_private_%s", type
, array_name
);
1803 access
= isl_set_set_tuple_name(access
, name
);
1806 gen
->private_sched
= shift_access(access
, group
);
1807 gen
->private_group
= group
;
1809 usched
= isl_union_map_from_map(isl_map_copy(gen
->private_sched
));
1810 print_shared_body(gen
, shared_domain
, usched
, nvar
,
1811 &print_private_copy_statement
, 1);
1812 isl_union_map_free(usched
);
1814 isl_map_free(gen
->private_sched
);
1817 /* Print code for reading into or writing from private memory
1818 * the given array reference group.
1820 * sched maps the original iteration domains to the shared memory tile loops.
1822 static void print_group_private_accesses(struct cuda_gen
*gen
,
1823 struct cuda_array_ref_group
*group
,
1824 const char *type
, __isl_keep isl_set
*shared_domain
,
1825 unsigned first_shared
, int shared_len
, __isl_keep isl_union_map
*sched
)
1828 isl_union_map
*access
;
1829 isl_union_set
*uset
;
1830 isl_set
*access_set
;
1832 if (!group
->private_bound
)
1835 read
= !strcmp(type
, "read");
1837 access
= group_access_relation(group
, read
, !read
);
1838 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
1839 access
= isl_union_map_intersect(access
,
1840 isl_union_map_copy(gen
->private_access
));
1841 uset
= isl_union_map_range(access
);
1843 if (isl_union_set_is_empty(uset
)) {
1844 isl_union_set_free(uset
);
1848 access_set
= isl_union_set_copy_set(uset
);
1849 isl_union_set_free(uset
);
1850 access_set
= isl_set_coalesce(access_set
);
1851 access_set
= isl_set_eliminate(access_set
, isl_dim_param
,
1852 first_shared
+ shared_len
,
1853 gen
->shared_len
- shared_len
);
1855 print_private_access(gen
, shared_domain
, access_set
, type
, group
);
1858 /* Print code for reading into or writing from private memory at
1859 * the given level (-1 for innermost).
1861 * If we are not printing at the innermost level, then the dimensionality
1862 * of shared_domain may be smaller than gen->shared_len.
1863 * As the rest of the code assumes that the domain of access has
1864 * gen->shared_len dimensions, we therefore may need to embed this domain
1865 * in a higher dimensional space after intersection with shared_domain.
1867 * This code is very similar to print_shared_accesses.
1868 * The main difference is that we to take into account gen->private_access.
1870 static void print_private_accesses(struct cuda_gen
*gen
,
1871 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
1872 const char *type
, int level
)
1877 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
1878 unsigned first_shared
;
1879 isl_union_map
*sched
;
1881 shared_domain
= isl_set_copy(shared_domain
);
1882 sched
= isl_union_map_copy(gen
->tiled_sched
);
1883 dim
= isl_union_map_get_dim(sched
);
1884 first_shared
= isl_dim_size(dim
, isl_dim_param
);
1885 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
1886 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1887 sched
= isl_union_map_intersect_range(sched
,
1888 isl_union_set_from_set(isl_set_copy(shared_domain
)));
1889 if (shared_len
!= gen
->shared_len
) {
1890 dim
= isl_union_map_get_dim(sched
);
1891 proj
= projection(dim
, gen
->shared_len
, shared_len
);
1892 proj
= isl_map_reverse(proj
);
1893 shared_domain
= isl_set_apply(shared_domain
,
1894 isl_map_copy(proj
));
1895 sched
= isl_union_map_apply_range(sched
,
1896 isl_union_map_from_map(proj
));
1899 for (i
= 0; i
< gen
->n_array
; ++i
) {
1900 struct cuda_array_info
*array
= &gen
->array
[i
];
1902 if (gen
->array
[i
].print_shared_level
!= level
)
1905 for (j
= 0; j
< array
->n_group
; ++j
)
1906 print_group_private_accesses(gen
, array
->groups
[j
],
1907 type
, shared_domain
,
1908 first_shared
, shared_len
, sched
);
1911 isl_union_map_free(sched
);
1912 isl_set_free(shared_domain
);
1915 /* Set unroll[j] if the input dimension j is involved in
1916 * the index expression represented by bmap.
1918 static int check_unroll(__isl_take isl_basic_map
*bmap
, void *user
)
1921 int n_in
= isl_basic_map_dim(bmap
, isl_dim_in
);
1922 int n_out
= isl_basic_map_dim(bmap
, isl_dim_out
);
1925 for (i
= 0; i
< n_out
; ++i
) {
1929 ok
= isl_basic_map_has_defining_equality(bmap
,
1930 isl_dim_out
, i
, &c
);
1932 for (j
= 0; j
< n_in
; ++j
)
1933 if (isl_constraint_involves_dims(c
, isl_dim_in
, j
, 1))
1935 isl_constraint_free(c
);
1938 isl_basic_map_free(bmap
);
1942 /* Given an array pos mapping input dimensions to the corresponding
1943 * output dimension, construct the corresponding map.
1945 static __isl_give isl_map
*permutation(__isl_take isl_dim
*dim
,
1950 isl_basic_map
*bmap
;
1952 dim
= isl_dim_add(dim
, isl_dim_in
, len
);
1953 dim
= isl_dim_add(dim
, isl_dim_out
, len
);
1954 bmap
= isl_basic_map_universe(isl_dim_copy(dim
));
1956 for (i
= 0; i
< len
; ++i
) {
1957 c
= isl_equality_alloc(isl_dim_copy(dim
));
1958 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
1959 isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
], 1);
1960 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1964 return isl_map_from_basic_map(bmap
);
1967 /* Find all loops involved in any of the index expressions for any of
1968 * the private accesses, move them innermost and then mark them as
1969 * requiring unrolling by setting gen->first_unroll.
1970 * The loops involved should all be parallel because of the checks
1971 * we performed in check_private_group_access. Moving them innermost
1972 * is therefore a valid transformation.
1974 static __isl_give isl_union_map
*interchange_for_unroll(struct cuda_gen
*gen
,
1975 __isl_take isl_union_map
*sched
)
1978 int unroll
[gen
->thread_tiled_len
];
1979 int perm
[gen
->thread_tiled_len
];
1982 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1984 gen
->first_unroll
= -1;
1986 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1988 for (i
= 0; i
< gen
->n_array
; ++i
) {
1989 struct cuda_array_info
*array
= &gen
->array
[i
];
1991 for (j
= 0; j
< array
->n_group
; ++j
) {
1992 isl_union_map
*access
;
1996 if (!array
->groups
[j
]->private_bound
)
1999 access
= group_access_relation(array
->groups
[j
], 1, 1);
2000 access
= isl_union_map_apply_domain(access
,
2001 isl_union_map_copy(sched
));
2003 dim
= isl_union_map_get_dim(access
);
2004 dim
= isl_dim_add(dim
, isl_dim_out
, array
->n_index
);
2005 dim
= isl_dim_set_tuple_name(dim
, isl_dim_out
,
2007 dim
= isl_dim_add(dim
, isl_dim_in
,
2008 gen
->thread_tiled_len
);
2009 acc
= isl_union_map_extract_map(access
, dim
);
2011 isl_map_foreach_basic_map(acc
, &check_unroll
, unroll
);
2014 isl_union_map_free(access
);
2018 for (i
= 0; i
< gen
->shared_len
; ++i
)
2022 for (i
= gen
->shared_len
; i
< len
; ++i
)
2029 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
2034 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
2037 gen
->first_unroll
= 1 + j
;
2038 for (i
= 0; i
< len
; ++i
)
2042 dim
= isl_union_map_get_dim(sched
);
2043 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
2044 sched
= isl_union_map_apply_range(sched
,
2045 isl_union_map_from_map(permute
));
2050 /* This function is called for each leaf in the clast of the kernel code.
2051 * We first specialize the schedule to the site of the leaf and
2052 * print code for reading into shared memory, performing the actual
2053 * computations and writing from shared memory, with the required
2056 static void print_kernel_user(struct gpucode_info
*code
,
2057 struct clast_user_stmt
*u
)
2059 struct cuda_gen
*gen
= code
->user
;
2060 isl_set
*shared_domain
;
2062 shared_domain
= extract_entire_host_domain(u
);
2064 print_shared_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2066 print_private_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2068 print_shared_body(gen
, shared_domain
, gen
->local_sched
,
2069 gen
->thread_tiled_len
, &print_statement
,
2072 print_private_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2074 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
2075 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
2077 print_shared_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2079 isl_set_free(shared_domain
);
2082 /* Check if we need to perform any copying to shared memory at this level
2083 * and if so, print the copying instructions.
2084 * Any array for which we are allowed to print copying instructions at
2085 * this level, but haven't done so already, is printed.
2087 static void print_kernel_for_head(struct gpucode_info
*code
,
2088 struct clast_for
*f
)
2091 struct cuda_gen
*gen
= code
->user
;
2096 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2097 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2099 for (i
= 0; i
< gen
->n_array
; ++i
) {
2100 if (gen
->array
[i
].print_shared_level
>= 0)
2102 if (gen
->array
[i
].last_shared
> level
)
2104 gen
->array
[i
].print_shared_level
= level
;
2109 print_shared_accesses(gen
, domain
, gen
->read
, "read", level
);
2110 print_private_accesses(gen
, domain
, gen
->read
, "read", level
);
2113 isl_set_free(domain
);
2116 /* Print instructions for copying from shared memory for each array
2117 * for which print_kernel_for_head has added copying instructions
2120 static void print_kernel_for_foot(struct gpucode_info
*code
,
2121 struct clast_for
*f
)
2124 struct cuda_gen
*gen
= code
->user
;
2129 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2130 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2132 for (i
= 0; i
< gen
->n_array
; ++i
) {
2133 if (gen
->array
[i
].print_shared_level
!= level
)
2140 print_private_accesses(gen
, domain
, gen
->write
, "write", level
);
2141 print_shared_accesses(gen
, domain
, gen
->write
, "write", level
);
2144 isl_set_free(domain
);
2147 /* Use CLooG to generate code for the outer gen->shared_first loops
2148 * of the local schedule "sched".
2149 * The pretty printing of this code is handled by gpu_print_host_stmt,
2150 * which calls print_kernel_user for each iteration of the shared tile loops.
2152 static void print_cloog_kernel_body(struct cuda_gen
*gen
,
2153 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
)
2156 CloogOptions
*options
;
2157 CloogDomain
*cloog_context
;
2158 CloogUnionDomain
*ud
;
2160 struct clast_stmt
*stmt
;
2163 sched
= isl_union_map_copy(sched
);
2164 sched
= isl_union_map_align_params(sched
, isl_set_get_dim(context
));
2166 options
= cloog_options_malloc(gen
->state
);
2167 options
->language
= LANGUAGE_C
;
2168 options
->strides
= 1;
2170 options
->stop
= gen
->shared_len
;
2171 options
->f
= gen
->tiled_len
;
2172 options
->l
= gen
->tiled_len
;
2173 options
->save_domains
= 1;
2174 options
->noscalars
= 1;
2176 ud
= cloog_union_domain_from_isl_union_map(sched
);
2177 for (i
= 0; i
< gen
->shared_len
; ++i
) {
2178 snprintf(name
, sizeof(name
), "g%d", i
);
2179 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
2181 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
2182 input
= cloog_input_alloc(cloog_context
, ud
);
2184 stmt
= cloog_clast_create_from_input(input
, options
);
2186 gen
->kernel_code
.indent
= 4;
2187 gen
->kernel_code
.dst
= gen
->cuda
.kernel_c
;
2188 gen
->kernel_code
.print_user_stmt
= NULL
;
2189 gen
->kernel_code
.print_user_stmt_list
= &print_kernel_user
;
2190 gen
->kernel_code
.print_for_head
= &print_kernel_for_head
;
2191 gen
->kernel_code
.print_for_foot
= &print_kernel_for_foot
;
2192 gen
->kernel_code
.user
= gen
;
2193 gpu_print_host_stmt(&gen
->kernel_code
, stmt
);
2195 cloog_clast_free(stmt
);
2196 cloog_options_free(options
);
2199 static void print_kernel_iterators(struct cuda_gen
*gen
)
2202 const char *block_dims
[] = { "blockIdx.x", "blockIdx.y" };
2203 const char *thread_dims
[] = { "threadIdx.x", "threadIdx.y",
2206 if (gen
->n_grid
> 0) {
2207 print_indent(gen
->cuda
.kernel_c
, 4);
2208 fprintf(gen
->cuda
.kernel_c
, "int ");
2209 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2211 fprintf(gen
->cuda
.kernel_c
, ", ");
2212 fprintf(gen
->cuda
.kernel_c
, "b%d = %s",
2213 i
, block_dims
[gen
->n_grid
- 1 - i
]);
2215 fprintf(gen
->cuda
.kernel_c
, ";\n");
2218 if (gen
->n_block
> 0) {
2219 print_indent(gen
->cuda
.kernel_c
, 4);
2220 fprintf(gen
->cuda
.kernel_c
, "int ");
2221 for (i
= 0; i
< gen
->n_block
; ++i
) {
2223 fprintf(gen
->cuda
.kernel_c
, ", ");
2224 fprintf(gen
->cuda
.kernel_c
, "t%d = %s",
2225 i
, thread_dims
[gen
->n_block
- 1 - i
]);
2227 fprintf(gen
->cuda
.kernel_c
, ";\n");
2231 static void print_group_shared_array(struct cuda_gen
*gen
,
2232 struct cuda_array_ref_group
*group
)
2235 struct cuda_array_bound
*bounds
;
2237 bounds
= group
->private_bound
;
2239 bounds
= group
->shared_bound
;
2243 print_indent(gen
->cuda
.kernel_c
, 4);
2244 fprintf(gen
->cuda
.kernel_c
, "%s%s ",
2245 group
->private_bound
? "" : "__shared__ ", gen
->options
->type
);
2246 print_array_name(gen
->cuda
.kernel_c
, group
);
2247 for (j
= 0; j
< group
->array
->n_index
; ++j
) {
2248 fprintf(gen
->cuda
.kernel_c
, "[");
2249 isl_int_print(gen
->cuda
.kernel_c
, bounds
[j
].size
, 0);
2250 fprintf(gen
->cuda
.kernel_c
, "]");
2252 fprintf(gen
->cuda
.kernel_c
, ";\n");
2255 static void print_shared_arrays(struct cuda_gen
*gen
)
2259 for (i
= 0; i
< gen
->n_array
; ++i
) {
2260 struct cuda_array_info
*array
= &gen
->array
[i
];
2262 for (j
= 0; j
< array
->n_group
; ++j
)
2263 print_group_shared_array(gen
, array
->groups
[j
]);
2267 static void print_kernel_body(struct cuda_gen
*gen
,
2268 __isl_keep isl_set
*host_domain
, __isl_keep isl_union_map
*sched
)
2272 context
= isl_set_copy(host_domain
);
2273 context
= parametrize(context
, 0, gen
->tile_first
, "h");
2274 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->tile_first
);
2275 context
= add_bounded_parameters(context
,
2276 gen
->n_grid
, gen
->grid_dim
, "b");
2278 print_kernel_iterators(gen
);
2279 print_shared_arrays(gen
);
2281 fprintf(gen
->cuda
.kernel_c
, "\n");
2283 print_cloog_kernel_body(gen
, context
, sched
);
2285 isl_set_free(context
);
2288 /* Given a constraint
2290 * a(p,i) + j = g f(e)
2292 * or -a(p,i) - j = g f(e) if sign < 0,
2293 * store a(p,i) in bound->shift and g (stride) in bound->stride.
2294 * a(p,i) is assumed to be an expression in only the parameters.
2296 static void extract_stride(__isl_keep isl_constraint
*c
,
2297 struct cuda_array_bound
*bound
, isl_int stride
, int sign
)
2304 isl_qpolynomial
*qp
;
2306 isl_int_set(bound
->stride
, stride
);
2308 dim
= isl_constraint_get_dim(c
);
2309 dim
= isl_dim_drop(dim
, isl_dim_out
, 0, 1);
2310 dim
= isl_dim_drop(dim
, isl_dim_in
, 0, isl_dim_size(dim
, isl_dim_in
));
2311 dim
= isl_dim_domain(dim
);
2313 nparam
= isl_dim_size(dim
, isl_dim_param
);
2317 isl_int_set_si(one
, 1);
2319 isl_constraint_get_constant(c
, &v
);
2322 qp
= isl_qpolynomial_rat_cst(isl_dim_copy(dim
), v
, one
);
2324 for (i
= 0; i
< nparam
; ++i
) {
2325 isl_qpolynomial
*t
, *p
;
2327 isl_constraint_get_coefficient(c
, isl_dim_param
, i
, &v
);
2328 if (isl_int_is_zero(v
))
2332 t
= isl_qpolynomial_rat_cst(isl_dim_copy(dim
), v
, one
);
2333 p
= isl_qpolynomial_var(isl_dim_copy(dim
), isl_dim_param
, i
);
2334 t
= isl_qpolynomial_mul(t
, p
);
2335 qp
= isl_qpolynomial_add(qp
, t
);
2345 /* Given an equality constraint of a map with a single output dimension j,
2346 * check if the constraint is of the form
2348 * a(p,i) + j = g f(e)
2350 * with a(p,i) an expression in the parameters and input dimensions
2351 * and f(e) an expression in the existentially quantified variables.
2352 * If so, and if g is larger than any such g from a previously considered
2353 * constraint, then call extract_stride. to record the stride information
2356 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
2361 struct cuda_array_bound
*bound
= user
;
2364 isl_int_init(stride
);
2366 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2367 isl_constraint_get_coefficient(c
, isl_dim_out
, 0, &v
);
2369 if (n_div
&& (isl_int_is_one(v
) || isl_int_is_negone(v
))) {
2370 int s
= isl_int_sgn(v
);
2371 isl_int_set_si(stride
, 0);
2372 for (i
= 0; i
< n_div
; ++i
) {
2373 isl_constraint_get_coefficient(c
, isl_dim_div
, i
, &v
);
2374 isl_int_gcd(stride
, stride
, v
);
2376 if (!isl_int_is_zero(stride
) &&
2377 isl_int_gt(stride
, bound
->stride
))
2378 extract_stride(c
, bound
, stride
, s
);
2381 isl_int_clear(stride
);
2384 isl_constraint_free(c
);
2388 /* Given contraints on an array index i, check if we can find
2389 * a shift a(p) and a stride g such that
2391 * a(p) + i = 0 mod g
2393 * If so, record the information in bound and apply the mapping
2394 * i -> (i + a(p))/g to the array index in bounds and return
2395 * the new constraints.
2396 * If not, simply return the original constraints.
2398 static __isl_give isl_basic_map
*check_stride(struct cuda_gen
*gen
,
2399 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2403 isl_basic_map
*shift
;
2404 isl_qpolynomial
*qp
, *t
;
2407 isl_int_set_si(bound
->stride
, -1);
2409 aff
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
2411 isl_basic_map_foreach_constraint(aff
, &check_stride_constraint
, bound
);
2413 isl_basic_map_free(aff
);
2415 if (isl_int_is_neg(bound
->stride
))
2418 qp
= isl_qpolynomial_copy(bound
->shift
);
2419 qp
= isl_qpolynomial_add_dims(qp
, isl_dim_set
, 1);
2420 dim
= isl_qpolynomial_get_dim(qp
);
2421 t
= isl_qpolynomial_var(isl_dim_copy(dim
), isl_dim_set
, 0);
2422 qp
= isl_qpolynomial_add(qp
, t
);
2424 isl_int_set_si(one
, 1);
2425 t
= isl_qpolynomial_rat_cst(dim
, one
, bound
->stride
);
2427 qp
= isl_qpolynomial_mul(qp
, t
);
2428 shift
= isl_basic_map_from_qpolynomial(qp
);
2430 bound
->shift_map
= isl_basic_map_copy(shift
);
2431 bounds
= isl_basic_map_apply_range(bounds
, shift
);
2436 struct cuda_size_info
{
2437 isl_basic_set
*bset
;
2438 struct cuda_array_bound
*bound
;
2442 /* Given a constraint from the basic set describing the bounds on
2443 * an array index, check if it is a lower bound, say m i >= b(x), and,
2444 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2445 * upper bound. If so, and if this bound is smaller than any bound
2446 * derived from earlier constraints, set the size to this bound on
2447 * the expression and the lower bound to ceil(b(x)/m).
2449 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2451 struct cuda_size_info
*size
= user
;
2456 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2457 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2459 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
)) {
2460 isl_constraint_free(c
);
2466 isl_constraint_get_coefficient(c
, isl_dim_set
, size
->pos
, &v
);
2468 if (isl_int_is_pos(v
)) {
2471 enum isl_lp_result res
;
2473 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2474 aff
= isl_aff_ceil(aff
);
2476 lb
= isl_aff_copy(aff
);
2478 aff
= isl_aff_neg(aff
);
2479 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_set
, size
->pos
, 1);
2481 res
= isl_basic_set_max(size
->bset
, aff
, &v
);
2484 if (res
== isl_lp_ok
) {
2485 isl_int_add_ui(v
, v
, 1);
2486 if (isl_int_is_neg(size
->bound
->size
) ||
2487 isl_int_lt(v
, size
->bound
->size
)) {
2488 isl_int_set(size
->bound
->size
, v
);
2489 lb
= isl_aff_drop_dims(lb
, isl_dim_set
,
2491 isl_aff_free(size
->bound
->lb
);
2492 size
->bound
->lb
= isl_aff_copy(lb
);
2499 isl_constraint_free(c
);
2504 /* Given a basic map "bounds" that maps parameters and input dimensions
2505 * to a single output dimension, look for an expression in the parameters
2506 * and input dimensions such that the range of the output dimension shifted
2507 * by this expression is a constant.
2509 * In particular, we currently only consider lower bounds on the output
2510 * dimension as candidate expressions.
2512 static int compute_array_dim_size(struct cuda_gen
*gen
,
2513 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2515 struct cuda_size_info size
;
2517 bounds
= check_stride(gen
, bound
, bounds
);
2519 isl_int_set_si(bound
->size
, -1);
2523 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2524 size
.bset
= isl_basic_map_wrap(bounds
);
2525 size
.bset
= isl_basic_set_flatten(size
.bset
);
2526 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2528 isl_basic_set_free(size
.bset
);
2530 return isl_int_is_nonneg(bound
->size
) ? 0 : -1;
2533 /* Check if we can find a shared memory tile for the given array
2534 * based on the given accesses, and if so, put the results
2535 * in array->shared_bound.
2537 * We project the accesses on each index in turn and look for a parametric
2538 * offset such that the size is constant.
2540 static int can_tile_for_shared_memory(struct cuda_gen
*gen
,
2541 struct cuda_array_info
*array
, __isl_keep isl_map
*access
,
2542 struct cuda_array_bound
*bounds
)
2546 for (i
= 0; i
< array
->n_index
; ++i
) {
2548 isl_basic_map
*hull
;
2550 access_i
= isl_map_copy(access
);
2551 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2552 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2553 1, array
->n_index
- (i
+ 1));
2554 access_i
= isl_map_compute_divs(access_i
);
2555 hull
= isl_map_simple_hull(access_i
);
2556 if (compute_array_dim_size(gen
, &bounds
[i
], hull
) < 0)
2563 /* Construct a map with input the shared tile loops and the loops that
2564 * will be wrapped around the threads that relates these later loops
2565 * to the thread indices and the projects them out.
2567 static __isl_give isl_map
*compute_privatization(struct cuda_gen
*gen
)
2575 dim
= isl_union_map_get_dim(gen
->shared_sched
);
2577 if (gen
->options
->wrap
)
2578 tiling
= wrap(isl_dim_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2579 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2581 tiling
= tile(isl_dim_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2582 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2586 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2587 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2590 priv
= isl_map_align_params(priv
, isl_set_get_dim(par
));
2591 priv
= isl_map_intersect_range(priv
, par
);
2593 dim
= isl_map_get_dim(priv
);
2594 dim
= isl_dim_drop(dim
, isl_dim_in
, 0, isl_dim_size(dim
, isl_dim_in
));
2595 dim
= isl_dim_drop(dim
, isl_dim_out
, 0, isl_dim_size(dim
, isl_dim_out
));
2596 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2599 priv
= isl_map_apply_range(priv
, proj
);
2604 /* Construct a map from domain_dim to domain_dim that increments
2605 * the dimension at position "pos" and leaves all other dimensions
2608 static __isl_give isl_map
*next(__isl_take isl_dim
*domain_dim
, int pos
)
2611 int len
= isl_dim_size(domain_dim
, isl_dim_set
);
2613 isl_basic_map
*next
;
2615 dim
= isl_dim_map_from_set(domain_dim
);
2616 next
= isl_basic_map_universe(isl_dim_copy(dim
));
2618 for (i
= 0; i
< len
; ++i
) {
2621 c
= isl_equality_alloc(isl_dim_copy(dim
));
2622 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2623 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2625 isl_constraint_set_constant_si(c
, 1);
2626 next
= isl_basic_map_add_constraint(next
, c
);
2631 return isl_map_from_basic_map(next
);
2634 /* Check if the given access is coalesced.
2635 * That is, check whether incrementing the dimension that will get
2636 * wrapped over the last thread index results in incrementing
2637 * the last array index.
2639 * This function is only called for access relations without reuse.
2641 static int access_is_coalesced(struct cuda_gen
*gen
,
2642 __isl_keep isl_union_map
*access
)
2645 isl_map
*access_map
;
2646 isl_map
*next_thread_x
;
2647 isl_map
*next_element
;
2651 access
= isl_union_map_copy(access
);
2652 access
= isl_union_map_apply_domain(access
,
2653 isl_union_map_copy(gen
->tiled_sched
));
2654 access_map
= isl_union_map_copy_map(access
);
2655 isl_union_map_free(access
);
2657 dim
= isl_map_get_dim(access_map
);
2658 dim
= isl_dim_domain(dim
);
2659 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2661 dim
= isl_map_get_dim(access_map
);
2662 dim
= isl_dim_range(dim
);
2663 next_element
= next(dim
, isl_dim_size(dim
, isl_dim_set
) - 1);
2665 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2666 map
= isl_map_apply_range(map
, access_map
);
2668 coalesced
= isl_map_is_subset(map
, next_element
);
2670 isl_map_free(next_element
);
2676 /* For the given array reference group, check whether the access is private
2677 * to the thread. That is, check that any given array element
2678 * is only accessed by a single thread.
2679 * We compute an access relation that maps the shared tile loop iterators
2680 * and the shared point loop iterators that will be wrapped over the
2681 * threads to the array elements.
2682 * We actually check that those iterators that will be wrapped
2683 * partition the array space. This check is stricter than necessary
2684 * since several iterations may be mapped onto the same thread
2685 * and then they could be allowed to access the same memory elements,
2686 * but our check does not allow this situation.
2688 * We also check that the index expression only depends on parallel
2689 * loops. That way, we can move those loops innermost and unroll them.
2690 * Again, we use a test that is stricter than necessary.
2691 * We actually check whether the index expression only depends
2692 * on the iterators that are wrapped over the threads.
2693 * These are necessarily parallel, but there may be more parallel loops.
2695 * Combining the injectivity of the first test with the single-valuedness
2696 * of the second test, we simply test for bijectivity.
2698 * If it turns out we can use registers, we compute the private memory
2699 * tile size using can_tile_for_shared_memory, after introducing a dependence
2700 * on the thread indices.
2702 * Before performing any of the above computations, we first check
2703 * if there is any reuse on the reference group. If not, we simply
2704 * return. If, moreover, the access is coalesced then we also remove
2705 * the shared memory tiling since we should just use global memory instead.
2707 static void check_private_group_access(struct cuda_gen
*gen
,
2708 struct cuda_array_ref_group
*group
)
2711 isl_union_map
*access
;
2712 int n_index
= group
->array
->n_index
;
2714 access
= group_access_relation(group
, 1, 1);
2715 if (isl_union_map_is_injective(access
)) {
2716 if (group
->shared_bound
&& access_is_coalesced(gen
, access
)) {
2717 free_bound_list(group
->shared_bound
, n_index
);
2718 group
->shared_bound
= NULL
;
2720 isl_union_map_free(access
);
2723 access
= isl_union_map_apply_domain(access
,
2724 isl_union_map_copy(gen
->shared_sched
));
2726 acc
= isl_union_map_copy_map(access
);
2727 isl_union_map_free(access
);
2729 if (!isl_map_is_bijective(acc
)) {
2734 group
->private_bound
= create_bound_list(gen
->ctx
, n_index
);
2735 acc
= isl_map_align_params(acc
, isl_map_get_dim(gen
->privatization
));
2736 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2737 if (!can_tile_for_shared_memory(gen
, group
->array
, acc
,
2738 group
->private_bound
)) {
2739 free_bound_list(group
->private_bound
, n_index
);
2740 group
->private_bound
= NULL
;
2746 /* Look for the last shared tile loop that affects the offset of the
2747 * shared or private tile and store the result in array->last_shared.
2749 static void set_last_shared(struct cuda_gen
*gen
,
2750 struct cuda_array_ref_group
*group
)
2753 struct cuda_array_bound
*bounds
;
2754 unsigned first_shared
= gen
->first_shared
;
2755 int n_index
= group
->array
->n_index
;
2757 bounds
= group
->private_bound
;
2759 bounds
= group
->shared_bound
;
2763 for (j
= gen
->shared_len
- 1; j
>= 0; --j
) {
2764 for (i
= 0; i
< n_index
; ++i
) {
2766 isl_qpolynomial
*shift
;
2769 if (isl_aff_involves_dims(lb
, isl_dim_param
,
2770 first_shared
+ j
, 1))
2773 shift
= bounds
[i
].shift
;
2776 if (isl_qpolynomial_involves_dims(shift
, isl_dim_param
,
2777 first_shared
+ j
, 1))
2783 group
->array
->last_shared
= j
;
2786 /* Compute the sizes of all private arrays for the current kernel,
2787 * as well as the offsets of the private pieces in the original arrays.
2788 * If we cannot or don't want to privatize a given array group,
2789 * we use the shared memory tile sizes computed in
2790 * compute_group_shared_bound instead.
2792 * If a given Array only has a single reference group and if we have
2793 * been able to find a privated or shared tile,
2794 * we also look for the last shared tile loop that affects the offset
2795 * (and therefore the array tile) and store the result in array->last_shared.
2797 * A privatized copy of all access relations from reference groups that
2798 * are mapped to private memory is stored in gen->privatization.
2800 static void compute_private_size(struct cuda_gen
*gen
)
2803 isl_union_map
*private;
2805 private = isl_union_map_empty(isl_union_map_get_dim(gen
->shared_sched
));
2807 for (i
= 0; i
< gen
->n_array
; ++i
) {
2808 struct cuda_array_info
*array
= &gen
->array
[i
];
2810 for (j
= 0; j
< array
->n_group
; ++j
) {
2811 check_private_group_access(gen
, array
->groups
[j
]);
2813 if (!array
->groups
[j
]->private_bound
)
2816 private = isl_union_map_union(private,
2817 group_access_relation(array
->groups
[j
], 1, 1));
2820 array
->last_shared
= gen
->shared_len
- 1;
2821 array
->print_shared_level
= -1;
2823 if (array
->n_group
!= 1)
2825 set_last_shared(gen
, array
->groups
[0]);
2828 if (isl_union_map_is_empty(private))
2829 isl_union_map_free(private);
2831 isl_union_map
*priv
;
2833 private = isl_union_map_apply_domain(private,
2834 isl_union_map_copy(gen
->shared_sched
));
2835 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2836 private = isl_union_map_apply_domain(private, priv
);
2837 gen
->private_access
= private;
2841 /* Fill up the groups array with singleton groups, i.e., one group
2842 * per reference, initializing the array, access, write and refs fields.
2843 * In particular the access field is initialized to the scheduled
2844 * access relation of the array reference.
2846 * Return the number of elements initialized, i.e., the number of
2847 * active references in the current kernel.
2849 static int populate_array_references(struct cuda_gen
*gen
,
2850 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
,
2851 struct cuda_array_ref_group
**groups
)
2855 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2858 for (i
= 0; i
< array
->n_ref
; ++i
) {
2859 isl_union_map
*umap
;
2861 struct cuda_array_ref_group
*group
;
2862 struct cuda_stmt_access
*access
= array
->refs
[i
];
2864 map
= isl_map_copy(access
->access
);
2865 umap
= isl_union_map_from_map(map
);
2866 umap
= isl_union_map_apply_domain(umap
,
2867 isl_union_map_copy(sched
));
2869 map
= isl_union_map_copy_map(umap
);
2870 isl_union_map_free(umap
);
2872 if (isl_map_is_empty(map
)) {
2877 group
= isl_calloc_type(ctx
, struct cuda_array_ref_group
);
2879 group
->array
= array
;
2880 group
->access
= map
;
2881 group
->write
= access
->write
;
2882 group
->refs
= &array
->refs
[i
];
2884 groups
[n
++] = group
;
2890 static void free_array_ref_group(struct cuda_array_ref_group
*group
,
2895 free_bound_list(group
->shared_bound
, n_index
);
2896 free_bound_list(group
->private_bound
, n_index
);
2897 isl_map_free(group
->access
);
2902 /* If two groups have overlapping access relations and if one of them
2903 * involves a write, then merge the two groups into one.
2905 * We keep track of the grouping in "leader". leader[j] points to
2906 * an earlier group array element that belongs to the same group,
2907 * or the array element j itself if this element is the first in the group.
2909 * Return the number of group leaders.
2911 static int group_overlapping_writes(int n
,
2912 struct cuda_array_ref_group
**groups
, int *leader
)
2917 for (i
= 0; i
< n
; ++i
) {
2919 groups
[l
]->n_ref
= 1;
2920 for (j
= i
- 1; j
>= 0; --j
) {
2926 if (!groups
[l
]->write
&& !groups
[j
]->write
)
2929 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
2930 isl_map_copy(groups
[j
]->access
));
2931 empty
= isl_map_is_empty(map
);
2937 groups
[j
]->access
= isl_map_union(groups
[j
]->access
,
2939 groups
[j
]->write
= 1;
2940 groups
[l
]->access
= NULL
;
2941 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
2951 /* Compute the size of the shared array corresponding to the given array
2952 * array refrence group, based on the accesses from the current kernel,
2953 * as well as the offset of the shared piece in the original array.
2955 static void compute_group_shared_bound(struct cuda_gen
*gen
,
2956 struct cuda_array_info
*array
, struct cuda_array_ref_group
*group
)
2958 isl_ctx
*ctx
= isl_dim_get_ctx(array
->dim
);
2960 group
->shared_bound
= create_bound_list(ctx
, array
->n_index
);
2961 if (!can_tile_for_shared_memory(gen
, array
, group
->access
,
2962 group
->shared_bound
)) {
2963 free_bound_list(group
->shared_bound
, array
->n_index
);
2964 group
->shared_bound
= NULL
;
2968 /* Given an initial grouping of array references and shared memory tiles
2969 * for each group that allows for a shared memory tile, merge two groups
2970 * if both have a shared memory tile and if the merged group also has
2971 * a shared memory tile.
2973 * Return the number of group leaders after merging.
2975 static int group_common_shared_memory_tile(struct cuda_gen
*gen
,
2976 struct cuda_array_info
*array
, int n
,
2977 struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
2980 isl_ctx
*ctx
= isl_dim_get_ctx(array
->dim
);
2982 for (i
= 0; n_group
> 1 && i
< n
; ++i
) {
2986 if (!groups
[i
]->shared_bound
)
2988 for (j
= i
- 1; j
>= 0; --j
) {
2991 struct cuda_array_bound
*shared_bound
;
2995 if (!groups
[j
]->shared_bound
)
2998 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
2999 isl_map_copy(groups
[j
]->access
));
3000 empty
= isl_map_is_empty(map
);
3006 map
= isl_map_union(isl_map_copy(groups
[l
]->access
),
3007 isl_map_copy(groups
[j
]->access
));
3008 shared_bound
= create_bound_list(ctx
, array
->n_index
);
3009 if (!can_tile_for_shared_memory(gen
, array
, map
,
3012 free_bound_list(shared_bound
, array
->n_index
);
3016 free_bound_list(groups
[j
]->shared_bound
,
3018 groups
[j
]->shared_bound
= shared_bound
;
3019 isl_map_free(groups
[j
]->access
);
3020 groups
[j
]->access
= map
;
3021 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
3030 /* Extract an array of array reference groups from the array of references
3031 * and the grouping information in "leader".
3033 * Store the results in array->n_group and array->groups.
3035 static void extract_array_groups(isl_ctx
*ctx
, struct cuda_array_info
*array
,
3036 int n
, struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
3040 for (i
= 2; i
< n
; ++i
)
3041 leader
[i
] = leader
[leader
[i
]];
3043 array
->n_group
= n_group
;
3044 array
->groups
= isl_alloc_array(ctx
, struct cuda_array_ref_group
*,
3046 assert(array
->groups
);
3049 for (i
= 0; i
< n
; ++i
) {
3051 struct cuda_stmt_access
**refs
;
3053 if (leader
[i
] != i
) {
3054 groups
[i
]->refs
= NULL
;
3055 free_array_ref_group(groups
[i
], array
->n_index
);
3059 refs
= isl_alloc_array(ctx
, struct cuda_stmt_access
*,
3063 for (k
= i
; k
< n
; ++k
)
3064 if (leader
[k
] == i
) {
3065 refs
[l
++] = *groups
[k
]->refs
;
3066 (*groups
[k
]->refs
)->group
= j
;
3069 groups
[i
]->refs
= refs
;
3071 array
->groups
[j
++] = groups
[i
];
3075 /* Group array references that should be considered together when
3076 * deciding whether to access them from private, shared or global memory.
3078 * In particular, if two array references overlap and if one of them
3079 * is a write, then the two references are grouped together.
3080 * Furthermore, if two groups admit a shared memory tile and if the
3081 * combination of the two also admits a shared memory tile, we merge
3084 * During the construction the group->refs field points to a single
3085 * array reference inside the array of array references, while
3086 * group->n_ref contains the number of element in leader that
3087 * (directly or indirectly) point to this group, provided the group
3090 static void group_array_references(struct cuda_gen
*gen
,
3091 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
)
3095 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3096 struct cuda_array_ref_group
**groups
;
3099 groups
= isl_calloc_array(ctx
, struct cuda_array_ref_group
*,
3103 n
= populate_array_references(gen
, array
, sched
, groups
);
3105 leader
= isl_alloc_array(ctx
, int, n
);
3108 n_group
= group_overlapping_writes(n
, groups
, leader
);
3110 for (i
= 0; i
< n
; ++i
)
3112 compute_group_shared_bound(gen
, array
, groups
[i
]);
3114 n_group
= group_common_shared_memory_tile(gen
, array
, n
, groups
,
3117 extract_array_groups(ctx
, array
, n
, groups
, leader
, n_group
);
3123 /* Take tiled_sched, project it onto the shared tile loops and
3124 * the loops that will be wrapped over the threads,
3125 * parametrize the shared tile loops and store the result in gen->shared_sched.
3126 * The position of the first of these parameters is stored in gen->first_shared.
3127 * Also compute a projection that projects out the loops that will be
3128 * wrapped over the threads and store this projection in gen->shared_proj.
3130 static void compute_shared_sched(struct cuda_gen
*gen
)
3135 isl_union_map
*sched
;
3137 sched
= isl_union_map_copy(gen
->tiled_sched
);
3139 dim
= isl_union_map_get_dim(sched
);
3140 gen
->first_shared
= isl_dim_size(dim
, isl_dim_param
);
3141 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3142 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3144 dim
= isl_union_map_get_dim(sched
);
3145 par
= parametrization(dim
, gen
->shared_len
+ gen
->n_block
,
3146 0, gen
->shared_len
, "g");
3147 sched
= isl_union_map_intersect_range(sched
,
3148 isl_union_set_from_set(par
));
3150 dim
= isl_union_map_get_dim(sched
);
3151 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3153 gen
->shared_sched
= sched
;
3154 gen
->shared_proj
= isl_union_map_from_map(proj
);
3157 /* Group references of all arrays in the program.
3159 static void group_references(struct cuda_gen
*gen
)
3162 isl_union_map
*sched
;
3164 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3165 isl_union_map_copy(gen
->shared_proj
));
3167 for (i
= 0; i
< gen
->n_array
; ++i
)
3168 group_array_references(gen
, &gen
->array
[i
], sched
);
3170 isl_union_map_free(sched
);
3173 /* Free all array information that is local to the current kernel.
3175 static void free_local_array_info(struct cuda_gen
*gen
)
3179 for (i
= 0; i
< gen
->n_array
; ++i
) {
3180 struct cuda_array_info
*array
= &gen
->array
[i
];
3182 for (j
= 0; j
< array
->n_group
; ++j
)
3183 free_array_ref_group(array
->groups
[j
], array
->n_index
);
3184 free(array
->groups
);
3186 if (array
->n_group
== 0)
3188 for (j
= 0; j
< gen
->array
[i
].n_index
; ++j
) {
3189 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
3190 gen
->array
[i
].local_bound
[j
] = NULL
;
3195 static void print_iterator_list(FILE *out
, int len
, const char *prefix
,
3201 for (i
= 0; i
< len
; ++i
) {
3205 fprintf(out
, "(%s%d)", prefix
, i
);
3207 fprintf(out
, "%s%d", prefix
, i
);
3212 /* Print an access to the element in the global memory copy of the
3213 * given array that corresponds to element [a0][a1]... of the original array.
3214 * The copy in global memory has been linearized, so we need to take
3215 * the array size into account.
3217 static void print_global_index(isl_ctx
*ctx
, FILE *out
,
3218 struct cuda_array_info
*array
)
3223 fprintf(out
, "%s[", array
->name
);
3224 for (i
= 0; i
+ 1 < array
->n_index
; ++i
)
3226 for (i
= 0; i
< array
->n_index
; ++i
) {
3228 prn
= isl_printer_to_file(ctx
, out
);
3229 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3230 prn
= isl_printer_print_str(prn
, ") * (");
3231 prn
= isl_printer_print_pw_aff(prn
,
3232 array
->local_bound
[i
]);
3233 prn
= isl_printer_print_str(prn
, ") + ");
3234 isl_printer_free(prn
);
3236 fprintf(out
, "a%d", i
);
3241 /* Print an access to the element in the shared memory copy of the
3242 * given array that corresponds to element [a0][a1]... of the original array.
3243 * Since the array in shared memory is just a shifted copy of part
3244 * of the original array, we simply need to subtract the lower bound,
3245 * which was computed in can_tile_for_shared_memory.
3246 * If any of the indices is strided, then we first add
3247 * shared_bound[i].shift and divide by shared_bound[i].stride.
3249 static void print_local_index(FILE *out
, struct cuda_array_ref_group
*group
)
3254 struct cuda_array_bound
*bounds
= group
->shared_bound
;
3256 ctx
= isl_dim_get_ctx(group
->array
->dim
);
3257 print_array_name(out
, group
);
3258 for (i
= 0; i
< group
->array
->n_index
; ++i
) {
3259 fprintf(out
, "[(a%d", i
);
3260 if (bounds
[i
].shift
) {
3261 fprintf(out
, " + (");
3262 prn
= isl_printer_to_file(ctx
, out
);
3263 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3264 prn
= isl_printer_print_qpolynomial(prn
,
3266 prn
= isl_printer_print_str(prn
, "))/");
3267 prn
= isl_printer_print_isl_int(prn
,
3269 isl_printer_free(prn
);
3272 fprintf(out
, " - (");
3273 prn
= isl_printer_to_file(ctx
, out
);
3274 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3275 prn
= isl_printer_print_aff(prn
, bounds
[i
].lb
);
3276 isl_printer_free(prn
);
3281 /* Print '#define's for copying data from global memory to shared
3282 * memory and back for the given array.
3284 static void print_array_copy_defines(struct cuda_gen
*gen
,
3285 struct cuda_array_ref_group
*group
)
3288 const char *type
[] = { "read", "write" };
3289 struct cuda_array_info
*array
= group
->array
;
3290 int n_index
= array
->n_index
;
3292 for (i
= 0; i
< 2; ++i
) {
3293 fprintf(gen
->cuda
.kernel_c
, "#define %s_", type
[i
]);
3294 print_array_name(gen
->cuda
.kernel_c
, group
);
3295 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 0);
3296 fprintf(gen
->cuda
.kernel_c
, " %s_", type
[i
]);
3297 print_array_name(gen
->cuda
.kernel_c
, group
);
3298 fprintf(gen
->cuda
.kernel_c
, "_");
3299 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 1);
3300 fprintf(gen
->cuda
.kernel_c
, "\n");
3302 fprintf(gen
->cuda
.kernel_c
, "#define %s_", type
[i
]);
3303 print_array_name(gen
->cuda
.kernel_c
, group
);
3304 fprintf(gen
->cuda
.kernel_c
, "_");
3305 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 0);
3307 fprintf(gen
->cuda
.kernel_c
, " ");
3308 print_global_index(gen
->ctx
, gen
->cuda
.kernel_c
, array
);
3309 fprintf(gen
->cuda
.kernel_c
, " = ");
3310 print_local_index(gen
->cuda
.kernel_c
, group
);
3312 fprintf(gen
->cuda
.kernel_c
, " ");
3313 print_local_index(gen
->cuda
.kernel_c
, group
);
3314 fprintf(gen
->cuda
.kernel_c
, " = ");
3315 print_global_index(gen
->ctx
, gen
->cuda
.kernel_c
, array
);
3317 fprintf(gen
->cuda
.kernel_c
, "\n");
3321 static void print_copy_defines(struct cuda_gen
*gen
)
3325 for (i
= 0; i
< gen
->n_array
; ++i
) {
3326 struct cuda_array_info
*array
= &gen
->array
[i
];
3328 for (j
= 0; j
< array
->n_group
; ++j
) {
3329 if (array
->groups
[j
]->private_bound
)
3331 if (!array
->groups
[j
]->shared_bound
)
3333 print_array_copy_defines(gen
, array
->groups
[j
]);
3338 /* The sizes of the arrays on the host that have been computed by
3339 * extract_array_info may depend on the parameters. Use the extra
3340 * constraints on the parameters that are valid at "host_domain"
3341 * to simplify these expressions.
3343 static void localize_bounds(struct cuda_gen
*gen
,
3344 __isl_keep isl_set
*host_domain
)
3350 context
= isl_set_copy(host_domain
);
3351 nvar
= isl_set_dim(host_domain
, isl_dim_set
);
3352 context
= isl_set_project_out(host_domain
, isl_dim_set
, 0, nvar
);
3354 for (i
= 0; i
< gen
->n_array
; ++i
) {
3355 struct cuda_array_info
*array
= &gen
->array
[i
];
3357 if (array
->n_group
== 0)
3360 for (j
= 0; j
< array
->n_index
; ++j
) {
3363 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3364 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3365 array
->local_bound
[j
] = pwaff
;
3368 isl_set_free(context
);
3371 /* Set gen->tile_len and gen->n_parallel to those of the first statement
3372 * in the statement list u.
3373 * Because of the way the schedule is constructed, the other statements
3374 * in the list, if any, should have the same values for these properties.
3376 static void set_tile_len(struct cuda_gen
*gen
, struct clast_user_stmt
*u
)
3379 struct cuda_stmt
*stmt
;
3381 nr
= atoi(u
->statement
->name
+ 2);
3382 stmt
= &gen
->stmts
[nr
];
3384 gen
->tile_len
= stmt
->tile_len
;
3385 gen
->n_parallel
= stmt
->n_parallel
;
3388 /* This function is called for each leaf in the clast of the host code.
3389 * We first specialize the schedule to the site of the leaf, compute
3390 * the size of shared memory and then print the body of host code
3391 * and the associated kernel (through a call to print_kernel_body).
3393 static void print_host_user(struct gpucode_info
*code
,
3394 struct clast_user_stmt
*u
)
3396 struct cuda_gen
*gen
= code
->user
;
3399 isl_set
*host_domain
;
3400 isl_union_map
*access
;
3401 isl_union_map
*local_sched
;
3402 isl_union_set
*arrays
;
3404 set_tile_len(gen
, u
);
3407 host_domain
= extract_entire_host_domain(u
);
3409 local_sched
= isl_union_map_intersect_range(
3410 isl_union_map_copy(gen
->sched
),
3411 isl_union_set_from_set(extend(isl_set_copy(host_domain
),
3412 gen
->untiled_len
)));
3413 access
= isl_union_map_union(isl_union_map_copy(gen
->read
),
3414 isl_union_map_copy(gen
->write
));
3415 access
= isl_union_map_apply_domain(access
,
3416 isl_union_map_copy(local_sched
));
3417 arrays
= isl_union_map_range(access
);
3419 print_indent(code
->dst
, code
->indent
);
3420 fprintf(code
->dst
, "dim3 k%d_dimBlock(", gen
->kernel_id
);
3421 print_reverse_list(code
->dst
, gen
->n_block
, gen
->block_dim
);
3422 fprintf(code
->dst
, ");\n");
3424 print_indent(code
->dst
, code
->indent
);
3425 fprintf(code
->dst
, "dim3 k%d_dimGrid(", gen
->kernel_id
);
3426 print_reverse_list(code
->dst
, gen
->n_grid
, gen
->grid_dim
);
3427 fprintf(code
->dst
, ");\n");
3429 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3430 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3431 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3433 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3435 dim
= isl_union_map_get_dim(gen
->local_sched
);
3436 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->shared_len
, "g");
3437 gen
->local_sched
= isl_union_map_intersect_range(gen
->local_sched
,
3438 isl_union_set_from_set(par
));
3440 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3441 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3443 gen
->private_access
= NULL
;
3444 compute_shared_sched(gen
);
3445 gen
->privatization
= compute_privatization(gen
);
3446 group_references(gen
);
3447 compute_private_size(gen
);
3448 localize_bounds(gen
, host_domain
);
3450 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3452 print_copy_defines(gen
);
3453 print_kernel_launch(gen
, arrays
);
3455 fprintf(gen
->cuda
.kernel_c
, "{\n");
3457 print_kernel_body(gen
, host_domain
, gen
->tiled_sched
);
3459 fprintf(gen
->cuda
.kernel_c
, "}\n");
3461 free_local_array_info(gen
);
3462 isl_map_free(gen
->privatization
);
3463 isl_union_map_free(gen
->private_access
);
3464 isl_union_map_free(gen
->local_sched
);
3465 isl_union_map_free(gen
->tiled_sched
);
3466 isl_union_map_free(gen
->shared_sched
);
3467 isl_union_map_free(gen
->shared_proj
);
3468 isl_union_set_free(arrays
);
3469 isl_set_free(host_domain
);
3471 free(gen
->tile_size
);
3475 /* Use CLooG to generate code for the outer gen->tile_first loops
3476 * of the global schedule in gen->sched.
3477 * The pretty printing of this code is handled by gpu_print_host_stmt,
3478 * which calls print_host_user for each kernel invocation location.
3480 static void print_cloog_host_code(struct cuda_gen
*gen
)
3484 isl_union_map
*sched
;
3485 CloogOptions
*options
;
3486 CloogDomain
*cloog_context
;
3487 CloogUnionDomain
*ud
;
3489 struct clast_stmt
*stmt
;
3492 options
= cloog_options_malloc(gen
->state
);
3493 options
->language
= LANGUAGE_C
;
3495 options
->strides
= 1;
3496 options
->stop
= gen
->tile_first
;
3497 options
->f
= gen
->untiled_len
;
3498 options
->l
= gen
->untiled_len
;
3499 options
->save_domains
= 1;
3500 options
->noscalars
= 1;
3502 sched
= isl_union_map_copy(gen
->sched
);
3503 ud
= cloog_union_domain_from_isl_union_map(sched
);
3504 for (i
= 0; i
< options
->stop
; ++i
) {
3505 snprintf(name
, sizeof(name
), "h%d", i
);
3506 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
3508 context
= isl_set_copy(gen
->context
);
3509 cloog_context
= cloog_domain_from_isl_set(context
);
3510 input
= cloog_input_alloc(cloog_context
, ud
);
3512 stmt
= cloog_clast_create_from_input(input
, options
);
3514 gen
->code
.indent
= 0;
3515 gen
->code
.dst
= gen
->cuda
.host_c
;
3516 gen
->code
.print_user_stmt
= NULL
;
3517 gen
->code
.print_user_stmt_list
= &print_host_user
;
3518 gen
->code
.print_for_head
= NULL
;
3519 gen
->code
.print_for_foot
= NULL
;
3520 gen
->code
.user
= gen
;
3521 gpu_print_host_stmt(&gen
->code
, stmt
);
3523 cloog_clast_free(stmt
);
3524 cloog_options_free(options
);
3527 void print_host_code(struct cuda_gen
*gen
)
3529 fprintf(gen
->cuda
.host_c
, "{\n");
3530 print_cloog_macros(gen
->cuda
.host_c
);
3531 print_cloog_macros(gen
->cuda
.kernel_c
);
3533 declare_device_arrays(gen
);
3535 allocate_device_arrays(gen
);
3536 copy_arrays_to_device(gen
);
3539 print_cloog_host_code(gen
);
3541 copy_arrays_from_device(gen
);
3542 free_device_arrays(gen
);
3544 fprintf(gen
->cuda
.host_c
, "}\n");
3547 __isl_give isl_set
*add_context_from_str(__isl_take isl_set
*set
,
3556 ctx
= isl_set_get_ctx(set
);
3557 context
= isl_set_read_from_str(ctx
, str
, -1);
3558 context
= isl_set_align_params(context
, isl_set_get_dim(set
));
3559 set
= isl_set_intersect(set
, context
);
3564 /* Convert scop->context to an isl_set.
3566 static __isl_give isl_set
*extract_context(isl_ctx
*ctx
, scoplib_scop_p scop
)
3570 dim
= isl_dim_set_alloc(ctx
, scop
->nb_parameters
, 0);
3571 dim
= set_dim_names(dim
, isl_dim_param
, scop
->parameters
);
3572 return scoplib_matrix_to_isl_set(scop
->context
, dim
);
3575 /* Return an array of cuda_stmt representing the statements in "scop".
3577 static struct cuda_stmt
*extract_stmts(isl_ctx
*ctx
, scoplib_scop_p scop
,
3578 __isl_keep isl_set
*context
)
3581 struct cuda_stmt
*stmts
;
3582 scoplib_statement_p stmt
= scop
->statement
;
3584 n
= scoplib_statement_number(scop
->statement
);
3585 stmts
= isl_calloc_array(ctx
, struct cuda_stmt
, n
);
3588 for (stmt
= scop
->statement
, n
= 0; stmt
; stmt
= stmt
->next
, n
++) {
3591 struct cuda_stmt
*s
= &stmts
[n
];
3593 snprintf(name
, sizeof(name
), "S_%d", n
);
3595 dim
= isl_dim_set_alloc(ctx
, scop
->nb_parameters
,
3596 stmt
->nb_iterators
);
3597 dim
= set_dim_names(dim
, isl_dim_param
, scop
->parameters
);
3598 dim
= set_dim_names(dim
, isl_dim_set
, stmt
->iterators
);
3599 dim
= isl_dim_set_tuple_name(dim
, isl_dim_set
, name
);
3600 dim
= set_dim_names(dim
, isl_dim_set
, stmt
->iterators
);
3601 s
->domain
= scoplib_matrix_list_to_isl_set(stmt
->domain
,
3603 s
->domain
= isl_set_intersect(s
->domain
, isl_set_copy(context
));
3604 s
->text
= strdup(stmt
->body
);
3605 stmt_extract_accesses(s
);
3611 /* Extract all the read and write accesses from "scop" and store
3612 * them in gen->read and gen->write.
3614 static void extract_accesses(struct cuda_gen
*gen
, scoplib_scop_p scop
)
3617 int n
= scoplib_statement_number(scop
->statement
);
3619 scoplib_statement_p stmt
;
3621 dim
= isl_set_get_dim(gen
->context
);
3622 gen
->write
= isl_union_map_empty(isl_dim_copy(dim
));
3623 gen
->read
= isl_union_map_empty(dim
);
3625 for (i
= 0, stmt
= scop
->statement
; i
< n
; ++i
, stmt
= stmt
->next
) {
3626 isl_union_map
*read_i
;
3627 isl_union_map
*write_i
;
3629 read_i
= scoplib_access_to_isl_union_map(stmt
->read
,
3630 isl_set_copy(gen
->stmts
[i
].domain
),
3632 write_i
= scoplib_access_to_isl_union_map(stmt
->write
,
3633 isl_set_copy(gen
->stmts
[i
].domain
),
3636 gen
->read
= isl_union_map_union(gen
->read
, read_i
);
3637 gen
->write
= isl_union_map_union(gen
->write
, write_i
);
3641 /* Extract and return the original schedule of the program from "scop".
3643 static isl_union_map
*extract_original_schedule(struct cuda_gen
*gen
,
3644 scoplib_scop_p scop
)
3647 int n
= scoplib_statement_number(scop
->statement
);
3649 isl_union_map
*sched
;
3650 scoplib_statement_p stmt
;
3652 dim
= isl_set_get_dim(gen
->context
);
3653 sched
= isl_union_map_empty(dim
);
3655 for (i
= 0, stmt
= scop
->statement
; i
< n
; ++i
, stmt
= stmt
->next
) {
3658 dim
= isl_set_get_dim(gen
->stmts
[i
].domain
);
3659 dim
= isl_dim_from_domain(dim
);
3660 dim
= isl_dim_add(dim
, isl_dim_out
, 2 * stmt
->nb_iterators
+ 1);
3661 sched_i
= scoplib_schedule_to_isl_map(stmt
->schedule
, dim
);
3663 sched
= isl_union_map_union(sched
,
3664 isl_union_map_from_map(sched_i
));
3670 /* Return the union of all iteration domains of the gen->stmts[i].
3672 static __isl_give isl_union_set
*extract_domain(struct cuda_gen
*gen
)
3675 isl_union_set
*domain
;
3677 domain
= isl_union_set_empty(isl_set_get_dim(gen
->context
));
3678 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
3681 domain_i
= isl_set_copy(gen
->stmts
[i
].domain
);
3682 domain
= isl_union_set_union(domain
,
3683 isl_union_set_from_set(domain_i
));
3689 /* Information about the outermost tilable bands in the forest of bands.
3691 * tile_len and n_parallel are only sets on band_info structures
3692 * that correspond to outermost bands. For other bands (in particular,
3693 * ancestors of the outermost bands), n_parallal is set to 0.
3695 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3697 * tile_first is the number of schedule dimensions in prefix.
3699 * suffix is the schedule of the outermost tilable bands and their descendants.
3702 struct cuda_gen
*gen
;
3706 isl_union_map
*prefix
;
3707 isl_union_map
*suffix
;
3710 /* Set tile_len and n_parallel of the statement to that of
3711 * their outermost band, recorded in the band_info.
3713 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
3715 struct band_info
*info
= user
;
3717 struct cuda_stmt
*stmt
;
3719 nr
= atoi(isl_map_get_tuple_name(map
, isl_dim_in
) + 2);
3720 stmt
= &info
->gen
->stmts
[nr
];
3722 stmt
->tile_len
= info
->tile_len
;
3723 stmt
->n_parallel
= info
->n_parallel
;
3730 static void list_select_outer_band(struct cuda_gen
*gen
,
3731 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
3733 /* Check if this band has any parallel loops. If so, take it as
3734 * the outermost tilable band. If not, continue looking for the
3735 * outermost tilable band in the children of the current band.
3737 static void band_select_outer_band(struct cuda_gen
*gen
,
3738 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
3740 int n
= isl_band_n_member(band
);
3743 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
3744 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
3747 info
->n_parallel
= n_parallel
;
3750 info
->tile_first
= pos
;
3752 info
->prefix
= isl_band_get_prefix_schedule(band
);
3753 info
->suffix
= isl_union_map_flat_range_product(
3754 isl_band_get_partial_schedule(band
),
3755 isl_band_get_suffix_schedule(band
));
3756 isl_union_map_foreach_map(info
->prefix
,
3757 &set_stmt_tile_len
, info
);
3759 isl_band_list
*children
;
3760 assert(isl_band_has_children(band
));
3761 children
= isl_band_get_children(band
);
3762 list_select_outer_band(gen
, children
, pos
+ n
, info
);
3765 isl_band_free(band
);
3768 /* Comparison function that returns a non-zero value for band_infos
3769 * with different tile_len fields or different n_parallel fields.
3771 static int cmp_band(const void *p1
, const void *p2
)
3773 const struct band_info
*info1
= p1
;
3774 const struct band_info
*info2
= p2
;
3776 if (info1
->tile_len
!= info2
->tile_len
)
3777 return info1
->tile_len
- info2
->tile_len
;
3779 return info1
->n_parallel
- info2
->n_parallel
;
3782 /* Extend "umap" with coordinates with fixed value "val"
3783 * to a total length of "dst_len", assuming the original dimension is "src_len".
3785 static __isl_give isl_union_map
*extend_range(__isl_take isl_union_map
*umap
,
3786 int src_len
, int dst_len
, int val
)
3792 dim
= isl_union_map_get_dim(umap
);
3793 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
3794 for (i
= src_len
; i
< dst_len
; ++i
)
3795 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
3797 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
3802 /* Group bands with the same values for tile_len and n_parallel.
3803 * The prefix schedule is then extended with a fixed coordinate that
3804 * is different for each such group.
3805 * Note that the actual values for this coordinate are not important.
3806 * The bands have already been effectively separated at a higher level
3807 * or they are independent and may be executed in parallel.
3808 * The list of band_info has been sorted before this functions is called.
3810 static void separate_bands(struct band_info
*info
, int n
)
3815 for (i
= 0; i
< n
; ++i
) {
3816 int l
= info
[i
].tile_first
;
3819 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
3820 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
3823 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3825 info
[i
].tile_first
= l
+ 1;
3829 /* Select the outermost bands in the elements of the list, align
3830 * their prefix schedules, separate bands with different values
3831 * for tile_len and/or n_parallel and then combine the resulting
3832 * prefix and suffix schedules into a single pair of prefix and
3833 * suffix schedules for the entire list.
3835 static void list_select_outer_band(struct cuda_gen
*gen
,
3836 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
3840 int n
= isl_band_list_n_band(list
);
3841 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
3842 struct band_info
*info
;
3844 isl_union_map
*prefix
;
3845 isl_union_map
*suffix
;
3848 info
= isl_calloc_array(ctx
, struct band_info
, n
);
3852 for (i
= 0; i
< n
; ++i
) {
3853 band
= isl_band_list_get_band(list
, i
);
3854 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
3855 if (info
[i
].tile_first
> max_tile_first
)
3856 max_tile_first
= info
[i
].tile_first
;
3859 for (i
= 0; i
< n
; ++i
) {
3860 if (info
[i
].tile_first
== max_tile_first
)
3862 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3863 info
[i
].tile_first
, max_tile_first
, 0);
3866 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
3868 for (i
= 0; i
< n
- 1; ++i
)
3869 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
3870 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
3874 separate_bands(info
, n
);
3876 prefix
= info
[0].prefix
;
3877 suffix
= info
[0].suffix
;
3879 for (i
= 1; i
< n
; ++i
) {
3880 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
3881 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
3884 list_info
->tile_first
= info
[0].tile_first
;
3885 list_info
->tile_len
= -1;
3886 list_info
->prefix
= prefix
;
3887 list_info
->suffix
= suffix
;
3889 isl_band_list_free(list
);
3893 /* Set max_out to the maximal number of output dimensions over
3896 static int update_max_out(__isl_take isl_map
*map
, void *user
)
3898 int *max_out
= user
;
3899 int n_out
= isl_map_dim(map
, isl_dim_out
);
3901 if (n_out
> *max_out
)
3908 struct align_range_data
{
3913 /* Extend the dimension of the range of the given map to data->max_out and
3914 * then add the result to data->res.
3916 static int map_align_range(__isl_take isl_map
*map
, void *user
)
3918 struct align_range_data
*data
= user
;
3922 int n_out
= isl_map_dim(map
, isl_dim_out
);
3924 dim
= isl_union_map_get_dim(data
->res
);
3925 proj
= isl_map_reverse(projection(dim
, data
->max_out
, n_out
));
3926 for (i
= n_out
; i
< data
->max_out
; ++i
)
3927 proj
= isl_map_fix_si(proj
, isl_dim_out
, i
, 0);
3929 map
= isl_map_apply_range(map
, proj
);
3931 data
->res
= isl_union_map_add_map(data
->res
, map
);
3936 /* Extend the ranges of the maps in the union map such they all have
3937 * the same dimension.
3939 static __isl_give isl_union_map
*align_range(__isl_take isl_union_map
*umap
)
3941 struct align_range_data data
;
3944 isl_union_map_foreach_map(umap
, &update_max_out
, &data
.max_out
);
3946 data
.res
= isl_union_map_empty(isl_union_map_get_dim(umap
));
3947 isl_union_map_foreach_map(umap
, &map_align_range
, &data
);
3949 isl_union_map_free(umap
);
3953 /* Select the outermost tilable band that (by construction)
3954 * has at least one parallel loop.
3955 * The starting position of the aligned band is stored in the pair
3957 * The sizes and number of parallel loops may be different in different
3958 * parts of the band forest and are therefore stored in the cuda_stmts.
3960 * Return the complete schedule, with the tilable bands aligned
3961 * at gen->tile_first and padded with zero, if needed.
3963 static __isl_give isl_union_map
*select_outer_tilable_band(struct cuda_gen
*gen
,
3964 __isl_keep isl_schedule
*schedule
)
3966 isl_band_list
*list
;
3967 struct band_info info
;
3969 gen
->n_parallel
= 0;
3972 list
= isl_schedule_get_band_forest(schedule
);
3974 list_select_outer_band(gen
, list
, 0, &info
);
3976 gen
->tile_first
= info
.tile_first
;
3977 info
.suffix
= align_range(info
.suffix
);
3979 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
3982 /* Set gen->untiled_len to the number of scheduling dimensions
3983 * for the schedule of the first domain.
3984 * We assume here that this number is the same for all domains.
3986 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
3988 unsigned *untiled_len
= user
;
3990 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
3996 /* Compute an appropriate schedule based on the accesses in
3997 * gen->read and gen->write.
3999 * We first compute dependences and then use those to compute
4000 * a schedule that has a parallel loop in each tilable band.
4001 * Finally, we select the outermost tilable band.
4003 static void compute_schedule(struct cuda_gen
*gen
,
4004 __isl_take isl_union_map
*sched
)
4006 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
4007 isl_union_set
*domain
;
4008 isl_union_map
*empty
;
4009 isl_union_map
*dep_raw
, *dep2
, *dep3
, *dep
;
4010 isl_union_map
*uninitialized
;
4011 isl_schedule
*schedule
;
4012 struct isl_options
*options
;
4014 empty
= isl_union_map_empty(isl_union_map_get_dim(sched
));
4016 isl_union_map_compute_flow(isl_union_map_copy(gen
->read
),
4017 isl_union_map_copy(gen
->write
), empty
,
4018 isl_union_map_copy(sched
),
4019 &dep_raw
, NULL
, &uninitialized
, NULL
);
4020 isl_union_map_compute_flow(isl_union_map_copy(gen
->write
),
4021 isl_union_map_copy(gen
->write
),
4022 isl_union_map_copy(gen
->read
),
4023 isl_union_map_copy(sched
),
4024 &dep2
, &dep3
, NULL
, NULL
);
4025 isl_union_map_free(sched
);
4027 gen
->copy_in
= isl_union_map_range(uninitialized
);
4029 dep
= isl_union_map_union(dep2
, dep3
);
4030 dep
= isl_union_map_union(dep
, dep_raw
);
4031 dep
= isl_union_map_coalesce(dep
);
4033 domain
= extract_domain(gen
);
4034 options
= isl_ctx_peek_options(ctx
, isl_options_arg
);
4035 options
->schedule_outer_zero_distance
= 1;
4036 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4037 isl_union_map_copy(dep
), dep
);
4039 sched
= select_outer_tilable_band(gen
, schedule
);
4041 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4042 sched
= isl_union_map_intersect_domain(sched
, domain
);
4045 isl_schedule_free(schedule
);
4048 /* Replace the scop in the "input" file by equivalent code
4049 * that uses the GPU. "scop" is assumed to correspond to this scop.
4051 * We first compute a schedule that respects the dependences
4052 * of the original program and select the outermost band
4053 * of tilable dimensions that has at least one parallel loop.
4054 * We then have three blocks of dimensions
4058 * The tilable band "B" is first tiled according to "tile.sizes", resulting
4063 * For each iteration of the T loop and for each array, we compute
4064 * the array elements accessed by that iteration, construct a rectangular
4065 * box around it and shift it to the origin. The result is used
4066 * as shared memory for the array.
4068 * We then split off at most 2 parallel loops from the T loops and
4069 * at most 3 parallel loops from the P loops
4073 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4074 * according to "grid.sizes"/"block.sizes".
4076 * H T1T T1P T2 P1T P1P P2 G
4078 * Finally, the T1P and P1P iterators are equated to the block and
4079 * thread dimensions respectively and so are effectively removed.
4080 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4081 * are run on the GPU.
4083 * Code is generated in three stages. We first generate code for the
4084 * host (the H loops), with iterators h%d. Then, for each leaf node
4085 * of the resulting AST, we generate code for the shared loops (up to
4086 * and including T2), with iterators g%d and after equating the H loops
4087 * to h%d parameters and the T1P loops to the block dimensions.
4088 * Finally, we generate code for the remaining loops in a similar fashion.
4090 * The function frees "scop" and "ctx".
4092 int cuda_scop(isl_ctx
*ctx
, scoplib_scop_p scop
, struct ppcg_options
*options
,
4095 isl_union_map
*sched
;
4096 struct cuda_gen gen
;
4099 gen
.context
= extract_context(gen
.ctx
, scop
);
4100 gen
.context
= add_context_from_str(gen
.context
, options
->ctx
);
4101 gen
.n_stmts
= scoplib_statement_number(scop
->statement
);
4102 gen
.stmts
= extract_stmts(gen
.ctx
, scop
, gen
.context
);
4103 extract_accesses(&gen
, scop
);
4104 gen
.options
= options
;
4105 gen
.state
= cloog_isl_state_malloc(gen
.ctx
);
4107 cuda_open_files(&gen
.cuda
, input
);
4109 collect_array_info(&gen
);
4111 sched
= extract_original_schedule(&gen
, scop
);
4112 compute_schedule(&gen
, sched
);
4114 print_host_code(&gen
);
4116 cloog_state_free(gen
.state
);
4117 clear_cuda_gen(&gen
);
4118 isl_ctx_free(gen
.ctx
);
4119 scoplib_scop_free(scop
);
4121 cuda_close_files(&gen
.cuda
);