2 * Copyright 2010-2011 INRIA Saclay
4 * Use of this software is governed by the GNU LGPLv2.1 license
6 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
7 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
14 #include <isl/polynomial.h>
15 #include <isl/union_set.h>
20 #include <isl/schedule.h>
21 #include <isl/options.h>
22 #include <cloog/isl/cloog.h>
25 #include "cuda_common.h"
28 #include "ppcg_options.h"
30 /* The fields stride, shift and shift_map only contain valid information
32 * If so, they express that current index is such that if you add shift,
33 * then the result is always a multiple of stride.
34 * shift_map contains the mapping
36 * i -> (i + shift)/stride
38 struct cuda_array_bound
{
43 isl_qpolynomial
*shift
;
44 isl_basic_map
*shift_map
;
47 struct cuda_array_info
;
49 /* A group of array references in a kernel that should be handled together.
50 * If private_bound is not NULL, then it is mapped to registers.
51 * Otherwise, if shared_bound is not NULL, it is mapped to shared memory.
52 * Otherwise, it is accesses from global memory.
54 struct cuda_array_ref_group
{
55 /* The references in this group access this array. */
56 struct cuda_array_info
*array
;
57 /* Position of this group in the list of reference groups of array. */
60 /* The following fields are use during the construction of the groups.
61 * access is the combined access relation relative to the shared
63 * write is set if any access in the group is a write.
68 /* For each index, size and offset of piece in shared memory. */
69 struct cuda_array_bound
*shared_bound
;
71 /* For each index, size and offset of piece in private memory. */
72 struct cuda_array_bound
*private_bound
;
74 /* References in this group; point to elements of a linked list. */
76 struct cuda_stmt_access
**refs
;
79 struct cuda_array_info
{
83 /* Name of the array. */
85 /* Number of indices. */
87 /* For each index, a bound on the array in that direction. */
89 /* For each index, bound[i] specialized to the current kernel. */
90 isl_pw_aff
**local_bound
;
92 /* All references to this array; point to elements of a linked list. */
94 struct cuda_stmt_access
**refs
;
96 /* The reference groups associated to this array. */
98 struct cuda_array_ref_group
**groups
;
100 /* Last shared memory tile dimension that affects tile of this array. */
102 /* Dimension at which copying to/from shared memory is printed.
103 * if >= 0, then the value is >= last_shared
104 * if -1, then the copying is done at the leaf level.
106 int print_shared_level
;
109 /* Print the name of the local copy of a given group of array references.
111 static void print_array_name(FILE *out
, struct cuda_array_ref_group
*group
)
115 if (group
->private_bound
)
116 fprintf(out
, "private_");
117 else if (group
->shared_bound
)
118 fprintf(out
, "shared_");
121 fprintf(out
, "%s", group
->array
->name
);
122 if (!global
&& group
->array
->n_group
> 1)
123 fprintf(out
, "_%d", group
->nr
);
126 /* Collect all references to the given array and store pointers to them
129 static void collect_references(struct cuda_gen
*gen
,
130 struct cuda_array_info
*array
)
136 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
137 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
138 struct cuda_stmt_access
*access
;
140 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
142 name
= isl_map_get_tuple_name(access
->access
,
144 if (name
&& !strcmp(array
->name
, name
))
150 array
->refs
= isl_alloc_array(gen
->ctx
, struct cuda_stmt_access
*, n
);
154 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
155 struct cuda_stmt
*stmt
= &gen
->stmts
[i
];
156 struct cuda_stmt_access
*access
;
158 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
160 name
= isl_map_get_tuple_name(access
->access
,
162 if (!name
|| strcmp(array
->name
, name
))
165 array
->refs
[n
++] = access
;
170 static struct cuda_array_bound
*create_bound_list(isl_ctx
*ctx
, int n_index
)
173 struct cuda_array_bound
*bound
;
175 bound
= isl_alloc_array(ctx
, struct cuda_array_bound
, n_index
);
178 for (i
= 0; i
< n_index
; ++i
) {
179 isl_int_init(bound
[i
].size
);
181 isl_int_init(bound
[i
].stride
);
182 bound
[i
].shift
= NULL
;
183 bound
[i
].shift_map
= NULL
;
189 static void free_bound_list(struct cuda_array_bound
*bound
, int n_index
)
196 for (j
= 0; j
< n_index
; ++j
) {
197 isl_int_clear(bound
[j
].size
);
198 isl_int_clear(bound
[j
].stride
);
199 isl_aff_free(bound
[j
].lb
);
200 isl_qpolynomial_free(bound
[j
].shift
);
201 isl_basic_map_free(bound
[j
].shift_map
);
206 static struct pet_array
*find_array(struct pet_scop
*scop
,
207 __isl_keep isl_set
*accessed
)
212 id
= isl_set_get_tuple_id(accessed
);
214 for (i
= 0; i
< scop
->n_array
; ++i
) {
217 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
224 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
227 /* Compute bounds on the host arrays based on the accessed elements
228 * and collect all references to the array.
230 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
233 struct cuda_gen
*gen
= (struct cuda_gen
*)user
;
237 isl_pw_aff
**local_bounds
;
238 struct pet_array
*pa
;
240 n_index
= isl_set_dim(array
, isl_dim_set
);
241 name
= isl_set_get_tuple_name(array
);
242 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
243 isl_pw_aff
*, n_index
);
245 local_bounds
= isl_calloc_array(isl_set_get_ctx(array
),
246 isl_pw_aff
*, n_index
);
247 assert(local_bounds
);
248 gen
->array
[gen
->n_array
].dim
= isl_set_get_space(array
);
249 gen
->array
[gen
->n_array
].name
= strdup(name
);
250 gen
->array
[gen
->n_array
].n_index
= n_index
;
251 gen
->array
[gen
->n_array
].bound
= bounds
;
252 gen
->array
[gen
->n_array
].local_bound
= local_bounds
;
254 pa
= find_array(gen
->scop
, array
);
257 gen
->array
[gen
->n_array
].type
= strdup(pa
->element_type
);
259 for (i
= 0; i
< n_index
; ++i
) {
264 isl_set
*size
= i
== 0 ? array
: pa
->extent
;
266 bound
= isl_set_dim_max(isl_set_copy(size
), i
);
268 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
269 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
270 one
= isl_aff_zero(ls
);
271 one
= isl_aff_add_constant_si(one
, 1);
272 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
273 bound
= isl_pw_aff_gist(bound
, isl_set_copy(gen
->context
));
278 collect_references(gen
, &gen
->array
[gen
->n_array
]);
286 void collect_array_info(struct cuda_gen
*gen
)
288 isl_union_set
*arrays
;
290 arrays
= isl_union_map_range(isl_union_map_copy(gen
->read
));
291 arrays
= isl_union_set_union(arrays
,
292 isl_union_map_range(isl_union_map_copy(gen
->write
)));
293 arrays
= isl_union_set_coalesce(arrays
);
295 gen
->n_array
= isl_union_set_n_set(arrays
);
296 gen
->array
= isl_alloc_array(gen
->ctx
,
297 struct cuda_array_info
, gen
->n_array
);
300 isl_union_set_foreach_set(arrays
, &extract_array_info
, gen
);
301 isl_union_set_free(arrays
);
304 static void free_array_info(struct cuda_gen
*gen
)
308 for (i
= 0; i
< gen
->n_array
; ++i
) {
309 int n_index
= gen
->array
[i
].n_index
;
310 free(gen
->array
[i
].type
);
311 free(gen
->array
[i
].name
);
312 for (j
= 0; j
< n_index
; ++j
) {
313 isl_pw_aff_free(gen
->array
[i
].bound
[j
]);
314 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
316 isl_space_free(gen
->array
[i
].dim
);
317 free(gen
->array
[i
].bound
);
318 free(gen
->array
[i
].local_bound
);
319 free(gen
->array
[i
].refs
);
324 static void declare_device_arrays(struct cuda_gen
*gen
)
328 for (i
= 0; i
< gen
->n_array
; ++i
)
329 fprintf(gen
->cuda
.host_c
, "%s *dev_%s;\n",
330 gen
->array
[i
].type
, gen
->array
[i
].name
);
331 fprintf(gen
->cuda
.host_c
, "\n");
334 static void print_array_size(struct cuda_gen
*gen
, FILE *out
,
335 struct cuda_array_info
*array
)
340 prn
= isl_printer_to_file(gen
->ctx
, out
);
341 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
342 for (i
= 0; i
< array
->n_index
; ++i
) {
343 prn
= isl_printer_print_str(prn
, "(");
344 prn
= isl_printer_print_pw_aff(prn
, array
->bound
[i
]);
345 prn
= isl_printer_print_str(prn
, ") * ");
347 prn
= isl_printer_print_str(prn
, "sizeof(");
348 prn
= isl_printer_print_str(prn
, array
->type
);
349 prn
= isl_printer_print_str(prn
, ")");
350 isl_printer_free(prn
);
353 static void allocate_device_arrays(struct cuda_gen
*gen
)
357 for (i
= 0; i
< gen
->n_array
; ++i
) {
358 fprintf(gen
->cuda
.host_c
,
359 "cudaCheckReturn(cudaMalloc((void **) &dev_%s, ",
361 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
362 fprintf(gen
->cuda
.host_c
, "));\n");
364 fprintf(gen
->cuda
.host_c
, "\n");
367 static void free_device_arrays(struct cuda_gen
*gen
)
371 for (i
= 0; i
< gen
->n_array
; ++i
)
372 fprintf(gen
->cuda
.host_c
, "cudaCheckReturn(cudaFree(dev_%s));\n",
376 /* Check if a cuda array is a scalar. A scalar is a value that is not stored
377 * as an array or through a pointer reference, but as single data element. At
378 * the moment, scalars are represented as zero dimensional arrays.
380 static int cuda_array_is_scalar(struct cuda_array_info
*array
)
382 return (array
->n_index
== 0);
385 static void copy_arrays_to_device(struct cuda_gen
*gen
)
389 for (i
= 0; i
< gen
->n_array
; ++i
) {
394 dim
= isl_space_copy(gen
->array
[i
].dim
);
395 read_i
= isl_union_set_extract_set(gen
->copy_in
, dim
);
396 empty
= isl_set_fast_is_empty(read_i
);
397 isl_set_free(read_i
);
401 fprintf(gen
->cuda
.host_c
, "cudaCheckReturn(cudaMemcpy(dev_%s,",
404 if (cuda_array_is_scalar(&(gen
->array
[i
])))
405 fprintf(gen
->cuda
.host_c
, " &%s, ",
408 fprintf(gen
->cuda
.host_c
, " %s, ", gen
->array
[i
].name
);
410 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
411 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyHostToDevice));\n");
413 fprintf(gen
->cuda
.host_c
, "\n");
416 static void copy_arrays_from_device(struct cuda_gen
*gen
)
419 isl_union_set
*write
;
420 write
= isl_union_map_range(isl_union_map_copy(gen
->write
));
422 for (i
= 0; i
< gen
->n_array
; ++i
) {
427 dim
= isl_space_copy(gen
->array
[i
].dim
);
428 write_i
= isl_union_set_extract_set(write
, dim
);
429 empty
= isl_set_fast_is_empty(write_i
);
430 isl_set_free(write_i
);
434 fprintf(gen
->cuda
.host_c
,
435 "cudaCheckReturn(cudaMemcpy(%s, dev_%s, ",
436 gen
->array
[i
].name
, gen
->array
[i
].name
);
437 print_array_size(gen
, gen
->cuda
.host_c
, &gen
->array
[i
]);
438 fprintf(gen
->cuda
.host_c
, ", cudaMemcpyDeviceToHost));\n");
441 isl_union_set_free(write
);
442 fprintf(gen
->cuda
.host_c
, "\n");
445 static void read_sizes_from_file(struct cuda_gen
*gen
, const char *filename
,
451 file
= fopen(filename
, "r");
455 for (i
= 0; i
< len
; ++i
)
456 if (fscanf(file
, "%d", &sizes
[i
]) < 1)
462 static void reverse_list(int *list
, int len
)
467 for (i
= 0; 2 * i
< len
; ++i
) {
469 list
[i
] = list
[len
- 1 - i
];
470 list
[len
- 1 - i
] = t
;
474 /* Read user specified sizes from "tile.sizes", "block.sizes" and "grid.sizes"
475 * after filling in some potentially useful defaults.
477 static void read_sizes(struct cuda_gen
*gen
)
481 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
482 assert(gen
->tile_size
);
483 for (n
= 0; n
< gen
->tile_len
; ++n
)
484 gen
->tile_size
[n
] = gen
->options
->tile_size
;
485 read_sizes_from_file(gen
, "tile.sizes", gen
->tile_size
, gen
->tile_len
);
488 gen
->n_block
= (n
<= 3) ? n
: 3;
489 switch (gen
->n_block
) {
491 gen
->block_dim
[0] = 512;
494 gen
->block_dim
[0] = 32;
495 gen
->block_dim
[1] = 16;
498 gen
->block_dim
[0] = 32;
499 gen
->block_dim
[1] = 4;
500 gen
->block_dim
[2] = 4;
503 read_sizes_from_file(gen
, "block.sizes", gen
->block_dim
, gen
->n_block
);
504 reverse_list(gen
->block_dim
, gen
->n_block
);
506 gen
->n_grid
= (n
<= 2) ? n
: 2;
507 switch (gen
->n_grid
) {
509 gen
->grid_dim
[0] = 32768;
512 gen
->grid_dim
[0] = 256;
513 gen
->grid_dim
[1] = 256;
516 read_sizes_from_file(gen
, "grid.sizes", gen
->grid_dim
, gen
->n_grid
);
517 reverse_list(gen
->grid_dim
, gen
->n_grid
);
520 static void free_stmts(struct cuda_stmt
*stmts
, int n
)
524 for (i
= 0; i
< n
; ++i
) {
525 struct cuda_stmt_access
*access
, *next
;
527 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
529 isl_map_free(access
->access
);
533 isl_set_free(stmts
[i
].domain
);
538 void clear_cuda_gen(struct cuda_gen
*gen
)
540 free_stmts(gen
->stmts
, gen
->n_stmts
);
541 free_array_info(gen
);
542 isl_set_free(gen
->context
);
543 isl_union_set_free(gen
->copy_in
);
544 isl_union_map_free(gen
->sched
);
545 isl_union_map_free(gen
->read
);
546 isl_union_map_free(gen
->write
);
549 static void print_reverse_list(FILE *out
, int len
, int *list
)
553 for (i
= 0; i
< len
; ++i
) {
556 fprintf(out
, "%d", list
[len
- 1 - i
]);
560 static void print_kernel_launch(struct cuda_gen
*gen
,
561 __isl_keep isl_union_set
*arrays
)
568 print_indent(gen
->code
.dst
, gen
->code
.indent
);
569 fprintf(gen
->code
.dst
, "kernel%d <<<k%d_dimGrid, k%d_dimBlock>>> (",
570 gen
->kernel_id
, gen
->kernel_id
, gen
->kernel_id
);
571 fprintf(gen
->cuda
.kernel_c
, "__global__ void kernel%d(",
573 fprintf(gen
->cuda
.kernel_h
, "__global__ void kernel%d(",
576 for (i
= 0; i
< gen
->n_array
; ++i
) {
581 dim
= isl_space_copy(gen
->array
[i
].dim
);
582 arr
= isl_union_set_extract_set(arrays
, dim
);
583 empty
= isl_set_fast_is_empty(arr
);
589 fprintf(gen
->code
.dst
, ", ");
590 fprintf(gen
->cuda
.kernel_c
, ", ");
591 fprintf(gen
->cuda
.kernel_h
, ", ");
594 fprintf(gen
->code
.dst
, "dev_%s", gen
->array
[i
].name
);
595 fprintf(gen
->cuda
.kernel_c
, "%s *%s",
596 gen
->array
[i
].type
, gen
->array
[i
].name
);
597 fprintf(gen
->cuda
.kernel_h
, "%s *%s",
598 gen
->array
[i
].type
, gen
->array
[i
].name
);
603 dim
= isl_union_set_get_space(arrays
);
604 nparam
= isl_space_dim(dim
, isl_dim_param
);
605 for (i
= 0; i
< nparam
; ++i
) {
606 const char *name
= isl_space_get_dim_name(dim
, isl_dim_param
, i
);
608 fprintf(gen
->code
.dst
, ", ");
609 fprintf(gen
->cuda
.kernel_c
, ", ");
610 fprintf(gen
->cuda
.kernel_h
, ", ");
612 fprintf(gen
->code
.dst
, "%s", name
);
613 fprintf(gen
->cuda
.kernel_c
, "int %s", name
);
614 fprintf(gen
->cuda
.kernel_h
, "int %s", name
);
619 for (i
= 0; i
< gen
->tile_first
; ++i
) {
621 fprintf(gen
->code
.dst
, ", ");
622 fprintf(gen
->cuda
.kernel_c
, ", ");
623 fprintf(gen
->cuda
.kernel_h
, ", ");
625 fprintf(gen
->code
.dst
, "h%d", i
);
626 fprintf(gen
->cuda
.kernel_c
, "int h%d", i
);
627 fprintf(gen
->cuda
.kernel_h
, "int h%d", i
);
631 fprintf(gen
->code
.dst
, ");\n");
632 fprintf(gen
->cuda
.kernel_c
, ")\n");
633 fprintf(gen
->cuda
.kernel_h
, ");\n");
635 fprintf(gen
->code
.dst
, "cudaCheckKernel();\n");
638 /* Construct a map from a domain of dimensionality "len"
639 * to a domain of dimensionality "len" + "tile_len" that tiles
640 * the "tile_len" coordinates starting at "first".
641 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
642 * "dim" prescribes the parameters.
644 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
645 int first
, int tile_len
, int *tile_size
)
654 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
655 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
656 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
658 for (i
= 0; i
< len
- tile_len
; ++i
) {
659 int j
= i
< first
? i
: i
+ tile_len
;
660 int k
= i
< first
? i
: i
+ 2 * tile_len
;
662 c
= isl_equality_alloc(isl_space_copy(dim
));
663 isl_int_set_si(v
, -1);
664 isl_constraint_set_coefficient(c
, isl_dim_in
, j
, v
);
665 isl_int_set_si(v
, 1);
666 isl_constraint_set_coefficient(c
, isl_dim_out
, k
, v
);
667 bmap
= isl_basic_map_add_constraint(bmap
, c
);
670 for (i
= 0; i
< tile_len
; ++i
) {
671 c
= isl_equality_alloc(isl_space_copy(dim
));
672 isl_int_set_si(v
, -1);
673 isl_constraint_set_coefficient(c
, isl_dim_in
, first
+ i
, v
);
674 isl_int_set_si(v
, tile_size
[i
]);
675 isl_constraint_set_coefficient(c
, isl_dim_out
, first
+ i
, v
);
676 isl_int_set_si(v
, 1);
677 isl_constraint_set_coefficient(c
, isl_dim_out
,
678 first
+ i
+ tile_len
, v
);
679 bmap
= isl_basic_map_add_constraint(bmap
, c
);
681 c
= isl_inequality_alloc(isl_space_copy(dim
));
682 isl_int_set_si(v
, 1);
683 isl_constraint_set_coefficient(c
, isl_dim_out
,
684 first
+ i
+ tile_len
, v
);
685 bmap
= isl_basic_map_add_constraint(bmap
, c
);
687 c
= isl_inequality_alloc(isl_space_copy(dim
));
688 isl_int_set_si(v
, -1);
689 isl_constraint_set_coefficient(c
, isl_dim_out
,
690 first
+ i
+ tile_len
, v
);
691 isl_int_set_si(v
, tile_size
[i
] - 1);
692 isl_constraint_set_constant(c
, v
);
693 bmap
= isl_basic_map_add_constraint(bmap
, c
);
699 return isl_map_from_basic_map(bmap
);
702 /* Construct a map from a domain of dimensionality "len"
703 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
704 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
705 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
706 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
707 * that are projected out at the end.
708 * "dim" prescribes the parameters.
710 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
711 int first
, int wrap_len
, int *wrap_size
)
717 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
718 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
719 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
721 for (i
= 0; i
< len
; ++i
) {
722 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
724 c
= isl_equality_alloc(isl_space_copy(dim
));
725 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
726 isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
727 bmap
= isl_basic_map_add_constraint(bmap
, c
);
730 for (i
= 0; i
< wrap_len
; ++i
) {
731 c
= isl_equality_alloc(isl_space_copy(dim
));
732 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
734 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
735 first
+ wrap_len
+ i
, 1);
736 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
737 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
738 bmap
= isl_basic_map_add_constraint(bmap
, c
);
740 c
= isl_inequality_alloc(isl_space_copy(dim
));
741 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
742 first
+ wrap_len
+ i
, 1);
743 bmap
= isl_basic_map_add_constraint(bmap
, c
);
745 c
= isl_inequality_alloc(isl_space_copy(dim
));
746 isl_constraint_set_coefficient_si(c
, isl_dim_out
,
747 first
+ wrap_len
+ i
, -1);
748 isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
749 bmap
= isl_basic_map_add_constraint(bmap
, c
);
754 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
755 first
+ 2 * wrap_len
, wrap_len
);
757 return isl_map_from_basic_map(bmap
);
760 /* Add "n" parameters named prefix%d.
762 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
763 int n
, const char *prefix
)
769 nparam
= isl_set_dim(set
, isl_dim_param
);
770 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
772 for (i
= 0; i
< n
; ++i
) {
773 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
774 set
= isl_set_set_dim_name(set
, isl_dim_param
,
781 /* Equate the "n" dimensions of "set" starting at "first" to
782 * freshly created parameters named prefix%d.
784 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
785 int first
, int n
, const char *prefix
)
794 nparam
= isl_set_dim(set
, isl_dim_param
);
796 set
= add_params(set
, n
, prefix
);
798 dim
= isl_set_get_space(set
);
799 bset
= isl_basic_set_universe(isl_space_copy(dim
));
803 for (i
= 0; i
< n
; ++i
) {
804 c
= isl_equality_alloc(isl_space_copy(dim
));
805 isl_int_set_si(v
, -1);
806 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
807 isl_int_set_si(v
, 1);
808 isl_constraint_set_coefficient(c
, isl_dim_set
, first
+ i
, v
);
809 bset
= isl_basic_set_add_constraint(bset
, c
);
815 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
818 static __isl_give isl_set
*parametrization(__isl_take isl_space
*dim
,
819 int len
, int first
, int n
, const char *prefix
)
823 dim
= isl_space_add_dims(dim
, isl_dim_set
, len
);
824 set
= isl_set_universe(dim
);
826 return parametrize(set
, first
, n
, prefix
);
829 /* Tile the B loops over the tile sizes and then tile/wrap
830 * the T1 loops over the blocks.
832 static __isl_give isl_union_map
*tile_schedule(struct cuda_gen
*gen
,
833 __isl_take isl_union_map
*sched
)
836 isl_map
*tiling
, *block_tiling
;
838 dim
= isl_union_map_get_space(sched
);
839 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
840 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
842 if (gen
->options
->wrap
)
843 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
844 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
846 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
847 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
849 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
851 tiling
= isl_map_apply_range(tiling
, block_tiling
);
853 sched
= isl_union_map_apply_range(sched
,
854 isl_union_map_from_map(tiling
));
856 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
861 static __isl_give isl_union_map
*parametrize_tiled_schedule(
862 struct cuda_gen
*gen
, __isl_take isl_union_map
*sched
)
867 dim
= isl_union_map_get_space(sched
);
868 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->tile_first
, "h");
869 sched
= isl_union_map_intersect_range(sched
,
870 isl_union_set_from_set(par
));
872 dim
= isl_union_map_get_space(sched
);
873 par
= parametrization(dim
, gen
->tiled_len
,
874 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
875 sched
= isl_union_map_intersect_range(sched
,
876 isl_union_set_from_set(par
));
881 /* Tile/wrap the P1 loops over the threads.
883 static __isl_give isl_union_map
*thread_tile_schedule(struct cuda_gen
*gen
,
884 __isl_take isl_union_map
*sched
)
890 dim
= isl_union_map_get_space(sched
);
892 if (gen
->options
->wrap
)
893 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
894 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
896 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
897 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
898 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
900 sched
= isl_union_map_apply_range(sched
,
901 isl_union_map_from_map(tiling
));
903 par
= parametrization(dim
, gen
->thread_tiled_len
,
904 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
906 sched
= isl_union_map_intersect_range(sched
,
907 isl_union_set_from_set(par
));
909 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
914 /* If the user asked for it, scale the shared memory tile loops
915 * (T1P and T2) of "sched" by gen->tile_size[i].
916 * If we are not performing "wrapping", then additionally scale the T1P
917 * loops by gen->grid_dim[i].
919 static __isl_give isl_union_map
*scale_tile_loops(struct cuda_gen
*gen
,
920 __isl_take isl_union_map
*sched
)
924 isl_basic_map
*scale
;
927 if (!gen
->options
->scale_tile_loops
)
930 dim
= isl_union_map_get_space(sched
);
931 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
932 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
933 scale
= isl_basic_map_universe(isl_space_copy(dim
));
935 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
938 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
939 f
= gen
->tile_size
[i
- gen
->tile_first
];
940 if (!gen
->options
->wrap
)
941 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
942 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
943 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
944 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
947 c
= isl_equality_alloc(isl_space_copy(dim
));
948 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
949 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
950 scale
= isl_basic_map_add_constraint(scale
, c
);
955 sched
= isl_union_map_apply_range(sched
,
956 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
961 /* If we are not performing "wrapping" and if the user asked for it,
962 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
964 static __isl_give isl_union_map
*scale_thread_tile_loops(struct cuda_gen
*gen
,
965 __isl_take isl_union_map
*sched
)
969 isl_basic_map
*scale
;
972 if (gen
->options
->wrap
)
974 if (!gen
->options
->scale_tile_loops
)
977 dim
= isl_union_map_get_space(sched
);
978 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
979 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
980 scale
= isl_basic_map_universe(isl_space_copy(dim
));
982 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
985 if (i
>= gen
->shared_len
&&
986 i
< gen
->shared_len
+ gen
->n_block
)
987 f
= gen
->block_dim
[i
- gen
->shared_len
];
989 c
= isl_equality_alloc(isl_space_copy(dim
));
990 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
991 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
992 scale
= isl_basic_map_add_constraint(scale
, c
);
997 sched
= isl_union_map_apply_range(sched
,
998 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1003 /* If we are not performing "wrapping" and if the user asked for it,
1004 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1006 static __isl_give isl_union_map
*scale_access_tile_loops(struct cuda_gen
*gen
,
1007 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1011 isl_basic_map
*scale
;
1014 if (gen
->options
->wrap
)
1016 if (!gen
->options
->scale_tile_loops
)
1019 dim
= isl_union_map_get_space(sched
);
1020 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1021 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1022 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1024 for (i
= 0; i
< len
; ++i
) {
1027 if (i
>= first
&& i
< first
+ n_tile
)
1028 f
= gen
->block_dim
[i
- first
];
1030 c
= isl_equality_alloc(isl_space_copy(dim
));
1031 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1032 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1033 scale
= isl_basic_map_add_constraint(scale
, c
);
1036 isl_space_free(dim
);
1038 sched
= isl_union_map_apply_range(sched
,
1039 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1044 /* If print_user_stmt is set, we want to print the statements ourselves,
1045 * instead of relying on the C preprocessor. If so, we need to use
1046 * the stop option so that the domains will be saved on the statement
1049 static void print_cloog_shared_body(struct cuda_gen
*gen
,
1050 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
, int len
,
1051 void (*print_user_stmt
)(struct gpucode_info
*info
,
1052 struct clast_user_stmt
*s
),
1056 CloogOptions
*options
;
1057 CloogDomain
*cloog_context
;
1058 CloogUnionDomain
*ud
;
1060 struct clast_stmt
*stmt
;
1063 sched
= isl_union_map_copy(sched
);
1064 sched
= isl_union_map_align_params(sched
, isl_set_get_space(context
));
1066 options
= cloog_options_malloc(gen
->state
);
1067 options
->language
= LANGUAGE_C
;
1068 options
->strides
= 1;
1072 options
->override
= 1;
1073 options
->save_domains
= 1;
1074 options
->noscalars
= 1;
1075 options
->first_unroll
= first_unroll
;
1077 ud
= cloog_union_domain_from_isl_union_map(sched
);
1078 for (i
= 0; i
< len
; ++i
) {
1079 snprintf(name
, sizeof(name
), "c%d", i
);
1080 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
1082 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
1083 input
= cloog_input_alloc(cloog_context
, ud
);
1085 stmt
= cloog_clast_create_from_input(input
, options
);
1087 gen
->stmt_code
.indent
= gen
->kernel_code
.indent
;
1088 gen
->stmt_code
.dst
= gen
->cuda
.kernel_c
;
1089 gen
->stmt_code
.print_user_stmt
= print_user_stmt
;
1090 gen
->stmt_code
.print_user_stmt_list
= NULL
;
1091 gen
->stmt_code
.print_for_head
= NULL
;
1092 gen
->stmt_code
.print_for_foot
= NULL
;
1093 gen
->stmt_code
.user
= gen
;
1094 gpu_print_host_stmt(&gen
->stmt_code
, stmt
);
1096 cloog_clast_free(stmt
);
1097 cloog_options_free(options
);
1100 /* Add "len" parameters p[i] called prefix%d,
1101 * with bounds to 0 <= p[i] < size[i].
1103 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1104 int len
, int *size
, const char *prefix
)
1110 isl_basic_set
*bset
;
1114 nparam
= isl_set_dim(set
, isl_dim_param
);
1115 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1117 for (i
= 0; i
< len
; ++i
) {
1118 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1119 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1123 dim
= isl_set_get_space(set
);
1124 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1128 for (i
= 0; i
< len
; ++i
) {
1129 c
= isl_inequality_alloc(isl_space_copy(dim
));
1130 isl_int_set_si(v
, 1);
1131 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1132 bset
= isl_basic_set_add_constraint(bset
, c
);
1134 c
= isl_inequality_alloc(isl_space_copy(dim
));
1135 isl_int_set_si(v
, -1);
1136 isl_constraint_set_coefficient(c
, isl_dim_param
, nparam
+ i
, v
);
1137 isl_int_set_si(v
, size
[i
] - 1);
1138 isl_constraint_set_constant(c
, v
);
1139 bset
= isl_basic_set_add_constraint(bset
, c
);
1143 isl_space_free(dim
);
1145 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1148 static void print_shared_body(struct cuda_gen
*gen
,
1149 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
,
1150 int len
, void (*print_user_stmt
)(struct gpucode_info
*info
,
1151 struct clast_user_stmt
*s
),
1156 context
= isl_set_copy(shared_domain
);
1157 context
= parametrize(context
, 0, gen
->shared_len
, "g");
1158 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->shared_len
);
1159 context
= add_bounded_parameters(context
,
1160 gen
->n_block
, gen
->block_dim
, "t");
1162 print_cloog_shared_body(gen
, context
, sched
, len
, print_user_stmt
,
1165 isl_set_free(context
);
1168 /* Given a tile of an array, construct a map that maps each element
1169 * of the tile to a copy of the tile shifted to the origin
1170 * (based on the lower bounds in group->private_bound or group->shared_bound).
1171 * If any of the indices is strided, then {private,shared}_bound[i].shift_map
1172 * is applied to the index first.
1173 * The domain of the resulting map is "access",
1174 * while the range space is anonymous.
1176 static __isl_give isl_map
*shift_access(__isl_take isl_set
*access
,
1177 struct cuda_array_ref_group
*group
)
1181 isl_basic_set
*bset
;
1182 isl_basic_map
*bmap
;
1184 isl_basic_set
*offset
;
1185 isl_basic_map
*shift
;
1186 isl_basic_map
*pre_shift
;
1189 struct cuda_array_bound
*bounds
;
1190 int n_index
= group
->array
->n_index
;
1192 bounds
= group
->private_bound
;
1194 bounds
= group
->shared_bound
;
1196 dim
= isl_set_get_space(access
);
1197 dim
= isl_space_drop_dims(dim
, isl_dim_set
, 0, n_index
);
1198 offset
= isl_basic_set_universe(dim
);
1199 for (i
= 0; i
< n_index
; ++i
) {
1200 lb
= isl_aff_copy(bounds
[i
].lb
);
1201 bmap
= isl_basic_map_from_aff(lb
);
1202 bset
= isl_basic_map_range(bmap
);
1203 offset
= isl_basic_set_flat_product(offset
, bset
);
1205 offset
= isl_basic_set_neg(offset
);
1207 dim
= isl_space_map_from_set(isl_set_get_space(access
));
1208 shift
= isl_basic_map_identity(dim
);
1209 shift
= isl_basic_map_set_tuple_name(shift
, isl_dim_out
, NULL
);
1211 bset
= isl_basic_set_universe(isl_set_get_space(access
));
1212 bmap
= isl_basic_map_from_domain_and_range(bset
, offset
);
1214 shift
= isl_basic_map_sum(shift
, bmap
);
1216 dim
= isl_set_get_space(access
);
1217 dim
= isl_space_drop_dims(dim
, isl_dim_set
, 0, n_index
);
1218 dim
= isl_space_map_from_set(dim
);
1219 pre_shift
= isl_basic_map_universe(isl_space_copy(dim
));
1220 dim
= isl_space_add_dims(dim
, isl_dim_in
, 1);
1221 dim
= isl_space_add_dims(dim
, isl_dim_out
, 1);
1222 for (i
= 0; i
< n_index
; ++i
) {
1223 if (!bounds
[i
].shift_map
)
1224 bmap
= isl_basic_map_identity(isl_space_copy(dim
));
1226 bmap
= isl_basic_map_copy(bounds
[i
].shift_map
);
1227 pre_shift
= isl_basic_map_flat_product(pre_shift
, bmap
);
1229 isl_space_free(dim
);
1230 name
= isl_basic_map_get_tuple_name(shift
, isl_dim_in
);
1231 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_in
, name
);
1232 pre_shift
= isl_basic_map_set_tuple_name(pre_shift
, isl_dim_out
, name
);
1233 shift
= isl_basic_map_apply_range(pre_shift
, shift
);
1235 sched
= isl_map_from_basic_map(shift
);
1236 sched
= isl_map_intersect_domain(sched
, access
);
1241 /* Construct a schedule for iterating over all elements in the given
1242 * piece of an array. The schedule iterates over a copy of the piece
1243 * that is shifted to the origin.
1244 * We subsequently also perform the tiling/wrapping over the threads.
1246 * In particular, we tile the final iterators so that the final thread
1247 * dimension runs over the final array dimension.
1248 * However, if those final iterators have only a single iteration,
1249 * we try to tile earlier iterators instead.
1251 static __isl_give isl_union_map
*access_schedule(struct cuda_gen
*gen
,
1252 __isl_take isl_set
*access
, struct cuda_array_ref_group
*group
)
1256 isl_union_map
*usched
;
1259 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1263 sched
= shift_access(access
, group
);
1265 n_tile
= gen
->n_block
;
1266 if (n_tile
> nvar
) {
1268 sched
= isl_map_insert_dims(sched
,
1269 isl_dim_out
, 0, n_tile
- nvar
);
1270 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1271 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1275 first
= nvar
- n_tile
;
1277 for (; first
> 0; first
--)
1278 if (!isl_map_plain_is_fixed(sched
, isl_dim_out
,
1279 first
+ n_tile
- 1, NULL
))
1282 dim
= isl_map_get_space(sched
);
1283 dim
= isl_space_params(dim
);
1284 if (gen
->options
->wrap
)
1285 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1286 n_tile
, gen
->block_dim
);
1288 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1289 n_tile
, gen
->block_dim
);
1290 sched
= isl_map_apply_range(sched
, tiling
);
1292 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1293 usched
= isl_union_map_from_map(sched
);
1294 usched
= isl_union_map_intersect_range(usched
,
1295 isl_union_set_from_set(par
));
1297 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1303 static void print_shared_access(struct cuda_gen
*gen
,
1304 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
1305 const char *type
, struct cuda_array_ref_group
*group
)
1307 const char *array_name
;
1310 isl_union_map
*sched
;
1311 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
1314 ctx
= isl_set_get_ctx(access
);
1315 array_name
= isl_set_get_tuple_name(access
);
1316 name
= isl_alloc_array(ctx
, char,
1317 strlen(type
) + sizeof("_shared_") + strlen(array_name
) + 20);
1318 if (group
->array
->n_group
> 1)
1319 sprintf(name
, "%s_shared_%s_%d", type
, array_name
, group
->nr
);
1321 sprintf(name
, "%s_shared_%s", type
, array_name
);
1322 access
= isl_set_set_tuple_name(access
, name
);
1325 sched
= access_schedule(gen
, access
, group
);
1327 n_tile
= gen
->n_block
;
1331 print_shared_body(gen
, shared_domain
, sched
, nvar
+ n_tile
, NULL
, -1);
1333 isl_union_map_free(sched
);
1336 /* Return the union of all read (read = 1) and/or write (write = 1)
1337 * access relations in the group.
1339 static __isl_give isl_union_map
*group_access_relation(
1340 struct cuda_array_ref_group
*group
, int read
, int write
)
1343 isl_union_map
*access
;
1345 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1346 for (i
= 0; i
< group
->n_ref
; ++i
) {
1349 if (!((read
&& group
->refs
[i
]->read
) ||
1350 (write
&& group
->refs
[i
]->write
)))
1352 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1353 access
= isl_union_map_union(access
,
1354 isl_union_map_from_map(map_i
));
1360 /* Check that none of the shared memory tiles involve any strides.
1362 static int no_strides(struct cuda_array_ref_group
*group
)
1365 int n_index
= group
->array
->n_index
;
1367 for (i
= 0; i
< n_index
; ++i
)
1368 if (group
->shared_bound
[i
].shift
)
1374 /* Return a set containing the values of the given index i
1375 * of the elements in the array tile in global memory that corresponds
1376 * to the shared memory copy.
1377 * In particular, if a is the index, we return a set with constraints
1379 * tile_offset <= a <= tile_offset + tile_size - 1
1383 * 0 <= a <= array_size - 1
1386 static __isl_give isl_set
*group_tile_dim(struct cuda_array_ref_group
*group
,
1389 isl_basic_set
*tile
;
1392 isl_local_space
*ls
;
1397 aff
= isl_aff_copy(group
->shared_bound
[i
].lb
);
1398 aff
= isl_aff_add_dims(aff
, isl_dim_set
, 1);
1399 ls
= isl_aff_get_local_space(aff
);
1400 aff
= isl_aff_neg(aff
);
1401 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_set
, 0, 1);
1402 c
= isl_inequality_from_aff(isl_aff_copy(aff
));
1403 tile
= isl_basic_set_from_constraint(c
);
1405 aff
= isl_aff_neg(aff
);
1406 aff
= isl_aff_add_constant(aff
, group
->shared_bound
[i
].size
);
1407 aff
= isl_aff_add_constant_si(aff
, -1);
1408 c
= isl_inequality_from_aff(aff
);
1409 tile
= isl_basic_set_add_constraint(tile
, c
);
1411 aff
= isl_aff_zero(ls
);
1412 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_set
, 0, 1);
1413 c
= isl_inequality_from_aff(aff
);
1414 tile
= isl_basic_set_add_constraint(tile
, c
);
1416 bound
= isl_pw_aff_copy(group
->array
->bound
[i
]);
1417 bound
= isl_pw_aff_add_dims(bound
, isl_dim_set
, 1);
1418 ls
= isl_local_space_from_space(isl_pw_aff_get_space(bound
));
1419 aff
= isl_aff_zero(ls
);
1420 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_set
, 0, 1);
1421 aff
= isl_aff_add_constant_si(aff
, 1);
1422 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
1424 tile_set
= isl_pw_aff_ge_set(bound
, isl_pw_aff_alloc(dom
, aff
));
1425 tile_set
= isl_set_align_params(tile_set
, isl_basic_set_get_space(tile
));
1426 tile_set
= isl_set_intersect(tile_set
, isl_set_from_basic_set(tile
));
1431 /* Return a set containing the elements in the array tile in
1432 * global memory that corresponds to the shared memory copy.
1434 static __isl_give isl_set
*group_tile(struct cuda_array_ref_group
*group
)
1437 int n_index
= group
->array
->n_index
;
1440 tile
= group_tile_dim(group
, 0);
1441 for (i
= 1; i
< n_index
; ++i
) {
1444 tile_i
= group_tile_dim(group
, i
);
1445 tile
= isl_set_flat_product(tile
, tile_i
);
1448 tile
= isl_set_set_tuple_name(tile
, group
->array
->name
);
1453 /* Print code for reading into or writing from shared memory
1454 * the given array reference group.
1456 * sched maps the original iteration domains to the shared memory tile loops.
1458 * If we are performing a read from global memory to shared memory,
1459 * if the array involved is not a scalar and if the definition of the
1460 * shared memory tiles does not involve any strides, then we copy
1461 * the entire tile to shared memory. This may result in some extra
1462 * elements getting copied, but it should lead to simpler code
1463 * (which means that fewer registers may be needed) and less divergence.
1465 * Otherwise, we only copy the elements that will be read or have been written
1468 * Note that the absence of stride requirement can easily be lifted.
1469 * We would just need to add constraints of the form
1471 * shift + a = stride * alpha
1473 static int print_group_shared_accesses(struct cuda_gen
*gen
,
1474 struct cuda_array_ref_group
*group
, const char *type
,
1475 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*sched
)
1478 isl_union_map
*access
;
1479 isl_union_set
*uset
;
1480 isl_set
*access_set
;
1482 if (group
->private_bound
)
1484 if (!group
->shared_bound
)
1487 read
= !strcmp(type
, "read");
1489 access
= group_access_relation(group
, read
, !read
);
1490 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
1491 uset
= isl_union_map_range(access
);
1493 if (isl_union_set_is_empty(uset
)) {
1494 isl_union_set_free(uset
);
1498 if (read
&& group
->array
->n_index
> 0 && no_strides(group
)) {
1499 isl_union_set_free(uset
);
1500 access_set
= group_tile(group
);
1501 print_shared_access(gen
, shared_domain
, access_set
,
1506 access_set
= isl_set_from_union_set(uset
);
1507 access_set
= isl_set_coalesce(access_set
);
1509 print_shared_access(gen
, shared_domain
, access_set
, type
, group
);
1514 /* Print code for reading into or writing from shared memory at
1515 * the given level (-1 for innermost).
1517 * If we are not printing at the innermost level, then the dimensionality
1518 * of shared_domain may be smaller than gen->shared_len.
1519 * As the rest of the code assumes that the domain of access has
1520 * gen->shared_len dimensions, we therefore may need to embed this domain
1521 * in a higher dimensional space after intersection with shared_domain.
1523 static void print_shared_accesses(struct cuda_gen
*gen
,
1524 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
1525 const char *type
, int level
)
1531 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
1533 isl_union_map
*sched
;
1535 shared_domain
= isl_set_copy(shared_domain
);
1536 sched
= isl_union_map_copy(gen
->tiled_sched
);
1537 dim
= isl_union_map_get_space(sched
);
1538 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
1539 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1540 sched
= isl_union_map_intersect_range(sched
,
1541 isl_union_set_from_set(isl_set_copy(shared_domain
)));
1542 if (shared_len
!= gen
->shared_len
) {
1543 dim
= isl_union_map_get_space(sched
);
1544 proj
= projection(dim
, gen
->shared_len
, shared_len
);
1545 proj
= isl_map_reverse(proj
);
1546 shared_domain
= isl_set_apply(shared_domain
,
1547 isl_map_copy(proj
));
1548 sched
= isl_union_map_apply_range(sched
,
1549 isl_union_map_from_map(proj
));
1552 dim
= isl_union_map_get_space(sched
);
1553 par
= parametrization(dim
, gen
->shared_len
, 0, gen
->shared_len
, "g");
1554 sched
= isl_union_map_intersect_range(sched
,
1555 isl_union_set_from_set(par
));
1557 for (i
= 0; i
< gen
->n_array
; ++i
) {
1558 struct cuda_array_info
*array
= &gen
->array
[i
];
1560 if (gen
->array
[i
].print_shared_level
!= level
)
1563 for (j
= 0; j
< array
->n_group
; ++j
) {
1564 if (print_group_shared_accesses(gen
, array
->groups
[j
],
1565 type
, shared_domain
, sched
))
1570 isl_union_map_free(sched
);
1571 isl_set_free(shared_domain
);
1574 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
1575 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
1579 /* Given an index expression into a tile of an array, adjust the expression
1580 * to a shift of the tile to the origin
1581 * (based on the lower bounds in array->shared_bound).
1582 * If the index is strided, then we first add
1583 * bound->shift and divide by bound->stride.
1585 static __isl_give isl_qpolynomial
*shift_index(__isl_take isl_qpolynomial
*qp
,
1586 struct cuda_array_info
*array
,
1587 struct cuda_array_bound
*bound
, __isl_take isl_set
*domain
)
1589 isl_qpolynomial
*lb
;
1592 isl_qpolynomial
*shift
, *t
;
1595 shift
= bound
->shift
;
1596 shift
= isl_qpolynomial_copy(shift
);
1597 shift
= isl_qpolynomial_drop_dims(shift
, isl_dim_set
, 0,
1598 isl_qpolynomial_dim(shift
, isl_dim_set
));
1599 shift
= isl_qpolynomial_align_params(shift
,
1600 isl_qpolynomial_get_space(qp
));
1601 qp
= isl_qpolynomial_add(qp
, shift
);
1602 dim
= isl_qpolynomial_get_space(qp
);
1604 isl_int_set_si(one
, 1);
1605 t
= isl_qpolynomial_rat_cst(dim
, one
, bound
->stride
);
1607 qp
= isl_qpolynomial_mul(qp
, t
);
1610 lb
= isl_qpolynomial_from_aff(isl_aff_copy(bound
->lb
));
1611 lb
= isl_qpolynomial_drop_dims(lb
, isl_dim_set
, 0,
1612 isl_qpolynomial_dim(lb
, isl_dim_set
));
1614 lb
= isl_qpolynomial_align_params(lb
, isl_qpolynomial_get_space(qp
));
1616 qp
= isl_qpolynomial_sub(qp
, lb
);
1617 qp
= isl_qpolynomial_gist(qp
, domain
);
1622 /* This function is called for each access to an array in some statement
1623 * in the original code.
1624 * Replace that access by an access to shared or (linearized) global memory.
1625 * Since the array in shared memory is just
1626 * a shifted copy of part of the original array, we simply need
1627 * to subtract the lower bound, which was computed
1628 * in can_tile_for_shared_memory.
1629 * If any of the indices is strided, then we first add
1630 * shared_bound[i].shift and divide by shared_bound[i].stride.
1632 * If the given array is accessed directly from global memory,
1633 * we don't need to perform any shifting and simply simplify
1634 * expression in the context of the domain instead.
1636 * If the array space (range of access) has no name, then we are
1637 * accessing an iterator in the original program.
1639 static void print_access(struct cuda_gen
*gen
, __isl_take isl_map
*access
,
1645 struct cuda_array_info
*array
= NULL
;
1650 struct cuda_array_bound
*bounds
= NULL
;
1652 access
= isl_map_align_params(access
,
1653 isl_set_get_space(gen
->stmt_domain
));
1655 data_set
= isl_set_apply(isl_set_copy(gen
->stmt_domain
), access
);
1657 name
= isl_set_get_tuple_name(data_set
);
1660 fprintf(gen
->cuda
.kernel_c
, "(");
1662 struct cuda_array_ref_group
*group
;
1664 for (i
= 0; i
< gen
->n_array
; ++i
) {
1665 if (strcmp(name
, gen
->array
[i
].name
))
1667 array
= &gen
->array
[i
];
1670 group
= array
->groups
[group_nr
];
1671 bounds
= group
->private_bound
;
1673 bounds
= group
->shared_bound
;
1675 print_array_name(gen
->cuda
.kernel_c
, group
);
1677 if (cuda_array_is_scalar(array
)) {
1678 isl_set_free(data_set
);
1682 fprintf(gen
->cuda
.kernel_c
, "[");
1686 n_index
= isl_set_dim(data_set
, isl_dim_set
);
1687 aff
= isl_set_affine_hull(data_set
);
1689 prn
= isl_printer_to_file(gen
->ctx
, gen
->cuda
.kernel_c
);
1690 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1693 for (i
= 0; i
+ 1 < n_index
; ++i
)
1694 prn
= isl_printer_print_str(prn
, "(");
1696 for (i
= 0; i
< n_index
; ++i
) {
1698 isl_qpolynomial
*qp
;
1701 ok
= isl_basic_set_has_defining_equality(aff
,
1702 isl_dim_out
, i
, &c
);
1704 qp
= isl_qpolynomial_from_constraint(c
, isl_dim_out
, i
);
1705 qp
= isl_qpolynomial_drop_dims(qp
, isl_dim_set
, 0,
1706 isl_qpolynomial_dim(qp
, isl_dim_set
));
1709 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1710 isl_qpolynomial_free(qp
);
1714 domain
= isl_set_copy(gen
->stmt_domain
);
1715 domain
= isl_set_project_out(domain
, isl_dim_set
, 0,
1716 isl_set_dim(domain
, isl_dim_set
));
1718 qp
= isl_qpolynomial_gist(qp
, domain
);
1720 qp
= shift_index(qp
, array
, &bounds
[i
], domain
);
1724 prn
= isl_printer_print_str(prn
, ") * (");
1725 prn
= isl_printer_print_pw_aff(prn
,
1726 array
->local_bound
[i
]);
1727 prn
= isl_printer_print_str(prn
, ") + ");
1729 prn
= isl_printer_print_str(prn
, "][");
1731 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1732 isl_qpolynomial_free(qp
);
1735 prn
= isl_printer_print_str(prn
, ")");
1737 prn
= isl_printer_print_str(prn
, "]");
1738 isl_printer_free(prn
);
1740 isl_basic_set_free(aff
);
1743 static struct cuda_stmt_access
*print_expr(struct cuda_gen
*gen
, FILE *out
,
1744 struct pet_expr
*expr
, struct cuda_stmt_access
*access
, int outer
)
1748 switch (expr
->type
) {
1749 case pet_expr_double
:
1750 fprintf(out
, "%g", expr
->d
);
1752 case pet_expr_access
:
1753 print_access(gen
, isl_map_copy(access
->access
), access
->group
);
1754 access
= access
->next
;
1756 case pet_expr_unary
:
1759 fprintf(out
, " %s ", pet_op_str(expr
->op
));
1760 access
= print_expr(gen
, out
, expr
->args
[pet_un_arg
],
1765 case pet_expr_binary
:
1768 access
= print_expr(gen
, out
, expr
->args
[pet_bin_lhs
],
1770 fprintf(out
, " %s ", pet_op_str(expr
->op
));
1771 access
= print_expr(gen
, out
, expr
->args
[pet_bin_rhs
],
1776 case pet_expr_ternary
:
1779 access
= print_expr(gen
, out
, expr
->args
[pet_ter_cond
],
1781 fprintf(out
, " ? ");
1782 access
= print_expr(gen
, out
, expr
->args
[pet_ter_true
],
1784 fprintf(out
, " : ");
1785 access
= print_expr(gen
, out
, expr
->args
[pet_ter_false
],
1791 fprintf(out
, "%s(", expr
->name
);
1792 for (i
= 0; i
< expr
->n_arg
; ++i
) {
1795 access
= print_expr(gen
, out
, expr
->args
[i
],
1803 static void print_stmt_body(struct cuda_gen
*gen
,
1804 FILE *out
, struct cuda_stmt
*stmt
)
1806 print_expr(gen
, out
, stmt
->body
, stmt
->accesses
, 1);
1807 fprintf(out
, ";\n");
1810 /* This function is called for each leaf in the innermost clast,
1811 * i.e., for each statemetn.
1812 * We print the statement body, simplifying the accesses based
1815 static void print_statement(struct gpucode_info
*code
,
1816 struct clast_user_stmt
*u
)
1818 struct cuda_gen
*gen
= code
->user
;
1821 isl_set
*stmt_domain
;
1822 isl_union_map
*stmt_sched
;
1823 isl_union_set
*uset
;
1825 struct cuda_stmt
*stmt
;
1827 nr
= atoi(u
->statement
->name
+ 2);
1828 stmt
= &gen
->stmts
[nr
];
1830 stmt_domain
= extract_host_domain(u
);
1832 stmt_sched
= isl_union_map_intersect_range(
1833 isl_union_map_copy(gen
->local_sched
),
1834 isl_union_set_from_set(extend(stmt_domain
,
1835 gen
->thread_tiled_len
)));
1836 dim
= isl_union_map_get_space(stmt_sched
);
1837 par
= parametrization(dim
, gen
->thread_tiled_len
, 0,
1838 gen
->thread_tiled_len
, "c");
1839 stmt_sched
= isl_union_map_intersect_range(stmt_sched
,
1840 isl_union_set_from_set(par
));
1842 uset
= isl_union_map_domain(stmt_sched
);
1843 dim
= isl_union_set_get_space(uset
);
1844 dim
= isl_space_add_dims(dim
, isl_dim_set
,
1845 isl_set_dim(stmt
->domain
, isl_dim_set
));
1846 dim
= isl_space_set_tuple_name(dim
, isl_dim_set
, u
->statement
->name
);
1847 gen
->stmt_domain
= isl_union_set_extract_set(uset
, dim
);
1848 isl_union_set_free(uset
);
1850 print_indent(code
->dst
, code
->indent
);
1851 print_stmt_body(gen
, code
->dst
, stmt
);
1853 isl_set_free(gen
->stmt_domain
);
1856 /* Print an access to the element in the global memory copy of the
1857 * given array that corresponds to element [qp[0]][qp[1]]...
1858 * of the original array.
1859 * The copy in global memory has been linearized, so we need to take
1860 * the array size into account.
1862 static void print_private_global_index(isl_ctx
*ctx
, FILE *out
,
1863 struct cuda_array_info
*array
, __isl_keep isl_qpolynomial
**qp
)
1868 fprintf(out
, "%s[", array
->name
);
1869 prn
= isl_printer_to_file(ctx
, out
);
1870 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1871 for (i
= 0; i
+ 1 < array
->n_index
; ++i
)
1872 prn
= isl_printer_print_str(prn
, "(");
1873 for (i
= 0; i
< array
->n_index
; ++i
) {
1875 prn
= isl_printer_print_str(prn
, ") * (");
1876 prn
= isl_printer_print_pw_aff(prn
,
1877 array
->local_bound
[i
]);
1878 prn
= isl_printer_print_str(prn
, ") + ");
1880 prn
= isl_printer_print_qpolynomial(prn
, qp
[i
]);
1882 isl_printer_free(prn
);
1886 /* Print an access to the element in the shared memory copy of the
1887 * given array reference group that corresponds to element [qps[0]][qps[1]]...
1888 * of the original array.
1889 * Since the array in shared memory is just a shifted copy of part
1890 * of the original array, we simply need to subtract the lower bound,
1891 * which was computed in can_tile_for_shared_memory.
1892 * If any of the indices is strided, then we first add
1893 * shared_bound[i].shift and divide by shared_bound[i].stride.
1895 static void print_private_local_index(isl_ctx
*ctx
, FILE *out
,
1896 struct cuda_array_ref_group
*group
,
1897 __isl_keep isl_qpolynomial
**qps
, __isl_keep isl_set
*domain
)
1901 struct cuda_array_info
*array
= group
->array
;
1902 struct cuda_array_bound
*bounds
= group
->private_bound
;
1904 print_array_name(out
, group
);
1905 for (i
= 0; i
< array
->n_index
; ++i
) {
1906 isl_qpolynomial
*qp
= isl_qpolynomial_copy(qps
[i
]);
1908 qp
= shift_index(qp
, array
, &bounds
[i
], isl_set_copy(domain
));
1911 prn
= isl_printer_to_file(ctx
, out
);
1912 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
1913 prn
= isl_printer_print_qpolynomial(prn
, qp
);
1914 isl_printer_free(prn
);
1916 isl_qpolynomial_free(qp
);
1920 /* This function is called for each leaf in the clast of the code
1921 * for copying to or from private memory.
1922 * The statement name is read_private_<array> or write_private_<array>.
1924 * The schedule iterates over the array elements, so we can use
1925 * the domain of private_sched at the current scheduling position
1926 * as the index of the array.
1928 static void print_private_copy_statement(struct gpucode_info
*code
,
1929 struct clast_user_stmt
*u
)
1931 struct cuda_gen
*gen
= code
->user
;
1934 struct cuda_array_ref_group
*group
= gen
->private_group
;
1943 isl_qpolynomial
**qp
;
1946 read
= !strncmp(u
->statement
->name
, "read", 4);
1948 domain
= extract_host_domain(u
);
1951 sched
= isl_map_copy(gen
->private_sched
);
1952 sched
= isl_map_reverse(sched
);
1953 sched
= isl_map_intersect_domain(sched
, domain
);
1954 n_in
= isl_map_dim(sched
, isl_dim_in
);
1955 n_out
= isl_map_dim(sched
, isl_dim_out
);
1956 dim
= isl_map_get_space(sched
);
1957 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, n_in
);
1958 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, n_out
);
1959 param
= parametrization(dim
, n_in
, 0, n_in
, "c");
1960 sched
= isl_map_align_params(sched
, isl_set_get_space(param
));
1961 sched
= isl_map_intersect_domain(sched
, param
);
1962 index
= isl_map_range(sched
);
1963 domain
= isl_set_copy(index
);
1964 aff
= isl_set_affine_hull(index
);
1965 domain
= isl_set_project_out(domain
, isl_dim_set
, 0, n_out
);
1967 ctx
= isl_basic_set_get_ctx(aff
);
1968 qp
= isl_alloc_array(ctx
, isl_qpolynomial
*, n_out
);
1971 for (i
= 0; i
< n_out
; ++i
) {
1975 ok
= isl_basic_set_has_defining_equality(aff
,
1976 isl_dim_set
, i
, &c
);
1978 qp
[i
] = isl_qpolynomial_from_constraint(c
, isl_dim_set
, i
);
1979 qp
[i
] = isl_qpolynomial_drop_dims(qp
[i
], isl_dim_set
, 0, n_out
);
1982 print_indent(code
->dst
, code
->indent
);
1984 print_private_local_index(ctx
, code
->dst
, group
, qp
, domain
);
1985 fprintf(code
->dst
, " = ");
1986 print_private_global_index(ctx
, code
->dst
, group
->array
, qp
);
1988 print_private_global_index(ctx
, code
->dst
, group
->array
, qp
);
1989 fprintf(code
->dst
, " = ");
1990 print_private_local_index(ctx
, code
->dst
, group
, qp
, domain
);
1992 fprintf(code
->dst
, ";\n");
1994 for (i
= 0; i
< n_out
; ++i
)
1995 isl_qpolynomial_free(qp
[i
]);
1998 isl_basic_set_free(aff
);
1999 isl_set_free(domain
);
2002 static void print_private_access(struct cuda_gen
*gen
,
2003 __isl_keep isl_set
*shared_domain
, __isl_take isl_set
*access
,
2004 const char *type
, struct cuda_array_ref_group
*group
)
2006 const char *array_name
;
2009 unsigned nvar
= isl_set_dim(access
, isl_dim_set
);
2010 isl_union_map
*usched
;
2012 if (isl_set_fast_is_empty(access
)) {
2013 isl_set_free(access
);
2017 ctx
= isl_set_get_ctx(access
);
2018 array_name
= isl_set_get_tuple_name(access
);
2019 name
= isl_alloc_array(ctx
, char,
2020 strlen(type
) + sizeof("_private_") + strlen(array_name
) + 20);
2021 if (group
->array
->n_group
> 1)
2022 sprintf(name
, "%s_private_%s_%d", type
, array_name
, group
->nr
);
2024 sprintf(name
, "%s_private_%s", type
, array_name
);
2025 access
= isl_set_set_tuple_name(access
, name
);
2028 gen
->private_sched
= shift_access(access
, group
);
2029 gen
->private_group
= group
;
2031 usched
= isl_union_map_from_map(isl_map_copy(gen
->private_sched
));
2032 print_shared_body(gen
, shared_domain
, usched
, nvar
,
2033 &print_private_copy_statement
, 1);
2034 isl_union_map_free(usched
);
2036 isl_map_free(gen
->private_sched
);
2039 /* Print code for reading into or writing from private memory
2040 * the given array reference group.
2042 * sched maps the original iteration domains to the shared memory tile loops.
2044 static void print_group_private_accesses(struct cuda_gen
*gen
,
2045 struct cuda_array_ref_group
*group
,
2046 const char *type
, __isl_keep isl_set
*shared_domain
,
2047 unsigned first_shared
, int shared_len
, __isl_keep isl_union_map
*sched
)
2050 isl_union_map
*access
;
2051 isl_union_set
*uset
;
2052 isl_set
*access_set
;
2054 if (!group
->private_bound
)
2057 read
= !strcmp(type
, "read");
2059 access
= group_access_relation(group
, read
, !read
);
2060 access
= isl_union_map_apply_domain(access
, isl_union_map_copy(sched
));
2061 access
= isl_union_map_intersect(access
,
2062 isl_union_map_copy(gen
->private_access
));
2063 uset
= isl_union_map_range(access
);
2065 if (isl_union_set_is_empty(uset
)) {
2066 isl_union_set_free(uset
);
2070 access_set
= isl_set_from_union_set(uset
);
2071 access_set
= isl_set_coalesce(access_set
);
2072 access_set
= isl_set_eliminate(access_set
, isl_dim_param
,
2073 first_shared
+ shared_len
,
2074 gen
->shared_len
- shared_len
);
2076 print_private_access(gen
, shared_domain
, access_set
, type
, group
);
2079 /* Print code for reading into or writing from private memory at
2080 * the given level (-1 for innermost).
2082 * If we are not printing at the innermost level, then the dimensionality
2083 * of shared_domain may be smaller than gen->shared_len.
2084 * As the rest of the code assumes that the domain of access has
2085 * gen->shared_len dimensions, we therefore may need to embed this domain
2086 * in a higher dimensional space after intersection with shared_domain.
2088 * This code is very similar to print_shared_accesses.
2089 * The main difference is that we to take into account gen->private_access.
2091 static void print_private_accesses(struct cuda_gen
*gen
,
2092 __isl_keep isl_set
*shared_domain
, __isl_keep isl_union_map
*access
,
2093 const char *type
, int level
)
2098 int shared_len
= isl_set_dim(shared_domain
, isl_dim_set
);
2099 unsigned first_shared
;
2100 isl_union_map
*sched
;
2102 shared_domain
= isl_set_copy(shared_domain
);
2103 sched
= isl_union_map_copy(gen
->tiled_sched
);
2104 dim
= isl_union_map_get_space(sched
);
2105 first_shared
= isl_space_dim(dim
, isl_dim_param
);
2106 proj
= projection(dim
, gen
->tiled_len
, shared_len
);
2107 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
2108 sched
= isl_union_map_intersect_range(sched
,
2109 isl_union_set_from_set(isl_set_copy(shared_domain
)));
2110 if (shared_len
!= gen
->shared_len
) {
2111 dim
= isl_union_map_get_space(sched
);
2112 proj
= projection(dim
, gen
->shared_len
, shared_len
);
2113 proj
= isl_map_reverse(proj
);
2114 shared_domain
= isl_set_apply(shared_domain
,
2115 isl_map_copy(proj
));
2116 sched
= isl_union_map_apply_range(sched
,
2117 isl_union_map_from_map(proj
));
2120 for (i
= 0; i
< gen
->n_array
; ++i
) {
2121 struct cuda_array_info
*array
= &gen
->array
[i
];
2123 if (gen
->array
[i
].print_shared_level
!= level
)
2126 for (j
= 0; j
< array
->n_group
; ++j
)
2127 print_group_private_accesses(gen
, array
->groups
[j
],
2128 type
, shared_domain
,
2129 first_shared
, shared_len
, sched
);
2132 isl_union_map_free(sched
);
2133 isl_set_free(shared_domain
);
2136 /* Set unroll[j] if the input dimension j is involved in
2137 * the index expression represented by bmap.
2139 static int check_unroll(__isl_take isl_basic_map
*bmap
, void *user
)
2142 int n_in
= isl_basic_map_dim(bmap
, isl_dim_in
);
2143 int n_out
= isl_basic_map_dim(bmap
, isl_dim_out
);
2146 for (i
= 0; i
< n_out
; ++i
) {
2150 ok
= isl_basic_map_has_defining_equality(bmap
,
2151 isl_dim_out
, i
, &c
);
2153 for (j
= 0; j
< n_in
; ++j
)
2154 if (isl_constraint_involves_dims(c
, isl_dim_in
, j
, 1))
2156 isl_constraint_free(c
);
2159 isl_basic_map_free(bmap
);
2163 /* Given an array pos mapping input dimensions to the corresponding
2164 * output dimension, construct the corresponding map.
2166 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
2171 isl_basic_map
*bmap
;
2173 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
2174 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
2175 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
2177 for (i
= 0; i
< len
; ++i
) {
2178 c
= isl_equality_alloc(isl_space_copy(dim
));
2179 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
2180 isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
], 1);
2181 bmap
= isl_basic_map_add_constraint(bmap
, c
);
2183 isl_space_free(dim
);
2185 return isl_map_from_basic_map(bmap
);
2188 /* Find all loops involved in any of the index expressions for any of
2189 * the private accesses, move them innermost and then mark them as
2190 * requiring unrolling by setting gen->first_unroll.
2191 * The loops involved should all be parallel because of the checks
2192 * we performed in check_private_group_access. Moving them innermost
2193 * is therefore a valid transformation.
2195 static __isl_give isl_union_map
*interchange_for_unroll(struct cuda_gen
*gen
,
2196 __isl_take isl_union_map
*sched
)
2199 int unroll
[gen
->thread_tiled_len
];
2200 int perm
[gen
->thread_tiled_len
];
2203 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
2205 gen
->first_unroll
= -1;
2207 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
2209 for (i
= 0; i
< gen
->n_array
; ++i
) {
2210 struct cuda_array_info
*array
= &gen
->array
[i
];
2212 for (j
= 0; j
< array
->n_group
; ++j
) {
2213 isl_union_map
*access
;
2216 if (!array
->groups
[j
]->private_bound
)
2219 access
= group_access_relation(array
->groups
[j
], 1, 1);
2220 access
= isl_union_map_apply_domain(access
,
2221 isl_union_map_copy(sched
));
2223 acc
= isl_map_from_union_map(access
);
2224 isl_map_foreach_basic_map(acc
, &check_unroll
, unroll
);
2230 for (i
= 0; i
< gen
->shared_len
; ++i
)
2234 for (i
= gen
->shared_len
; i
< len
; ++i
)
2241 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
2246 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
2249 gen
->first_unroll
= 1 + j
;
2250 for (i
= 0; i
< len
; ++i
)
2254 dim
= isl_union_map_get_space(sched
);
2255 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
2256 sched
= isl_union_map_apply_range(sched
,
2257 isl_union_map_from_map(permute
));
2262 /* This function is called for each leaf in the clast of the kernel code.
2263 * We first specialize the schedule to the site of the leaf and
2264 * print code for reading into shared memory, performing the actual
2265 * computations and writing from shared memory, with the required
2268 static void print_kernel_user(struct gpucode_info
*code
,
2269 struct clast_user_stmt
*u
)
2271 struct cuda_gen
*gen
= code
->user
;
2272 isl_set
*shared_domain
;
2274 shared_domain
= extract_entire_host_domain(u
);
2276 print_shared_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2278 print_private_accesses(gen
, shared_domain
, gen
->read
, "read", -1);
2280 print_shared_body(gen
, shared_domain
, gen
->local_sched
,
2281 gen
->thread_tiled_len
, &print_statement
,
2284 print_private_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2286 print_indent(gen
->cuda
.kernel_c
, gen
->kernel_code
.indent
);
2287 fprintf(gen
->cuda
.kernel_c
, "__syncthreads();\n");
2289 print_shared_accesses(gen
, shared_domain
, gen
->write
, "write", -1);
2291 isl_set_free(shared_domain
);
2294 /* Check if we need to perform any copying to shared memory at this level
2295 * and if so, print the copying instructions.
2296 * Any array for which we are allowed to print copying instructions at
2297 * this level, but haven't done so already, is printed.
2299 static void print_kernel_for_head(struct gpucode_info
*code
,
2300 struct clast_for
*f
)
2303 struct cuda_gen
*gen
= code
->user
;
2308 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2309 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2311 for (i
= 0; i
< gen
->n_array
; ++i
) {
2312 if (gen
->array
[i
].print_shared_level
>= 0)
2314 if (gen
->array
[i
].last_shared
> level
)
2316 gen
->array
[i
].print_shared_level
= level
;
2321 print_shared_accesses(gen
, domain
, gen
->read
, "read", level
);
2322 print_private_accesses(gen
, domain
, gen
->read
, "read", level
);
2325 isl_set_free(domain
);
2328 /* Print instructions for copying from shared memory for each array
2329 * for which print_kernel_for_head has added copying instructions
2332 static void print_kernel_for_foot(struct gpucode_info
*code
,
2333 struct clast_for
*f
)
2336 struct cuda_gen
*gen
= code
->user
;
2341 domain
= isl_set_from_cloog_domain(cloog_domain_copy(f
->domain
));
2342 level
= isl_set_dim(domain
, isl_dim_set
) - 1;
2344 for (i
= 0; i
< gen
->n_array
; ++i
) {
2345 if (gen
->array
[i
].print_shared_level
!= level
)
2352 print_private_accesses(gen
, domain
, gen
->write
, "write", level
);
2353 print_shared_accesses(gen
, domain
, gen
->write
, "write", level
);
2356 isl_set_free(domain
);
2359 /* Use CLooG to generate code for the outer gen->shared_first loops
2360 * of the local schedule "sched".
2361 * The pretty printing of this code is handled by gpu_print_host_stmt,
2362 * which calls print_kernel_user for each iteration of the shared tile loops.
2364 static void print_cloog_kernel_body(struct cuda_gen
*gen
,
2365 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*sched
)
2368 CloogOptions
*options
;
2369 CloogDomain
*cloog_context
;
2370 CloogUnionDomain
*ud
;
2372 struct clast_stmt
*stmt
;
2375 sched
= isl_union_map_copy(sched
);
2376 sched
= isl_union_map_align_params(sched
, isl_set_get_space(context
));
2378 options
= cloog_options_malloc(gen
->state
);
2379 options
->language
= LANGUAGE_C
;
2380 options
->strides
= 1;
2382 options
->stop
= gen
->shared_len
;
2383 options
->f
= gen
->tiled_len
;
2384 options
->l
= gen
->tiled_len
;
2385 options
->save_domains
= 1;
2386 options
->noscalars
= 1;
2388 ud
= cloog_union_domain_from_isl_union_map(sched
);
2389 for (i
= 0; i
< gen
->shared_len
; ++i
) {
2390 snprintf(name
, sizeof(name
), "g%d", i
);
2391 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
2393 cloog_context
= cloog_domain_from_isl_set(isl_set_copy(context
));
2394 input
= cloog_input_alloc(cloog_context
, ud
);
2396 stmt
= cloog_clast_create_from_input(input
, options
);
2398 gen
->kernel_code
.indent
= 4;
2399 gen
->kernel_code
.dst
= gen
->cuda
.kernel_c
;
2400 gen
->kernel_code
.print_user_stmt
= NULL
;
2401 gen
->kernel_code
.print_user_stmt_list
= &print_kernel_user
;
2402 gen
->kernel_code
.print_for_head
= &print_kernel_for_head
;
2403 gen
->kernel_code
.print_for_foot
= &print_kernel_for_foot
;
2404 gen
->kernel_code
.user
= gen
;
2405 gpu_print_host_stmt(&gen
->kernel_code
, stmt
);
2407 cloog_clast_free(stmt
);
2408 cloog_options_free(options
);
2411 static void print_kernel_iterators(struct cuda_gen
*gen
)
2414 const char *block_dims
[] = { "blockIdx.x", "blockIdx.y" };
2415 const char *thread_dims
[] = { "threadIdx.x", "threadIdx.y",
2418 if (gen
->n_grid
> 0) {
2419 print_indent(gen
->cuda
.kernel_c
, 4);
2420 fprintf(gen
->cuda
.kernel_c
, "int ");
2421 for (i
= 0; i
< gen
->n_grid
; ++i
) {
2423 fprintf(gen
->cuda
.kernel_c
, ", ");
2424 fprintf(gen
->cuda
.kernel_c
, "b%d = %s",
2425 i
, block_dims
[gen
->n_grid
- 1 - i
]);
2427 fprintf(gen
->cuda
.kernel_c
, ";\n");
2430 if (gen
->n_block
> 0) {
2431 print_indent(gen
->cuda
.kernel_c
, 4);
2432 fprintf(gen
->cuda
.kernel_c
, "int ");
2433 for (i
= 0; i
< gen
->n_block
; ++i
) {
2435 fprintf(gen
->cuda
.kernel_c
, ", ");
2436 fprintf(gen
->cuda
.kernel_c
, "t%d = %s",
2437 i
, thread_dims
[gen
->n_block
- 1 - i
]);
2439 fprintf(gen
->cuda
.kernel_c
, ";\n");
2443 static void print_group_shared_array(struct cuda_gen
*gen
,
2444 struct cuda_array_ref_group
*group
)
2447 struct cuda_array_bound
*bounds
;
2449 bounds
= group
->private_bound
;
2451 bounds
= group
->shared_bound
;
2455 print_indent(gen
->cuda
.kernel_c
, 4);
2456 fprintf(gen
->cuda
.kernel_c
, "%s%s ",
2457 group
->private_bound
? "" : "__shared__ ", group
->array
->type
);
2458 print_array_name(gen
->cuda
.kernel_c
, group
);
2459 for (j
= 0; j
< group
->array
->n_index
; ++j
) {
2460 fprintf(gen
->cuda
.kernel_c
, "[");
2461 isl_int_print(gen
->cuda
.kernel_c
, bounds
[j
].size
, 0);
2462 fprintf(gen
->cuda
.kernel_c
, "]");
2464 fprintf(gen
->cuda
.kernel_c
, ";\n");
2467 static void print_shared_arrays(struct cuda_gen
*gen
)
2471 for (i
= 0; i
< gen
->n_array
; ++i
) {
2472 struct cuda_array_info
*array
= &gen
->array
[i
];
2474 for (j
= 0; j
< array
->n_group
; ++j
)
2475 print_group_shared_array(gen
, array
->groups
[j
]);
2479 static void print_kernel_body(struct cuda_gen
*gen
,
2480 __isl_keep isl_set
*host_domain
, __isl_keep isl_union_map
*sched
)
2484 context
= isl_set_copy(host_domain
);
2485 context
= parametrize(context
, 0, gen
->tile_first
, "h");
2486 context
= isl_set_project_out(context
, isl_dim_set
, 0, gen
->tile_first
);
2487 context
= add_bounded_parameters(context
,
2488 gen
->n_grid
, gen
->grid_dim
, "b");
2490 print_kernel_iterators(gen
);
2491 print_shared_arrays(gen
);
2493 fprintf(gen
->cuda
.kernel_c
, "\n");
2495 print_cloog_kernel_body(gen
, context
, sched
);
2497 isl_set_free(context
);
2500 /* Given a constraint
2502 * a(p,i) + j = g f(e)
2504 * or -a(p,i) - j = g f(e) if sign < 0,
2505 * store a(p,i) in bound->shift and g (stride) in bound->stride.
2506 * a(p,i) is assumed to be an expression in only the parameters.
2508 static void extract_stride(__isl_keep isl_constraint
*c
,
2509 struct cuda_array_bound
*bound
, isl_int stride
, int sign
)
2516 isl_qpolynomial
*qp
;
2518 isl_int_set(bound
->stride
, stride
);
2520 dim
= isl_constraint_get_space(c
);
2521 dim
= isl_space_params(dim
);
2523 nparam
= isl_space_dim(dim
, isl_dim_param
);
2527 isl_int_set_si(one
, 1);
2529 isl_constraint_get_constant(c
, &v
);
2532 qp
= isl_qpolynomial_rat_cst(isl_space_copy(dim
), v
, one
);
2534 for (i
= 0; i
< nparam
; ++i
) {
2535 isl_qpolynomial
*t
, *p
;
2537 isl_constraint_get_coefficient(c
, isl_dim_param
, i
, &v
);
2538 if (isl_int_is_zero(v
))
2542 t
= isl_qpolynomial_rat_cst(isl_space_copy(dim
), v
, one
);
2543 p
= isl_qpolynomial_var(isl_space_copy(dim
), isl_dim_param
, i
);
2544 t
= isl_qpolynomial_mul(t
, p
);
2545 qp
= isl_qpolynomial_add(qp
, t
);
2548 isl_space_free(dim
);
2555 /* Given an equality constraint of a map with a single output dimension j,
2556 * check if the constraint is of the form
2558 * a(p,i) + j = g f(e)
2560 * with a(p,i) an expression in the parameters and input dimensions
2561 * and f(e) an expression in the existentially quantified variables.
2562 * If so, and if g is larger than any such g from a previously considered
2563 * constraint, then call extract_stride. to record the stride information
2566 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
2571 struct cuda_array_bound
*bound
= user
;
2574 isl_int_init(stride
);
2576 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2577 isl_constraint_get_coefficient(c
, isl_dim_out
, 0, &v
);
2579 if (n_div
&& (isl_int_is_one(v
) || isl_int_is_negone(v
))) {
2580 int s
= isl_int_sgn(v
);
2581 isl_int_set_si(stride
, 0);
2582 for (i
= 0; i
< n_div
; ++i
) {
2583 isl_constraint_get_coefficient(c
, isl_dim_div
, i
, &v
);
2584 isl_int_gcd(stride
, stride
, v
);
2586 if (!isl_int_is_zero(stride
) &&
2587 isl_int_gt(stride
, bound
->stride
))
2588 extract_stride(c
, bound
, stride
, s
);
2591 isl_int_clear(stride
);
2594 isl_constraint_free(c
);
2598 /* Given contraints on an array index i, check if we can find
2599 * a shift a(p) and a stride g such that
2601 * a(p) + i = 0 mod g
2603 * If so, record the information in bound and apply the mapping
2604 * i -> (i + a(p))/g to the array index in bounds and return
2605 * the new constraints.
2606 * If not, simply return the original constraints.
2608 static __isl_give isl_basic_map
*check_stride(struct cuda_gen
*gen
,
2609 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2613 isl_basic_map
*shift
;
2614 isl_qpolynomial
*qp
, *t
;
2617 isl_int_set_si(bound
->stride
, -1);
2619 aff
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
2621 isl_basic_map_foreach_constraint(aff
, &check_stride_constraint
, bound
);
2623 isl_basic_map_free(aff
);
2625 if (isl_int_is_neg(bound
->stride
))
2628 qp
= isl_qpolynomial_copy(bound
->shift
);
2629 qp
= isl_qpolynomial_add_dims(qp
, isl_dim_set
, 1);
2630 dim
= isl_qpolynomial_get_space(qp
);
2631 t
= isl_qpolynomial_var(isl_space_copy(dim
), isl_dim_set
, 0);
2632 qp
= isl_qpolynomial_add(qp
, t
);
2634 isl_int_set_si(one
, 1);
2635 t
= isl_qpolynomial_rat_cst(dim
, one
, bound
->stride
);
2637 qp
= isl_qpolynomial_mul(qp
, t
);
2638 shift
= isl_basic_map_from_qpolynomial(qp
);
2640 bound
->shift_map
= isl_basic_map_copy(shift
);
2641 bounds
= isl_basic_map_apply_range(bounds
, shift
);
2646 struct cuda_size_info
{
2647 isl_basic_set
*bset
;
2648 struct cuda_array_bound
*bound
;
2652 /* Given a constraint from the basic set describing the bounds on
2653 * an array index, check if it is a lower bound, say m i >= b(x), and,
2654 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2655 * upper bound. If so, and if this bound is smaller than any bound
2656 * derived from earlier constraints, set the size to this bound on
2657 * the expression and the lower bound to ceil(b(x)/m).
2659 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2661 struct cuda_size_info
*size
= user
;
2666 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2667 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2669 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
)) {
2670 isl_constraint_free(c
);
2676 isl_constraint_get_coefficient(c
, isl_dim_set
, size
->pos
, &v
);
2678 if (isl_int_is_pos(v
)) {
2681 enum isl_lp_result res
;
2683 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2684 aff
= isl_aff_ceil(aff
);
2686 lb
= isl_aff_copy(aff
);
2688 aff
= isl_aff_neg(aff
);
2689 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_set
, size
->pos
, 1);
2691 res
= isl_basic_set_max(size
->bset
, aff
, &v
);
2694 if (res
== isl_lp_ok
) {
2695 isl_int_add_ui(v
, v
, 1);
2696 if (isl_int_is_neg(size
->bound
->size
) ||
2697 isl_int_lt(v
, size
->bound
->size
)) {
2698 isl_int_set(size
->bound
->size
, v
);
2699 lb
= isl_aff_drop_dims(lb
, isl_dim_set
,
2701 isl_aff_free(size
->bound
->lb
);
2702 size
->bound
->lb
= isl_aff_copy(lb
);
2709 isl_constraint_free(c
);
2714 /* Given a basic map "bounds" that maps parameters and input dimensions
2715 * to a single output dimension, look for an expression in the parameters
2716 * and input dimensions such that the range of the output dimension shifted
2717 * by this expression is a constant.
2719 * In particular, we currently only consider lower bounds on the output
2720 * dimension as candidate expressions.
2722 static int compute_array_dim_size(struct cuda_gen
*gen
,
2723 struct cuda_array_bound
*bound
, __isl_take isl_basic_map
*bounds
)
2725 struct cuda_size_info size
;
2727 bounds
= check_stride(gen
, bound
, bounds
);
2729 isl_int_set_si(bound
->size
, -1);
2733 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2734 size
.bset
= isl_basic_map_wrap(bounds
);
2735 size
.bset
= isl_basic_set_flatten(size
.bset
);
2736 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2738 isl_basic_set_free(size
.bset
);
2740 return isl_int_is_nonneg(bound
->size
) ? 0 : -1;
2743 /* Check if we can find a shared memory tile for the given array
2744 * based on the given accesses, and if so, put the results
2745 * in array->shared_bound.
2747 * We project the accesses on each index in turn and look for a parametric
2748 * offset such that the size is constant.
2750 static int can_tile_for_shared_memory(struct cuda_gen
*gen
,
2751 struct cuda_array_info
*array
, __isl_keep isl_map
*access
,
2752 struct cuda_array_bound
*bounds
)
2756 for (i
= 0; i
< array
->n_index
; ++i
) {
2758 isl_basic_map
*hull
;
2760 access_i
= isl_map_copy(access
);
2761 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2762 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2763 1, array
->n_index
- (i
+ 1));
2764 access_i
= isl_map_compute_divs(access_i
);
2765 hull
= isl_map_simple_hull(access_i
);
2766 if (compute_array_dim_size(gen
, &bounds
[i
], hull
) < 0)
2773 /* Construct a map with input the shared tile loops and the loops that
2774 * will be wrapped around the threads that relates these later loops
2775 * to the thread indices and the projects them out.
2777 static __isl_give isl_map
*compute_privatization(struct cuda_gen
*gen
)
2785 dim
= isl_union_map_get_space(gen
->shared_sched
);
2787 if (gen
->options
->wrap
)
2788 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2789 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2791 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2792 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2796 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2797 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2800 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2801 priv
= isl_map_intersect_range(priv
, par
);
2803 dim
= isl_map_get_space(priv
);
2804 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2805 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2806 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2809 priv
= isl_map_apply_range(priv
, proj
);
2814 /* Construct a map from domain_dim to domain_dim that increments
2815 * the dimension at position "pos" and leaves all other dimensions
2818 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2821 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2823 isl_basic_map
*next
;
2825 dim
= isl_space_map_from_set(domain_dim
);
2826 next
= isl_basic_map_universe(isl_space_copy(dim
));
2828 for (i
= 0; i
< len
; ++i
) {
2831 c
= isl_equality_alloc(isl_space_copy(dim
));
2832 isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2833 isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2835 isl_constraint_set_constant_si(c
, 1);
2836 next
= isl_basic_map_add_constraint(next
, c
);
2839 isl_space_free(dim
);
2841 return isl_map_from_basic_map(next
);
2844 /* Check if the given access is coalesced.
2845 * That is, check whether incrementing the dimension that will get
2846 * wrapped over the last thread index results in incrementing
2847 * the last array index.
2849 * This function is only called for access relations without reuse.
2851 static int access_is_coalesced(struct cuda_gen
*gen
,
2852 __isl_keep isl_union_map
*access
)
2855 isl_map
*access_map
;
2856 isl_map
*next_thread_x
;
2857 isl_map
*next_element
;
2861 access
= isl_union_map_copy(access
);
2862 access
= isl_union_map_apply_domain(access
,
2863 isl_union_map_copy(gen
->tiled_sched
));
2864 access_map
= isl_map_from_union_map(access
);
2866 dim
= isl_map_get_space(access_map
);
2867 dim
= isl_space_domain(dim
);
2868 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2870 dim
= isl_map_get_space(access_map
);
2871 dim
= isl_space_range(dim
);
2872 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2874 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2875 map
= isl_map_apply_range(map
, access_map
);
2877 coalesced
= isl_map_is_subset(map
, next_element
);
2879 isl_map_free(next_element
);
2885 /* For the given array reference group, check whether the access is private
2886 * to the thread. That is, check that any given array element
2887 * is only accessed by a single thread.
2888 * We compute an access relation that maps the shared tile loop iterators
2889 * and the shared point loop iterators that will be wrapped over the
2890 * threads to the array elements.
2891 * We actually check that those iterators that will be wrapped
2892 * partition the array space. This check is stricter than necessary
2893 * since several iterations may be mapped onto the same thread
2894 * and then they could be allowed to access the same memory elements,
2895 * but our check does not allow this situation.
2897 * We also check that the index expression only depends on parallel
2898 * loops. That way, we can move those loops innermost and unroll them.
2899 * Again, we use a test that is stricter than necessary.
2900 * We actually check whether the index expression only depends
2901 * on the iterators that are wrapped over the threads.
2902 * These are necessarily parallel, but there may be more parallel loops.
2904 * Combining the injectivity of the first test with the single-valuedness
2905 * of the second test, we simply test for bijectivity.
2907 * If it turns out we can use registers, we compute the private memory
2908 * tile size using can_tile_for_shared_memory, after introducing a dependence
2909 * on the thread indices.
2911 * Before performing any of the above computations, we first check
2912 * if there is any reuse on the reference group. If not, we simply
2913 * return. If, moreover, the access is coalesced then we also remove
2914 * the shared memory tiling since we should just use global memory instead.
2916 static void check_private_group_access(struct cuda_gen
*gen
,
2917 struct cuda_array_ref_group
*group
)
2920 isl_union_map
*access
;
2921 int n_index
= group
->array
->n_index
;
2923 access
= group_access_relation(group
, 1, 1);
2924 if (isl_union_map_is_injective(access
)) {
2925 if (group
->shared_bound
&& access_is_coalesced(gen
, access
)) {
2926 free_bound_list(group
->shared_bound
, n_index
);
2927 group
->shared_bound
= NULL
;
2929 isl_union_map_free(access
);
2932 access
= isl_union_map_apply_domain(access
,
2933 isl_union_map_copy(gen
->shared_sched
));
2935 acc
= isl_map_from_union_map(access
);
2937 if (!isl_map_is_bijective(acc
)) {
2942 group
->private_bound
= create_bound_list(gen
->ctx
, n_index
);
2943 acc
= isl_map_align_params(acc
, isl_map_get_space(gen
->privatization
));
2944 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2945 if (!can_tile_for_shared_memory(gen
, group
->array
, acc
,
2946 group
->private_bound
)) {
2947 free_bound_list(group
->private_bound
, n_index
);
2948 group
->private_bound
= NULL
;
2954 /* Look for the last shared tile loop that affects the offset of the
2955 * shared or private tile and store the result in array->last_shared.
2957 static void set_last_shared(struct cuda_gen
*gen
,
2958 struct cuda_array_ref_group
*group
)
2961 struct cuda_array_bound
*bounds
;
2962 unsigned first_shared
= gen
->first_shared
;
2963 int n_index
= group
->array
->n_index
;
2965 bounds
= group
->private_bound
;
2967 bounds
= group
->shared_bound
;
2971 for (j
= gen
->shared_len
- 1; j
>= 0; --j
) {
2972 for (i
= 0; i
< n_index
; ++i
) {
2974 isl_qpolynomial
*shift
;
2977 if (isl_aff_involves_dims(lb
, isl_dim_param
,
2978 first_shared
+ j
, 1))
2981 shift
= bounds
[i
].shift
;
2984 if (isl_qpolynomial_involves_dims(shift
, isl_dim_param
,
2985 first_shared
+ j
, 1))
2991 group
->array
->last_shared
= j
;
2994 /* Compute the sizes of all private arrays for the current kernel,
2995 * as well as the offsets of the private pieces in the original arrays.
2996 * If we cannot or don't want to privatize a given array group,
2997 * we use the shared memory tile sizes computed in
2998 * compute_group_shared_bound instead.
3000 * If a given Array only has a single reference group and if we have
3001 * been able to find a privated or shared tile,
3002 * we also look for the last shared tile loop that affects the offset
3003 * (and therefore the array tile) and store the result in array->last_shared.
3005 * A privatized copy of all access relations from reference groups that
3006 * are mapped to private memory is stored in gen->privatization.
3008 static void compute_private_size(struct cuda_gen
*gen
)
3011 isl_union_map
*private;
3013 if (!gen
->options
->use_private_memory
)
3016 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
3018 for (i
= 0; i
< gen
->n_array
; ++i
) {
3019 struct cuda_array_info
*array
= &gen
->array
[i
];
3021 for (j
= 0; j
< array
->n_group
; ++j
) {
3022 check_private_group_access(gen
, array
->groups
[j
]);
3024 if (!array
->groups
[j
]->private_bound
)
3027 private = isl_union_map_union(private,
3028 group_access_relation(array
->groups
[j
], 1, 1));
3031 array
->last_shared
= gen
->shared_len
- 1;
3032 array
->print_shared_level
= -1;
3034 if (array
->n_group
!= 1)
3036 set_last_shared(gen
, array
->groups
[0]);
3039 if (isl_union_map_is_empty(private))
3040 isl_union_map_free(private);
3042 isl_union_map
*priv
;
3044 private = isl_union_map_apply_domain(private,
3045 isl_union_map_copy(gen
->shared_sched
));
3046 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
3047 private = isl_union_map_apply_domain(private, priv
);
3048 gen
->private_access
= private;
3052 /* Fill up the groups array with singleton groups, i.e., one group
3053 * per reference, initializing the array, access, write and refs fields.
3054 * In particular the access field is initialized to the scheduled
3055 * access relation of the array reference.
3057 * Return the number of elements initialized, i.e., the number of
3058 * active references in the current kernel.
3060 static int populate_array_references(struct cuda_gen
*gen
,
3061 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
,
3062 struct cuda_array_ref_group
**groups
)
3066 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3069 for (i
= 0; i
< array
->n_ref
; ++i
) {
3070 isl_union_map
*umap
;
3072 struct cuda_array_ref_group
*group
;
3073 struct cuda_stmt_access
*access
= array
->refs
[i
];
3075 map
= isl_map_copy(access
->access
);
3076 umap
= isl_union_map_from_map(map
);
3077 umap
= isl_union_map_apply_domain(umap
,
3078 isl_union_map_copy(sched
));
3080 if (isl_union_map_is_empty(umap
)) {
3081 isl_union_map_free(umap
);
3085 map
= isl_map_from_union_map(umap
);
3087 group
= isl_calloc_type(ctx
, struct cuda_array_ref_group
);
3089 group
->array
= array
;
3090 group
->access
= map
;
3091 group
->write
= access
->write
;
3092 group
->refs
= &array
->refs
[i
];
3094 groups
[n
++] = group
;
3100 static void free_array_ref_group(struct cuda_array_ref_group
*group
,
3105 free_bound_list(group
->shared_bound
, n_index
);
3106 free_bound_list(group
->private_bound
, n_index
);
3107 isl_map_free(group
->access
);
3112 /* If two groups have overlapping access relations and if one of them
3113 * involves a write, then merge the two groups into one.
3115 * We keep track of the grouping in "leader". leader[j] points to
3116 * an earlier group array element that belongs to the same group,
3117 * or the array element j itself if this element is the first in the group.
3119 * Return the number of group leaders.
3121 static int group_overlapping_writes(int n
,
3122 struct cuda_array_ref_group
**groups
, int *leader
)
3127 for (i
= 0; i
< n
; ++i
) {
3129 groups
[l
]->n_ref
= 1;
3130 for (j
= i
- 1; j
>= 0; --j
) {
3136 if (!groups
[l
]->write
&& !groups
[j
]->write
)
3139 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
3140 isl_map_copy(groups
[j
]->access
));
3141 empty
= isl_map_is_empty(map
);
3147 groups
[j
]->access
= isl_map_union(groups
[j
]->access
,
3149 groups
[j
]->write
= 1;
3150 groups
[l
]->access
= NULL
;
3151 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
3161 /* Compute the size of the shared array corresponding to the given array
3162 * array refrence group, based on the accesses from the current kernel,
3163 * as well as the offset of the shared piece in the original array.
3165 static void compute_group_shared_bound(struct cuda_gen
*gen
,
3166 struct cuda_array_info
*array
, struct cuda_array_ref_group
*group
)
3168 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
3170 if (!gen
->options
->use_shared_memory
)
3173 group
->shared_bound
= create_bound_list(ctx
, array
->n_index
);
3174 if (!can_tile_for_shared_memory(gen
, array
, group
->access
,
3175 group
->shared_bound
)) {
3176 free_bound_list(group
->shared_bound
, array
->n_index
);
3177 group
->shared_bound
= NULL
;
3181 /* Given an initial grouping of array references and shared memory tiles
3182 * for each group that allows for a shared memory tile, merge two groups
3183 * if both have a shared memory tile and if the merged group also has
3184 * a shared memory tile.
3186 * Return the number of group leaders after merging.
3188 static int group_common_shared_memory_tile(struct cuda_gen
*gen
,
3189 struct cuda_array_info
*array
, int n
,
3190 struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
3193 isl_ctx
*ctx
= isl_space_get_ctx(array
->dim
);
3195 for (i
= 0; n_group
> 1 && i
< n
; ++i
) {
3199 if (!groups
[i
]->shared_bound
)
3201 for (j
= i
- 1; j
>= 0; --j
) {
3204 struct cuda_array_bound
*shared_bound
;
3208 if (!groups
[j
]->shared_bound
)
3211 map
= isl_map_intersect(isl_map_copy(groups
[l
]->access
),
3212 isl_map_copy(groups
[j
]->access
));
3213 empty
= isl_map_is_empty(map
);
3219 map
= isl_map_union(isl_map_copy(groups
[l
]->access
),
3220 isl_map_copy(groups
[j
]->access
));
3221 shared_bound
= create_bound_list(ctx
, array
->n_index
);
3222 if (!can_tile_for_shared_memory(gen
, array
, map
,
3225 free_bound_list(shared_bound
, array
->n_index
);
3229 free_bound_list(groups
[j
]->shared_bound
,
3231 groups
[j
]->shared_bound
= shared_bound
;
3232 isl_map_free(groups
[j
]->access
);
3233 groups
[j
]->access
= map
;
3234 groups
[j
]->n_ref
+= groups
[l
]->n_ref
;
3243 /* Extract an array of array reference groups from the array of references
3244 * and the grouping information in "leader".
3246 * Store the results in array->n_group and array->groups.
3248 static void extract_array_groups(isl_ctx
*ctx
, struct cuda_array_info
*array
,
3249 int n
, struct cuda_array_ref_group
**groups
, int *leader
, int n_group
)
3253 for (i
= 2; i
< n
; ++i
)
3254 leader
[i
] = leader
[leader
[i
]];
3256 array
->n_group
= n_group
;
3257 array
->groups
= isl_alloc_array(ctx
, struct cuda_array_ref_group
*,
3259 assert(array
->groups
);
3262 for (i
= 0; i
< n
; ++i
) {
3264 struct cuda_stmt_access
**refs
;
3266 if (leader
[i
] != i
) {
3267 groups
[i
]->refs
= NULL
;
3268 free_array_ref_group(groups
[i
], array
->n_index
);
3272 refs
= isl_alloc_array(ctx
, struct cuda_stmt_access
*,
3276 for (k
= i
; k
< n
; ++k
)
3277 if (leader
[k
] == i
) {
3278 refs
[l
++] = *groups
[k
]->refs
;
3279 (*groups
[k
]->refs
)->group
= j
;
3282 groups
[i
]->refs
= refs
;
3284 array
->groups
[j
++] = groups
[i
];
3288 /* Group array references that should be considered together when
3289 * deciding whether to access them from private, shared or global memory.
3291 * In particular, if two array references overlap and if one of them
3292 * is a write, then the two references are grouped together.
3293 * Furthermore, if two groups admit a shared memory tile and if the
3294 * combination of the two also admits a shared memory tile, we merge
3297 * During the construction the group->refs field points to a single
3298 * array reference inside the array of array references, while
3299 * group->n_ref contains the number of element in leader that
3300 * (directly or indirectly) point to this group, provided the group
3303 static void group_array_references(struct cuda_gen
*gen
,
3304 struct cuda_array_info
*array
, __isl_keep isl_union_map
*sched
)
3308 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3309 struct cuda_array_ref_group
**groups
;
3312 groups
= isl_calloc_array(ctx
, struct cuda_array_ref_group
*,
3316 n
= populate_array_references(gen
, array
, sched
, groups
);
3318 leader
= isl_alloc_array(ctx
, int, n
);
3321 n_group
= group_overlapping_writes(n
, groups
, leader
);
3323 for (i
= 0; i
< n
; ++i
)
3325 compute_group_shared_bound(gen
, array
, groups
[i
]);
3327 n_group
= group_common_shared_memory_tile(gen
, array
, n
, groups
,
3330 extract_array_groups(ctx
, array
, n
, groups
, leader
, n_group
);
3336 /* Take tiled_sched, project it onto the shared tile loops and
3337 * the loops that will be wrapped over the threads,
3338 * parametrize the shared tile loops and store the result in gen->shared_sched.
3339 * The position of the first of these parameters is stored in gen->first_shared.
3340 * Also compute a projection that projects out the loops that will be
3341 * wrapped over the threads and store this projection in gen->shared_proj.
3343 static void compute_shared_sched(struct cuda_gen
*gen
)
3348 isl_union_map
*sched
;
3350 sched
= isl_union_map_copy(gen
->tiled_sched
);
3352 dim
= isl_union_map_get_space(sched
);
3353 gen
->first_shared
= isl_space_dim(dim
, isl_dim_param
);
3354 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3355 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3357 dim
= isl_union_map_get_space(sched
);
3358 par
= parametrization(dim
, gen
->shared_len
+ gen
->n_block
,
3359 0, gen
->shared_len
, "g");
3360 sched
= isl_union_map_intersect_range(sched
,
3361 isl_union_set_from_set(par
));
3363 dim
= isl_union_map_get_space(sched
);
3364 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3366 gen
->shared_sched
= sched
;
3367 gen
->shared_proj
= isl_union_map_from_map(proj
);
3370 /* Group references of all arrays in the program.
3372 static void group_references(struct cuda_gen
*gen
)
3375 isl_union_map
*sched
;
3377 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3378 isl_union_map_copy(gen
->shared_proj
));
3380 for (i
= 0; i
< gen
->n_array
; ++i
)
3381 group_array_references(gen
, &gen
->array
[i
], sched
);
3383 isl_union_map_free(sched
);
3386 /* Free all array information that is local to the current kernel.
3388 static void free_local_array_info(struct cuda_gen
*gen
)
3392 for (i
= 0; i
< gen
->n_array
; ++i
) {
3393 struct cuda_array_info
*array
= &gen
->array
[i
];
3395 for (j
= 0; j
< array
->n_group
; ++j
)
3396 free_array_ref_group(array
->groups
[j
], array
->n_index
);
3397 free(array
->groups
);
3399 if (array
->n_group
== 0)
3401 for (j
= 0; j
< gen
->array
[i
].n_index
; ++j
) {
3402 isl_pw_aff_free(gen
->array
[i
].local_bound
[j
]);
3403 gen
->array
[i
].local_bound
[j
] = NULL
;
3408 static void print_iterator_list(FILE *out
, int len
, const char *prefix
,
3414 for (i
= 0; i
< len
; ++i
) {
3418 fprintf(out
, "(%s%d)", prefix
, i
);
3420 fprintf(out
, "%s%d", prefix
, i
);
3425 /* Print an access to the element in the global memory copy of the
3426 * given array that corresponds to element [a0][a1]... of the original array.
3427 * The copy in global memory has been linearized, so we need to take
3428 * the array size into account.
3430 static void print_global_index(isl_ctx
*ctx
, FILE *out
,
3431 struct cuda_array_info
*array
)
3436 if (cuda_array_is_scalar(array
)) {
3437 fprintf(out
, "*%s", array
->name
);
3441 fprintf(out
, "%s[", array
->name
);
3442 for (i
= 0; i
+ 1 < array
->n_index
; ++i
)
3444 for (i
= 0; i
< array
->n_index
; ++i
) {
3446 prn
= isl_printer_to_file(ctx
, out
);
3447 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3448 prn
= isl_printer_print_str(prn
, ") * (");
3449 prn
= isl_printer_print_pw_aff(prn
,
3450 array
->local_bound
[i
]);
3451 prn
= isl_printer_print_str(prn
, ") + ");
3452 isl_printer_free(prn
);
3454 fprintf(out
, "a%d", i
);
3459 /* Print an access to the element in the shared memory copy of the
3460 * given array that corresponds to element [a0][a1]... of the original array.
3461 * Since the array in shared memory is just a shifted copy of part
3462 * of the original array, we simply need to subtract the lower bound,
3463 * which was computed in can_tile_for_shared_memory.
3464 * If any of the indices is strided, then we first add
3465 * shared_bound[i].shift and divide by shared_bound[i].stride.
3467 static void print_local_index(FILE *out
, struct cuda_array_ref_group
*group
)
3472 struct cuda_array_bound
*bounds
= group
->shared_bound
;
3474 ctx
= isl_space_get_ctx(group
->array
->dim
);
3475 print_array_name(out
, group
);
3476 for (i
= 0; i
< group
->array
->n_index
; ++i
) {
3477 fprintf(out
, "[(a%d", i
);
3478 if (bounds
[i
].shift
) {
3479 fprintf(out
, " + (");
3480 prn
= isl_printer_to_file(ctx
, out
);
3481 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3482 prn
= isl_printer_print_qpolynomial(prn
,
3484 prn
= isl_printer_print_str(prn
, "))/");
3485 prn
= isl_printer_print_isl_int(prn
,
3487 isl_printer_free(prn
);
3490 fprintf(out
, " - (");
3491 prn
= isl_printer_to_file(ctx
, out
);
3492 prn
= isl_printer_set_output_format(prn
, ISL_FORMAT_C
);
3493 prn
= isl_printer_print_aff(prn
, bounds
[i
].lb
);
3494 isl_printer_free(prn
);
3499 /* Print '#define's for copying data from global memory to shared
3500 * memory and back for the given array.
3502 static void print_array_copy_defines(struct cuda_gen
*gen
,
3503 struct cuda_array_ref_group
*group
)
3506 const char *type
[] = { "read", "write" };
3507 struct cuda_array_info
*array
= group
->array
;
3508 int n_index
= array
->n_index
;
3510 for (i
= 0; i
< 2; ++i
) {
3511 fprintf(gen
->cuda
.kernel_c
, "#define %s_", type
[i
]);
3512 print_array_name(gen
->cuda
.kernel_c
, group
);
3513 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 0);
3514 fprintf(gen
->cuda
.kernel_c
, " %s_", type
[i
]);
3515 print_array_name(gen
->cuda
.kernel_c
, group
);
3516 fprintf(gen
->cuda
.kernel_c
, "_");
3517 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 1);
3518 fprintf(gen
->cuda
.kernel_c
, "\n");
3520 fprintf(gen
->cuda
.kernel_c
, "#define %s_", type
[i
]);
3521 print_array_name(gen
->cuda
.kernel_c
, group
);
3522 fprintf(gen
->cuda
.kernel_c
, "_");
3523 print_iterator_list(gen
->cuda
.kernel_c
, n_index
, "a", 0);
3525 fprintf(gen
->cuda
.kernel_c
, " ");
3526 print_global_index(gen
->ctx
, gen
->cuda
.kernel_c
, array
);
3527 fprintf(gen
->cuda
.kernel_c
, " = ");
3528 print_local_index(gen
->cuda
.kernel_c
, group
);
3530 fprintf(gen
->cuda
.kernel_c
, " ");
3531 print_local_index(gen
->cuda
.kernel_c
, group
);
3532 fprintf(gen
->cuda
.kernel_c
, " = ");
3533 print_global_index(gen
->ctx
, gen
->cuda
.kernel_c
, array
);
3535 fprintf(gen
->cuda
.kernel_c
, "\n");
3539 static void print_copy_defines(struct cuda_gen
*gen
)
3543 for (i
= 0; i
< gen
->n_array
; ++i
) {
3544 struct cuda_array_info
*array
= &gen
->array
[i
];
3546 for (j
= 0; j
< array
->n_group
; ++j
) {
3547 if (array
->groups
[j
]->private_bound
)
3549 if (!array
->groups
[j
]->shared_bound
)
3551 print_array_copy_defines(gen
, array
->groups
[j
]);
3556 /* The sizes of the arrays on the host that have been computed by
3557 * extract_array_info may depend on the parameters. Use the extra
3558 * constraints on the parameters that are valid at "host_domain"
3559 * to simplify these expressions.
3561 static void localize_bounds(struct cuda_gen
*gen
,
3562 __isl_keep isl_set
*host_domain
)
3567 context
= isl_set_copy(host_domain
);
3568 context
= isl_set_params(host_domain
);
3570 for (i
= 0; i
< gen
->n_array
; ++i
) {
3571 struct cuda_array_info
*array
= &gen
->array
[i
];
3573 if (array
->n_group
== 0)
3576 for (j
= 0; j
< array
->n_index
; ++j
) {
3579 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3580 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3581 array
->local_bound
[j
] = pwaff
;
3584 isl_set_free(context
);
3587 /* Set gen->tile_len and gen->n_parallel to those of the first statement
3588 * in the statement list u.
3589 * Because of the way the schedule is constructed, the other statements
3590 * in the list, if any, should have the same values for these properties.
3592 static void set_tile_len(struct cuda_gen
*gen
, struct clast_user_stmt
*u
)
3595 struct cuda_stmt
*stmt
;
3597 nr
= atoi(u
->statement
->name
+ 2);
3598 stmt
= &gen
->stmts
[nr
];
3600 gen
->tile_len
= stmt
->tile_len
;
3601 gen
->n_parallel
= stmt
->n_parallel
;
3604 /* This function is called for each leaf in the clast of the host code.
3605 * We first specialize the schedule to the site of the leaf, compute
3606 * the size of shared memory and then print the body of host code
3607 * and the associated kernel (through a call to print_kernel_body).
3609 static void print_host_user(struct gpucode_info
*code
,
3610 struct clast_user_stmt
*u
)
3612 struct cuda_gen
*gen
= code
->user
;
3615 isl_set
*host_domain
;
3616 isl_union_map
*access
;
3617 isl_union_map
*local_sched
;
3618 isl_union_set
*arrays
;
3620 set_tile_len(gen
, u
);
3623 host_domain
= extract_entire_host_domain(u
);
3625 local_sched
= isl_union_map_intersect_range(
3626 isl_union_map_copy(gen
->sched
),
3627 isl_union_set_from_set(extend(isl_set_copy(host_domain
),
3628 gen
->untiled_len
)));
3629 access
= isl_union_map_union(isl_union_map_copy(gen
->read
),
3630 isl_union_map_copy(gen
->write
));
3631 access
= isl_union_map_apply_domain(access
,
3632 isl_union_map_copy(local_sched
));
3633 arrays
= isl_union_map_range(access
);
3635 print_indent(code
->dst
, code
->indent
);
3636 fprintf(code
->dst
, "dim3 k%d_dimBlock(", gen
->kernel_id
);
3637 print_reverse_list(code
->dst
, gen
->n_block
, gen
->block_dim
);
3638 fprintf(code
->dst
, ");\n");
3640 print_indent(code
->dst
, code
->indent
);
3641 fprintf(code
->dst
, "dim3 k%d_dimGrid(", gen
->kernel_id
);
3642 print_reverse_list(code
->dst
, gen
->n_grid
, gen
->grid_dim
);
3643 fprintf(code
->dst
, ");\n");
3645 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3646 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3647 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3649 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3651 dim
= isl_union_map_get_space(gen
->local_sched
);
3652 par
= parametrization(dim
, gen
->tiled_len
, 0, gen
->shared_len
, "g");
3653 gen
->local_sched
= isl_union_map_intersect_range(gen
->local_sched
,
3654 isl_union_set_from_set(par
));
3656 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3657 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3659 gen
->private_access
= NULL
;
3660 compute_shared_sched(gen
);
3661 gen
->privatization
= compute_privatization(gen
);
3662 group_references(gen
);
3663 compute_private_size(gen
);
3664 localize_bounds(gen
, host_domain
);
3666 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3668 print_copy_defines(gen
);
3669 print_kernel_launch(gen
, arrays
);
3671 fprintf(gen
->cuda
.kernel_c
, "{\n");
3673 print_kernel_body(gen
, host_domain
, gen
->tiled_sched
);
3675 fprintf(gen
->cuda
.kernel_c
, "}\n");
3677 free_local_array_info(gen
);
3678 isl_map_free(gen
->privatization
);
3679 isl_union_map_free(gen
->private_access
);
3680 isl_union_map_free(gen
->local_sched
);
3681 isl_union_map_free(gen
->tiled_sched
);
3682 isl_union_map_free(gen
->shared_sched
);
3683 isl_union_map_free(gen
->shared_proj
);
3684 isl_union_set_free(arrays
);
3685 isl_set_free(host_domain
);
3687 free(gen
->tile_size
);
3691 /* Use CLooG to generate code for the outer gen->tile_first loops
3692 * of the global schedule in gen->sched.
3693 * The pretty printing of this code is handled by gpu_print_host_stmt,
3694 * which calls print_host_user for each kernel invocation location.
3696 static void print_cloog_host_code(struct cuda_gen
*gen
)
3700 isl_union_map
*sched
;
3701 CloogOptions
*options
;
3702 CloogDomain
*cloog_context
;
3703 CloogUnionDomain
*ud
;
3705 struct clast_stmt
*stmt
;
3708 options
= cloog_options_malloc(gen
->state
);
3709 options
->language
= LANGUAGE_C
;
3711 options
->strides
= 1;
3712 options
->stop
= gen
->tile_first
;
3713 options
->f
= gen
->untiled_len
;
3714 options
->l
= gen
->untiled_len
;
3715 options
->save_domains
= 1;
3716 options
->noscalars
= 1;
3718 sched
= isl_union_map_copy(gen
->sched
);
3719 ud
= cloog_union_domain_from_isl_union_map(sched
);
3720 for (i
= 0; i
< options
->stop
; ++i
) {
3721 snprintf(name
, sizeof(name
), "h%d", i
);
3722 ud
= cloog_union_domain_set_name(ud
, CLOOG_SCAT
, i
, name
);
3724 context
= isl_set_copy(gen
->context
);
3725 cloog_context
= cloog_domain_from_isl_set(context
);
3726 input
= cloog_input_alloc(cloog_context
, ud
);
3728 stmt
= cloog_clast_create_from_input(input
, options
);
3730 gen
->code
.indent
= 0;
3731 gen
->code
.dst
= gen
->cuda
.host_c
;
3732 gen
->code
.print_user_stmt
= NULL
;
3733 gen
->code
.print_user_stmt_list
= &print_host_user
;
3734 gen
->code
.print_for_head
= NULL
;
3735 gen
->code
.print_for_foot
= NULL
;
3736 gen
->code
.user
= gen
;
3737 gpu_print_host_stmt(&gen
->code
, stmt
);
3739 cloog_clast_free(stmt
);
3740 cloog_options_free(options
);
3741 fprintf(gen
->cuda
.host_c
, "\n");
3744 void print_cuda_macros(struct cuda_gen
*gen
)
3746 const char *macros
=
3747 "#define cudaCheckReturn(ret) assert((ret) == cudaSuccess)\n"
3748 "#define cudaCheckKernel()"
3749 " assert(cudaGetLastError() == cudaSuccess)\n\n";
3750 fputs(macros
, gen
->cuda
.host_c
);
3753 void print_host_code(struct cuda_gen
*gen
)
3755 fprintf(gen
->cuda
.host_c
, "{\n");
3756 print_cloog_macros(gen
->cuda
.host_c
);
3757 print_cloog_macros(gen
->cuda
.kernel_c
);
3759 print_cuda_macros(gen
);
3761 declare_device_arrays(gen
);
3763 allocate_device_arrays(gen
);
3764 copy_arrays_to_device(gen
);
3767 print_cloog_host_code(gen
);
3769 copy_arrays_from_device(gen
);
3770 free_device_arrays(gen
);
3772 fprintf(gen
->cuda
.host_c
, "}\n");
3775 __isl_give isl_set
*add_context_from_str(__isl_take isl_set
*set
,
3784 ctx
= isl_set_get_ctx(set
);
3785 context
= isl_set_read_from_str(ctx
, str
, -1);
3786 context
= isl_set_align_params(context
, isl_set_get_space(set
));
3787 set
= isl_set_intersect(set
, context
);
3792 /* Return the union of all iteration domains of the gen->stmts[i].
3794 static __isl_give isl_union_set
*extract_domain(struct cuda_gen
*gen
)
3797 isl_union_set
*domain
;
3799 domain
= isl_union_set_empty(isl_set_get_space(gen
->context
));
3800 for (i
= 0; i
< gen
->n_stmts
; ++i
) {
3803 domain_i
= isl_set_copy(gen
->stmts
[i
].domain
);
3804 domain
= isl_union_set_union(domain
,
3805 isl_union_set_from_set(domain_i
));
3811 /* Information about the outermost tilable bands in the forest of bands.
3813 * tile_len and n_parallel are only sets on band_info structures
3814 * that correspond to outermost bands. For other bands (in particular,
3815 * ancestors of the outermost bands), n_parallal is set to 0.
3817 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3819 * tile_first is the number of schedule dimensions in prefix.
3821 * suffix is the schedule of the outermost tilable bands and their descendants.
3824 struct cuda_gen
*gen
;
3828 isl_union_map
*prefix
;
3829 isl_union_map
*suffix
;
3832 /* Set tile_len and n_parallel of the statement to that of
3833 * their outermost band, recorded in the band_info.
3835 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
3837 struct band_info
*info
= user
;
3839 struct cuda_stmt
*stmt
;
3841 nr
= atoi(isl_map_get_tuple_name(map
, isl_dim_in
) + 2);
3842 stmt
= &info
->gen
->stmts
[nr
];
3844 stmt
->tile_len
= info
->tile_len
;
3845 stmt
->n_parallel
= info
->n_parallel
;
3852 static void list_select_outer_band(struct cuda_gen
*gen
,
3853 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
3855 /* Check if this band has any parallel loops. If so, take it as
3856 * the outermost tilable band. If not, continue looking for the
3857 * outermost tilable band in the children of the current band.
3859 static void band_select_outer_band(struct cuda_gen
*gen
,
3860 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
3862 int n
= isl_band_n_member(band
);
3865 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
3866 if (!isl_band_member_is_zero_distance(band
, n_parallel
))
3869 info
->n_parallel
= n_parallel
;
3872 info
->tile_first
= pos
;
3874 info
->prefix
= isl_band_get_prefix_schedule(band
);
3875 info
->suffix
= isl_union_map_flat_range_product(
3876 isl_band_get_partial_schedule(band
),
3877 isl_band_get_suffix_schedule(band
));
3878 isl_union_map_foreach_map(info
->prefix
,
3879 &set_stmt_tile_len
, info
);
3881 isl_band_list
*children
;
3882 if (!isl_band_has_children(band
))
3883 isl_die(isl_band_get_ctx(band
), isl_error_unknown
,
3884 "unable to detect any parallelism", abort());
3885 children
= isl_band_get_children(band
);
3886 list_select_outer_band(gen
, children
, pos
+ n
, info
);
3889 isl_band_free(band
);
3892 /* Comparison function that returns a non-zero value for band_infos
3893 * with different tile_len fields or different n_parallel fields.
3895 static int cmp_band(const void *p1
, const void *p2
)
3897 const struct band_info
*info1
= p1
;
3898 const struct band_info
*info2
= p2
;
3900 if (info1
->tile_len
!= info2
->tile_len
)
3901 return info1
->tile_len
- info2
->tile_len
;
3903 return info1
->n_parallel
- info2
->n_parallel
;
3906 /* Extend "umap" with coordinates with fixed value "val"
3907 * to a total length of "dst_len", assuming the original dimension is "src_len".
3909 static __isl_give isl_union_map
*extend_range(__isl_take isl_union_map
*umap
,
3910 int src_len
, int dst_len
, int val
)
3916 dim
= isl_union_map_get_space(umap
);
3917 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
3918 for (i
= src_len
; i
< dst_len
; ++i
)
3919 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
3921 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
3926 /* Group bands with the same values for tile_len and n_parallel.
3927 * The prefix schedule is then extended with a fixed coordinate that
3928 * is different for each such group.
3929 * Note that the actual values for this coordinate are not important.
3930 * The bands have already been effectively separated at a higher level
3931 * or they are independent and may be executed in parallel.
3932 * The list of band_info has been sorted before this functions is called.
3934 static void separate_bands(struct band_info
*info
, int n
)
3939 for (i
= 0; i
< n
; ++i
) {
3940 int l
= info
[i
].tile_first
;
3943 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
3944 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
3947 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3949 info
[i
].tile_first
= l
+ 1;
3953 /* Select the outermost bands in the elements of the list, align
3954 * their prefix schedules, separate bands with different values
3955 * for tile_len and/or n_parallel and then combine the resulting
3956 * prefix and suffix schedules into a single pair of prefix and
3957 * suffix schedules for the entire list.
3959 static void list_select_outer_band(struct cuda_gen
*gen
,
3960 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
3964 int n
= isl_band_list_n_band(list
);
3965 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
3966 struct band_info
*info
;
3968 isl_union_map
*prefix
;
3969 isl_union_map
*suffix
;
3972 info
= isl_calloc_array(ctx
, struct band_info
, n
);
3976 for (i
= 0; i
< n
; ++i
) {
3977 band
= isl_band_list_get_band(list
, i
);
3978 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
3979 if (info
[i
].tile_first
> max_tile_first
)
3980 max_tile_first
= info
[i
].tile_first
;
3983 for (i
= 0; i
< n
; ++i
) {
3984 if (info
[i
].tile_first
== max_tile_first
)
3986 info
[i
].prefix
= extend_range(info
[i
].prefix
,
3987 info
[i
].tile_first
, max_tile_first
, 0);
3990 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
3992 for (i
= 0; i
< n
- 1; ++i
)
3993 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
3994 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
3998 separate_bands(info
, n
);
4000 prefix
= info
[0].prefix
;
4001 suffix
= info
[0].suffix
;
4003 for (i
= 1; i
< n
; ++i
) {
4004 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4005 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4008 list_info
->tile_first
= info
[0].tile_first
;
4009 list_info
->tile_len
= -1;
4010 list_info
->prefix
= prefix
;
4011 list_info
->suffix
= suffix
;
4013 isl_band_list_free(list
);
4017 /* Set max_out to the maximal number of output dimensions over
4020 static int update_max_out(__isl_take isl_map
*map
, void *user
)
4022 int *max_out
= user
;
4023 int n_out
= isl_map_dim(map
, isl_dim_out
);
4025 if (n_out
> *max_out
)
4032 struct align_range_data
{
4037 /* Extend the dimension of the range of the given map to data->max_out and
4038 * then add the result to data->res.
4040 static int map_align_range(__isl_take isl_map
*map
, void *user
)
4042 struct align_range_data
*data
= user
;
4046 int n_out
= isl_map_dim(map
, isl_dim_out
);
4048 dim
= isl_union_map_get_space(data
->res
);
4049 proj
= isl_map_reverse(projection(dim
, data
->max_out
, n_out
));
4050 for (i
= n_out
; i
< data
->max_out
; ++i
)
4051 proj
= isl_map_fix_si(proj
, isl_dim_out
, i
, 0);
4053 map
= isl_map_apply_range(map
, proj
);
4055 data
->res
= isl_union_map_add_map(data
->res
, map
);
4060 /* Extend the ranges of the maps in the union map such they all have
4061 * the same dimension.
4063 static __isl_give isl_union_map
*align_range(__isl_take isl_union_map
*umap
)
4065 struct align_range_data data
;
4068 isl_union_map_foreach_map(umap
, &update_max_out
, &data
.max_out
);
4070 data
.res
= isl_union_map_empty(isl_union_map_get_space(umap
));
4071 isl_union_map_foreach_map(umap
, &map_align_range
, &data
);
4073 isl_union_map_free(umap
);
4077 /* Select the outermost tilable band that (by construction)
4078 * has at least one parallel loop.
4079 * The starting position of the aligned band is stored in the pair
4081 * The sizes and number of parallel loops may be different in different
4082 * parts of the band forest and are therefore stored in the cuda_stmts.
4084 * Return the complete schedule, with the tilable bands aligned
4085 * at gen->tile_first and padded with zero, if needed.
4087 static __isl_give isl_union_map
*select_outer_tilable_band(struct cuda_gen
*gen
,
4088 __isl_keep isl_schedule
*schedule
)
4090 isl_band_list
*list
;
4091 struct band_info info
;
4093 gen
->n_parallel
= 0;
4096 list
= isl_schedule_get_band_forest(schedule
);
4098 list_select_outer_band(gen
, list
, 0, &info
);
4100 gen
->tile_first
= info
.tile_first
;
4101 info
.suffix
= align_range(info
.suffix
);
4103 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4106 /* Set gen->untiled_len to the number of scheduling dimensions
4107 * for the schedule of the first domain.
4108 * We assume here that this number is the same for all domains.
4110 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4112 unsigned *untiled_len
= user
;
4114 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4120 /* Compute an appropriate schedule based on the accesses in
4121 * gen->read and gen->write.
4123 * We first compute dependences and then use those to compute
4124 * a schedule that has a parallel loop in each tilable band.
4125 * Finally, we select the outermost tilable band.
4127 static void compute_schedule(struct cuda_gen
*gen
,
4128 __isl_take isl_union_map
*sched
)
4130 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
4131 isl_union_set
*domain
;
4132 isl_union_map
*empty
;
4133 isl_union_map
*dep_raw
, *dep2
, *dep3
, *dep
;
4134 isl_union_map
*uninitialized
;
4135 isl_schedule
*schedule
;
4136 struct isl_options
*options
;
4138 empty
= isl_union_map_empty(isl_union_map_get_space(sched
));
4140 isl_union_map_compute_flow(isl_union_map_copy(gen
->read
),
4141 isl_union_map_copy(gen
->write
), empty
,
4142 isl_union_map_copy(sched
),
4143 &dep_raw
, NULL
, &uninitialized
, NULL
);
4144 isl_union_map_compute_flow(isl_union_map_copy(gen
->write
),
4145 isl_union_map_copy(gen
->write
),
4146 isl_union_map_copy(gen
->read
),
4147 isl_union_map_copy(sched
),
4148 &dep2
, &dep3
, NULL
, NULL
);
4149 isl_union_map_free(sched
);
4151 gen
->copy_in
= isl_union_map_range(uninitialized
);
4153 dep
= isl_union_map_union(dep2
, dep3
);
4154 dep
= isl_union_map_union(dep
, dep_raw
);
4155 dep
= isl_union_map_coalesce(dep
);
4157 domain
= extract_domain(gen
);
4158 options
= isl_ctx_peek_options(ctx
, isl_options_arg
);
4159 options
->schedule_outer_zero_distance
= 1;
4160 schedule
= isl_union_set_compute_schedule(isl_union_set_copy(domain
),
4161 isl_union_map_copy(dep
), dep
);
4163 sched
= select_outer_tilable_band(gen
, schedule
);
4165 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4166 sched
= isl_union_map_intersect_domain(sched
, domain
);
4169 isl_schedule_free(schedule
);
4172 static struct cuda_stmt_access
**expr_extract_access(struct pet_expr
*expr
,
4173 struct cuda_stmt_access
**next_access
)
4175 struct cuda_stmt_access
*access
;
4176 isl_ctx
*ctx
= isl_map_get_ctx(expr
->acc
.access
);
4178 access
= isl_alloc_type(ctx
, struct cuda_stmt_access
);
4180 access
->next
= NULL
;
4181 access
->read
= expr
->acc
.read
;
4182 access
->write
= expr
->acc
.write
;
4183 access
->access
= isl_map_copy(expr
->acc
.access
);
4185 *next_access
= access
;
4186 next_access
= &(*next_access
)->next
;
4190 static struct cuda_stmt_access
**expr_extract_accesses(struct pet_expr
*expr
,
4191 struct cuda_stmt_access
**next_access
)
4195 for (i
= 0; i
< expr
->n_arg
; ++i
)
4196 next_access
= expr_extract_accesses(expr
->args
[i
],
4199 if (expr
->type
== pet_expr_access
)
4200 next_access
= expr_extract_access(expr
, next_access
);
4205 static void pet_stmt_extract_accesses(struct cuda_stmt
*stmt
)
4207 struct cuda_stmt_access
**next_access
= &stmt
->accesses
;
4209 stmt
->accesses
= NULL
;
4210 expr_extract_accesses(stmt
->body
, next_access
);
4213 /* Return an array of cuda_stmt representing the statements in "scop".
4215 static struct cuda_stmt
*extract_stmts(isl_ctx
*ctx
, struct pet_scop
*scop
,
4216 __isl_keep isl_set
*context
)
4219 struct cuda_stmt
*stmts
;
4221 stmts
= isl_calloc_array(ctx
, struct cuda_stmt
, scop
->n_stmt
);
4224 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
4225 struct cuda_stmt
*s
= &stmts
[i
];
4227 s
->domain
= isl_set_copy(scop
->stmts
[i
]->domain
);
4228 s
->domain
= isl_set_intersect(s
->domain
, isl_set_copy(context
));
4229 s
->body
= scop
->stmts
[i
]->body
;
4230 pet_stmt_extract_accesses(s
);
4236 /* Replace the scop in the "input" file by equivalent code
4237 * that uses the GPU. "scop" is assumed to correspond to this scop.
4239 * We first compute a schedule that respects the dependences
4240 * of the original program and select the outermost band
4241 * of tilable dimensions that has at least one parallel loop.
4242 * We then have three blocks of dimensions
4246 * The tilable band "B" is first tiled according to "tile.sizes", resulting
4251 * For each iteration of the T loop and for each array, we compute
4252 * the array elements accessed by that iteration, construct a rectangular
4253 * box around it and shift it to the origin. The result is used
4254 * as shared memory for the array.
4256 * We then split off at most 2 parallel loops from the T loops and
4257 * at most 3 parallel loops from the P loops
4261 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4262 * according to "grid.sizes"/"block.sizes".
4264 * H T1T T1P T2 P1T P1P P2 G
4266 * Finally, the T1P and P1P iterators are equated to the block and
4267 * thread dimensions respectively and so are effectively removed.
4268 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4269 * are run on the GPU.
4271 * Code is generated in three stages. We first generate code for the
4272 * host (the H loops), with iterators h%d. Then, for each leaf node
4273 * of the resulting AST, we generate code for the shared loops (up to
4274 * and including T2), with iterators g%d and after equating the H loops
4275 * to h%d parameters and the T1P loops to the block dimensions.
4276 * Finally, we generate code for the remaining loops in a similar fashion.
4278 int cuda_pet(isl_ctx
*ctx
, struct pet_scop
*scop
, struct ppcg_options
*options
,
4281 isl_union_map
*sched
;
4282 struct cuda_gen gen
;
4287 scop
= pet_scop_align_params(scop
);
4290 gen
.context
= isl_set_copy(scop
->context
);
4291 gen
.context
= add_context_from_str(gen
.context
, options
->ctx
);
4292 gen
.n_stmts
= scop
->n_stmt
;
4293 gen
.stmts
= extract_stmts(ctx
, scop
, gen
.context
);
4294 gen
.read
= pet_scop_collect_reads(scop
);
4295 gen
.write
= pet_scop_collect_writes(scop
);
4296 gen
.options
= options
;
4297 gen
.state
= cloog_isl_state_malloc(gen
.ctx
);
4300 cuda_open_files(&gen
.cuda
, input
);
4302 collect_array_info(&gen
);
4304 sched
= pet_scop_collect_schedule(scop
);
4306 compute_schedule(&gen
, sched
);
4308 print_host_code(&gen
);
4310 cloog_state_free(gen
.state
);
4311 clear_cuda_gen(&gen
);
4313 cuda_close_files(&gen
.cuda
);