2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride, shift and shift_map only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * shift_map contains the mapping
39 * i -> (i + shift)/stride
41 * Let D represent the initial shared_len dimensions of the computed schedule.
42 * The spaces of "lb" and "shift" are of the form
46 * "shift_map" is of the form
48 * [D -> i] -> [D -> (i + shift(D))/stride]
50 struct gpu_array_bound
{
56 isl_basic_map
*shift_map
;
59 /* A tile of an array.
61 * n is the dimension of the array.
62 * bound is an array of size "n" representing the lower bound
63 * and size for each index.
65 * tiling maps a tile in the global array to the corresponding
66 * shared/private memory tile and is of the form
68 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
70 * where D represents the initial shared_len dimensions
71 * of the computed schedule.
73 struct gpu_array_tile
{
75 struct gpu_array_bound
*bound
;
76 isl_multi_aff
*tiling
;
79 struct gpu_array_info
;
81 /* A group of array references in a kernel that should be handled together.
82 * If private_tile is not NULL, then it is mapped to registers.
83 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
84 * Otherwise, it is accessed from global memory.
86 struct gpu_array_ref_group
{
87 /* The references in this group access this array. */
88 struct gpu_array_info
*array
;
89 /* Position of this group in the list of reference groups of array. */
92 /* The following fields are use during the construction of the groups.
93 * access is the combined access relation relative to the shared
94 * memory tiling. In particular, the domain of the map corresponds
95 * to the first shared_len dimensions of the computed schedule.
96 * write is set if any access in the group is a write.
97 * exact_write is set if all writes are definite writes.
103 /* The shared memory tile, NULL if none. */
104 struct gpu_array_tile
*shared_tile
;
106 /* The private memory tile, NULL if none. */
107 struct gpu_array_tile
*private_tile
;
109 /* References in this group; point to elements of a linked list. */
111 struct gpu_stmt_access
**refs
;
113 /* Last shared memory tile dimension that affects tile of this group. */
119 struct ppcg_options
*options
;
121 /* Callback for printing of AST in appropriate format. */
122 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
123 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
124 struct gpu_types
*types
, void *user
);
127 struct gpu_prog
*prog
;
128 /* The generated AST. */
131 /* The sequence of types for which a definition has been printed. */
132 struct gpu_types types
;
134 /* tile, grid and block sizes for each kernel */
135 isl_union_map
*sizes
;
137 /* Identifier of current kernel. */
139 /* Pointer to the current kernel. */
140 struct ppcg_kernel
*kernel
;
141 /* Does the computed schedule exhibit any parallelism? */
144 /* First tile dimension. */
146 /* Number of tile dimensions. */
148 /* Number of initial parallel loops among tile dimensions. */
151 /* Number of dimensions determining shared memory. */
154 /* Number of rows in the untiled schedule. */
156 /* Number of rows in the tiled schedule. */
158 /* Number of rows in schedule after tiling/wrapping over threads. */
159 int thread_tiled_len
;
161 /* Global untiled schedule. */
162 isl_union_map
*sched
;
163 /* Local (per kernel launch) tiled schedule. */
164 isl_union_map
*tiled_sched
;
165 /* Local schedule per shared memory tile loop iteration. */
166 isl_union_map
*local_sched
;
168 /* Local tiled schedule projected onto the shared tile loops and
169 * the loops that will be wrapped over the threads,
170 * with all shared tile loops parametrized.
172 isl_union_map
*shared_sched
;
173 /* Projects out the loops that will be wrapped over the threads
176 isl_union_map
*shared_proj
;
178 /* A map that takes the range of shared_sched as input,
179 * wraps the appropriate loops over the threads and then projects
182 isl_map
*privatization
;
184 /* A map from the shared memory tile loops and the thread indices
185 * (as parameters) to the set of accessed memory elements that
186 * will be accessed through private copies.
188 isl_union_map
*private_access
;
190 /* The schedule for the current private/shared access
191 * (within print_private_access or print_shared_access).
194 /* The array reference group corresponding to copy_sched. */
195 struct gpu_array_ref_group
*copy_group
;
197 /* Is any array in the current kernel marked force_private? */
198 int any_force_private
;
200 /* First loop to unroll (or -1 if none) in the current part of the
207 /* Note: in the input file, the sizes of the grid and the blocks
208 * are specified in the order x, y, z, but internally, the sizes
209 * are stored in reverse order, so that the last element always
210 * refers to the x dimension.
217 /* Print the name of the local copy of a given group of array references.
219 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
220 struct gpu_array_ref_group
*group
)
224 if (group
->private_tile
)
225 p
= isl_printer_print_str(p
, "private_");
226 else if (group
->shared_tile
)
227 p
= isl_printer_print_str(p
, "shared_");
230 p
= isl_printer_print_str(p
, group
->array
->name
);
231 if (!global
&& group
->array
->n_group
> 1) {
232 p
= isl_printer_print_str(p
, "_");
233 p
= isl_printer_print_int(p
, group
->nr
);
239 /* Collect all references to the given array and store pointers to them
242 * If the array contains structures, then there is no need to collect
243 * the references since we will not be computing any reference groups.
245 static void collect_references(struct gpu_prog
*prog
,
246 struct gpu_array_info
*array
)
251 if (array
->has_compound_element
)
255 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
256 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
257 struct gpu_stmt_access
*access
;
259 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
261 name
= isl_map_get_tuple_name(access
->access
,
263 if (name
&& !strcmp(array
->name
, name
))
269 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
273 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
274 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
275 struct gpu_stmt_access
*access
;
277 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
279 name
= isl_map_get_tuple_name(access
->access
,
281 if (!name
|| strcmp(array
->name
, name
))
284 array
->refs
[n
++] = access
;
289 /* Create a gpu_array_tile for an array of dimension "n_index".
291 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
294 struct gpu_array_tile
*tile
;
296 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
301 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
304 for (i
= 0; i
< n_index
; ++i
) {
305 tile
->bound
[i
].size
= NULL
;
306 tile
->bound
[i
].lb
= NULL
;
307 tile
->bound
[i
].stride
= NULL
;
308 tile
->bound
[i
].shift
= NULL
;
309 tile
->bound
[i
].shift_map
= NULL
;
315 static void *free_tile(struct gpu_array_tile
*tile
)
322 for (j
= 0; j
< tile
->n
; ++j
) {
323 isl_val_free(tile
->bound
[j
].size
);
324 isl_val_free(tile
->bound
[j
].stride
);
325 isl_aff_free(tile
->bound
[j
].lb
);
326 isl_aff_free(tile
->bound
[j
].shift
);
327 isl_basic_map_free(tile
->bound
[j
].shift_map
);
330 isl_multi_aff_free(tile
->tiling
);
336 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
337 __isl_keep isl_set
*accessed
)
342 id
= isl_set_get_tuple_id(accessed
);
344 for (i
= 0; i
< scop
->n_array
; ++i
) {
347 id_i
= isl_set_get_tuple_id(scop
->arrays
[i
]->extent
);
354 return i
< scop
->n_array
? scop
->arrays
[i
] : NULL
;
357 /* Compute and return the extent of "array", taking into account the set of
360 * In particular, the extent in the outer dimension is taken
361 * from "accessed", while then extent in the remaing dimensions
362 * are taken from array->extent.
364 * The extent in the outer dimension cannot be taken from array->extent
365 * because that may be unbounded. Furthermore, even if it is bounded,
366 * it may be larger than the piece of the array that is being accessed.
368 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
369 __isl_keep isl_set
*accessed
)
376 extent
= isl_set_copy(array
->extent
);
378 n_index
= isl_set_dim(accessed
, isl_dim_set
);
382 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
383 outer
= isl_set_copy(accessed
);
384 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
385 extent
= isl_set_flat_product(outer
, extent
);
386 id
= isl_set_get_tuple_id(accessed
);
387 extent
= isl_set_set_tuple_id(extent
, id
);
392 /* Is the array "array" being extracted a read-only scalar?
394 * That is, is "array" a scalar that is never possibly written to.
395 * An array containing structures is never considered to be a scalar.
397 static int is_read_only_scalar(struct gpu_array_info
*array
,
398 struct gpu_prog
*prog
)
401 isl_union_map
*write
;
404 if (array
->has_compound_element
)
406 if (array
->n_index
!= 0)
409 write
= isl_union_map_copy(prog
->may_write
);
410 space
= isl_set_universe(isl_space_copy(array
->space
));
411 write
= isl_union_map_intersect_range(write
,
412 isl_union_set_from_set(space
));
413 empty
= isl_union_map_is_empty(write
);
414 isl_union_map_free(write
);
419 /* Compute bounds on the host arrays based on the accessed elements
420 * and collect all references to the array.
422 * If the array is zero-dimensional and does not contain structures,
423 * i.e., if the array is a scalar, we check whether it is read-only.
425 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
428 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
432 struct pet_array
*pa
;
433 struct gpu_array_info
*info
;
436 info
= &prog
->array
[prog
->n_array
];
439 n_index
= isl_set_dim(array
, isl_dim_set
);
440 name
= isl_set_get_tuple_name(array
);
441 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
442 isl_pw_aff
*, n_index
);
446 info
->space
= isl_set_get_space(array
);
447 info
->name
= strdup(name
);
448 info
->n_index
= n_index
;
449 info
->bound
= bounds
;
450 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
452 pa
= find_array(prog
->scop
, array
);
454 isl_die(isl_set_get_ctx(array
), isl_error_internal
,
455 "unable to find array in scop", goto error
);
457 info
->type
= strdup(pa
->element_type
);
458 info
->size
= pa
->element_size
;
459 info
->local
= pa
->declared
&& !pa
->exposed
;
460 info
->has_compound_element
= pa
->element_is_record
;
461 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
463 extent
= compute_extent(pa
, array
);
464 info
->extent
= extent
;
465 for (i
= 0; i
< n_index
; ++i
) {
471 dom
= isl_set_copy(extent
);
472 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
474 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
475 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
476 fprintf(stderr
, "unable to determine extent of '%s' "
477 "in dimension %d\n", info
->name
, i
);
478 dom
= isl_set_free(dom
);
480 bound
= isl_set_dim_max(dom
, 0);
481 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
482 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
483 one
= isl_aff_zero_on_domain(ls
);
484 one
= isl_aff_add_constant_si(one
, 1);
485 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
486 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
489 if (!isl_pw_aff_is_cst(bound
))
493 collect_references(prog
, info
);
502 /* Compute a mapping from all outer arrays (of structs) in scop
503 * to their innermost arrays.
505 * In particular, for each array of a primitive type, the result
506 * contains the identity mapping on that array.
507 * For each array involving member accesses, the result
508 * contains a mapping from the elements of the outer array of structs
509 * to all corresponding elements of the innermost nested arrays.
511 static __isl_give isl_union_map
*compute_to_inner(struct ppcg_scop
*scop
)
514 isl_union_map
*to_inner
;
516 to_inner
= isl_union_map_empty(isl_set_get_space(scop
->context
));
518 for (i
= 0; i
< scop
->n_array
; ++i
) {
519 struct pet_array
*array
= scop
->arrays
[i
];
523 if (array
->element_is_record
)
526 set
= isl_set_copy(array
->extent
);
527 map
= isl_set_identity(isl_set_copy(set
));
529 while (set
&& isl_set_is_wrapping(set
)) {
533 id
= isl_set_get_tuple_id(set
);
534 wrapped
= isl_set_unwrap(set
);
535 wrapped
= isl_map_domain_map(wrapped
);
536 wrapped
= isl_map_set_tuple_id(wrapped
, isl_dim_in
, id
);
537 map
= isl_map_apply_domain(map
, wrapped
);
538 set
= isl_map_domain(isl_map_copy(map
));
541 map
= isl_map_gist_domain(map
, set
);
543 to_inner
= isl_union_map_add_map(to_inner
, map
);
549 /* Remove independence from the order constraints "order" on array "array".
550 * Since the pairs of iterations in the filter relation of an independence
551 * are guaranteed to be completely independent by the user, there is
552 * no need to ensure that live ranges are ordered along thong pairs.
553 * We make an exception for local variables, though, as the independence
554 * guarantee does not apply to those.
556 * The order constraints are used in two places.
557 * Those on scalars are used in check_scalar_live_ranges to check if
558 * we need to force the scalar to be private. Any non-local scalar
559 * should not be forced scalar if it only appears in independent loops.
560 * Those on non-scalars are added to the coincidence constraints
561 * in compute_schedule because we do not support any array expansion.
562 * Accesses to non-local arrays should not prevent a loop from being
563 * considered coincident so we should indeed remove those constraints
564 * from the order constraints.
566 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
567 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
571 for (i
= 0; i
< prog
->scop
->n_independence
; ++i
) {
572 struct pet_independence
*pi
= prog
->scop
->independences
[i
];
573 if (isl_union_set_contains(pi
->local
, array
->space
))
576 order
= isl_union_map_subtract(order
,
577 isl_union_map_copy(pi
->filter
));
583 /* For each array in "prog", store the (untagged) order dependences
584 * derived from the array in array->dep_order.
585 * In particular, consider all references that access the given array
586 * and take the order dependences that have one of these references
587 * as source. (Since an order dependence relates two references to
588 * the same array, the target of these order dependences will also
589 * be one of these references.)
590 * Additionally, store the union of these array->dep_order relations
591 * for all non-scalar arrays in prog->array_order.
593 void collect_order_dependences(struct gpu_prog
*prog
)
597 isl_union_map
*accesses
;
599 space
= isl_union_map_get_space(prog
->read
);
600 prog
->array_order
= isl_union_map_empty(space
);
602 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
603 accesses
= isl_union_map_union(accesses
,
604 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
605 accesses
= isl_union_map_universe(accesses
);
606 accesses
= isl_union_map_apply_range(accesses
,
607 isl_union_map_copy(prog
->to_outer
));
609 for (i
= 0; i
< prog
->n_array
; ++i
) {
610 struct gpu_array_info
*array
= &prog
->array
[i
];
613 isl_union_map
*order
;
615 set
= isl_set_universe(isl_space_copy(array
->space
));
616 uset
= isl_union_set_from_set(set
);
617 uset
= isl_union_map_domain(
618 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
620 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
621 order
= isl_union_map_intersect_domain(order
, uset
);
622 order
= isl_union_map_zip(order
);
623 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
624 order
= remove_independences(prog
, array
, order
);
625 array
->dep_order
= order
;
627 if (gpu_array_is_scalar(array
))
630 prog
->array_order
= isl_union_map_union(prog
->array_order
,
631 isl_union_map_copy(array
->dep_order
));
634 isl_union_map_free(accesses
);
637 /* Construct a gpu_array_info for each array possibly accessed by "prog" and
638 * collect them in prog->array.
640 * If there are any member accesses involved, then they are first mapped
641 * to the outer arrays of structs.
643 * If we are allowing live range reordering, then also set
644 * the dep_order field. Otherwise leave it NULL.
646 static int collect_array_info(struct gpu_prog
*prog
)
649 isl_union_set
*arrays
;
651 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
652 arrays
= isl_union_set_union(arrays
,
653 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
655 arrays
= isl_union_set_apply(arrays
,
656 isl_union_map_copy(prog
->to_outer
));
658 arrays
= isl_union_set_coalesce(arrays
);
660 prog
->n_array
= isl_union_set_n_set(arrays
);
661 prog
->array
= isl_calloc_array(prog
->ctx
,
662 struct gpu_array_info
, prog
->n_array
);
665 r
= isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
666 isl_union_set_free(arrays
);
668 if (prog
->scop
->options
->live_range_reordering
)
669 collect_order_dependences(prog
);
674 static void free_array_info(struct gpu_prog
*prog
)
678 for (i
= 0; i
< prog
->n_array
; ++i
) {
679 int n_index
= prog
->array
[i
].n_index
;
680 free(prog
->array
[i
].type
);
681 free(prog
->array
[i
].name
);
682 for (j
= 0; j
< n_index
; ++j
)
683 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
684 isl_space_free(prog
->array
[i
].space
);
685 isl_set_free(prog
->array
[i
].extent
);
686 free(prog
->array
[i
].bound
);
687 free(prog
->array
[i
].refs
);
688 isl_union_map_free(prog
->array
[i
].dep_order
);
693 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
694 * as an array or through a pointer reference, but as a single data element.
695 * At the moment, scalars are represented as zero-dimensional arrays.
696 * A zero-dimensional array containing structures is not considered
699 int gpu_array_is_scalar(struct gpu_array_info
*array
)
701 return !array
->has_compound_element
&& array
->n_index
== 0;
704 /* Is "array" a read-only scalar?
706 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
708 return array
->read_only_scalar
;
711 /* Return the set of parameter values for which the array has a positive
712 * size in all dimensions.
713 * If the sizes are only valid for some parameter values, then those
714 * constraints are also taken into account.
716 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
722 space
= isl_space_params(isl_space_copy(array
->space
));
723 guard
= isl_set_universe(space
);
725 for (i
= 0; i
< array
->n_index
; ++i
) {
727 isl_set
*guard_i
, *zero
;
729 bound
= isl_pw_aff_copy(array
->bound
[i
]);
730 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
731 zero
= isl_pw_aff_zero_set(bound
);
732 guard_i
= isl_set_subtract(guard_i
, zero
);
733 guard
= isl_set_intersect(guard
, guard_i
);
739 /* Internal data structure for extract_size_of_type.
740 * "type" specifies the name of the space that we want to extract.
741 * "res" is used to store the subset of that space.
743 struct ppcg_extract_size_data
{
748 /* This function is called for each set in a union_set.
749 * If the name of the set matches data->type, we store the
752 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
754 struct ppcg_extract_size_data
*data
= user
;
757 name
= isl_set_get_tuple_name(size
);
758 if (name
&& !strcmp(name
, data
->type
)) {
767 /* Given a union map { kernel[i] -> *[...] },
768 * return the range in the space called "type" for the kernel with
769 * sequence number "id".
771 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
772 const char *type
, int id
)
776 isl_union_set
*local_sizes
;
777 struct ppcg_extract_size_data data
= { type
, NULL
};
782 space
= isl_union_map_get_space(sizes
);
783 space
= isl_space_set_from_params(space
);
784 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
785 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
786 dom
= isl_set_universe(space
);
787 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
789 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
790 isl_union_map_copy(sizes
));
791 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
792 isl_union_set_free(local_sizes
);
796 /* Given a singleton set, extract the first (at most *len) elements
797 * of the single integer tuple into *sizes and update *len if needed.
799 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
807 dim
= isl_set_dim(set
, isl_dim_set
);
811 for (i
= 0; i
< *len
; ++i
) {
814 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
817 sizes
[i
] = isl_val_get_num_si(v
);
824 /* Extract user specified "tile" sizes from the "sizes" command line option,
825 * defaulting to option->tile_size in each dimension.
827 static void read_tile_sizes(struct gpu_gen
*gen
)
832 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
833 assert(gen
->tile_size
);
834 for (n
= 0; n
< gen
->tile_len
; ++n
)
835 gen
->tile_size
[n
] = gen
->options
->tile_size
;
837 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
838 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
840 if (gen
->n_parallel
> gen
->tile_len
)
841 gen
->n_parallel
= gen
->tile_len
;
844 /* Extract user specified "block" sizes from the "sizes" command line option,
845 * after filling in some potentially useful defaults.
847 static void read_block_sizes(struct gpu_gen
*gen
)
853 gen
->n_block
= (n
<= 3) ? n
: 3;
854 switch (gen
->n_block
) {
856 gen
->block_dim
[0] = 512;
859 gen
->block_dim
[0] = 32;
860 gen
->block_dim
[1] = 16;
863 gen
->block_dim
[0] = 32;
864 gen
->block_dim
[1] = 4;
865 gen
->block_dim
[2] = 4;
869 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
870 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
873 /* Extract user specified "grid" sizes from the "sizes" command line option,
874 * after filling in some potentially useful defaults.
876 static void read_grid_sizes(struct gpu_gen
*gen
)
878 int n
= gen
->n_parallel
;
881 gen
->n_grid
= (n
<= 2) ? n
: 2;
882 switch (gen
->n_grid
) {
884 gen
->grid_dim
[0] = 32768;
887 gen
->grid_dim
[0] = 256;
888 gen
->grid_dim
[1] = 256;
892 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
893 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
896 /* Extract user specified sizes from the "sizes" command line option
897 * after filling in some potentially useful defaults.
899 static void read_sizes(struct gpu_gen
*gen
)
901 read_tile_sizes(gen
);
902 read_block_sizes(gen
);
903 read_grid_sizes(gen
);
906 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
913 for (i
= 0; i
< n
; ++i
) {
914 struct gpu_stmt_access
*access
, *next
;
916 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
918 isl_id_free(access
->ref_id
);
919 isl_map_free(access
->access
);
920 isl_map_free(access
->tagged_access
);
924 isl_id_free(stmts
[i
].id
);
931 /* Construct a map from a domain of dimensionality "len"
932 * to a domain of dimensionality "len" + "tile_len" that tiles
933 * the "tile_len" coordinates starting at "first".
934 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
935 * "dim" prescribes the parameters.
937 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
938 int first
, int tile_len
, int *tile_size
)
945 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
946 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
947 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
948 ls
= isl_local_space_from_space(dim
);
950 for (i
= 0; i
< len
- tile_len
; ++i
) {
951 int j
= i
< first
? i
: i
+ tile_len
;
952 int k
= i
< first
? i
: i
+ 2 * tile_len
;
954 c
= isl_equality_alloc(isl_local_space_copy(ls
));
955 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
956 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
957 bmap
= isl_basic_map_add_constraint(bmap
, c
);
960 for (i
= 0; i
< tile_len
; ++i
) {
961 c
= isl_equality_alloc(isl_local_space_copy(ls
));
962 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
964 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
965 first
+ i
, tile_size
[i
]);
966 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
967 first
+ i
+ tile_len
, 1);
968 bmap
= isl_basic_map_add_constraint(bmap
, c
);
970 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
971 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
972 first
+ i
+ tile_len
, 1);
973 bmap
= isl_basic_map_add_constraint(bmap
, c
);
975 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
976 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
977 first
+ i
+ tile_len
, -1);
978 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
979 bmap
= isl_basic_map_add_constraint(bmap
, c
);
982 isl_local_space_free(ls
);
984 return isl_map_from_basic_map(bmap
);
987 /* Construct a map from a domain of dimensionality "len"
988 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
989 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
990 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
991 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
992 * that are projected out at the end.
993 * "dim" prescribes the parameters.
995 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
996 int first
, int wrap_len
, int *wrap_size
)
1001 isl_local_space
*ls
;
1003 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1004 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
1005 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1006 ls
= isl_local_space_from_space(dim
);
1008 for (i
= 0; i
< len
; ++i
) {
1009 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
1011 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1012 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
1013 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
1014 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1017 for (i
= 0; i
< wrap_len
; ++i
) {
1018 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1019 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1021 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1022 first
+ wrap_len
+ i
, 1);
1023 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1024 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
1025 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1027 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1028 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1029 first
+ wrap_len
+ i
, 1);
1030 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1032 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1033 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1034 first
+ wrap_len
+ i
, -1);
1035 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
1036 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1039 isl_local_space_free(ls
);
1041 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
1042 first
+ 2 * wrap_len
, wrap_len
);
1044 return isl_map_from_basic_map(bmap
);
1047 /* Add "n" parameters named prefix%d.
1049 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
1050 int n
, const char *prefix
)
1056 nparam
= isl_set_dim(set
, isl_dim_param
);
1057 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
1059 for (i
= 0; i
< n
; ++i
) {
1060 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1061 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1068 /* Equate the "n" dimensions of "set" starting at "first" to
1069 * freshly created parameters named prefix%d.
1071 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
1072 int first
, int n
, const char *prefix
)
1077 nparam
= isl_set_dim(set
, isl_dim_param
);
1079 set
= add_params(set
, n
, prefix
);
1081 for (i
= 0; i
< n
; ++i
)
1082 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
1083 isl_dim_set
, first
+ i
);
1088 /* Given a parameter space "space", create a set of dimension "len"
1089 * of which the "n" dimensions starting at "first" are equated to
1090 * freshly created parameters named prefix%d.
1092 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
1093 int len
, int first
, int n
, const char *prefix
)
1097 space
= isl_space_set_from_params(space
);
1098 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
1099 set
= isl_set_universe(space
);
1101 return parametrize(set
, first
, n
, prefix
);
1104 /* Tile the B loops over the tile sizes and then tile/wrap
1105 * the T1 loops over the blocks.
1107 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
1108 __isl_take isl_union_map
*sched
)
1111 isl_map
*tiling
, *block_tiling
;
1113 dim
= isl_union_map_get_space(sched
);
1114 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
1115 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
1117 if (gen
->options
->wrap
)
1118 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
1119 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1121 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
1122 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1124 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
1126 tiling
= isl_map_apply_range(tiling
, block_tiling
);
1128 sched
= isl_union_map_apply_range(sched
,
1129 isl_union_map_from_map(tiling
));
1131 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1136 /* Equate the "T1P" iterators in the tiled schedule "sched"
1137 * to the block dimensions.
1139 static __isl_give isl_union_map
*parametrize_tiled_schedule(
1140 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
1145 dim
= isl_union_map_get_space(sched
);
1146 par
= parametrization(dim
, gen
->tiled_len
,
1147 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
1148 sched
= isl_union_map_intersect_range(sched
,
1149 isl_union_set_from_set(par
));
1154 /* Tile/wrap the P1 loops over the threads.
1156 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
1157 __isl_take isl_union_map
*sched
)
1163 dim
= isl_union_map_get_space(sched
);
1165 if (gen
->options
->wrap
)
1166 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
1167 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1169 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
1170 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1171 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
1173 sched
= isl_union_map_apply_range(sched
,
1174 isl_union_map_from_map(tiling
));
1176 par
= parametrization(dim
, gen
->thread_tiled_len
,
1177 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1179 sched
= isl_union_map_intersect_range(sched
,
1180 isl_union_set_from_set(par
));
1182 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1187 /* If the user asked for it, scale the shared memory tile loops
1188 * (T1T and T2) of "sched" by gen->tile_size[i].
1189 * If we are not performing "wrapping", then additionally scale the T1P
1190 * loops by gen->grid_dim[i].
1192 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
1193 __isl_take isl_union_map
*sched
)
1197 isl_basic_map
*scale
;
1199 isl_local_space
*ls
;
1201 if (!gen
->options
->scale_tile_loops
)
1204 dim
= isl_union_map_get_space(sched
);
1205 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
1206 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
1207 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1208 ls
= isl_local_space_from_space(dim
);
1210 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
1213 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
1214 f
= gen
->tile_size
[i
- gen
->tile_first
];
1215 if (!gen
->options
->wrap
)
1216 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
1217 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
1218 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
1219 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
1222 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1223 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1224 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1225 scale
= isl_basic_map_add_constraint(scale
, c
);
1228 isl_local_space_free(ls
);
1230 sched
= isl_union_map_apply_range(sched
,
1231 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1236 /* If we are not performing "wrapping" and if the user asked for it,
1237 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1239 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1240 __isl_take isl_union_map
*sched
)
1244 isl_basic_map
*scale
;
1246 isl_local_space
*ls
;
1248 if (gen
->options
->wrap
)
1250 if (!gen
->options
->scale_tile_loops
)
1253 dim
= isl_union_map_get_space(sched
);
1254 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1255 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1256 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1257 ls
= isl_local_space_from_space(dim
);
1259 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1262 if (i
>= gen
->shared_len
&&
1263 i
< gen
->shared_len
+ gen
->n_block
)
1264 f
= gen
->block_dim
[i
- gen
->shared_len
];
1266 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1267 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1268 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1269 scale
= isl_basic_map_add_constraint(scale
, c
);
1272 isl_local_space_free(ls
);
1274 sched
= isl_union_map_apply_range(sched
,
1275 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1280 /* If we are not performing "wrapping" and if the user asked for it,
1281 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1283 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1284 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1288 isl_basic_map
*scale
;
1290 isl_local_space
*ls
;
1292 if (gen
->options
->wrap
)
1294 if (!gen
->options
->scale_tile_loops
)
1297 dim
= isl_union_map_get_space(sched
);
1298 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1299 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1300 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1301 ls
= isl_local_space_from_space(dim
);
1303 for (i
= 0; i
< len
; ++i
) {
1306 if (i
>= first
&& i
< first
+ n_tile
)
1307 f
= gen
->kernel
->block_dim
[i
- first
];
1309 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1310 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1311 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1312 scale
= isl_basic_map_add_constraint(scale
, c
);
1315 isl_local_space_free(ls
);
1317 sched
= isl_union_map_apply_range(sched
,
1318 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1323 /* Add "len" parameters p[i] called prefix%d,
1324 * with bounds to 0 <= p[i] < size[i].
1326 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1327 int len
, int *size
, const char *prefix
)
1332 isl_basic_set
*bset
;
1334 isl_local_space
*ls
;
1337 nparam
= isl_set_dim(set
, isl_dim_param
);
1338 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1340 for (i
= 0; i
< len
; ++i
) {
1341 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1342 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1346 dim
= isl_set_get_space(set
);
1347 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1348 ls
= isl_local_space_from_space(dim
);
1350 for (i
= 0; i
< len
; ++i
) {
1351 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1352 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1354 bset
= isl_basic_set_add_constraint(bset
, c
);
1356 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1357 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1359 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1360 bset
= isl_basic_set_add_constraint(bset
, c
);
1363 isl_local_space_free(ls
);
1365 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1368 /* Add "len" parameters p[i] called prefix%d and intersect "set"
1371 * { : 0 <= p[i] < size[i] }
1373 * or an overapproximation.
1375 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1376 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1382 isl_local_space
*ls
;
1385 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1386 nparam
= isl_set_dim(set
, isl_dim_param
);
1387 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1389 for (i
= 0; i
< len
; ++i
) {
1390 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1391 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1395 space
= isl_space_params(isl_set_get_space(set
));
1396 ls
= isl_local_space_from_space(space
);
1397 for (i
= 0; i
< len
; ++i
) {
1398 isl_pw_aff
*param
, *size_i
, *zero
;
1401 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1402 isl_dim_param
, nparam
+ i
);
1404 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1405 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1406 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1407 set
= isl_set_intersect_params(set
, bound
);
1409 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1410 bound
= isl_pw_aff_ge_set(param
, zero
);
1411 set
= isl_set_intersect_params(set
, bound
);
1413 isl_local_space_free(ls
);
1418 /* Construct a map from an access to group->array to the corresponding
1419 * shared/private memory tile.
1420 * The map is of the form
1422 * { [D[i] -> A[a]] -> T[t] }
1424 * where D represents the initial shared_len dimensions
1425 * of the computed schedule.
1427 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1429 struct gpu_array_tile
*tile
;
1430 isl_multi_aff
*tiling
;
1432 tile
= group
->private_tile
;
1434 tile
= group
->shared_tile
;
1436 tiling
= isl_multi_aff_copy(tile
->tiling
);
1438 return isl_map_from_multi_aff(tiling
);
1441 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1443 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1449 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1452 fixed
= isl_val_is_int(v
);
1458 /* Given a schedule that iterates over all elements in a piece of an array,
1459 * perform tiling/wrapping over the threads.
1461 * In particular, we tile the final iterators so that the final thread
1462 * dimension runs over the final array dimension.
1463 * However, if those final iterators have only a single iteration,
1464 * we try to tile earlier iterators instead.
1466 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1467 __isl_take isl_map
*sched
)
1470 isl_union_map
*usched
;
1473 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1477 n_tile
= gen
->kernel
->n_block
;
1478 if (n_tile
> nvar
) {
1480 sched
= isl_map_insert_dims(sched
,
1481 isl_dim_out
, 0, n_tile
- nvar
);
1482 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1483 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1487 first
= nvar
- n_tile
;
1489 for (; first
> 0; first
--)
1490 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1493 dim
= isl_map_get_space(sched
);
1494 dim
= isl_space_params(dim
);
1495 if (gen
->options
->wrap
)
1496 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1497 n_tile
, gen
->kernel
->block_dim
);
1499 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1500 n_tile
, gen
->kernel
->block_dim
);
1501 sched
= isl_map_apply_range(sched
, tiling
);
1503 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1504 sched
= isl_map_intersect_range(sched
, par
);
1506 usched
= isl_union_map_from_map(sched
);
1507 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1509 sched
= isl_map_from_union_map(usched
);
1514 /* Return the union of all read (read = 1) and/or write (write = 1)
1515 * access relations in the group.
1517 static __isl_give isl_union_map
*group_access_relation(
1518 struct gpu_array_ref_group
*group
, int read
, int write
)
1521 isl_union_map
*access
;
1523 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1524 for (i
= 0; i
< group
->n_ref
; ++i
) {
1527 if (!((read
&& group
->refs
[i
]->read
) ||
1528 (write
&& group
->refs
[i
]->write
)))
1530 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1531 access
= isl_union_map_union(access
,
1532 isl_union_map_from_map(map_i
));
1538 /* Return the union of all tagged access relations in the group.
1540 static __isl_give isl_union_map
*group_tagged_access_relation(
1541 struct gpu_array_ref_group
*group
)
1544 isl_union_map
*access
;
1546 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1547 for (i
= 0; i
< group
->n_ref
; ++i
) {
1550 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1551 access
= isl_union_map_union(access
,
1552 isl_union_map_from_map(map_i
));
1558 /* Return the extent of "array", recomputed from the bounds.
1559 * The recomputed extent may be simpler than the original extent.
1561 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1566 isl_local_space
*ls
;
1569 id
= isl_set_get_tuple_id(array
->extent
);
1570 space
= isl_set_get_space(array
->extent
);
1571 extent
= isl_set_universe(isl_space_copy(space
));
1572 ls
= isl_local_space_from_space(space
);
1573 for (i
= 0; i
< array
->n_index
; ++i
) {
1579 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1581 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1583 index
= isl_pw_aff_from_aff(aff
);
1584 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1585 bound
= isl_pw_aff_from_range(bound
);
1586 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1587 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1589 lt
= isl_pw_aff_lt_set(index
, bound
);
1590 extent
= isl_set_intersect(extent
, lt
);
1592 isl_local_space_free(ls
);
1598 /* Return a map from the first shared_len dimensions of the computed
1599 * schedule to the array tile in
1600 * global memory that corresponds to the shared memory copy.
1602 * In particular, return a map
1608 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1612 * 0 <= a <= array_size - 1 (2)
1614 * Note that if some stride has been detected (i.e., when
1615 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1616 * to the shifted and scaled down version.
1618 * Constraints (1) are obtained by mapping the size constraints on the
1619 * shared/private memory tile back to the access relation.
1620 * Constraints (2) are obtained from the (recomputed) extent.
1622 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1625 int n_index
= group
->array
->n_index
;
1631 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1632 space
= isl_space_range(space
);
1633 local
= isl_set_universe(space
);
1634 for (i
= 0; i
< n_index
; ++i
) {
1637 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1638 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1639 bound
= isl_val_sub_ui(bound
, 1);
1640 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1642 local
= isl_set_preimage_multi_aff(local
,
1643 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1644 tile
= isl_set_unwrap(local
);
1645 extent
= array_extent(group
->array
);
1646 tile
= isl_map_intersect_range(tile
, extent
);
1651 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1652 * return the corresponding mapping from the AST schedule to
1653 * to the first shared_len dimensions of the schedule computed by PPCG.
1655 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1656 __isl_take isl_pw_multi_aff
*iterator_map
)
1658 isl_union_map
*umap
;
1660 isl_map
*map
, *sched
;;
1662 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1663 space
= isl_space_from_domain(space
);
1664 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1666 umap
= isl_union_map_copy(gen
->shared_sched
);
1667 umap
= isl_union_map_apply_range(umap
,
1668 isl_union_map_copy(gen
->shared_proj
));
1669 map
= isl_union_map_extract_map(umap
, space
);
1670 isl_union_map_free(umap
);
1672 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1673 sched
= isl_map_detect_equalities(sched
);
1675 return isl_pw_multi_aff_from_map(sched
);
1678 /* Set unroll[j] if the input dimension j is involved in
1679 * the index expression represented by ma.
1681 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1685 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1686 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1689 for (i
= 0; i
< n_out
; ++i
) {
1692 aff
= isl_multi_aff_get_aff(ma
, i
);
1693 for (j
= 0; j
< n_in
; ++j
)
1694 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1700 isl_multi_aff_free(ma
);
1704 /* Given an array pos mapping input dimensions to the corresponding
1705 * output dimension, construct the corresponding map.
1707 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1712 isl_basic_map
*bmap
;
1713 isl_local_space
*ls
;
1715 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1716 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1717 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1718 ls
= isl_local_space_from_space(dim
);
1720 for (i
= 0; i
< len
; ++i
) {
1721 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1722 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1724 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1726 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1728 isl_local_space_free(ls
);
1730 return isl_map_from_basic_map(bmap
);
1733 /* Remove the private tiles from all array reference groups,
1734 * except for the groups of arrays that are marked force_private.
1736 static void remove_private_tiles(struct gpu_gen
*gen
)
1740 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1741 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1743 if (array
->force_private
)
1746 for (j
= 0; j
< array
->n_group
; ++j
) {
1747 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1749 group
->private_tile
= free_tile(group
->private_tile
);
1754 /* Find all loops involved in any of the index expressions for any of
1755 * the private accesses, move them innermost and then mark them as
1756 * requiring unrolling by setting gen->first_unroll.
1757 * The loops involved should all be parallel because of the checks
1758 * we performed in check_private_group_access. Moving them innermost
1759 * is therefore a valid transformation.
1761 * If any of the arrays are marked force_private, however, then
1762 * those loops may not be parallel with respect to the marked arrays.
1763 * If any of the loops would have to be moved innermost for the
1764 * (non forced) private accesses and if there are any force_private
1765 * arrays, then we revert the decision to map the selected arrays
1766 * to private memory. An alternative solution would be to expand
1767 * the force_private arrays.
1769 * Loops up to gen->shared_len are generated before the mapping to
1770 * threads is applied. They should therefore be ignored.
1772 * We compute the hidden equalities of the schedule first
1773 * since we will need them in our calls to isl_pw_multi_aff_from_map
1774 * and because we want to make sure that the same equalities
1775 * are also available to the code generator.
1777 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1778 __isl_take isl_union_map
*sched
)
1781 int unroll
[gen
->thread_tiled_len
];
1782 int perm
[gen
->thread_tiled_len
];
1785 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1787 gen
->first_unroll
= -1;
1789 sched
= isl_union_map_detect_equalities(sched
);
1790 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1792 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1793 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1795 for (j
= 0; j
< array
->n_group
; ++j
) {
1796 isl_union_map
*access
;
1798 isl_pw_multi_aff
*pma
;
1800 if (!array
->groups
[j
]->private_tile
)
1803 access
= group_access_relation(array
->groups
[j
], 1, 1);
1804 access
= isl_union_map_apply_domain(access
,
1805 isl_union_map_copy(sched
));
1807 acc
= isl_map_from_union_map(access
);
1808 pma
= isl_pw_multi_aff_from_map(acc
);
1809 isl_pw_multi_aff_foreach_piece(pma
,
1810 &check_unroll
, unroll
);
1812 isl_pw_multi_aff_free(pma
);
1816 for (i
= gen
->shared_len
; i
< len
; ++i
)
1823 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1827 if (gen
->any_force_private
) {
1828 remove_private_tiles(gen
);
1833 for (i
= 0; i
< gen
->shared_len
; ++i
)
1835 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1838 gen
->first_unroll
= j
- gen
->shared_len
;
1839 for (i
= gen
->shared_len
; i
< len
; ++i
)
1843 dim
= isl_union_map_get_space(sched
);
1844 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1845 sched
= isl_union_map_apply_range(sched
,
1846 isl_union_map_from_map(permute
));
1851 /* Given a constraint
1853 * a(p,i) + j = g f(e)
1855 * or -a(p,i) - j = g f(e) if sign < 0,
1856 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1857 * a(p,i) is assumed to be an expression in only the parameters
1858 * and the input dimensions.
1860 static void extract_stride(__isl_keep isl_constraint
*c
,
1861 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1870 isl_val_free(bound
->stride
);
1871 bound
->stride
= isl_val_copy(stride
);
1873 space
= isl_constraint_get_space(c
);
1874 space
= isl_space_domain(space
);
1876 nparam
= isl_space_dim(space
, isl_dim_param
);
1877 nvar
= isl_space_dim(space
, isl_dim_set
);
1879 v
= isl_constraint_get_constant_val(c
);
1882 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1883 aff
= isl_aff_set_constant_val(aff
, v
);
1885 for (i
= 0; i
< nparam
; ++i
) {
1886 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1888 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1891 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1894 for (i
= 0; i
< nvar
; ++i
) {
1895 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1897 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1900 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1906 /* Given an equality constraint of a map with a single output dimension j,
1907 * check if the constraint is of the form
1909 * a(p,i) + j = g f(e)
1911 * with a(p,i) an expression in the parameters and input dimensions
1912 * and f(e) an expression in the existentially quantified variables.
1913 * If so, and if g is larger than any such g from a previously considered
1914 * constraint, then call extract_stride to record the stride information
1917 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1923 struct gpu_array_bound
*bound
= user
;
1925 ctx
= isl_constraint_get_ctx(c
);
1926 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1927 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1929 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1930 int s
= isl_val_sgn(v
);
1931 isl_val
*stride
= isl_val_zero(ctx
);
1934 for (i
= 0; i
< n_div
; ++i
) {
1935 v
= isl_constraint_get_coefficient_val(c
,
1937 stride
= isl_val_gcd(stride
, v
);
1939 if (!isl_val_is_zero(stride
) &&
1940 isl_val_gt(stride
, bound
->stride
))
1941 extract_stride(c
, bound
, stride
, s
);
1943 isl_val_free(stride
);
1947 isl_constraint_free(c
);
1951 /* Given contraints on an array index i, check if we can find
1952 * a shift a(p) and a stride g such that
1954 * a(p) + i = 0 mod g
1956 * If so, record the information in bound and apply the mapping
1957 * i -> (i + a(p))/g to the array index in bounds and return
1958 * the new constraints.
1959 * If not, simply return the original constraints.
1961 * If bounds is a subset of the space
1965 * then the bound recorded in bound->shift is of the form
1969 * with s(D) equal to a(p) above.
1970 * The mapping recorded in bound->shift_map is of the form
1972 * [D -> i] -> [D -> (i + S(D))/g]
1974 * This mapping is computed as follows.
1975 * We first introduce "i" in the domain through precomposition
1976 * with [D -> i] -> D obtaining
1980 * Adding [D -> i] -> i produces
1982 * [D -> i] -> i + s(D)
1984 * and the domain product with [D -> i] -> D yields
1986 * [D -> i] -> [D -> i + s(D)]
1988 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1990 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1991 __isl_take isl_basic_map
*bounds
)
1994 isl_basic_map
*hull
;
1995 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1996 isl_basic_set
*bset
;
1999 bound
->stride
= NULL
;
2001 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
2003 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
2005 isl_basic_map_free(hull
);
2010 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
2011 space
= isl_basic_map_get_space(bounds
);
2012 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
2013 shift
= isl_basic_map_apply_range(bmap
, shift
);
2014 space
= isl_basic_map_get_space(bounds
);
2015 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
2016 shift
= isl_basic_map_sum(id
, shift
);
2017 space
= isl_basic_map_get_space(bounds
);
2018 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
2019 shift
= isl_basic_map_range_product(id
, shift
);
2021 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
2022 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
2023 space
= isl_space_range(isl_basic_map_get_space(bounds
));
2024 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2025 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
2026 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
2027 scale
= isl_basic_map_from_aff(aff
);
2028 scale
= isl_basic_map_product(id
, scale
);
2030 bound
->shift_map
= isl_basic_map_apply_range(shift
, scale
);
2031 bmap
= isl_basic_map_copy(bound
->shift_map
);
2032 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
2033 bounds
= isl_basic_set_unwrap(bset
);
2038 /* Data used in compute_array_dim_size and compute_size_in_direction.
2040 * pos is the position of the variable representing the array index,
2041 * i.e., the variable for which want to compute the size. This variable
2042 * is also the last variable in the set.
2044 struct gpu_size_info
{
2045 isl_basic_set
*bset
;
2046 struct gpu_array_bound
*bound
;
2050 /* Given a constraint from the basic set describing the bounds on
2051 * an array index, check if it is a lower bound, say m i >= b(x), and,
2052 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2053 * upper bound. If so, and if this bound is smaller than any bound
2054 * derived from earlier constraints, set the size to this bound on
2055 * the expression and the lower bound to ceil(b(x)/m).
2057 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2059 struct gpu_size_info
*size
= user
;
2066 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2067 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2069 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
2070 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
2071 isl_constraint_free(c
);
2075 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2076 aff
= isl_aff_ceil(aff
);
2078 lb
= isl_aff_copy(aff
);
2080 aff
= isl_aff_neg(aff
);
2081 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
2083 v
= isl_basic_set_max_val(size
->bset
, aff
);
2086 if (isl_val_is_int(v
)) {
2087 v
= isl_val_add_ui(v
, 1);
2088 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
2089 isl_val_free(size
->bound
->size
);
2090 size
->bound
->size
= isl_val_copy(v
);
2091 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
2092 isl_aff_free(size
->bound
->lb
);
2093 size
->bound
->lb
= isl_aff_copy(lb
);
2099 isl_constraint_free(c
);
2104 /* Given a basic map "bounds" that maps parameters and input dimensions
2105 * to a single output dimension, look for an expression in the parameters
2106 * and input dimensions such that the range of the output dimension shifted
2107 * by this expression is a constant.
2109 * In particular, we currently only consider lower bounds on the output
2110 * dimension as candidate expressions.
2112 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
2113 __isl_take isl_basic_map
*bounds
)
2115 struct gpu_size_info size
;
2117 bounds
= isl_basic_map_detect_equalities(bounds
);
2118 bounds
= check_stride(bound
, bounds
);
2124 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2125 size
.bset
= isl_basic_map_wrap(bounds
);
2126 size
.bset
= isl_basic_set_flatten(size
.bset
);
2127 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2128 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2130 isl_basic_set_free(size
.bset
);
2132 return bound
->size
? 0 : -1;
2135 /* Check if we can find a memory tile for the given array
2136 * based on the given accesses, and if so, put the results in "tile".
2138 * We project the accesses on each index in turn and look for a parametric
2139 * offset such that the size is constant.
2141 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2145 for (i
= 0; i
< tile
->n
; ++i
) {
2147 isl_basic_map
*hull
;
2149 access_i
= isl_map_copy(access
);
2150 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2151 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2152 1, tile
->n
- (i
+ 1));
2153 access_i
= isl_map_compute_divs(access_i
);
2154 hull
= isl_map_simple_hull(access_i
);
2155 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2162 /* Construct a map with input the shared tile loops and the loops that
2163 * will be wrapped around the threads that relates these later loops
2164 * to the thread indices and then projects them out.
2166 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2174 dim
= isl_union_map_get_space(gen
->shared_sched
);
2176 if (gen
->options
->wrap
)
2177 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2178 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2180 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2181 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2185 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2186 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2189 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2190 priv
= isl_map_intersect_range(priv
, par
);
2192 dim
= isl_map_get_space(priv
);
2193 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2194 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2195 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2198 priv
= isl_map_apply_range(priv
, proj
);
2203 /* Construct a map from domain_dim to domain_dim that increments
2204 * the dimension at position "pos" and leaves all other dimensions
2207 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2210 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2212 isl_basic_map
*next
;
2213 isl_local_space
*ls
;
2215 dim
= isl_space_map_from_set(domain_dim
);
2216 next
= isl_basic_map_universe(isl_space_copy(dim
));
2217 ls
= isl_local_space_from_space(dim
);
2219 for (i
= 0; i
< len
; ++i
) {
2222 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2223 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2224 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2226 c
= isl_constraint_set_constant_si(c
, 1);
2227 next
= isl_basic_map_add_constraint(next
, c
);
2230 isl_local_space_free(ls
);
2232 return isl_map_from_basic_map(next
);
2235 /* Check if the given access is coalesced.
2236 * That is, check whether incrementing the dimension that will get
2237 * wrapped over the last thread index results in incrementing
2238 * the last array index.
2240 * This function is only called for access relations without reuse.
2242 static int access_is_coalesced(struct gpu_gen
*gen
,
2243 __isl_keep isl_union_map
*access
)
2246 isl_map
*access_map
;
2247 isl_map
*next_thread_x
;
2248 isl_map
*next_element
;
2252 access
= isl_union_map_copy(access
);
2253 access
= isl_union_map_apply_domain(access
,
2254 isl_union_map_copy(gen
->tiled_sched
));
2255 access_map
= isl_map_from_union_map(access
);
2257 dim
= isl_map_get_space(access_map
);
2258 dim
= isl_space_domain(dim
);
2259 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2261 dim
= isl_map_get_space(access_map
);
2262 dim
= isl_space_range(dim
);
2263 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2265 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2266 map
= isl_map_apply_range(map
, access_map
);
2268 coalesced
= isl_map_is_subset(map
, next_element
);
2270 isl_map_free(next_element
);
2276 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2277 * dimensions of the computed schedule, check if it is bijective for
2278 * fixed values of the first gen->shared_len dimensions.
2279 * We perform this check by equating these dimensions to parameters.
2281 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2287 access
= isl_map_copy(access
);
2288 space
= isl_space_params(isl_map_get_space(access
));
2289 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2290 0, gen
->shared_len
, "s");
2291 access
= isl_map_intersect_domain(access
, par
);
2292 res
= isl_map_is_bijective(access
);
2293 isl_map_free(access
);
2298 /* Look for the last shared tile loop that affects the offset of "tile"
2299 * and return the result.
2300 * If there is no such loop, then return the index of the loop
2301 * before the first shared tile loop, in particular gen->tile_first - 1.
2303 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2304 struct gpu_array_tile
*tile
)
2308 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2309 for (i
= 0; i
< tile
->n
; ++i
) {
2313 lb
= tile
->bound
[i
].lb
;
2314 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2317 shift
= tile
->bound
[i
].shift
;
2320 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2330 /* Look for the last shared tile loop that affects the offset of the
2331 * shared or private tile and store the result in group->last_shared.
2332 * If there is no such loop, then group->last_shared is set to a value
2333 * before the first shared tile loop, in particular gen->tile_first - 1.
2334 * If there is no tile defined on the array reference group,
2335 * then set group->last_shared to gen->shared_len - 1.
2337 static void set_last_shared(struct gpu_gen
*gen
,
2338 struct gpu_array_ref_group
*group
)
2340 struct gpu_array_tile
*tile
;
2342 group
->last_shared
= gen
->shared_len
- 1;
2344 tile
= group
->private_tile
;
2346 tile
= group
->shared_tile
;
2350 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2353 /* Compute a privatized copy of all access relations from reference groups that
2354 * are mapped to private memory and store the result in gen->privatization.
2356 * Read-only scalars and arrays containing structures are not mapped
2357 * to private memory.
2359 static void compute_private_access(struct gpu_gen
*gen
)
2362 isl_union_map
*private;
2364 if (!gen
->options
->use_private_memory
)
2367 private = isl_union_map_empty(isl_union_map_get_space(gen
->shared_sched
));
2369 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2370 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2372 if (gpu_array_is_read_only_scalar(array
))
2374 if (array
->has_compound_element
)
2377 for (j
= 0; j
< array
->n_group
; ++j
) {
2378 if (!array
->groups
[j
]->private_tile
)
2381 private = isl_union_map_union(private,
2382 group_access_relation(array
->groups
[j
], 1, 1));
2386 if (isl_union_map_is_empty(private))
2387 isl_union_map_free(private);
2389 isl_union_map
*priv
;
2391 private = isl_union_map_apply_domain(private,
2392 isl_union_map_copy(gen
->shared_sched
));
2393 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2394 private = isl_union_map_apply_domain(private, priv
);
2395 gen
->private_access
= private;
2399 /* Compute the size of the tile specified by "tile"
2400 * in number of elements and return the result.
2402 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2407 size
= isl_val_one(ctx
);
2409 for (i
= 0; i
< tile
->n
; ++i
)
2410 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2415 /* If max_shared_memory is not set to infinity (-1), then make
2416 * sure that the total amount of shared memory required by the
2417 * array reference groups mapped to shared memory is no larger
2418 * than this maximum.
2420 * We apply a greedy approach and discard (keep in global memory)
2421 * those groups that would result in a total memory size that
2422 * is larger than the maximum.
2424 * This function should be called after any function that may
2425 * affect the decision on whether to place a reference group
2426 * in private, shared or global memory.
2428 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2431 isl_val
*left
, *size
;
2433 if (gen
->options
->max_shared_memory
< 0)
2436 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2438 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2439 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2441 for (j
= 0; j
< array
->n_group
; ++j
) {
2442 struct gpu_array_ref_group
*group
;
2444 group
= array
->groups
[j
];
2445 if (group
->private_tile
)
2447 if (!group
->shared_tile
)
2450 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2451 size
= isl_val_mul_ui(size
, array
->size
);
2453 if (isl_val_le(size
, left
)) {
2454 left
= isl_val_sub(left
, size
);
2459 group
->shared_tile
= free_tile(group
->shared_tile
);
2466 /* Given a description of an array tile "tile" and the "space"
2470 * where D represents the first shared_len schedule dimensions
2471 * and A represents the array, construct an isl_multi_aff
2473 * { [D[i] -> A[a]] -> A'[a'] }
2475 * with A' a scaled down copy of A according to the shifts and strides
2476 * in "tile". In particular,
2478 * a' = (a + shift(i))/stride
2480 * "insert_array" represents
2484 * and is used to insert A into the domain of functions that only
2487 static __isl_give isl_multi_aff
*strided_tile(
2488 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2489 __isl_keep isl_multi_aff
*insert_array
)
2493 isl_multi_aff
*shift
;
2494 isl_multi_val
*stride
;
2496 isl_local_space
*ls
;
2497 isl_multi_aff
*tiling
;
2499 ctx
= isl_space_get_ctx(space
);
2500 space2
= isl_space_domain(isl_space_copy(space
));
2501 ls
= isl_local_space_from_space(space2
);
2502 space2
= isl_space_range(isl_space_copy(space
));
2503 stride
= isl_multi_val_zero(space2
);
2504 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2506 for (i
= 0; i
< tile
->n
; ++i
) {
2507 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2511 if (tile
->bound
[i
].shift
) {
2512 stride_i
= isl_val_copy(bound
->stride
);
2513 shift_i
= isl_aff_copy(bound
->shift
);
2515 stride_i
= isl_val_one(ctx
);
2516 shift_i
= isl_aff_zero_on_domain(
2517 isl_local_space_copy(ls
));
2520 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2521 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2523 isl_local_space_free(ls
);
2525 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2526 isl_multi_aff_copy(insert_array
));
2528 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2529 tiling
= isl_multi_aff_add(tiling
, shift
);
2530 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2535 /* Compute a tiling for the array reference group "group".
2537 * The tiling is of the form
2539 * { [D[i] -> A[a]] -> T[t] }
2541 * where D represents the first shared_len schedule dimensions,
2542 * A represents the global array and T represents the shared or
2543 * private memory tile. The name of T is the name of the local
2546 * If there is any stride in the accesses, then the mapping is
2548 * t = (a + shift(i))/stride - lb(i)
2550 * otherwise, it is simply
2554 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2557 struct gpu_array_tile
*tile
;
2558 struct gpu_array_info
*array
= group
->array
;
2560 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2564 tile
= group
->private_tile
;
2566 tile
= group
->shared_tile
;
2570 space
= isl_map_get_space(group
->access
);
2571 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2573 for (i
= 0; i
< tile
->n
; ++i
)
2574 if (tile
->bound
[i
].shift
)
2578 tiling
= strided_tile(tile
, space
, insert_array
);
2580 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2582 lb
= isl_multi_aff_zero(space
);
2583 for (i
= 0; i
< tile
->n
; ++i
) {
2584 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2585 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2587 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2589 tiling
= isl_multi_aff_sub(tiling
, lb
);
2591 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2592 p
= print_array_name(p
, group
);
2593 local_name
= isl_printer_get_str(p
);
2594 isl_printer_free(p
);
2595 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2598 tile
->tiling
= tiling
;
2601 /* Compute a tiling for all the array reference groups.
2603 static void compute_group_tilings(struct gpu_gen
*gen
)
2607 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2608 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2610 for (j
= 0; j
< array
->n_group
; ++j
)
2611 compute_group_tiling(array
->groups
[j
]);
2615 /* Fill up the groups array with singleton groups, i.e., one group
2616 * per reference, initializing the array, access, write, n_ref and refs fields.
2617 * In particular the access field is initialized to the scheduled
2618 * access relation of the array reference.
2620 * Return the number of elements initialized, i.e., the number of
2621 * active references in the current kernel.
2623 static int populate_array_references(struct gpu_array_info
*array
,
2624 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2628 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2631 for (i
= 0; i
< array
->n_ref
; ++i
) {
2632 isl_union_map
*umap
;
2634 struct gpu_array_ref_group
*group
;
2635 struct gpu_stmt_access
*access
= array
->refs
[i
];
2637 map
= isl_map_copy(access
->access
);
2638 umap
= isl_union_map_from_map(map
);
2639 umap
= isl_union_map_apply_domain(umap
,
2640 isl_union_map_copy(sched
));
2642 if (isl_union_map_is_empty(umap
)) {
2643 isl_union_map_free(umap
);
2647 map
= isl_map_from_union_map(umap
);
2648 map
= isl_map_detect_equalities(map
);
2650 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2652 group
->array
= array
;
2653 group
->access
= map
;
2654 group
->write
= access
->write
;
2655 group
->exact_write
= access
->exact_write
;
2656 group
->refs
= &array
->refs
[i
];
2659 groups
[n
++] = group
;
2665 /* If group->n_ref == 1, then group->refs was set by
2666 * populate_array_references to point directly into
2667 * group->array->refs and should not be freed.
2668 * If group->n_ref > 1, then group->refs was set by join_groups
2669 * to point to a newly allocated array.
2671 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2675 free_tile(group
->shared_tile
);
2676 free_tile(group
->private_tile
);
2677 isl_map_free(group
->access
);
2678 if (group
->n_ref
> 1)
2683 /* Given a map where the input dimensions represent the tile loops,
2684 * eliminate the innermost of those that have a fixed value
2685 * until we reach one that does not (obviously) have a fixed value.
2687 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2688 __isl_take isl_map
*access
)
2692 n
= isl_map_dim(access
, isl_dim_in
);
2694 for (i
= n
- 1; i
>= 0; --i
) {
2695 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2697 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2702 /* Check if the access relations of group1 and group2 overlap within
2703 * the innermost loop. In particular, ignore any inner dimension
2704 * with a fixed value.
2705 * The copying to and from shared memory will be performed within
2706 * the innermost actual loop so we are only allowed to consider
2707 * the dimensions up to that innermost loop while checking whether
2708 * two access relations overlap.
2710 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2711 struct gpu_array_ref_group
*group2
)
2714 isl_map
*access1
, *access2
;
2716 access1
= isl_map_copy(group1
->access
);
2717 access1
= eliminate_fixed_inner_loops(access1
);
2718 access2
= isl_map_copy(group2
->access
);
2719 access2
= eliminate_fixed_inner_loops(access2
);
2720 access1
= isl_map_intersect(access1
, access2
);
2721 empty
= isl_map_is_empty(access1
);
2722 isl_map_free(access1
);
2727 /* Combine the given two groups into a single group, containing
2728 * the references of both groups.
2730 static struct gpu_array_ref_group
*join_groups(
2731 struct gpu_array_ref_group
*group1
,
2732 struct gpu_array_ref_group
*group2
)
2736 struct gpu_array_ref_group
*group
;
2738 ctx
= isl_map_get_ctx(group1
->access
);
2739 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2741 group
->array
= group1
->array
;
2742 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2743 isl_map_copy(group2
->access
));
2744 group
->write
= group1
->write
|| group2
->write
;
2745 group
->exact_write
= group1
->exact_write
&& group2
->exact_write
;
2746 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2747 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2749 assert(group
->refs
);
2750 for (i
= 0; i
< group1
->n_ref
; ++i
)
2751 group
->refs
[i
] = group1
->refs
[i
];
2752 for (i
= 0; i
< group2
->n_ref
; ++i
)
2753 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2758 /* Combine the given two groups into a single group and free
2759 * the original two groups.
2761 static struct gpu_array_ref_group
*join_groups_and_free(
2762 struct gpu_array_ref_group
*group1
,
2763 struct gpu_array_ref_group
*group2
)
2765 struct gpu_array_ref_group
*group
;
2767 group
= join_groups(group1
, group2
);
2768 free_array_ref_group(group1
);
2769 free_array_ref_group(group2
);
2773 /* Compute the private and/or shared memory tiles for the array
2774 * reference group "group" of array "array".
2775 * Return 0 on success and -1 on error.
2777 * If the array is a read-only scalar or if the user requested
2778 * not to use shared or private memory, then we do not need to do anything.
2780 * If the array group involves any may writes (that are not must writes),
2781 * then we would have to make sure that we load the data into shared/private
2782 * memory first in case the data is not written by the kernel
2783 * (but still written back out to global memory).
2784 * Since we don't have any such mechanism at the moment, we don't
2785 * compute shared/private tiles for groups involving may writes.
2787 * We only try to compute a shared memory tile if there is any reuse
2788 * or if the access is not coalesced.
2790 * For computing a private memory tile, we also require that there is
2791 * some reuse. Moreover, we require that the access is private
2792 * to the thread. That is, we check that any given array element
2793 * is only accessed by a single thread.
2794 * We compute an access relation that maps the shared tile loop iterators
2795 * and the shared point loop iterators that will be wrapped over the
2796 * threads to the array elements.
2797 * We actually check that those iterators that will be wrapped
2798 * partition the array space. This check is stricter than necessary
2799 * since several iterations may be mapped onto the same thread
2800 * and then they could be allowed to access the same memory elements,
2801 * but our check does not allow this situation.
2803 * We also check that the index expression only depends on parallel
2804 * loops. That way, we can move those loops innermost and unroll them.
2805 * Again, we use a test that is stricter than necessary.
2806 * We actually check whether the index expression only depends
2807 * on the iterators that are wrapped over the threads.
2808 * These are necessarily parallel, but there may be more parallel loops.
2810 * Combining the injectivity of the first test with the single-valuedness
2811 * of the second test, we simply test for bijectivity.
2813 * If the array is marked force_private, then we bypass all checks
2814 * and assume we can (and should) use registers.
2816 * If it turns out we can (or have to) use registers, we compute
2817 * the private memory tile size using can_tile, after introducing a dependence
2818 * on the thread indices.
2820 static int compute_group_bounds_core(struct gpu_gen
*gen
,
2821 struct gpu_array_ref_group
*group
)
2823 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->space
);
2824 isl_union_map
*access
;
2825 int n_index
= group
->array
->n_index
;
2828 int force_private
= group
->array
->force_private
;
2829 int use_shared
= gen
->options
->use_shared_memory
;
2830 int use_private
= force_private
|| gen
->options
->use_private_memory
;
2832 if (!use_shared
&& !use_private
)
2834 if (gpu_array_is_read_only_scalar(group
->array
))
2836 if (!force_private
&& !group
->exact_write
)
2839 access
= group_access_relation(group
, 1, 1);
2840 no_reuse
= isl_union_map_is_injective(access
);
2842 if (use_shared
&& (!no_reuse
|| !access_is_coalesced(gen
, access
))) {
2843 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2844 if (!can_tile(group
->access
, group
->shared_tile
))
2845 group
->shared_tile
= free_tile(group
->shared_tile
);
2848 if (!force_private
&& (!use_private
|| no_reuse
)) {
2849 isl_union_map_free(access
);
2853 access
= isl_union_map_apply_domain(access
,
2854 isl_union_map_copy(gen
->shared_sched
));
2856 acc
= isl_map_from_union_map(access
);
2858 if (!force_private
&& !access_is_bijective(gen
, acc
)) {
2863 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2864 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2865 if (!can_tile(acc
, group
->private_tile
))
2866 group
->private_tile
= free_tile(group
->private_tile
);
2870 if (force_private
&& !group
->private_tile
)
2871 isl_die(ctx
, isl_error_internal
,
2872 "unable to map array reference group to registers",
2878 /* Compute the private and/or shared memory tiles for the array
2879 * reference group "group" of array "array" and set last_shared.
2880 * Return 0 on success and -1 on error.
2882 static int compute_group_bounds(struct gpu_gen
*gen
,
2883 struct gpu_array_ref_group
*group
)
2885 if (compute_group_bounds_core(gen
, group
) < 0)
2887 set_last_shared(gen
, group
);
2892 /* If two groups have overlapping access relations (as determined by
2893 * the "overlap" function) and if one of them involves a write,
2894 * then merge the two groups into one.
2895 * If "compute_bounds" is set, then call compute_group_bounds
2896 * on the merged groups.
2898 * Return the updated number of groups.
2899 * Return -1 on error.
2901 static int group_writes(struct gpu_gen
*gen
,
2902 int n
, struct gpu_array_ref_group
**groups
,
2903 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2904 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2908 for (i
= 0; i
< n
; ++i
) {
2909 for (j
= n
- 1; j
> i
; --j
) {
2910 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2913 if (!overlap(groups
[i
], groups
[j
]))
2916 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2917 if (compute_bounds
&&
2918 compute_group_bounds(gen
, groups
[i
]) < 0)
2921 groups
[j
] = groups
[n
- 1];
2922 groups
[n
- 1] = NULL
;
2930 /* If two groups have overlapping access relations (within the innermost
2931 * loop) and if one of them involves a write, then merge the two groups
2934 * Return the updated number of groups.
2936 static int group_overlapping_writes(struct gpu_gen
*gen
,
2937 int n
, struct gpu_array_ref_group
**groups
)
2939 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2942 /* Check if the access relations of group1 and group2 overlap within
2943 * the outermost min(group1->last_shared, group2->last_shared) loops.
2945 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2946 struct gpu_array_ref_group
*group2
)
2951 isl_map
*map_i
, *map_j
, *map
;
2953 last_shared
= group1
->last_shared
;
2954 if (group2
->last_shared
< last_shared
)
2955 last_shared
= group2
->last_shared
;
2956 map_i
= isl_map_copy(group1
->access
);
2957 dim
= isl_map_dim(map_i
, isl_dim_in
);
2958 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2959 last_shared
+ 1, dim
- (last_shared
+ 1));
2960 map_j
= isl_map_copy(group2
->access
);
2961 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2962 last_shared
+ 1, dim
- (last_shared
+ 1));
2963 map
= isl_map_intersect(map_i
, map_j
);
2964 empty
= isl_map_is_empty(map
);
2970 /* If two groups have overlapping access relations (within the outer
2971 * last_shared loops) and if one of them involves a write,
2972 * then merge the two groups into one.
2974 * Return the updated number of groups.
2976 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2977 struct gpu_array_ref_group
**groups
)
2979 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2982 /* Is the size of the tile specified by "tile" smaller than the sum of
2983 * the sizes of the tiles specified by "tile1" and "tile2"?
2985 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2986 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2989 isl_val
*size
, *size1
, *size2
;
2991 size
= tile_size(ctx
, tile
);
2992 size1
= tile_size(ctx
, tile1
);
2993 size2
= tile_size(ctx
, tile2
);
2995 size
= isl_val_sub(size
, size1
);
2996 size
= isl_val_sub(size
, size2
);
2997 smaller
= isl_val_is_neg(size
);
3004 /* Given an initial grouping of array references and shared memory tiles
3005 * for each group that allows for a shared memory tile, merge two groups
3006 * if both have a shared memory tile, the merged group also has
3007 * a shared memory tile and the size of the tile for the merge group
3008 * is smaller than the sum of the tile sizes of the individual groups.
3010 * If merging two groups decreases the "last_shared" dimension of
3011 * one or both of the two groups, then we need to check for overlapping
3014 * Return the number of groups after merging.
3015 * Return -1 on error.
3017 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
3018 struct gpu_array_info
*array
, int n
,
3019 struct gpu_array_ref_group
**groups
)
3022 int recompute_overlap
= 0;
3023 isl_ctx
*ctx
= isl_space_get_ctx(array
->space
);
3025 for (i
= 0; i
< n
; ++i
) {
3026 if (!groups
[i
]->shared_tile
)
3028 for (j
= n
- 1; j
> i
; --j
) {
3031 struct gpu_array_ref_group
*group
;
3033 if (!groups
[j
]->shared_tile
)
3036 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
3037 isl_map_copy(groups
[j
]->access
));
3038 empty
= isl_map_is_empty(map
);
3044 group
= join_groups(groups
[i
], groups
[j
]);
3045 if (compute_group_bounds(gen
, group
) < 0) {
3046 free_array_ref_group(group
);
3049 if (!group
->shared_tile
||
3050 !smaller_tile(ctx
, group
->shared_tile
,
3051 groups
[i
]->shared_tile
,
3052 groups
[j
]->shared_tile
)) {
3053 free_array_ref_group(group
);
3057 if (group
->last_shared
< groups
[i
]->last_shared
||
3058 group
->last_shared
< groups
[j
]->last_shared
)
3059 recompute_overlap
= 1;
3060 free_array_ref_group(groups
[i
]);
3061 free_array_ref_group(groups
[j
]);
3064 groups
[j
] = groups
[n
- 1];
3069 if (recompute_overlap
)
3070 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3074 /* Set array->n_group and array->groups to n and groups.
3076 * Additionally, set the "nr" field of each group
3077 * and the "group" field of each reference in each group.
3079 static void set_array_groups(struct gpu_array_info
*array
,
3080 int n
, struct gpu_array_ref_group
**groups
)
3085 array
->groups
= groups
;
3087 for (i
= 0; i
< n
; ++i
) {
3090 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
3091 groups
[i
]->refs
[j
]->group
= i
;
3095 /* Group array references that should be considered together when
3096 * deciding whether to access them from private, shared or global memory.
3097 * Return -1 on error.
3099 * In particular, if two array references overlap and if one of them
3100 * is a write, then the two references are grouped together.
3101 * We first perform an initial grouping based only on the access relation.
3102 * After computing shared and private memory tiles, we check for
3103 * overlapping writes again, but this time taking into account
3104 * the "last_shared" property.
3106 * Furthermore, if two groups admit a shared memory tile and if the
3107 * combination of the two also admits a shared memory tile, we merge
3110 * If the array contains structures, then there is no need to compute
3111 * reference groups since we do not map such arrays to private or shared
3114 static int group_array_references(struct gpu_gen
*gen
,
3115 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
3119 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3120 struct gpu_array_ref_group
**groups
;
3122 if (array
->has_compound_element
)
3125 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
3130 n
= populate_array_references(array
, sched
, groups
);
3132 n
= group_overlapping_writes(gen
, n
, groups
);
3134 for (i
= 0; i
< n
; ++i
)
3135 if (compute_group_bounds(gen
, groups
[i
]) < 0)
3138 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3140 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
3142 set_array_groups(array
, n
, groups
);
3147 for (i
= 0; i
< array
->n_ref
; ++i
)
3148 free_array_ref_group(groups
[i
]);
3152 /* Take tiled_sched, project it onto the shared tile loops and
3153 * the loops that will be wrapped over the threads and
3154 * store the result in gen->shared_sched.
3155 * Also compute a projection that projects out the loops that will be
3156 * wrapped over the threads and store this projection in gen->shared_proj.
3158 static void compute_shared_sched(struct gpu_gen
*gen
)
3163 isl_union_map
*sched
;
3165 sched
= isl_union_map_copy(gen
->tiled_sched
);
3167 dim
= isl_union_map_get_space(sched
);
3168 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3169 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3171 dim
= isl_union_map_get_space(sched
);
3172 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3174 gen
->shared_sched
= sched
;
3175 gen
->shared_proj
= isl_union_map_from_map(proj
);
3178 /* For each scalar in the input program, check if there are any
3179 * order dependences active inside the current kernel, within
3180 * the same iteration of the host schedule.
3181 * If so, mark the scalar as force_private so that it will be
3182 * mapped to a register.
3184 static void check_scalar_live_ranges(struct gpu_gen
*gen
)
3188 isl_union_map
*sched
;
3189 isl_union_set
*domain
;
3190 isl_union_map
*same_host_iteration
;
3192 gen
->any_force_private
= 0;
3194 if (!gen
->options
->live_range_reordering
)
3197 sched
= gen
->shared_sched
;
3198 sched
= isl_union_map_universe(isl_union_map_copy(sched
));
3199 domain
= isl_union_map_domain(sched
);
3201 sched
= isl_union_map_copy(gen
->sched
);
3202 proj
= projection(isl_union_map_get_space(sched
),
3203 gen
->untiled_len
, gen
->tile_first
);
3204 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3205 same_host_iteration
= isl_union_map_apply_range(sched
,
3206 isl_union_map_reverse(isl_union_map_copy(sched
)));
3208 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3209 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3210 isl_union_map
*order
;
3212 array
->force_private
= 0;
3213 if (array
->n_index
!= 0)
3215 order
= isl_union_map_copy(array
->dep_order
);
3216 order
= isl_union_map_intersect_domain(order
,
3217 isl_union_set_copy(domain
));
3218 order
= isl_union_map_intersect_range(order
,
3219 isl_union_set_copy(domain
));
3220 order
= isl_union_map_intersect(order
,
3221 isl_union_map_copy(same_host_iteration
));
3222 if (!isl_union_map_is_empty(order
)) {
3223 array
->force_private
= 1;
3224 gen
->any_force_private
= 1;
3226 isl_union_map_free(order
);
3229 isl_union_map_free(same_host_iteration
);
3230 isl_union_set_free(domain
);
3233 /* Group references of all arrays in the program.
3235 static int group_references(struct gpu_gen
*gen
)
3239 isl_union_map
*sched
;
3241 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3242 isl_union_map_copy(gen
->shared_proj
));
3244 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3245 r
= group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
3250 isl_union_map_free(sched
);
3255 /* Free all array information that is local to the current kernel.
3257 static void free_local_array_info(struct gpu_gen
*gen
)
3261 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3262 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3264 for (j
= 0; j
< array
->n_group
; ++j
)
3265 free_array_ref_group(array
->groups
[j
]);
3266 free(array
->groups
);
3270 /* Compute the size of a bounding box around the origin and "set",
3271 * where "set" is assumed to contain only non-negative elements.
3272 * In particular, compute the maximal value of "set" in each direction
3275 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
3276 __isl_keep isl_set
*context
)
3279 isl_multi_pw_aff
*mpa
;
3281 n
= isl_set_dim(set
, isl_dim_set
);
3282 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
3283 for (i
= 0; i
< n
; ++i
) {
3288 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
3289 bound
= isl_pw_aff_coalesce(bound
);
3290 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
3292 space
= isl_pw_aff_get_domain_space(bound
);
3293 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
3294 one
= isl_aff_add_constant_si(one
, 1);
3295 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
3296 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
3303 /* Compute the effective grid size as a list of the sizes in each dimension.
3305 * The grid size specified by the user or set by default
3306 * in read_grid_sizes() and applied in tile_schedule(),
3307 * may be too large for the given code in the sense that
3308 * it may contain blocks that don't need to execute anything.
3309 * We therefore don't return this grid size, but instead the
3310 * smallest grid size that ensures that all blocks that actually
3311 * execute code are included in the grid.
3313 * We first extract a description of the grid, i.e., the possible values
3314 * of the block ids, from gen->tiled_sched.
3315 * The block ids are parameters in gen->tiled_sched.
3316 * We simply need to change them into set dimensions.
3318 * Then, for each block dimension, we compute the maximal value of the block id
3321 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
3322 struct ppcg_kernel
*kernel
)
3327 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
3328 grid
= isl_set_from_params(grid
);
3329 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
3330 for (i
= 0; i
< gen
->n_grid
; ++i
) {
3334 snprintf(name
, sizeof(name
), "b%d", i
);
3335 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
3337 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
3338 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
3341 return extract_size(grid
, kernel
->context
);
3344 /* Compute the size of a fixed bounding box around the origin and "set",
3345 * where "set" is assumed to contain only non-negative elements,
3346 * and store the results in "size".
3347 * In particular, compute the maximal value of "set" in each direction
3350 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
3353 isl_local_space
*ls
;
3356 n
= isl_set_dim(set
, isl_dim_set
);
3357 ls
= isl_local_space_from_space(isl_set_get_space(set
));
3358 obj
= isl_aff_zero_on_domain(ls
);
3359 for (i
= 0; i
< n
; ++i
) {
3362 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
3363 max
= isl_set_max_val(set
, obj
);
3364 size
[i
] = isl_val_get_num_si(max
) + 1;
3366 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
3372 /* Compute the effective block size as a list of the sizes in each dimension
3373 * and store the sizes in kernel->block_dim.
3375 * The block size specified by the user or set by default
3376 * in read_block_sizes() and applied in thread_tile_schedule(),
3377 * may be too large for the given code in the sense that
3378 * it may contain threads that don't need to execute anything.
3379 * We therefore don't store this block size in kernel->block_dim,
3380 * but instead the smallest block size that ensures that all threads
3381 * that actually execute code are included in the block.
3383 * The current implementation eliminates all parameters, ensuring
3384 * that the size is a fixed constant in each dimension.
3385 * In principle we could also compute parametric sizes.
3386 * We would have to make sure to project out all b%d and t%d parameters,
3389 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3394 isl_multi_pw_aff
*mpa
;
3396 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3397 block
= isl_set_from_params(block
);
3398 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3399 kernel
->n_block
= gen
->n_block
;
3400 for (i
= 0; i
< gen
->n_block
; ++i
) {
3404 snprintf(name
, sizeof(name
), "t%d", i
);
3405 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3407 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3410 nparam
= isl_set_dim(block
, isl_dim_param
);
3411 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3413 extract_fixed_size(block
, kernel
->block_dim
);
3416 void ppcg_kernel_free(void *user
)
3418 struct ppcg_kernel
*kernel
= user
;
3424 isl_multi_pw_aff_free(kernel
->grid_size
);
3425 isl_set_free(kernel
->context
);
3426 isl_union_set_free(kernel
->arrays
);
3427 isl_space_free(kernel
->space
);
3428 isl_ast_node_free(kernel
->tree
);
3430 for (i
= 0; i
< kernel
->n_array
; ++i
)
3431 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3432 free(kernel
->array
);
3434 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3435 free(kernel
->var
[i
].name
);
3436 isl_vec_free(kernel
->var
[i
].size
);
3443 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3444 struct ppcg_kernel_var
*var
)
3447 struct gpu_array_tile
*tile
;
3451 var
->array
= group
->array
;
3453 tile
= group
->private_tile
;
3454 var
->type
= ppcg_access_private
;
3456 tile
= group
->shared_tile
;
3457 var
->type
= ppcg_access_shared
;
3460 p
= isl_printer_to_str(ctx
);
3461 p
= print_array_name(p
, group
);
3462 var
->name
= isl_printer_get_str(p
);
3463 isl_printer_free(p
);
3465 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3467 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3468 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3469 isl_val_copy(tile
->bound
[j
].size
));
3472 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3477 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3478 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3480 for (j
= 0; j
< array
->n_group
; ++j
) {
3481 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3482 if (group
->private_tile
|| group
->shared_tile
)
3488 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3489 assert(kernel
->var
);
3492 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3493 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3495 for (j
= 0; j
< array
->n_group
; ++j
) {
3496 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3497 if (!group
->private_tile
&& !group
->shared_tile
)
3499 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3505 /* The sizes of the arrays on the host that have been computed by
3506 * extract_array_info may depend on the parameters. Use the extra
3507 * constraints on the parameters that are valid at "host_domain"
3508 * to simplify these expressions and store the results in kernel->array.
3510 * We only need these localized bounds for arrays that are accessed
3511 * by the current kernel. If we have found at least one reference group
3512 * then the array is accessed by the kernel. If the array has compound
3513 * elements then we skipped the construction of array reference groups.
3515 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3516 __isl_keep isl_set
*host_domain
)
3521 kernel
->array
= isl_calloc_array(gen
->ctx
,
3522 struct gpu_local_array_info
, gen
->prog
->n_array
);
3523 assert(kernel
->array
);
3524 kernel
->n_array
= gen
->prog
->n_array
;
3526 context
= isl_set_copy(host_domain
);
3527 context
= isl_set_params(context
);
3529 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3530 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3531 isl_pw_aff_list
*local
;
3533 if (array
->n_group
== 0 && !array
->has_compound_element
)
3536 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3538 for (j
= 0; j
< array
->n_index
; ++j
) {
3541 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3542 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3543 local
= isl_pw_aff_list_add(local
, pwaff
);
3546 kernel
->array
[i
].bound
= local
;
3548 isl_set_free(context
);
3551 /* Find the element in gen->stmt that has the given "id".
3552 * Return NULL if no such gpu_stmt can be found.
3554 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3558 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3559 if (id
== prog
->stmts
[i
].id
)
3563 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3566 /* Set gen->tile_len and gen->n_parallel to those of the statement
3567 * affected by the first map (part of the schedule)
3568 * on which this function is called.
3569 * Because of the way the schedule is constructed, the other statements
3570 * in the list, if any, should have the same values for these properties.
3572 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3574 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3576 struct gpu_stmt
*stmt
;
3578 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3579 stmt
= find_stmt(gen
->prog
, id
);
3585 isl_die(gen
->ctx
, isl_error_unknown
,
3586 "statement not found", return -1);
3588 gen
->tile_len
= stmt
->tile_len
;
3589 gen
->n_parallel
= stmt
->n_parallel
;
3594 void ppcg_kernel_stmt_free(void *user
)
3597 struct ppcg_kernel_stmt
*stmt
= user
;
3602 switch (stmt
->type
) {
3603 case ppcg_kernel_copy
:
3604 isl_ast_expr_free(stmt
->u
.c
.index
);
3605 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3607 case ppcg_kernel_domain
:
3608 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3610 case ppcg_kernel_sync
:
3617 /* Set the options of "context" to
3619 * { space -> [x] : x >= first }
3621 static __isl_give isl_ast_build
*set_unroll(
3622 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3629 ctx
= isl_ast_build_get_ctx(build
);
3631 space
= isl_space_from_domain(space
);
3632 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3633 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3634 unroll
= isl_map_universe(space
);
3635 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3636 opt
= isl_union_map_from_map(unroll
);
3638 build
= isl_ast_build_set_options(build
, opt
);
3643 /* Return a list of isl_ids of the form "prefix%d".
3645 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3646 int n
, const char *prefix
)
3652 names
= isl_id_list_alloc(ctx
, n
);
3653 for (i
= 0; i
< n
; ++i
) {
3656 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3657 id
= isl_id_alloc(ctx
, name
, NULL
);
3658 names
= isl_id_list_add(names
, id
);
3664 /* Extend the schedule "schedule" with the part of "extension"
3665 * starting at "first" up to "len".
3667 static __isl_give isl_union_map
*extend_schedule(
3668 __isl_take isl_union_map
*schedule
,
3669 __isl_take isl_union_map
*extension
, int first
, int len
)
3673 isl_union_map
*umap
;
3676 space
= isl_union_map_get_space(schedule
);
3677 space
= isl_space_set_from_params(space
);
3678 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3679 proj
= isl_set_identity(isl_set_universe(space
));
3680 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3681 extension
= isl_union_map_apply_range(extension
,
3682 isl_union_map_from_map(proj
));
3684 schedule
= isl_union_map_range_product(schedule
, extension
);
3689 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3692 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3693 __isl_keep isl_id
*ref_id
)
3695 struct gpu_stmt_access
*access
;
3697 for (access
= accesses
; access
; access
= access
->next
)
3698 if (access
->ref_id
== ref_id
)
3704 /* Return the index of the array called "name" in the list of arrays.
3706 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3710 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3711 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3717 /* Internal data structure for the index and AST expression transformation
3718 * callbacks for pet_stmt_build_ast_exprs.
3720 * "accesses" is the list of gpu_stmt_access in the statement.
3721 * "iterator_map" expresses the statement iterators in terms of
3722 * the AST loop iterators.
3723 * "sched2shared" expresses the first shared_len dimensions of
3724 * the computed schedule in terms of the AST loop iterators.
3726 * The following fields are set in transform_index and used in transform_expr.
3727 * "array" is the array that is being accessed.
3728 * "global" is set if the global array is accessed (rather than
3729 * shared/private memory).
3730 * "local_array" refers to information on the array specialized
3731 * to the current kernel.
3733 struct ppcg_transform_data
{
3734 struct gpu_gen
*gen
;
3735 struct gpu_stmt_access
*accesses
;
3736 isl_pw_multi_aff
*iterator_map
;
3737 isl_pw_multi_aff
*sched2shared
;
3739 struct gpu_array_info
*array
;
3741 struct gpu_local_array_info
*local_array
;
3744 /* Return the name of the outer array (of structs) accessed by "access".
3746 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
3751 space
= isl_space_range(isl_map_get_space(access
));
3752 while (space
&& isl_space_is_wrapping(space
))
3753 space
= isl_space_domain(isl_space_unwrap(space
));
3754 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
3755 isl_space_free(space
);
3760 /* Index transformation callback for pet_stmt_build_ast_exprs.
3762 * "index" expresses the array indices in terms of statement iterators
3764 * We first reformulate "index" in terms of the AST loop iterators.
3765 * Then we check if we are accessing the global array or
3766 * a shared/private copy. In the former case, we simply return
3767 * the updated index. If "index" is an affine expression rather
3768 * than an array access, then we also return the updated index here.
3770 * If no reference groups have been computed for the array,
3771 * then we can only be accessing the global array.
3773 * Otherwise, we apply the tiling to the index.
3774 * This tiling is of the form
3778 * The index is of the form
3782 * We update the tiling to refer to the AST loop iteratos
3786 * and modify index to keep track of those iterators
3790 * Combining these two yields a tiled index expression in terms
3791 * of the AST loop iterators
3795 static __isl_give isl_multi_pw_aff
*transform_index(
3796 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3799 struct ppcg_transform_data
*data
= user
;
3800 struct gpu_stmt_access
*access
;
3801 struct gpu_array_ref_group
*group
;
3802 struct gpu_array_tile
*tile
;
3803 isl_pw_multi_aff
*iterator_map
;
3807 isl_multi_pw_aff
*tiling
;
3808 isl_pw_multi_aff
*pma
;
3809 isl_multi_pw_aff
*mpa
;
3813 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3814 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3816 access
= find_access(data
->accesses
, ref_id
);
3819 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3822 name
= get_outer_array_name(access
->access
);
3823 i
= find_array_index(data
->gen
, name
);
3825 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3826 "cannot find array",
3827 return isl_multi_pw_aff_free(index
));
3828 data
->array
= &data
->gen
->prog
->array
[i
];
3829 data
->local_array
= &data
->gen
->kernel
->array
[i
];
3831 if (access
->group
< 0) {
3836 group
= data
->array
->groups
[access
->group
];
3837 tile
= group
->private_tile
;
3839 tile
= group
->shared_tile
;
3840 data
->global
= !tile
;
3844 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3845 space
= isl_space_map_from_set(space
);
3846 pma
= isl_pw_multi_aff_identity(space
);
3847 pma
= isl_pw_multi_aff_product(
3848 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3849 tiling
= isl_multi_pw_aff_from_multi_aff(
3850 isl_multi_aff_copy(tile
->tiling
));
3851 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3853 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3854 space
= isl_space_map_from_set(space
);
3855 mpa
= isl_multi_pw_aff_identity(space
);
3856 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3857 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3862 /* Dereference "expr" by adding an index [0].
3863 * The original "expr" is assumed not to have any indices.
3865 * If "expr" is a member access, then the dereferencing needs
3866 * to be applied to the structure argument of this member access.
3868 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3872 isl_ast_expr_list
*list
;
3874 if (isl_ast_expr_get_op_type(expr
) == isl_ast_op_member
) {
3877 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3878 arg
= dereference(arg
);
3879 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg
);
3884 ctx
= isl_ast_expr_get_ctx(expr
);
3885 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3886 list
= isl_ast_expr_list_from_ast_expr(res
);
3887 res
= isl_ast_expr_get_op_arg(expr
, 0);
3888 res
= isl_ast_expr_access(res
, list
);
3889 isl_ast_expr_free(expr
);
3894 /* Linearize the index expression "expr" based on the array bounds
3897 * That is, transform expression
3899 * A[i_0][i_1]...[i_n]
3903 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
3905 * where b_0, b_1, ..., b_n are the bounds on the array.
3907 * If the base of "expr" is a member access, then the linearization needs
3908 * to be applied to the structure argument of this member access.
3910 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
3911 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
3918 isl_ast_expr_list
*list
;
3919 isl_ast_build
*build
;
3921 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
3922 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
3923 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
3926 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
3927 arg
= gpu_local_array_info_linearize_index(array
, arg
);
3928 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
3929 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
3933 isl_ast_expr_free(arg0
);
3935 ctx
= isl_ast_expr_get_ctx(expr
);
3936 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
3937 build
= isl_ast_build_from_context(context
);
3939 n
= isl_ast_expr_get_op_n_arg(expr
);
3940 res
= isl_ast_expr_get_op_arg(expr
, 1);
3941 for (i
= 2; i
< n
; ++i
) {
3942 isl_pw_aff
*bound_i
;
3943 isl_ast_expr
*expr_i
;
3945 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
- 1);
3946 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
3947 res
= isl_ast_expr_mul(res
, expr_i
);
3948 expr_i
= isl_ast_expr_get_op_arg(expr
, i
);
3949 res
= isl_ast_expr_add(res
, expr_i
);
3952 isl_ast_build_free(build
);
3954 list
= isl_ast_expr_list_from_ast_expr(res
);
3955 res
= isl_ast_expr_get_op_arg(expr
, 0);
3956 res
= isl_ast_expr_access(res
, list
);
3958 isl_ast_expr_free(expr
);
3963 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
3965 * If the AST expression refers to a global scalar that is not
3966 * a read-only scalar, then its address was passed to the kernel and
3967 * we need to dereference it.
3969 * If the AST expression refers to an access to a global array,
3970 * then we linearize the access exploiting the bounds in data->local_array.
3972 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
3973 __isl_keep isl_id
*id
, void *user
)
3975 struct ppcg_transform_data
*data
= user
;
3979 if (gpu_array_is_read_only_scalar(data
->array
))
3983 if (data
->array
->n_index
== 0)
3984 return dereference(expr
);
3985 if (!data
->array
->linearize
)
3988 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
3991 /* This function is called for each instance of a user statement
3994 * We attach a struct ppcg_kernel_stmt to the "node", containing
3995 * a computed AST expression for each access.
3996 * These AST expressions are computed from iterator_map,
3997 * which expresses the domain
3998 * elements in terms of the generated loops, and sched2shared,
3999 * which expresses the first shared_len dimensions of the schedule
4000 * computed by PPCG in terms of the generated loops.
4002 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
4003 __isl_keep isl_ast_build
*build
, void *user
)
4005 struct ppcg_transform_data data
;
4006 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4007 struct ppcg_kernel_stmt
*stmt
;
4009 isl_pw_multi_aff
*sched2shared
;
4011 isl_pw_multi_aff
*iterator_map
;
4012 isl_ast_expr
*expr
, *arg
;
4013 isl_union_map
*schedule
;
4015 struct gpu_stmt_access
*access
;
4017 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4019 return isl_ast_node_free(node
);
4021 expr
= isl_ast_node_user_get_expr(node
);
4022 arg
= isl_ast_expr_get_op_arg(expr
, 0);
4023 id
= isl_ast_expr_get_id(arg
);
4025 schedule
= isl_ast_build_get_schedule(build
);
4026 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
4027 iterator_map
= isl_pw_multi_aff_from_map(map
);
4028 sched2shared
= compute_sched_to_shared(gen
,
4029 isl_pw_multi_aff_copy(iterator_map
));
4031 stmt
->type
= ppcg_kernel_domain
;
4032 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
4033 if (!stmt
->u
.d
.stmt
)
4037 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
4038 data
.iterator_map
= iterator_map
;
4039 data
.sched2shared
= sched2shared
;
4040 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
4041 build
, &transform_index
, &data
,
4042 &transform_expr
, &data
);
4045 isl_pw_multi_aff_free(iterator_map
);
4046 isl_pw_multi_aff_free(sched2shared
);
4047 isl_ast_expr_free(arg
);
4048 isl_ast_expr_free(expr
);
4050 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4051 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4052 return isl_ast_node_set_annotation(node
, id
);
4055 isl_pw_multi_aff_free(iterator_map
);
4056 ppcg_kernel_stmt_free(stmt
);
4057 isl_pw_multi_aff_free(sched2shared
);
4058 return isl_ast_node_free(node
);
4061 /* This function is called when code has been generated for the shared
4062 * tile loops. The "schedule" refers only to the original statements.
4064 * We extend the schedule with that part of gen->local_sched that hasn't
4065 * been taken into account yet. This introduces parameters referring
4066 * to thread ids in the schedule, so we add them (with the appropriate
4067 * bounds to the context as well).
4068 * Finally, we set the appropriate unrolling options
4069 * if gen->first_unroll is set.
4071 static __isl_give isl_ast_node
*create_domain_leaf(
4072 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
4075 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4077 isl_union_map
*sched
;
4080 isl_id_list
*iterators
;
4083 schedule
= extend_schedule(schedule
,
4084 isl_union_map_copy(gen
->local_sched
),
4085 gen
->shared_len
, gen
->thread_tiled_len
);
4087 space
= isl_ast_build_get_schedule_space(build
);
4088 set
= isl_set_universe(space
);
4089 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4090 gen
->kernel
->block_dim
, "t");
4091 build
= isl_ast_build_restrict(build
, set
);
4093 n
= gen
->thread_tiled_len
- gen
->shared_len
;
4095 if (gen
->first_unroll
>= 0) {
4096 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
4097 build
= set_unroll(build
, space
, gen
->first_unroll
);
4099 iterators
= generate_names(gen
->ctx
, n
, "c");
4100 build
= isl_ast_build_set_iterators(build
, iterators
);
4101 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
4102 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4103 isl_ast_build_free(build
);
4108 /* This function is called for each statement node in the AST of the code
4109 * for copying to or from shared/private memory.
4110 * Attach a pointer to a ppcg_kernel_stmt representing the copy
4111 * statement to the node.
4112 * The statement name is "read" or "write", depending on whether we are
4113 * reading from global memory or writing to global memory.
4114 * The name of the T space is {shared,private}_<array>.
4116 * The schedule is of the form
4120 * where A refers to a piece of an array and T to the corresponding
4121 * shifted tile. We split this schedule into mappings L -> A and L -> T
4122 * and store the corresponding expressions in stmt->index and stmt->local_index,
4123 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
4125 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
4126 __isl_keep isl_ast_build
*build
, void *user
)
4128 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4129 struct ppcg_kernel_stmt
*stmt
;
4133 isl_map
*access
, *local_access
, *map
;
4134 isl_pw_multi_aff
*pma
;
4138 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4140 return isl_ast_node_free(node
);
4142 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
4143 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
4144 stmt
->u
.c
.read
= !strcmp(type
, "read");
4145 access
= isl_map_reverse(access
);
4146 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
4147 local_access
= isl_map_copy(access
);
4149 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
4150 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
4151 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4152 access
= isl_map_apply_range(access
, map
);
4153 pma
= isl_pw_multi_aff_from_map(access
);
4154 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4155 stmt
->u
.c
.index
= expr
;
4157 map
= isl_map_range_map(isl_map_universe(space
));
4158 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
4159 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4160 local_access
= isl_map_apply_range(local_access
, map
);
4161 pma
= isl_pw_multi_aff_from_map(local_access
);
4162 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4163 stmt
->u
.c
.local_index
= expr
;
4165 stmt
->u
.c
.array
= gen
->copy_group
->array
;
4166 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
4167 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
4168 stmt
->type
= ppcg_kernel_copy
;
4170 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4171 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4172 return isl_ast_node_set_annotation(node
, id
);
4175 /* Given a schedule of the form
4179 * (with S the first shared_len dimensions of the computed schedule,
4180 * A the array and L the schedule correponding to the generated loops),
4181 * indicating where to copy the array elements that need to be copied,
4182 * construct code for performing the copying.
4184 * "group" is the array reference group that is being copied
4185 * "type" is either "read" or "write"
4186 * private is set if copying needs to be performed to/from registers
4188 * We first construct a mapping to a shifted tile of the array,
4190 * [S -> A] -> T(S,A) (1)
4192 * If private is set, then we also use this mapping as a schedule
4193 * (which is already thread-specific and will be completely unrolled).
4194 * Otherwise, we wrap/tile the range over the threads.
4197 * [S -> A] -> T'(S,A)
4199 * Combined with the given schedule, we have
4201 * [S -> A] -> [L -> T'(S,A)] (2)
4203 * From the shifted tile mapping, we construct a mapping
4205 * [S -> A] -> [A -> T(S,A)]
4207 * and apply it to the schedule (2), obtaining
4209 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
4211 * Note that we can project out S because it is uniquely defined by L.
4213 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
4214 __isl_take isl_map
*sched
,
4215 const char *type
, struct gpu_array_ref_group
*group
,
4216 __isl_take isl_ast_build
*build
, int private)
4220 isl_map
*schedule
, *shift
, *map
;
4222 isl_id_list
*iterators
;
4225 shift
= shift_access(group
);
4227 schedule
= isl_map_copy(shift
);
4228 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
4230 schedule
= tile_access_schedule(gen
, schedule
);
4232 n
= isl_map_dim(schedule
, isl_dim_out
);
4233 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
4234 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4235 gen
->kernel
->block_dim
, "t");
4237 schedule
= isl_map_range_product(sched
, schedule
);
4239 space
= isl_space_domain(isl_map_get_space(shift
));
4240 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
4241 map
= isl_map_range_product(map
, shift
);
4243 schedule
= isl_map_apply_domain(schedule
, map
);
4245 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
4247 build
= isl_ast_build_restrict(build
, set
);
4249 gen
->copy_group
= group
;
4252 space
= isl_space_range(isl_map_get_space(schedule
));
4253 space
= isl_space_range(isl_space_unwrap(space
));
4254 build
= set_unroll(build
, space
, 0);
4256 iterators
= generate_names(gen
->ctx
, n
, "c");
4257 build
= isl_ast_build_set_iterators(build
, iterators
);
4258 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
4259 tree
= isl_ast_build_ast_from_schedule(build
,
4260 isl_union_map_from_map(schedule
));
4261 isl_ast_build_free(build
);
4266 /* Return code for reading into or writing from shared memory
4267 * the given array reference group.
4269 * If we are performing a read from global memory to shared memory and
4270 * if the array involved is not a scalar, then we copy
4271 * the entire tile to shared memory. This may result in some extra
4272 * elements getting copied, but it should lead to simpler code
4273 * (which means that fewer registers may be needed) and less divergence.
4275 * Otherwise, we only copy the elements that will be read or have been written
4279 * The input "sched" is of the form.
4283 * with S the first shared_len dimensions of the computed schedule,
4284 * A the array and L the schedule correponding to the generated loops.
4286 * We first drop "type",
4290 * If the above conditions are satisfied, we project out A,
4295 * and then introduce the group tile [S -> T], resulting in
4299 static __isl_give isl_ast_node
*copy_group_shared_accesses(
4300 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4301 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4305 isl_union_map
*access
;
4307 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4308 read
= !strcmp(type
, "read");
4310 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4312 if (read
&& !gpu_array_is_scalar(group
->array
)) {
4316 space
= isl_space_domain(isl_map_get_space(sched
));
4317 space
= isl_space_unwrap(space
);
4318 map
= isl_map_domain_map(isl_map_universe(space
));
4319 sched
= isl_map_apply_domain(sched
, map
);
4321 map
= group_tile(group
);
4322 map
= isl_map_reverse(isl_map_domain_map(map
));
4323 sched
= isl_map_apply_domain(sched
, map
);
4326 return copy_access(gen
, sched
, type
, group
, build
, 0);
4329 /* Return code for reading into or writing from private memory
4330 * the given array reference group.
4332 * Let S be the first shared_len dimensions of the computed schedule,
4333 * D the iteration domains, A the array and L the schedule correponding
4334 * to the generated loops.
4335 * "sched" is of the form
4339 * where type is either "read" or "write".
4340 * We apply the privatization D -> S(t), with t the thread ids,
4341 * to the access relation D -> A to obtain the privatized access relation
4345 * We drop the type from "sched" and intersect with the privatized access
4346 * relation to obtain
4350 static __isl_give isl_ast_node
*copy_group_private_accesses(
4351 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4352 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4356 isl_union_map
*priv
;
4357 isl_union_map
*access
;
4358 isl_map
*access_map
;
4360 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4361 read
= !strcmp(type
, "read");
4363 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
4364 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
4367 access
= group_access_relation(group
, read
, !read
);
4368 access
= isl_union_map_apply_domain(access
, priv
);
4369 access_map
= isl_map_from_union_map(access
);
4371 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4372 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
4374 return copy_access(gen
, sched
, type
, group
, build
, 1);
4377 /* Return code for reading into or writing from shared or private memory.
4379 * "schedule" is of the form
4383 * with S be the first shared_len dimensions of the computed schedule,
4384 * A the array and L the schedule correponding to the generated loops.
4385 * The array reference group is attached to "type".
4387 static __isl_give isl_ast_node
*create_access_leaf(
4388 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4389 __isl_take isl_ast_build
*build
)
4391 struct gpu_array_ref_group
*group
;
4394 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
4395 group
= isl_id_get_user(id
);
4398 if (group
->private_tile
)
4399 return copy_group_private_accesses(gen
, group
, schedule
,
4402 return copy_group_shared_accesses(gen
, group
, schedule
,
4406 /* Create a domain node representing a synchronization.
4408 static __isl_give isl_ast_node
*create_sync_leaf(
4409 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4410 __isl_take isl_ast_build
*build
)
4412 struct ppcg_kernel_stmt
*stmt
;
4418 isl_map_free(schedule
);
4420 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4424 stmt
->type
= ppcg_kernel_sync
;
4426 space
= isl_ast_build_get_schedule_space(build
);
4427 space
= isl_space_from_domain(space
);
4428 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
4429 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
4430 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
4431 node
= isl_ast_node_alloc_user(expr
);
4432 isl_ast_build_free(build
);
4434 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4435 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4436 return isl_ast_node_set_annotation(node
, id
);
4439 /* This function is called during the code generation at the point
4440 * where the schedule domain element is completely determined by
4441 * the generated code. The input schedule contains the original
4442 * statements as well as synchronization and copy "statements".
4443 * The latter are scheduled at different points than any of the original
4444 * statements, so they will only arrive here in isolation.
4446 * If the current schedule only refers to a single statement,
4447 * we check if it is a copy or synchronization statement and
4448 * call the appropriate functions.
4449 * Otherwise, we assume we are dealing with the original statements
4450 * and we call create_domain_leaf.
4452 static __isl_give isl_ast_node
*create_kernel_leaf(
4453 __isl_take isl_ast_build
*build
, void *user
)
4455 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4457 isl_union_map
*schedule
;
4460 schedule
= isl_ast_build_get_schedule(build
);
4462 if (isl_union_map_n_map(schedule
) != 1)
4463 return create_domain_leaf(schedule
, build
, user
);
4465 map
= isl_map_from_union_map(schedule
);
4466 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
4467 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
4468 return create_access_leaf(gen
, map
, build
);
4469 if (!strcmp(name
, "sync"))
4470 return create_sync_leaf(gen
, map
, build
);
4472 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
4475 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
4476 * have value 0) and all even schedule dimensions as "unroll".
4478 * That is, the options look as follows
4480 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
4481 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
4483 * The even positions are used to be able to schedule copying blocks
4484 * and synchronization before or after each level of the shared memory
4485 * tile loops and we want to make sure that code for these is generated
4486 * separately (within each level).
4488 static __isl_give isl_ast_build
*set_atomic_and_unroll(
4489 __isl_take isl_ast_build
*build
,
4490 __isl_take isl_space
*space
, int sched_len
)
4496 isl_local_space
*ls
;
4499 ctx
= isl_ast_build_get_ctx(build
);
4501 space
= isl_space_params(space
);
4502 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4503 space
= isl_space_from_domain(space
);
4504 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4505 map
= isl_map_universe(isl_space_copy(space
));
4506 for (i
= 0; i
< sched_len
; i
+= 2)
4507 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4508 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4509 c
= isl_equality_alloc(ls
);
4510 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4511 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4512 c
= isl_constraint_set_constant_si(c
, 1);
4513 map
= isl_map_add_constraint(map
, c
);
4514 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4515 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4516 opt
= isl_union_map_from_map(map
);
4518 map
= isl_map_universe(space
);
4519 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4520 c
= isl_equality_alloc(ls
);
4521 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4522 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4523 map
= isl_map_add_constraint(map
, c
);
4524 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4525 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4526 opt
= isl_union_map_add_map(opt
, map
);
4528 build
= isl_ast_build_set_options(build
, opt
);
4533 /* Return a map that maps a space of dimension gen->shared_len
4534 * to its last dimensions starting at gen->tile_first.
4535 * The range is of dimension
4537 * 2 * (gen->shared_len - gen->tile_first) + 1
4539 * The input dimensions are mapped to the odd dimensions in the output,
4540 * while the even dimensions (except 2*pos) are fixed to 0.
4541 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4542 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4543 * are mapped to the output. The remaining input dimensions are projected
4544 * out and the corresponding output dimensions are fixed to 0.
4546 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4547 __isl_take isl_space
*space
, int pos
, int val
)
4552 space
= isl_space_set_from_params(space
);
4553 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4554 space
= isl_space_map_from_set(space
);
4555 proj
= isl_map_identity(space
);
4556 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4557 n
= gen
->shared_len
- gen
->tile_first
;
4558 for (i
= 0; i
<= n
; ++i
) {
4559 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4561 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4563 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4569 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4570 gen
->shared_len
- (gen
->tile_first
+ pos
));
4571 for (i
= pos
; i
< n
; ++i
)
4572 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4577 /* Given the AST context schedule "schedule" and the mapping from
4578 * domains to the shared tile loops "shared_sched", add a schedule
4579 * for a synchronization operation at position "val" of loop level "pos".
4581 * schedule is of the form
4585 * (with D the iteration domains and L the already generated loops),
4586 * while shared_sched is of the form
4590 * We combine them into
4596 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4598 * and use the result as a schedule for "sync".
4600 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4601 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4602 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4605 isl_map
*proj
, *map
;
4607 shared_sched
= isl_union_map_copy(shared_sched
);
4608 schedule
= isl_union_map_copy(schedule
);
4610 space
= isl_union_map_get_space(shared_sched
);
4611 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4612 map
= isl_map_from_union_map(schedule
);
4614 proj
= insert_even(gen
, space
, pos
, val
);
4615 map
= isl_map_apply_range(map
, proj
);
4616 map
= isl_map_from_range(isl_map_wrap(map
));
4617 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4619 res
= isl_union_map_add_map(res
, map
);
4624 /* Given a set of wrapped references "ref", return the corresponding
4625 * access relations based on the tagged access relations "tagged".
4627 * The elements of "ref" are of the form
4631 * with D an iteration domains and R a reference.
4632 * The elements of "tagged" are of the form
4638 * Extend "tagged" to include the iteration domain in the range, i.e.,
4640 * [D -> R] -> [D -> A]
4642 * apply the result to "ref" and then unwrap the resulting set
4643 * to obtain relations of the form
4647 static __isl_give isl_union_map
*wrapped_reference_to_access(
4648 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
4650 isl_union_map
*tag2access
;
4652 tag2access
= isl_union_map_copy(tagged
);
4653 tag2access
= isl_union_map_universe(tag2access
);
4654 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
4655 tag2access
= isl_union_map_domain_map(tag2access
);
4656 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
4658 ref
= isl_union_set_coalesce(ref
);
4659 ref
= isl_union_set_apply(ref
, tag2access
);
4661 return isl_union_set_unwrap(ref
);
4664 /* Given an access relation "access" from "group", remove those reads
4665 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
4666 * communicate data within the same iteration of the last_shared dimension
4669 * If the access is a read then it is necessarily an element of
4671 * live_in union (range flow)
4673 * where live_in and flow may be overapproximations.
4674 * If the access is a write then it is necessarily an element of
4676 * live_out union (domain flow)
4678 * In both cases, the access relation is also a subset of
4679 * the group access relation.
4681 * Essentially, we compute the intersection of "access" with either
4683 * live_in union (range non-local-flow)
4687 * live_out union (domain non-local-flow)
4689 * We first construct a relation "local"
4691 * [[D -> R] -> [D' -> R']]
4693 * of pairs of domain iterations accessing the reference group
4694 * and references in the group that are scheduled to the same iteration
4695 * of the last_shared dimension.
4697 * If this relation does not intersect the dataflow dependences,
4698 * then there is nothing we can possibly remove and we simply
4701 * Otherwise, we remove the "local" dataflow dependences from
4702 * the set of all dataflow dependences.
4703 * Note that if the potential dataflow dependences are an overapproximation
4704 * of the actual dataflow dependences, then the result remains an
4705 * overapproximation of the non-local dataflow dependences.
4706 * Copying to/from global memory is only needed for the references
4707 * in the domain/range of the result or for accesses that are live out/in
4708 * for the entire scop.
4710 * We therefore map the domain/range of the "external" relation
4711 * to the corresponding access relation and take the union with
4712 * the live out/in relation.
4714 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
4715 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
4719 isl_union_map
*tagger
;
4720 isl_union_set
*domain
;
4722 isl_union_map
*sched
, *local
, *tagged
, *external
;
4723 isl_union_set
*tag_set
;
4726 if (isl_union_map_is_empty(access
))
4729 tagged
= group_tagged_access_relation(group
);
4731 sched
= isl_union_map_copy(gen
->sched
);
4733 space
= isl_union_map_get_space(sched
);
4734 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
4735 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4737 tagger
= isl_union_map_copy(gen
->prog
->scop
->tagger
);
4738 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
4739 tagger
= isl_union_map_intersect_range(tagger
, domain
);
4740 sched
= isl_union_map_apply_domain(sched
, tagger
);
4742 local
= isl_union_map_apply_range(sched
,
4743 isl_union_map_reverse(isl_union_map_copy(sched
)));
4744 local
= isl_union_map_intersect(local
,
4745 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
4747 empty
= isl_union_map_is_empty(local
);
4748 if (empty
< 0 || empty
) {
4749 isl_union_map_free(tagged
);
4750 isl_union_map_free(local
);
4752 return isl_union_map_free(access
);
4756 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
4757 external
= isl_union_map_intersect_params(external
,
4758 isl_set_copy(gen
->prog
->scop
->context
));
4759 external
= isl_union_map_subtract(external
, local
);
4762 tag_set
= isl_union_map_range(external
);
4763 external
= wrapped_reference_to_access(tag_set
, tagged
);
4764 external
= isl_union_map_union(external
,
4765 isl_union_map_copy(gen
->prog
->scop
->live_in
));
4767 tag_set
= isl_union_map_domain(external
);
4768 external
= wrapped_reference_to_access(tag_set
, tagged
);
4769 external
= isl_union_map_union(external
,
4770 isl_union_map_copy(gen
->prog
->scop
->live_out
));
4773 access
= isl_union_map_intersect(access
, external
);
4778 /* Given the AST context schedule "schedule" and the mapping from
4779 * domains to the shared tile loops "shared_sched", add a schedule
4780 * for copying an array reference group to/from shared/private memory.
4781 * "read" is set if data should be copied from global memory
4782 * to shared/private memory.
4783 * "k" represents the current group
4784 * "s" is the total number of groups
4786 * We schedule an operation before or after the innermost loop
4787 * of "shared_sched" that affects the tile of the array reference group.
4789 * schedule is of the form
4793 * (with D the iteration domains and L the already generated loops),
4794 * while shared_sched is of the form
4798 * We first compute the access relation for the reference group
4802 * and remove from this access relation those reads or writes
4803 * that only needed to communicate data within the same iteration
4804 * of the last_shared dimension of the group.
4805 * We then combine what is left with shared_sched into
4809 * If this results in an empty relation, no copying needs to be performed
4811 * Otherwise, we invert the relation and combine it with "schedule" into
4815 * The actual additional piece of the schedule is obtained from combining
4821 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4823 * The position of "val" corresponds to the innermost loop that affects
4824 * the tile and the value indicates where the copying is scheduled
4825 * with respect to the actual kernel code (at value 0).
4826 * Reads are schedule before the code, writes to global memory from
4827 * private memory are scheduled at values 1 to s, writes to global
4828 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4830 * If we are scheduling a read from global memory to shared memory,
4831 * we insert a synchronization before the kernel code (at the innermost
4833 * If we are scheduling a write to global memory, then we add
4834 * a synchronization after all writes (at value 2 *s + 2).
4835 * However, there is no need for a synchronization after the outermost loop.
4836 * A write to global memory from private memory at the innermost level
4837 * does not require a synchronization, because it is covered by
4838 * the synchronization after the kernel inserted by body_schedule.
4840 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4841 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4842 __isl_keep isl_union_map
*shared_sched
,
4843 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4848 isl_union_map
*access
;
4849 isl_map
*map
, *proj
, *access_map
;
4852 access
= group_access_relation(group
, read
, !read
);
4853 access
= remove_local_accesses(gen
, group
, access
, read
);
4854 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4857 if (isl_union_map_is_empty(access
)) {
4858 isl_union_map_free(access
);
4862 access
= isl_union_map_reverse(access
);
4863 access
= isl_union_map_apply_range(access
,
4864 isl_union_map_copy(schedule
));
4865 access_map
= isl_map_from_union_map(access
);
4867 space
= isl_space_copy(group
->array
->space
);
4868 space
= isl_space_from_range(space
);
4869 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4870 map
= isl_map_domain_map(isl_map_universe(space
));
4872 space
= isl_union_map_get_space(schedule
);
4873 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4877 else if (group
->private_tile
)
4880 val
= 1 + s
+ 1 + k
;
4881 proj
= insert_even(gen
, space
, pos
, val
);
4882 map
= isl_map_apply_range(map
, proj
);
4884 access_map
= isl_map_range_product(access_map
, map
);
4886 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4887 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4889 res
= isl_union_map_add_map(res
, access_map
);
4891 n
= gen
->shared_len
- gen
->tile_first
;
4893 if (!group
->private_tile
)
4894 res
= add_sync_schedule(gen
, res
, schedule
,
4895 shared_sched
, n
, -1);
4899 if (pos
== n
&& group
->private_tile
)
4901 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4908 /* Return a schedule for the shared tile loops based on the current
4909 * AST context schedule.
4911 * We create a "shared_sched" that maps the domains to the first
4912 * shared_len dimensions of the computed schedule, project out the
4913 * first tile_first dimensions (as these are already covered by
4914 * the host code) and insert "statement-level" dimensions at even
4915 * positions so that we can schedule copy blocks and synchronization
4916 * before/after each level.
4918 * In particular, copy blocks are inserted inside the innermost
4919 * level that affect the tile. For the copying to global memory,
4920 * those from private memory are scheduled before those from shared
4921 * memory such that synchronization can be inserted between the two
4922 * at the innermost level.
4923 * Synchronization is inserted at the innermost level before the
4924 * actual kernel code if there is any copying from global memory
4925 * to shared memory. It is inserted unconditionally at the innermost
4926 * level after the actual kernel code and the copying to global memory
4927 * from private memory (if any). Finally, it is inserted after
4928 * any copying to global memory, except at the outermost level
4929 * and at the innermost level if there is no copying from shared
4930 * memory. The copying from private memory is covered by the unconditional
4931 * synchronization at the innermost level.
4933 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4934 __isl_take isl_union_map
*schedule
)
4938 isl_union_map
*shared_sched
;
4939 isl_union_map
*sched
;
4940 isl_map
*proj
, *map
;
4943 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4944 proj
= projection(isl_union_map_get_space(shared_sched
),
4945 gen
->tiled_len
, gen
->shared_len
);
4946 shared_sched
= isl_union_map_apply_range(shared_sched
,
4947 isl_union_map_from_map(proj
));
4948 space
= isl_union_map_get_space(shared_sched
);
4949 proj
= insert_even(gen
, space
, -1, 0);
4950 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4951 isl_union_map_from_map(proj
));
4953 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4956 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4957 s
+= gen
->prog
->array
[i
].n_group
;
4960 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4961 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4963 for (j
= 0; j
< array
->n_group
; ++j
) {
4964 struct gpu_array_ref_group
*group
;
4966 group
= array
->groups
[j
];
4967 if (!group
->private_tile
&& !group
->shared_tile
)
4969 res
= add_group_schedule(gen
, res
, schedule
,
4970 shared_sched
, group
, 0, k
, s
);
4971 res
= add_group_schedule(gen
, res
, schedule
,
4972 shared_sched
, group
, 1, k
, s
);
4977 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4978 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4980 isl_union_map_free(shared_sched
);
4981 isl_union_map_free(schedule
);
4986 /* Generate code for "kernel" in the given "context".
4988 * We first generate code for the shared tile loops (T1T, T1P and T2)
4989 * in a context that includes the block ids.
4990 * Within each iteration of these loops an additional code generation
4991 * is performed (within create_kernel_leaf) for the rest of the schedule
4992 * in a context that includes the thread ids.
4994 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4995 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4996 __isl_keep isl_multi_pw_aff
*grid_size
)
5000 isl_id_list
*iterators
;
5001 isl_union_map
*schedule
;
5005 schedule
= isl_ast_build_get_schedule(build
);
5007 build
= isl_ast_build_copy(build
);
5008 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
5009 space
= isl_ast_build_get_schedule_space(build
);
5010 set
= isl_set_universe(isl_space_copy(space
));
5011 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
5012 build
= isl_ast_build_restrict(build
, set
);
5014 schedule
= body_schedule(gen
, schedule
);
5016 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
5018 build
= set_atomic_and_unroll(build
, space
, sched_len
);
5019 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
5020 build
= isl_ast_build_set_iterators(build
, iterators
);
5021 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
5022 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
5023 isl_ast_build_free(build
);
5028 /* Attach "id" to the given node.
5030 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
5031 __isl_keep isl_ast_build
*build
, void *user
)
5035 node
= isl_ast_node_set_annotation(node
, id
);
5040 /* Construct an AST node for performing a kernel launch and attach
5041 * the information about the kernel to that node.
5043 * The kernel AST has been constructed in the context of the range
5044 * of "schedule". In particular, the grid size has been computed
5045 * in the context. We therefore still need to make sure that these
5046 * constraints are expressed in the code. We do this by creating a schedule
5048 * kernel[] -> [S -> []]
5050 * where S is the schedule domain, i.e., the range of "schedule".
5051 * The AST generation will then create a single call surrounded by
5052 * all the condition in "S" that have not been expressed yet.
5054 * The kernel information is attached to this node in attach_id.
5056 static __isl_give isl_ast_node
*construct_launch(
5057 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
5058 __isl_take
struct ppcg_kernel
*kernel
)
5062 isl_union_set
*domain
;
5067 ctx
= isl_ast_build_get_ctx(build
);
5069 id
= isl_id_alloc(ctx
, NULL
, kernel
);
5070 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
5072 domain
= isl_union_map_range(schedule
);
5073 set
= isl_set_from_union_set(domain
);
5074 map
= isl_map_from_domain(set
);
5075 map
= isl_map_from_range(isl_map_wrap(map
));
5076 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
5077 schedule
= isl_union_map_from_map(map
);
5079 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
5080 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
5081 isl_ast_build_free(build
);
5086 /* This function is called for each leaf in the AST of the host code.
5087 * We first specialize the schedule to the site of the leaf, compute
5088 * the size of shared memory and then construct the body of the host code
5089 * and the associated kernel.
5091 * The necessary information for printing the kernel launch is
5092 * stored in a struct ppcg_kernel and attached to the leaf node
5093 * created to represent the launch.
5095 static __isl_give isl_ast_node
*create_host_leaf(
5096 __isl_take isl_ast_build
*build
, void *user
)
5098 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
5101 struct ppcg_kernel
*kernel
;
5102 isl_set
*host_domain
;
5103 isl_union_map
*schedule
;
5104 isl_union_map
*local_sched
;
5105 isl_union_map
*access
;
5106 isl_union_set
*domain
;
5109 schedule
= isl_ast_build_get_schedule(build
);
5111 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
5114 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
5116 local_sched
= isl_union_map_copy(gen
->sched
);
5117 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
5118 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
5119 isl_union_map_copy(gen
->prog
->may_write
));
5120 access
= isl_union_map_apply_domain(access
,
5121 isl_union_map_copy(local_sched
));
5123 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
5124 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
5125 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
5127 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
5128 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
5129 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
5131 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
5135 kernel
->id
= gen
->kernel_id
++;
5136 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
5137 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
5138 extract_block_size(gen
, kernel
);
5139 kernel
->arrays
= isl_union_map_range(access
);
5140 kernel
->arrays
= isl_union_set_apply(kernel
->arrays
,
5141 isl_union_map_copy(gen
->prog
->to_outer
));
5142 kernel
->space
= isl_ast_build_get_schedule_space(build
);
5144 gen
->private_access
= NULL
;
5145 compute_shared_sched(gen
);
5146 gen
->privatization
= compute_privatization(gen
);
5147 check_scalar_live_ranges(gen
);
5148 if (group_references(gen
) < 0)
5149 schedule
= isl_union_map_free(schedule
);
5150 compute_private_access(gen
);
5151 host_domain
= isl_set_from_union_set(isl_union_map_range(
5152 isl_union_map_copy(schedule
)));
5153 localize_bounds(gen
, kernel
, host_domain
);
5155 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
5156 check_shared_memory_bound(gen
);
5157 compute_group_tilings(gen
);
5159 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
5161 create_kernel_vars(gen
, kernel
);
5163 free_local_array_info(gen
);
5164 isl_map_free(gen
->privatization
);
5165 isl_union_map_free(gen
->private_access
);
5166 isl_union_map_free(gen
->local_sched
);
5167 isl_union_map_free(gen
->tiled_sched
);
5168 isl_union_map_free(gen
->shared_sched
);
5169 isl_union_map_free(gen
->shared_proj
);
5170 isl_set_free(host_domain
);
5171 free(gen
->tile_size
);
5173 node
= construct_launch(build
, schedule
, kernel
);
5177 isl_union_map_free(schedule
);
5181 /* Use isl to generate code for the outer gen->tile_first loops
5182 * of the global schedule in gen->sched, resulting in the host code.
5183 * Within each iteration of this partial schedule, i.e., for each kernel
5184 * launch, create_host_leaf takes care of generating the kernel code.
5186 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
5188 isl_ast_build
*build
;
5190 isl_union_map
*sched
;
5192 isl_id_list
*iterators
;
5194 sched
= isl_union_map_copy(gen
->sched
);
5195 proj
= projection(isl_union_map_get_space(sched
),
5196 gen
->untiled_len
, gen
->tile_first
);
5197 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
5199 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
5200 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
5201 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
5202 build
= isl_ast_build_set_iterators(build
, iterators
);
5203 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
5204 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
5205 isl_ast_build_free(build
);
5210 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
5214 return isl_union_map_read_from_str(ctx
, str
);
5217 /* Information about the outermost tilable bands in the forest of bands.
5219 * tile_len and n_parallel are only sets on band_info structures
5220 * that correspond to outermost bands. For other bands (in particular,
5221 * ancestors of the outermost bands), n_parallal is set to 0.
5223 * prefix is the (padded) schedule leading up to the outermost tilable bands.
5225 * tile_first is the number of schedule dimensions in prefix.
5227 * suffix is the schedule of the outermost tilable bands and their descendants.
5230 struct gpu_gen
*gen
;
5234 isl_union_map
*prefix
;
5235 isl_union_map
*suffix
;
5238 /* Set tile_len and n_parallel of the statement to that of
5239 * their outermost band, recorded in the band_info.
5241 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
5243 struct band_info
*info
= user
;
5244 struct gpu_stmt
*stmt
;
5247 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
5248 stmt
= find_stmt(info
->gen
->prog
, id
);
5251 stmt
->tile_len
= info
->tile_len
;
5252 stmt
->n_parallel
= info
->n_parallel
;
5259 static void list_select_outer_band(struct gpu_gen
*gen
,
5260 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
5262 /* Check if this band has any parallel loops. If so, take it as
5263 * the outermost tilable band. If not, continue looking for the
5264 * outermost tilable band in the children of the current band.
5266 static void band_select_outer_band(struct gpu_gen
*gen
,
5267 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
5269 int n
= isl_band_n_member(band
);
5272 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
5273 if (!isl_band_member_is_coincident(band
, n_parallel
))
5276 info
->n_parallel
= n_parallel
;
5278 gen
->any_parallelism
= 1;
5280 info
->tile_first
= pos
;
5282 info
->prefix
= isl_band_get_prefix_schedule(band
);
5283 info
->suffix
= isl_union_map_flat_range_product(
5284 isl_band_get_partial_schedule(band
),
5285 isl_band_get_suffix_schedule(band
));
5286 isl_union_map_foreach_map(info
->prefix
,
5287 &set_stmt_tile_len
, info
);
5288 } else if (isl_band_has_children(band
)) {
5289 isl_band_list
*children
;
5290 children
= isl_band_get_children(band
);
5291 list_select_outer_band(gen
, children
, pos
+ n
, info
);
5294 info
->tile_first
= pos
+ n
;
5296 info
->prefix
= isl_union_map_flat_range_product(
5297 isl_band_get_prefix_schedule(band
),
5298 isl_band_get_partial_schedule(band
));
5299 info
->suffix
= isl_band_get_suffix_schedule(band
);
5300 isl_union_map_foreach_map(info
->prefix
,
5301 &set_stmt_tile_len
, info
);
5304 isl_band_free(band
);
5307 /* Comparison function that returns a non-zero value for band_infos
5308 * with different tile_len fields or different n_parallel fields.
5310 static int cmp_band(const void *p1
, const void *p2
)
5312 const struct band_info
*info1
= p1
;
5313 const struct band_info
*info2
= p2
;
5315 if (info1
->tile_len
!= info2
->tile_len
)
5316 return info1
->tile_len
- info2
->tile_len
;
5318 return info1
->n_parallel
- info2
->n_parallel
;
5321 /* Extend "umap" with coordinates with fixed value "val"
5322 * to a total length of "dst_len", assuming the original dimension is "src_len".
5324 static __isl_give isl_union_map
*extend_range(
5325 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
5331 dim
= isl_union_map_get_space(umap
);
5332 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
5333 for (i
= src_len
; i
< dst_len
; ++i
)
5334 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
5336 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
5341 /* Group bands with the same values for tile_len and n_parallel.
5342 * The prefix schedule is then extended with a fixed coordinate that
5343 * is different for each such group.
5344 * Note that the actual values for this coordinate are not important.
5345 * The bands have already been effectively separated at a higher level
5346 * or they are independent and may be executed in parallel.
5347 * The list of band_info has been sorted before this functions is called.
5349 static void separate_bands(struct band_info
*info
, int n
)
5354 for (i
= 0; i
< n
; ++i
) {
5355 int l
= info
[i
].tile_first
;
5358 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
5359 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
5362 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5364 info
[i
].tile_first
= l
+ 1;
5368 /* Select the outermost bands in the elements of the list, align
5369 * their prefix schedules, separate bands with different values
5370 * for tile_len and/or n_parallel and then combine the resulting
5371 * prefix and suffix schedules into a single pair of prefix and
5372 * suffix schedules for the entire list.
5374 static void list_select_outer_band(struct gpu_gen
*gen
,
5375 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
5379 int n
= isl_band_list_n_band(list
);
5380 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
5381 struct band_info
*info
;
5383 isl_union_map
*prefix
;
5384 isl_union_map
*suffix
;
5387 info
= isl_calloc_array(ctx
, struct band_info
, n
);
5391 for (i
= 0; i
< n
; ++i
) {
5392 band
= isl_band_list_get_band(list
, i
);
5393 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
5394 if (info
[i
].tile_first
> max_tile_first
)
5395 max_tile_first
= info
[i
].tile_first
;
5398 for (i
= 0; i
< n
; ++i
) {
5399 if (info
[i
].tile_first
== max_tile_first
)
5401 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5402 info
[i
].tile_first
, max_tile_first
, 0);
5403 info
[i
].tile_first
= max_tile_first
;
5406 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
5408 for (i
= 0; i
< n
- 1; ++i
)
5409 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
5410 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
5414 separate_bands(info
, n
);
5416 prefix
= info
[0].prefix
;
5417 suffix
= info
[0].suffix
;
5419 for (i
= 1; i
< n
; ++i
) {
5420 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
5421 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
5424 list_info
->tile_first
= info
[0].tile_first
;
5425 list_info
->tile_len
= -1;
5426 list_info
->prefix
= prefix
;
5427 list_info
->suffix
= suffix
;
5429 isl_band_list_free(list
);
5433 /* Select the outermost tilable band that (by construction)
5434 * has at least one parallel loop.
5435 * The starting position of the aligned band is stored in the pair
5437 * The sizes and number of parallel loops may be different in different
5438 * parts of the band forest and are therefore stored in the gpu_stmts.
5440 * Return the complete schedule, with the tilable bands aligned
5441 * at gen->tile_first and padded with zero, if needed.
5443 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
5444 __isl_keep isl_schedule
*schedule
)
5446 isl_band_list
*list
;
5447 struct band_info info
;
5449 gen
->n_parallel
= 0;
5452 list
= isl_schedule_get_band_forest(schedule
);
5454 if (isl_band_list_n_band(list
) == 0) {
5455 isl_band_list_free(list
);
5456 return isl_schedule_get_map(schedule
);
5459 list_select_outer_band(gen
, list
, 0, &info
);
5461 gen
->tile_first
= info
.tile_first
;
5462 info
.suffix
= align_range(info
.suffix
);
5464 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
5467 /* Set gen->untiled_len to the number of scheduling dimensions
5468 * for the schedule of the first domain.
5469 * We assume here that this number is the same for all domains.
5471 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
5473 unsigned *untiled_len
= user
;
5475 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
5481 /* Compute an appropriate schedule based on the accesses in
5482 * gen->read and gen->write.
5484 * We use the dependences in gen->prog->scop to compute
5485 * a schedule that has a parallel loop in each tilable band.
5486 * Finally, we select the outermost tilable band.
5488 * If live range reordering is allowed, then we need to make sure
5489 * that live ranges on arrays are not run in parallel since doing
5490 * so would require array expansion. We therefore add the array
5491 * order dependences to the coincidence dependences. Non-zero array
5492 * order dependences will then prevent a schedule dimension from being
5493 * considered parallel.
5494 * Live ranges derived from scalars are allowed to be run in parallel
5495 * since we force the scalars to be mapped to private memory in
5496 * check_scalar_live_ranges.
5497 * If live range reordering is allowed, then the false dependences
5498 * are not added to the validity constraints as that would prevent
5499 * reordering. Instead, the external false dependences that enforce that reads
5500 * from potentially live-in data precede any later write and
5501 * that writes of potentially live-out data follow any other earlier write
5502 * are added to the validity and the coincidence constraints.
5503 * The false dependences are still added to the proximity constraints
5504 * for consistency with the case where live range reordering is not allowed.
5505 * The coincidence constraints then consist of flow dependences,
5506 * exernal false dependences and array order dependences.
5507 * The independences can be filtered out from the first two sets.
5508 * They have already been filtered out from the array order dependences
5509 * on a per array basis in collect_order_dependences.
5510 * There is no need for a per array handling of the other two sets
5511 * as there should be no flow or external false dependence on local
5512 * variables that can be filtered out.
5514 static void compute_schedule(struct gpu_gen
*gen
)
5516 isl_union_set
*domain
;
5517 isl_union_map
*dep_raw
, *dep
;
5518 isl_union_map
*validity
, *proximity
, *coincidence
;
5519 isl_union_map
*sched
;
5520 isl_schedule_constraints
*sc
;
5521 isl_schedule
*schedule
;
5523 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
5524 domain
= isl_union_set_intersect_params(domain
,
5525 isl_set_copy(gen
->prog
->scop
->context
));
5526 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
5527 if (gen
->options
->live_range_reordering
) {
5528 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
5529 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
5530 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
5531 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5532 validity
= isl_union_map_copy(proximity
);
5533 validity
= isl_union_map_union(validity
,
5534 isl_union_map_copy(gen
->prog
->scop
->dep_external
));
5535 proximity
= isl_union_map_union(proximity
,
5536 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
5537 coincidence
= isl_union_map_copy(validity
);
5538 coincidence
= isl_union_map_subtract(coincidence
,
5539 isl_union_map_copy(gen
->prog
->scop
->independence
));
5540 coincidence
= isl_union_map_union(coincidence
,
5541 isl_union_map_copy(gen
->prog
->array_order
));
5543 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5544 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
5545 dep
= isl_union_map_union(dep
, dep_raw
);
5546 dep
= isl_union_map_coalesce(dep
);
5547 proximity
= isl_union_map_copy(dep
);
5548 coincidence
= isl_union_map_copy(dep
);
5551 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
5552 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
5553 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
5555 if (gen
->options
->debug
->dump_schedule_constraints
)
5556 isl_schedule_constraints_dump(sc
);
5557 schedule
= isl_schedule_constraints_compute_schedule(sc
);
5558 if (gen
->options
->debug
->dump_schedule
)
5559 isl_schedule_dump(schedule
);
5561 sched
= select_outer_tilable_band(gen
, schedule
);
5563 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
5564 sched
= isl_union_map_intersect_domain(sched
, domain
);
5567 isl_schedule_free(schedule
);
5570 /* Compute the sets of outer array elements that need to be copied in and out.
5572 * In particular, for each array that is possibly written anywhere in
5573 * gen->prog and that is visible outside the corresponding scop,
5574 * we copy out its entire extent.
5576 * Any array elements that is read without first being written needs
5577 * to be copied in. Furthermore, if there are any array elements that
5578 * are copied out, but that may not be written inside gen->prog, then
5579 * they also need to be copied in to ensure that the value after execution
5580 * is the same as the value before execution.
5581 * In case the array elements are structures, we need to take into
5582 * account that all members of the structures need to be written
5583 * by gen->prog before we can avoid copying the data structure in.
5585 * While computing the set of array elements that are copied out but
5586 * not necessarily written, we intersect both sets with the context.
5587 * This helps in those cases where the arrays are declared with a fixed size,
5588 * while the accesses are parametric and the context assigns a fixed value
5589 * to the parameters.
5591 * If an element from a local array is read without first being written,
5592 * then there is no point in copying it in since it cannot have been
5593 * written prior to the scop. Warn about the uninitialized read instead.
5595 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
5598 isl_union_set
*local
;
5599 isl_union_set
*may_write
, *must_write
;
5600 isl_union_set
*copy_in
, *copy_out
;
5601 isl_union_set
*not_written
;
5602 isl_union_map
*uninitialized
;
5603 isl_union_map
*local_uninitialized
;
5605 must_write
= isl_union_map_range(
5606 isl_union_map_copy(gen
->prog
->must_write
));
5607 must_write
= isl_union_set_intersect_params(must_write
,
5608 isl_set_copy(gen
->prog
->context
));
5609 may_write
= isl_union_map_range(
5610 isl_union_map_copy(gen
->prog
->may_write
));
5611 may_write
= isl_union_set_intersect_params(may_write
,
5612 isl_set_copy(gen
->prog
->context
));
5613 may_write
= isl_union_set_universe(may_write
);
5614 may_write
= isl_union_set_apply(may_write
,
5615 isl_union_map_copy(gen
->prog
->to_outer
));
5616 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
5617 local
= isl_union_set_copy(copy_out
);
5619 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5624 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
5626 if (gen
->prog
->array
[i
].local
) {
5629 set
= isl_set_universe(space
);
5630 local
= isl_union_set_add_set(local
, set
);
5634 write_i
= isl_union_set_extract_set(may_write
, space
);
5635 empty
= isl_set_fast_is_empty(write_i
);
5636 isl_set_free(write_i
);
5640 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
5641 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
5643 isl_union_set_free(may_write
);
5645 copy_out
= isl_union_set_intersect_params(copy_out
,
5646 isl_set_copy(gen
->prog
->context
));
5648 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
5650 copy_out
= isl_union_set_apply(copy_out
,
5651 isl_union_map_copy(gen
->prog
->to_inner
));
5652 not_written
= isl_union_set_subtract(copy_out
, must_write
);
5654 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
5655 local_uninitialized
= isl_union_map_copy(uninitialized
);
5657 local
= isl_union_set_apply(local
,
5658 isl_union_map_copy(gen
->prog
->to_inner
));
5659 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
5661 if (!isl_union_map_is_empty(local_uninitialized
)) {
5663 "possibly uninitialized reads (not copied in):\n");
5664 isl_union_map_dump(local_uninitialized
);
5666 uninitialized
= isl_union_map_subtract(uninitialized
,
5667 local_uninitialized
);
5668 copy_in
= isl_union_map_range(uninitialized
);
5669 copy_in
= isl_union_set_union(copy_in
, not_written
);
5670 copy_in
= isl_union_set_apply(copy_in
,
5671 isl_union_map_copy(gen
->prog
->to_outer
));
5673 gen
->prog
->copy_in
= copy_in
;
5676 /* Internal data structure for extract_access.
5677 * "next_access" points to the end of a linked list that is extended
5678 * by extract_access.
5679 * "single_expression" is set if the access expressions belong to
5680 * an expression statement (i.e., a statement without internal control).
5682 struct ppcg_extract_access_data
{
5683 struct gpu_stmt_access
**next_access
;
5684 int single_expression
;
5687 /* Extract a gpu_stmt_access from "expr", append it to the list
5688 * that ends in *data->next_access and update the end of the list.
5689 * If the access expression performs a write, then it is considered
5690 * exact only if it appears in a single expression statement and
5691 * if its may access relation is equal to its must access relation.
5693 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
5695 struct ppcg_extract_access_data
*data
= user
;
5697 struct gpu_stmt_access
*access
;
5700 may
= pet_expr_access_get_may_access(expr
);
5701 ctx
= isl_map_get_ctx(may
);
5702 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
5704 access
->next
= NULL
;
5705 access
->read
= pet_expr_access_is_read(expr
);
5706 access
->write
= pet_expr_access_is_write(expr
);
5707 access
->access
= may
;
5708 access
->tagged_access
= pet_expr_access_get_tagged_may_access(expr
);
5709 if (!access
->write
) {
5710 access
->exact_write
= 1;
5711 } else if (!data
->single_expression
) {
5712 access
->exact_write
= 0;
5715 must
= pet_expr_access_get_must_access(expr
);
5716 access
->exact_write
= isl_map_is_equal(must
, access
->access
);
5719 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
5722 *data
->next_access
= access
;
5723 data
->next_access
= &(*data
->next_access
)->next
;
5728 /* Construct a linked list of gpu_stmt_access objects,
5729 * one for each access expression in the statement body.
5731 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
)
5733 struct ppcg_extract_access_data data
;
5735 stmt
->accesses
= NULL
;
5736 data
.next_access
= &stmt
->accesses
;
5737 data
.single_expression
=
5738 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
5739 pet_tree_foreach_access_expr(stmt
->stmt
->body
, &extract_access
, &data
);
5742 /* Return an array of gpu_stmt representing the statements in "scop".
5744 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
5745 __isl_keep isl_set
*context
)
5748 struct gpu_stmt
*stmts
;
5750 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->n_stmt
);
5754 for (i
= 0; i
< scop
->n_stmt
; ++i
) {
5755 struct gpu_stmt
*s
= &stmts
[i
];
5757 s
->id
= isl_set_get_tuple_id(scop
->stmts
[i
]->domain
);
5758 s
->stmt
= scop
->stmts
[i
];
5759 pet_stmt_extract_accesses(s
);
5765 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5767 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
5769 struct gpu_gen
*gen
= user
;
5771 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
5775 /* Generate CUDA code for "scop" and print it to "p".
5776 * After generating an AST for the transformed scop as explained below,
5777 * we call "gen->print" to print the AST in the desired output format
5780 * If it turns out that it does not make sense to generate GPU code,
5781 * then we generate CPU code instead.
5783 * The GPU code is generated in a context where at least one
5784 * statement instance is executed. The corresponding guard (if any) is printed
5785 * around the entire generated GPU code, except for the declaration
5786 * of the arrays that are visible outside of the scop and that therefore
5787 * cannot be declared inside the body of any possible guard.
5789 * We first compute a schedule that respects the dependences
5790 * of the original program and select the outermost band
5791 * of tilable dimensions that has at least one parallel loop.
5792 * We then have three blocks of dimensions
5796 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5801 * For each iteration of the T loop and for each array, we compute
5802 * the array elements accessed by that iteration, construct a rectangular
5803 * box around it and shift it to the origin. The result is used
5804 * as shared memory for the array.
5806 * We then split off at most 2 parallel loops from the T loops and
5807 * at most 3 parallel loops from the P loops
5811 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5812 * according to "grid"/"block" sizes.
5814 * H T1T T1P T2 P1T P1P P2 G
5816 * Finally, the T1P and P1P iterators are equated to the block and
5817 * thread dimensions respectively and so are effectively removed.
5818 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5819 * are run on the GPU.
5821 * Code is generated in three stages. We first generate code for the
5822 * host (the H loops), with iterators h%d. Then, for each leaf node
5823 * of the resulting AST, we generate code for the shared loops (up to
5824 * and including T2), with iterators g%d and after equating the H loops
5825 * to h%d parameters and the T1P loops to the block dimensions.
5826 * Finally, we generate code for the remaining loops in a similar fashion.
5828 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5829 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5830 struct ppcg_options
*options
)
5832 struct gpu_prog
*prog
;
5834 isl_set
*context
, *guard
;
5837 return isl_printer_free(p
);
5839 ctx
= isl_printer_get_ctx(p
);
5840 prog
= gpu_prog_alloc(ctx
, scop
);
5842 return isl_printer_free(p
);
5844 context
= isl_set_copy(prog
->context
);
5845 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5846 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5849 gen
->any_parallelism
= 0;
5850 compute_schedule(gen
);
5852 if (!gen
->any_parallelism
) {
5853 isl_set_free(context
);
5854 isl_set_free(guard
);
5855 p
= print_cpu(p
, scop
, options
);
5857 compute_copy_in_and_out(gen
);
5858 gen
->tree
= generate_host_code(gen
);
5859 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5860 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5861 isl_ast_node_free(gen
->tree
);
5864 isl_union_map_free(gen
->sched
);
5866 gpu_prog_free(prog
);
5871 /* Wrapper around generate for use as a ppcg_transform callback.
5873 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5874 struct ppcg_scop
*scop
, void *user
)
5876 struct gpu_gen
*gen
= user
;
5878 return generate(p
, gen
, scop
, gen
->options
);
5881 /* Transform the code in the file called "input" by replacing
5882 * all scops by corresponding GPU code and write the results to "out".
5884 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5885 struct ppcg_options
*options
,
5886 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5887 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5888 struct gpu_types
*types
, void *user
), void *user
)
5895 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5896 gen
.options
= options
;
5899 gen
.print_user
= user
;
5901 gen
.types
.name
= NULL
;
5903 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5905 isl_union_map_free(gen
.sizes
);
5906 for (i
= 0; i
< gen
.types
.n
; ++i
)
5907 free(gen
.types
.name
[i
]);
5908 free(gen
.types
.name
);
5913 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5915 struct gpu_prog
*prog
;
5920 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5925 prog
->context
= isl_set_copy(scop
->context
);
5926 prog
->n_stmts
= scop
->n_stmt
;
5927 prog
->stmts
= extract_stmts(ctx
, scop
, prog
->context
);
5928 prog
->read
= isl_union_map_copy(scop
->reads
);
5929 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
5930 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
5931 prog
->to_inner
= compute_to_inner(scop
);
5932 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5933 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5936 return gpu_prog_free(prog
);
5938 if (collect_array_info(prog
) < 0)
5939 return gpu_prog_free(prog
);
5944 void *gpu_prog_free(struct gpu_prog
*prog
)
5948 free_array_info(prog
);
5949 free_stmts(prog
->stmts
, prog
->n_stmts
);
5950 isl_union_map_free(prog
->to_outer
);
5951 isl_union_map_free(prog
->to_inner
);
5952 isl_union_set_free(prog
->copy_in
);
5953 isl_union_set_free(prog
->copy_out
);
5954 isl_union_map_free(prog
->read
);
5955 isl_union_map_free(prog
->may_write
);
5956 isl_union_map_free(prog
->must_write
);
5957 isl_union_map_free(prog
->array_order
);
5958 isl_set_free(prog
->context
);