2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
22 #include <isl/schedule.h>
23 #include <isl/schedule_node.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
29 #include "gpu_array_tile.h"
30 #include "gpu_group.h"
33 #include "ppcg_options.h"
36 struct gpu_array_info
;
38 /* Collect all references to the given array and store pointers to them
41 * If the array contains structures, then there is no need to collect
42 * the references since we will not be computing any reference groups.
44 static void collect_references(struct gpu_prog
*prog
,
45 struct gpu_array_info
*array
)
50 if (array
->has_compound_element
)
54 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
55 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
56 struct gpu_stmt_access
*access
;
58 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
60 name
= isl_map_get_tuple_name(access
->access
,
62 if (name
&& !strcmp(array
->name
, name
))
68 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
72 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
73 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
74 struct gpu_stmt_access
*access
;
76 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
78 name
= isl_map_get_tuple_name(access
->access
,
80 if (!name
|| strcmp(array
->name
, name
))
83 array
->refs
[n
++] = access
;
88 /* Compute and return the extent of "array", taking into account the set of
91 * In particular, the extent in the outer dimension is taken
92 * from "accessed", while the extents in the remaining dimensions
93 * are taken from array->extent.
95 * The extent in the outer dimension cannot be taken from array->extent
96 * because that may be unbounded. Furthermore, even if it is bounded,
97 * it may be larger than the piece of the array that is being accessed.
99 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
100 __isl_keep isl_set
*accessed
)
107 extent
= isl_set_copy(array
->extent
);
109 n_index
= isl_set_dim(accessed
, isl_dim_set
);
113 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
114 outer
= isl_set_copy(accessed
);
115 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
116 extent
= isl_set_flat_product(outer
, extent
);
117 id
= isl_set_get_tuple_id(accessed
);
118 extent
= isl_set_set_tuple_id(extent
, id
);
123 /* Is the array "array" being extracted a read-only scalar?
125 * That is, is "array" a scalar that is never possibly written to.
126 * An array containing structures is never considered to be a scalar.
128 static int is_read_only_scalar(struct gpu_array_info
*array
,
129 struct gpu_prog
*prog
)
132 isl_union_map
*write
;
135 if (array
->has_compound_element
)
137 if (array
->n_index
!= 0)
140 write
= isl_union_map_copy(prog
->may_write
);
141 space
= isl_set_universe(isl_space_copy(array
->space
));
142 write
= isl_union_map_intersect_range(write
,
143 isl_union_set_from_set(space
));
144 empty
= isl_union_map_is_empty(write
);
145 isl_union_map_free(write
);
150 /* Compute bounds on the host array "pa" based on the corresponding
151 * accessed elements in "arrays"
152 * and collect all references to the array.
153 * Store the results in "info".
155 * If the array is zero-dimensional and does not contain structures,
156 * i.e., if the array is a scalar, we check whether it is read-only.
157 * We also check whether the array is accessed at all.
159 static int extract_array_info(struct gpu_prog
*prog
,
160 struct gpu_array_info
*info
, struct pet_array
*pa
,
161 __isl_keep isl_union_set
*arrays
)
167 isl_set
*accessed
, *extent
;
169 n_index
= isl_set_dim(pa
->extent
, isl_dim_set
);
170 name
= isl_set_get_tuple_name(pa
->extent
);
171 bounds
= isl_alloc_array(prog
->ctx
, isl_pw_aff
*, n_index
);
175 info
->space
= isl_set_get_space(pa
->extent
);
176 info
->name
= strdup(name
);
177 info
->n_index
= n_index
;
178 info
->bound
= bounds
;
179 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
181 info
->type
= strdup(pa
->element_type
);
182 info
->size
= pa
->element_size
;
183 info
->local
= pa
->declared
&& !pa
->exposed
;
184 info
->has_compound_element
= pa
->element_is_record
;
185 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
187 accessed
= isl_union_set_extract_set(arrays
,
188 isl_space_copy(info
->space
));
189 empty
= isl_set_is_empty(accessed
);
190 extent
= compute_extent(pa
, accessed
);
191 isl_set_free(accessed
);
192 info
->extent
= extent
;
195 info
->accessed
= !empty
;
196 for (i
= 0; i
< n_index
; ++i
) {
202 dom
= isl_set_copy(extent
);
203 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
205 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
206 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
207 fprintf(stderr
, "unable to determine extent of '%s' "
208 "in dimension %d\n", info
->name
, i
);
209 dom
= isl_set_free(dom
);
211 bound
= isl_set_dim_max(dom
, 0);
212 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
213 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
214 one
= isl_aff_zero_on_domain(ls
);
215 one
= isl_aff_add_constant_si(one
, 1);
216 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
217 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
220 if (!isl_pw_aff_is_cst(bound
))
224 collect_references(prog
, info
);
229 /* Remove independence from the order constraints "order" on array "array".
230 * Since the pairs of iterations in the filter relation of an independence
231 * are guaranteed to be completely independent by the user, there is
232 * no need to ensure that live ranges are ordered along thong pairs.
233 * We make an exception for local variables, though, as the independence
234 * guarantee does not apply to those.
236 * The order constraints are used in two places.
237 * Those on scalars are used in check_scalar_live_ranges to check if
238 * we need to force the scalar to be private. Any non-local scalar
239 * should not be forced scalar if it only appears in independent loops.
240 * Those on non-scalars are added to the coincidence constraints
241 * in compute_schedule because we do not support any array expansion.
242 * Accesses to non-local arrays should not prevent a loop from being
243 * considered coincident so we should indeed remove those constraints
244 * from the order constraints.
246 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
247 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
251 for (i
= 0; i
< prog
->scop
->pet
->n_independence
; ++i
) {
252 struct pet_independence
*pi
= prog
->scop
->pet
->independences
[i
];
253 if (isl_union_set_contains(pi
->local
, array
->space
))
256 order
= isl_union_map_subtract(order
,
257 isl_union_map_copy(pi
->filter
));
263 /* For each array in "prog", store the (untagged) order dependences
264 * derived from the array in array->dep_order.
265 * In particular, consider all references that access the given array
266 * and take the order dependences that have one of these references
267 * as source. (Since an order dependence relates two references to
268 * the same array, the target of these order dependences will also
269 * be one of these references.)
270 * Additionally, store the union of these array->dep_order relations
271 * for all non-scalar arrays in prog->array_order.
273 void collect_order_dependences(struct gpu_prog
*prog
)
277 isl_union_map
*accesses
;
279 space
= isl_union_map_get_space(prog
->read
);
280 prog
->array_order
= isl_union_map_empty(space
);
282 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
283 accesses
= isl_union_map_union(accesses
,
284 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
285 accesses
= isl_union_map_universe(accesses
);
286 accesses
= isl_union_map_apply_range(accesses
,
287 isl_union_map_copy(prog
->to_outer
));
289 for (i
= 0; i
< prog
->n_array
; ++i
) {
290 struct gpu_array_info
*array
= &prog
->array
[i
];
293 isl_union_map
*order
;
295 set
= isl_set_universe(isl_space_copy(array
->space
));
296 uset
= isl_union_set_from_set(set
);
297 uset
= isl_union_map_domain(
298 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
300 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
301 order
= isl_union_map_intersect_domain(order
, uset
);
302 order
= isl_union_map_zip(order
);
303 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
304 order
= remove_independences(prog
, array
, order
);
305 array
->dep_order
= order
;
307 if (gpu_array_is_scalar(array
) && !array
->has_compound_element
)
310 prog
->array_order
= isl_union_map_union(prog
->array_order
,
311 isl_union_map_copy(array
->dep_order
));
314 isl_union_map_free(accesses
);
317 /* Construct a gpu_array_info for each array referenced by prog->scop and
318 * collect them in prog->array.
320 * The sizes are based on the extents and the set of possibly accessed
321 * elements by "prog".
322 * If there are any member accesses involved, then they are first mapped
323 * to the outer arrays of structs.
325 * If we are allowing live range reordering, then also set
326 * the dep_order field. Otherwise leave it NULL.
328 static int collect_array_info(struct gpu_prog
*prog
)
332 isl_union_set
*arrays
;
334 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
335 arrays
= isl_union_set_union(arrays
,
336 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
338 arrays
= isl_union_set_apply(arrays
,
339 isl_union_map_copy(prog
->to_outer
));
341 arrays
= isl_union_set_coalesce(arrays
);
343 prog
->n_array
= prog
->scop
->pet
->n_array
;
344 prog
->array
= isl_calloc_array(prog
->ctx
,
345 struct gpu_array_info
, prog
->n_array
);
347 for (i
= 0; i
< prog
->scop
->pet
->n_array
; ++i
)
348 if (extract_array_info(prog
, &prog
->array
[i
],
349 prog
->scop
->pet
->arrays
[i
], arrays
) < 0)
352 isl_union_set_free(arrays
);
354 if (prog
->scop
->options
->live_range_reordering
)
355 collect_order_dependences(prog
);
360 static void free_array_info(struct gpu_prog
*prog
)
364 for (i
= 0; i
< prog
->n_array
; ++i
) {
365 int n_index
= prog
->array
[i
].n_index
;
366 free(prog
->array
[i
].type
);
367 free(prog
->array
[i
].name
);
368 for (j
= 0; j
< n_index
; ++j
)
369 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
370 isl_space_free(prog
->array
[i
].space
);
371 isl_set_free(prog
->array
[i
].extent
);
372 free(prog
->array
[i
].bound
);
373 free(prog
->array
[i
].refs
);
374 isl_union_map_free(prog
->array
[i
].dep_order
);
379 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
380 * as an array or through a pointer reference, but as a single data element.
381 * At the moment, scalars are represented as zero-dimensional arrays.
382 * Note that the single data element may be an entire structure.
384 int gpu_array_is_scalar(struct gpu_array_info
*array
)
386 return array
->n_index
== 0;
389 /* Is "array" a read-only scalar?
391 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
393 return array
->read_only_scalar
;
396 /* Return the set of parameter values for which the array has a positive
397 * size in all dimensions.
398 * If the sizes are only valid for some parameter values, then those
399 * constraints are also taken into account.
401 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
407 space
= isl_space_params(isl_space_copy(array
->space
));
408 guard
= isl_set_universe(space
);
410 for (i
= 0; i
< array
->n_index
; ++i
) {
412 isl_set
*guard_i
, *zero
;
414 bound
= isl_pw_aff_copy(array
->bound
[i
]);
415 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
416 zero
= isl_pw_aff_zero_set(bound
);
417 guard_i
= isl_set_subtract(guard_i
, zero
);
418 guard
= isl_set_intersect(guard
, guard_i
);
424 /* Internal data structure for extract_size_of_type.
425 * "type" specifies the name of the space that we want to extract.
426 * "res" is used to store the subset of that space.
428 struct ppcg_extract_size_data
{
433 /* This function is called for each set in a union_set.
434 * If the name of the set matches data->type, we store the
437 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
439 struct ppcg_extract_size_data
*data
= user
;
442 name
= isl_set_get_tuple_name(size
);
443 if (name
&& !strcmp(name
, data
->type
)) {
452 /* Given a union map { kernel[i] -> *[...] },
453 * return the range in the space called "type" for the kernel with
454 * sequence number "id".
456 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
457 const char *type
, int id
)
461 isl_union_set
*local_sizes
;
462 struct ppcg_extract_size_data data
= { type
, NULL
};
467 space
= isl_union_map_get_space(sizes
);
468 space
= isl_space_set_from_params(space
);
469 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
470 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
471 dom
= isl_set_universe(space
);
472 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
474 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
475 isl_union_map_copy(sizes
));
476 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
477 isl_union_set_free(local_sizes
);
481 /* Given a singleton set, extract the first (at most *len) elements
482 * of the single integer tuple into *sizes and update *len if needed.
484 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
492 dim
= isl_set_dim(set
, isl_dim_set
);
496 for (i
= 0; i
< *len
; ++i
) {
499 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
502 sizes
[i
] = isl_val_get_num_si(v
);
509 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
510 * if the option debug->dump_sizes is set.
512 static void set_used_sizes(struct gpu_gen
*gen
, const char *type
, int id
,
519 if (!gen
->options
->debug
->dump_sizes
)
522 space
= isl_union_map_get_space(gen
->used_sizes
);
523 space
= isl_space_set_from_params(space
);
524 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
525 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
526 space
= isl_space_from_domain(space
);
527 space
= isl_space_add_dims(space
, isl_dim_out
, len
);
528 space
= isl_space_set_tuple_name(space
, isl_dim_out
, type
);
530 map
= isl_map_universe(space
);
531 map
= isl_map_fix_si(map
, isl_dim_in
, 0, id
);
532 for (i
= 0; i
< len
; ++i
)
533 map
= isl_map_fix_si(map
, isl_dim_out
, i
, sizes
[i
]);
535 gen
->used_sizes
= isl_union_map_add_map(gen
->used_sizes
, map
);
538 /* Extract user specified "tile" sizes from the "sizes" command line option,
539 * defaulting to option->tile_size in each dimension.
540 * *tile_len contains the maximum number of tile sizes needed.
541 * Update *tile_len to the number of specified tile sizes, if any, and
542 * return a pointer to the tile sizes (or NULL on error).
543 * Add the effectively used sizes to gen->used_sizes.
545 static int *read_tile_sizes(struct gpu_gen
*gen
, int *tile_len
)
551 tile_size
= isl_alloc_array(gen
->ctx
, int, *tile_len
);
554 for (n
= 0; n
< *tile_len
; ++n
)
555 tile_size
[n
] = gen
->options
->tile_size
;
557 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
558 read_sizes_from_set(size
, tile_size
, tile_len
);
559 set_used_sizes(gen
, "tile", gen
->kernel_id
, tile_size
, *tile_len
);
564 /* Extract user specified "block" sizes from the "sizes" command line option,
565 * after filling in some potentially useful defaults.
567 static void read_block_sizes(struct ppcg_kernel
*kernel
,
568 __isl_keep isl_union_map
*sizes
)
572 if (kernel
->n_block
> 3)
574 switch (kernel
->n_block
) {
576 kernel
->block_dim
[0] = 512;
579 kernel
->block_dim
[0] = 32;
580 kernel
->block_dim
[1] = 16;
583 kernel
->block_dim
[0] = 32;
584 kernel
->block_dim
[1] = 4;
585 kernel
->block_dim
[2] = 4;
589 size
= extract_sizes(sizes
, "block", kernel
->id
);
590 read_sizes_from_set(size
, kernel
->block_dim
, &kernel
->n_block
);
593 /* Extract user specified "grid" sizes from the "sizes" command line option,
594 * after filling in some potentially useful defaults.
596 static void read_grid_sizes(struct ppcg_kernel
*kernel
,
597 __isl_keep isl_union_map
*sizes
)
601 if (kernel
->n_grid
> 2)
603 switch (kernel
->n_grid
) {
605 kernel
->grid_dim
[0] = 32768;
608 kernel
->grid_dim
[0] = 256;
609 kernel
->grid_dim
[1] = 256;
613 size
= extract_sizes(sizes
, "grid", kernel
->id
);
614 read_sizes_from_set(size
, kernel
->grid_dim
, &kernel
->n_grid
);
617 /* Extract user specified grid and block sizes from the gen->sizes
618 * command line option after filling in some potentially useful defaults.
619 * Store the extracted sizes in "kernel".
620 * Add the effectively used sizes to gen->used_sizes.
622 static void read_grid_and_block_sizes(struct ppcg_kernel
*kernel
,
625 read_block_sizes(kernel
, gen
->sizes
);
626 read_grid_sizes(kernel
, gen
->sizes
);
627 set_used_sizes(gen
, "block", kernel
->id
,
628 kernel
->block_dim
, kernel
->n_block
);
629 set_used_sizes(gen
, "grid", kernel
->id
,
630 kernel
->grid_dim
, kernel
->n_grid
);
633 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
640 for (i
= 0; i
< n
; ++i
) {
641 struct gpu_stmt_access
*access
, *next
;
643 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
645 isl_id_free(access
->ref_id
);
646 isl_map_free(access
->access
);
647 isl_map_free(access
->tagged_access
);
651 isl_id_free(stmts
[i
].id
);
658 /* Construct a map from a domain of dimensionality "len"
659 * to a domain of dimensionality "len" + "tile_len" that tiles
660 * the "tile_len" coordinates starting at "first".
661 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
662 * "dim" prescribes the parameters.
664 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
665 int first
, int tile_len
, int *tile_size
)
672 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
673 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
674 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
675 ls
= isl_local_space_from_space(dim
);
677 for (i
= 0; i
< len
- tile_len
; ++i
) {
678 int j
= i
< first
? i
: i
+ tile_len
;
679 int k
= i
< first
? i
: i
+ 2 * tile_len
;
681 c
= isl_equality_alloc(isl_local_space_copy(ls
));
682 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
683 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
684 bmap
= isl_basic_map_add_constraint(bmap
, c
);
687 for (i
= 0; i
< tile_len
; ++i
) {
688 c
= isl_equality_alloc(isl_local_space_copy(ls
));
689 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
691 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
692 first
+ i
, tile_size
[i
]);
693 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
694 first
+ i
+ tile_len
, 1);
695 bmap
= isl_basic_map_add_constraint(bmap
, c
);
697 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
698 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
699 first
+ i
+ tile_len
, 1);
700 bmap
= isl_basic_map_add_constraint(bmap
, c
);
702 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
703 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
704 first
+ i
+ tile_len
, -1);
705 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
706 bmap
= isl_basic_map_add_constraint(bmap
, c
);
709 isl_local_space_free(ls
);
711 return isl_map_from_basic_map(bmap
);
714 /* Construct a map from a domain of dimensionality "len"
715 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
716 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
717 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
718 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
719 * that are projected out at the end.
720 * "dim" prescribes the parameters.
722 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
723 int first
, int wrap_len
, int *wrap_size
)
730 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
731 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
732 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
733 ls
= isl_local_space_from_space(dim
);
735 for (i
= 0; i
< len
; ++i
) {
736 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
738 c
= isl_equality_alloc(isl_local_space_copy(ls
));
739 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
740 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
741 bmap
= isl_basic_map_add_constraint(bmap
, c
);
744 for (i
= 0; i
< wrap_len
; ++i
) {
745 c
= isl_equality_alloc(isl_local_space_copy(ls
));
746 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
748 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
749 first
+ wrap_len
+ i
, 1);
750 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
751 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
752 bmap
= isl_basic_map_add_constraint(bmap
, c
);
754 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
755 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
756 first
+ wrap_len
+ i
, 1);
757 bmap
= isl_basic_map_add_constraint(bmap
, c
);
759 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
760 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
761 first
+ wrap_len
+ i
, -1);
762 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
763 bmap
= isl_basic_map_add_constraint(bmap
, c
);
766 isl_local_space_free(ls
);
768 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
769 first
+ 2 * wrap_len
, wrap_len
);
771 return isl_map_from_basic_map(bmap
);
774 /* Tile the B loops over the tile sizes and then tile/wrap
775 * the T1 loops over the blocks.
777 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
778 __isl_take isl_union_map
*sched
)
780 struct ppcg_kernel
*kernel
= gen
->kernel
;
782 isl_map
*tiling
, *block_tiling
;
784 dim
= isl_union_map_get_space(sched
);
785 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
786 gen
->tile_first
, kernel
->tile_len
, kernel
->tile_size
);
788 if (gen
->options
->wrap
)
789 block_tiling
= wrap(dim
, gen
->untiled_len
+ kernel
->tile_len
,
790 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
792 block_tiling
= tile(dim
, gen
->untiled_len
+ kernel
->tile_len
,
793 gen
->tile_first
, kernel
->n_grid
, kernel
->grid_dim
);
795 gen
->tiled_len
= gen
->untiled_len
+ kernel
->tile_len
+ kernel
->n_grid
;
797 tiling
= isl_map_apply_range(tiling
, block_tiling
);
799 sched
= isl_union_map_apply_range(sched
,
800 isl_union_map_from_map(tiling
));
802 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
807 /* Equate the "T1P" iterators in the tiled schedule "sched"
808 * to the block dimensions.
810 static __isl_give isl_union_map
*parametrize_tiled_schedule(
811 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
813 struct ppcg_kernel
*kernel
= gen
->kernel
;
817 dim
= isl_union_map_get_space(sched
);
818 par
= parametrization(dim
, gen
->tiled_len
,
819 gen
->tile_first
+ kernel
->n_grid
, kernel
->block_ids
);
820 sched
= isl_union_map_intersect_range(sched
,
821 isl_union_set_from_set(par
));
826 /* Tile/wrap the P1 loops over the threads.
828 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
829 __isl_take isl_union_map
*sched
)
831 struct ppcg_kernel
*kernel
= gen
->kernel
;
836 dim
= isl_union_map_get_space(sched
);
838 if (gen
->options
->wrap
)
839 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
840 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
842 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
843 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
844 gen
->thread_tiled_len
= gen
->tiled_len
+ kernel
->n_block
;
846 sched
= isl_union_map_apply_range(sched
,
847 isl_union_map_from_map(tiling
));
849 par
= parametrization(dim
, gen
->thread_tiled_len
,
850 gen
->tile_first
+ kernel
->tile_len
+
851 kernel
->n_grid
+ kernel
->n_block
, kernel
->thread_ids
);
852 sched
= isl_union_map_intersect_range(sched
,
853 isl_union_set_from_set(par
));
855 gen
->shared_len
= gen
->tile_first
+ kernel
->tile_len
+ kernel
->n_grid
;
860 /* If the user asked for it, scale the shared memory tile loops
861 * (T1T and T2) of "sched" by kernel->tile_size[i].
862 * If we are not performing "wrapping", then additionally scale the T1P
863 * loops by kernel->grid_dim[i].
865 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
866 __isl_take isl_union_map
*sched
)
868 struct ppcg_kernel
*kernel
= gen
->kernel
;
871 isl_basic_map
*scale
;
875 if (!gen
->options
->scale_tile_loops
)
878 dim
= isl_union_map_get_space(sched
);
879 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
880 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
881 scale
= isl_basic_map_universe(isl_space_copy(dim
));
882 ls
= isl_local_space_from_space(dim
);
884 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
887 if (i
>= gen
->tile_first
&&
888 i
< gen
->tile_first
+ kernel
->n_grid
) {
889 f
= kernel
->tile_size
[i
- gen
->tile_first
];
890 if (!gen
->options
->wrap
)
891 f
*= kernel
->grid_dim
[i
- gen
->tile_first
];
892 } else if (i
>= gen
->tile_first
+ kernel
->n_grid
&&
893 i
< gen
->tile_first
+ kernel
->n_grid
+
895 f
= kernel
->tile_size
[i
-
896 (gen
->tile_first
+ kernel
->n_grid
)];
899 c
= isl_equality_alloc(isl_local_space_copy(ls
));
900 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
901 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
902 scale
= isl_basic_map_add_constraint(scale
, c
);
905 isl_local_space_free(ls
);
907 sched
= isl_union_map_apply_range(sched
,
908 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
913 /* If we are not performing "wrapping" and if the user asked for it,
914 * scale the thread tile loops (P1T) of "sched" by kernel->block_dim[i].
916 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
917 __isl_take isl_union_map
*sched
)
921 isl_basic_map
*scale
;
925 if (gen
->options
->wrap
)
927 if (!gen
->options
->scale_tile_loops
)
930 dim
= isl_union_map_get_space(sched
);
931 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
932 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
933 scale
= isl_basic_map_universe(isl_space_copy(dim
));
934 ls
= isl_local_space_from_space(dim
);
936 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
939 if (i
>= gen
->shared_len
&&
940 i
< gen
->shared_len
+ gen
->kernel
->n_block
)
941 f
= gen
->kernel
->block_dim
[i
- gen
->shared_len
];
943 c
= isl_equality_alloc(isl_local_space_copy(ls
));
944 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
945 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
946 scale
= isl_basic_map_add_constraint(scale
, c
);
949 isl_local_space_free(ls
);
951 sched
= isl_union_map_apply_range(sched
,
952 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
957 /* If we are not performing "wrapping" and if the user asked for it,
958 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
960 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
961 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
965 isl_basic_map
*scale
;
969 if (gen
->options
->wrap
)
971 if (!gen
->options
->scale_tile_loops
)
974 dim
= isl_union_map_get_space(sched
);
975 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
976 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
977 scale
= isl_basic_map_universe(isl_space_copy(dim
));
978 ls
= isl_local_space_from_space(dim
);
980 for (i
= 0; i
< len
; ++i
) {
983 if (i
>= first
&& i
< first
+ n_tile
)
984 f
= gen
->kernel
->block_dim
[i
- first
];
986 c
= isl_equality_alloc(isl_local_space_copy(ls
));
987 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
988 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
989 scale
= isl_basic_map_add_constraint(scale
, c
);
992 isl_local_space_free(ls
);
994 sched
= isl_union_map_apply_range(sched
,
995 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1000 /* Add parameters p[i] with identifiers "ids" to "set",
1001 * with bounds to 0 <= p[i] < size[i].
1003 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1004 int *size
, __isl_keep isl_id_list
*ids
)
1009 len
= isl_id_list_n_id(ids
);
1010 nparam
= isl_set_dim(set
, isl_dim_param
);
1011 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1013 for (i
= 0; i
< len
; ++i
) {
1016 id
= isl_id_list_get_id(ids
, i
);
1017 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1018 set
= isl_set_lower_bound_si(set
, isl_dim_param
, nparam
+ i
, 0);
1019 set
= isl_set_upper_bound_si(set
, isl_dim_param
,
1020 nparam
+ i
, size
[i
] - 1);
1026 /* Add "len" parameters p[i] with identifiers "ids" and intersect "set"
1029 * { : 0 <= p[i] < size[i] }
1031 * or an overapproximation.
1033 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1034 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1035 __isl_keep isl_id_list
*ids
)
1040 isl_local_space
*ls
;
1042 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1043 nparam
= isl_set_dim(set
, isl_dim_param
);
1044 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1046 for (i
= 0; i
< len
; ++i
) {
1049 id
= isl_id_list_get_id(ids
, i
);
1050 set
= isl_set_set_dim_id(set
, isl_dim_param
, nparam
+ i
, id
);
1053 space
= isl_space_params(isl_set_get_space(set
));
1054 ls
= isl_local_space_from_space(space
);
1055 for (i
= 0; i
< len
; ++i
) {
1056 isl_pw_aff
*param
, *size_i
, *zero
;
1059 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1060 isl_dim_param
, nparam
+ i
);
1062 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1063 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1064 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1065 set
= isl_set_intersect_params(set
, bound
);
1067 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1068 bound
= isl_pw_aff_ge_set(param
, zero
);
1069 set
= isl_set_intersect_params(set
, bound
);
1071 isl_local_space_free(ls
);
1076 /* Construct a map from an access to group->array to the corresponding
1077 * shared/private memory tile.
1078 * The map is of the form
1080 * { [D[i] -> A[a]] -> T[t] }
1082 * where D represents the initial shared_len dimensions
1083 * of the computed schedule.
1085 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1087 struct gpu_array_tile
*tile
;
1088 isl_multi_aff
*tiling
;
1090 tile
= group
->private_tile
;
1092 tile
= group
->shared_tile
;
1094 tiling
= isl_multi_aff_copy(tile
->tiling
);
1096 return isl_map_from_multi_aff(tiling
);
1099 /* Given a schedule that iterates over all elements in a piece of an array,
1100 * perform tiling/wrapping over the threads.
1102 * In particular, we tile the final iterators so that the final thread
1103 * dimension runs over the final array dimension.
1104 * However, if those final iterators have only a single iteration,
1105 * we try to tile earlier iterators instead.
1107 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1108 __isl_take isl_map
*sched
)
1111 isl_union_map
*usched
;
1114 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1118 n_tile
= gen
->kernel
->n_block
;
1119 if (n_tile
> nvar
) {
1121 sched
= isl_map_insert_dims(sched
,
1122 isl_dim_out
, 0, n_tile
- nvar
);
1123 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1124 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1128 first
= nvar
- n_tile
;
1130 for (; first
> 0; first
--)
1131 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1134 dim
= isl_map_get_space(sched
);
1135 dim
= isl_space_params(dim
);
1136 if (gen
->options
->wrap
)
1137 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1138 n_tile
, gen
->kernel
->block_dim
);
1140 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1141 n_tile
, gen
->kernel
->block_dim
);
1142 sched
= isl_map_apply_range(sched
, tiling
);
1144 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
,
1145 gen
->kernel
->thread_ids
);
1146 sched
= isl_map_intersect_range(sched
, par
);
1148 usched
= isl_union_map_from_map(sched
);
1149 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1151 sched
= isl_map_from_union_map(usched
);
1156 /* Return the union of all tagged access relations in the group.
1158 static __isl_give isl_union_map
*group_tagged_access_relation(
1159 struct gpu_array_ref_group
*group
)
1162 isl_union_map
*access
;
1164 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1165 for (i
= 0; i
< group
->n_ref
; ++i
) {
1168 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1169 access
= isl_union_map_union(access
,
1170 isl_union_map_from_map(map_i
));
1176 /* Return the extent of "array", recomputed from the bounds.
1177 * The recomputed extent may be simpler than the original extent.
1179 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1184 isl_local_space
*ls
;
1187 id
= isl_set_get_tuple_id(array
->extent
);
1188 space
= isl_set_get_space(array
->extent
);
1189 extent
= isl_set_universe(isl_space_copy(space
));
1190 ls
= isl_local_space_from_space(space
);
1191 for (i
= 0; i
< array
->n_index
; ++i
) {
1197 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1199 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1201 index
= isl_pw_aff_from_aff(aff
);
1202 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1203 bound
= isl_pw_aff_from_range(bound
);
1204 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1205 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1207 lt
= isl_pw_aff_lt_set(index
, bound
);
1208 extent
= isl_set_intersect(extent
, lt
);
1210 isl_local_space_free(ls
);
1216 /* Return a map from the first shared_len dimensions of the computed
1217 * schedule to the array tile in
1218 * global memory that corresponds to the shared memory copy.
1220 * In particular, return a map
1226 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1230 * 0 <= a <= array_size - 1 (2)
1232 * Note that if some stride has been detected (i.e., when
1233 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1234 * to the shifted and scaled down version.
1236 * Constraints (1) are obtained by mapping the size constraints on the
1237 * shared/private memory tile back to the access relation.
1238 * Constraints (2) are obtained from the (recomputed) extent.
1240 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1243 int n_index
= group
->array
->n_index
;
1249 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1250 space
= isl_space_range(space
);
1251 local
= isl_set_universe(space
);
1252 for (i
= 0; i
< n_index
; ++i
) {
1255 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1256 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1257 bound
= isl_val_sub_ui(bound
, 1);
1258 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1260 local
= isl_set_preimage_multi_aff(local
,
1261 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1262 tile
= isl_set_unwrap(local
);
1263 extent
= array_extent(group
->array
);
1264 tile
= isl_map_intersect_range(tile
, extent
);
1269 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1270 * return the corresponding mapping from the AST schedule to
1271 * to the first shared_len dimensions of the schedule computed by PPCG.
1273 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1274 __isl_take isl_pw_multi_aff
*iterator_map
)
1276 isl_union_map
*umap
;
1278 isl_map
*map
, *sched
;;
1280 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1281 space
= isl_space_from_domain(space
);
1282 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1284 umap
= isl_union_map_copy(gen
->shared_sched
);
1285 umap
= isl_union_map_apply_range(umap
,
1286 isl_union_map_copy(gen
->shared_proj
));
1287 map
= isl_union_map_extract_map(umap
, space
);
1288 isl_union_map_free(umap
);
1290 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1291 sched
= isl_map_detect_equalities(sched
);
1293 return isl_pw_multi_aff_from_map(sched
);
1296 /* Set unroll[j] if the input dimension j is involved in
1297 * the index expression represented by ma.
1299 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1303 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1304 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1307 for (i
= 0; i
< n_out
; ++i
) {
1310 aff
= isl_multi_aff_get_aff(ma
, i
);
1311 for (j
= 0; j
< n_in
; ++j
)
1312 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1318 isl_multi_aff_free(ma
);
1322 /* Given an array pos mapping input dimensions to the corresponding
1323 * output dimension, construct the corresponding map.
1325 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1330 isl_basic_map
*bmap
;
1331 isl_local_space
*ls
;
1333 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1334 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1335 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1336 ls
= isl_local_space_from_space(dim
);
1338 for (i
= 0; i
< len
; ++i
) {
1339 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1340 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1342 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1344 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1346 isl_local_space_free(ls
);
1348 return isl_map_from_basic_map(bmap
);
1351 /* Find all loops involved in any of the index expressions for any of
1352 * the private accesses that require unrolling, move them innermost
1353 * and then mark them as requiring unrolling by setting gen->first_unroll.
1354 * The loops involved should all be parallel because of the checks
1355 * we performed in check_private_group_access. Moving them innermost
1356 * is therefore a valid transformation.
1358 * Loops up to gen->shared_len are generated before the mapping to
1359 * threads is applied. They should therefore be ignored.
1361 * We compute the hidden equalities of the schedule first
1362 * since we will need them in our calls to isl_pw_multi_aff_from_map
1363 * and because we want to make sure that the same equalities
1364 * are also available to the code generator.
1366 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1367 __isl_take isl_union_map
*sched
)
1369 struct ppcg_kernel
*kernel
= gen
->kernel
;
1371 int unroll
[gen
->thread_tiled_len
];
1372 int perm
[gen
->thread_tiled_len
];
1375 int len
= gen
->shared_len
+ kernel
->n_parallel
+ kernel
->n_block
;
1377 gen
->first_unroll
= -1;
1379 sched
= isl_union_map_detect_equalities(sched
);
1380 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1382 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1383 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1385 for (j
= 0; j
< array
->n_group
; ++j
) {
1386 isl_union_map
*access
;
1388 isl_pw_multi_aff
*pma
;
1389 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1391 if (!array
->groups
[j
]->private_tile
)
1393 if (!gpu_array_ref_group_requires_unroll(group
))
1396 access
= gpu_array_ref_group_access_relation(
1397 array
->groups
[j
], 1, 1);
1398 access
= isl_union_map_apply_domain(access
,
1399 isl_union_map_copy(sched
));
1401 acc
= isl_map_from_union_map(access
);
1402 pma
= isl_pw_multi_aff_from_map(acc
);
1403 isl_pw_multi_aff_foreach_piece(pma
,
1404 &check_unroll
, unroll
);
1406 isl_pw_multi_aff_free(pma
);
1410 for (i
= gen
->shared_len
; i
< len
; ++i
)
1417 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1422 for (i
= 0; i
< gen
->shared_len
; ++i
)
1424 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1427 gen
->first_unroll
= j
- gen
->shared_len
;
1428 for (i
= gen
->shared_len
; i
< len
; ++i
)
1432 dim
= isl_union_map_get_space(sched
);
1433 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1434 sched
= isl_union_map_apply_range(sched
,
1435 isl_union_map_from_map(permute
));
1440 /* Construct a map with input the shared tile loops and the loops that
1441 * will be wrapped around the threads that relates these later loops
1442 * to the thread indices and then projects them out.
1444 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
1446 struct ppcg_kernel
*kernel
= gen
->kernel
;
1453 dim
= isl_union_map_get_space(gen
->shared_sched
);
1455 if (gen
->options
->wrap
)
1456 tiling
= wrap(isl_space_copy(dim
),
1457 gen
->shared_len
+ kernel
->n_block
,
1458 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
1460 tiling
= tile(isl_space_copy(dim
),
1461 gen
->shared_len
+ kernel
->n_block
,
1462 gen
->shared_len
, kernel
->n_block
, kernel
->block_dim
);
1466 par
= parametrization(dim
, gen
->shared_len
+ 2 * kernel
->n_block
,
1467 gen
->tile_first
+ kernel
->tile_len
+
1468 kernel
->n_grid
+ kernel
->n_block
, kernel
->thread_ids
);
1470 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
1471 priv
= isl_map_intersect_range(priv
, par
);
1473 dim
= isl_map_get_space(priv
);
1474 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
1475 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
1476 proj
= projection(dim
, gen
->shared_len
+ 2 * kernel
->n_block
,
1479 priv
= isl_map_apply_range(priv
, proj
);
1484 /* If max_shared_memory is not set to infinity (-1), then make
1485 * sure that the total amount of shared memory required by the
1486 * array reference groups mapped to shared memory by "kernel"
1487 * is no larger than this maximum.
1489 * We apply a greedy approach and discard (keep in global memory)
1490 * those groups that would result in a total memory size that
1491 * is larger than the maximum.
1493 * This function should be called after any function that may
1494 * affect the decision on whether to place a reference group
1495 * in private, shared or global memory.
1497 static void check_shared_memory_bound(struct ppcg_kernel
*kernel
)
1500 isl_val
*left
, *size
;
1502 if (kernel
->options
->max_shared_memory
< 0)
1505 left
= isl_val_int_from_si(kernel
->ctx
,
1506 kernel
->options
->max_shared_memory
);
1508 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1509 struct gpu_local_array_info
*local
= &kernel
->array
[i
];
1511 for (j
= 0; j
< local
->n_group
; ++j
) {
1512 struct gpu_array_ref_group
*group
;
1514 group
= local
->groups
[j
];
1515 if (group
->private_tile
)
1517 if (!group
->shared_tile
)
1520 size
= gpu_array_tile_size(group
->shared_tile
);
1521 size
= isl_val_mul_ui(size
, local
->array
->size
);
1523 if (isl_val_le(size
, left
)) {
1524 left
= isl_val_sub(left
, size
);
1529 group
->shared_tile
=
1530 gpu_array_tile_free(group
->shared_tile
);
1537 /* Compute a tiling for all the array reference groups in "kernel".
1539 static void compute_group_tilings(struct ppcg_kernel
*kernel
)
1543 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1544 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1546 for (j
= 0; j
< array
->n_group
; ++j
)
1547 gpu_array_ref_group_compute_tiling(array
->groups
[j
]);
1551 /* Take tiled_sched, project it onto the shared tile loops and
1552 * the loops that will be wrapped over the threads and
1553 * store the result in gen->shared_sched.
1554 * Also compute a projection that projects out the loops that will be
1555 * wrapped over the threads and store this projection in gen->shared_proj.
1557 static void compute_shared_sched(struct gpu_gen
*gen
)
1562 isl_union_map
*sched
;
1564 sched
= isl_union_map_copy(gen
->tiled_sched
);
1566 dim
= isl_union_map_get_space(sched
);
1567 proj
= projection(dim
, gen
->tiled_len
,
1568 gen
->shared_len
+ gen
->kernel
->n_block
);
1569 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
1571 dim
= isl_union_map_get_space(sched
);
1572 proj
= projection(dim
, gen
->shared_len
+ gen
->kernel
->n_block
,
1575 gen
->shared_sched
= sched
;
1576 gen
->shared_proj
= isl_union_map_from_map(proj
);
1579 /* Compute the size of a bounding box around the origin and "set",
1580 * where "set" is assumed to contain only non-negative elements.
1581 * In particular, compute the maximal value of "set" in each direction
1584 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
1585 __isl_take isl_set
*context
)
1588 isl_multi_pw_aff
*mpa
;
1590 context
= isl_set_params(context
);
1591 n
= isl_set_dim(set
, isl_dim_set
);
1592 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
1593 for (i
= 0; i
< n
; ++i
) {
1598 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
1599 bound
= isl_pw_aff_coalesce(bound
);
1600 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
1602 space
= isl_pw_aff_get_domain_space(bound
);
1603 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1604 one
= isl_aff_add_constant_si(one
, 1);
1605 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
1606 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
1609 isl_set_free(context
);
1614 /* Compute the effective grid size as a list of the sizes in each dimension.
1616 * The grid size specified by the user or set by default
1617 * in read_grid_sizes() and applied by the block filter,
1618 * may be too large for the given code in the sense that
1619 * it may contain blocks that don't need to execute anything.
1620 * We therefore don't return this grid size, but instead the
1621 * smallest grid size that ensures that all blocks that actually
1622 * execute code are included in the grid.
1624 * We first extract a description of the grid, i.e., the possible values
1625 * of the block ids, from the domain elements in "domain" and
1626 * kernel->block_filter.
1627 * The block ids are parameters in kernel->block_filter.
1628 * We simply need to change them into set dimensions.
1630 * Then, for each block dimension, we compute the maximal value of the block id
1633 static __isl_give isl_multi_pw_aff
*extract_grid_size(
1634 struct ppcg_kernel
*kernel
, __isl_take isl_union_set
*domain
)
1639 domain
= isl_union_set_intersect(domain
,
1640 isl_union_set_copy(kernel
->block_filter
));
1641 grid
= isl_union_set_params(domain
);
1642 grid
= isl_set_from_params(grid
);
1643 grid
= isl_set_add_dims(grid
, isl_dim_set
, kernel
->n_grid
);
1644 for (i
= 0; i
< kernel
->n_grid
; ++i
) {
1648 id
= isl_id_list_get_id(kernel
->block_ids
, i
);
1649 pos
= isl_set_find_dim_by_id(grid
, isl_dim_param
, id
);
1652 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
1653 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
1656 return extract_size(grid
, isl_set_copy(kernel
->context
));
1659 /* Compute the size of a fixed bounding box around the origin and "set",
1660 * where "set" is assumed to contain only non-negative elements,
1661 * and store the results in "size".
1662 * In particular, compute the maximal value of "set" in each direction
1665 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
1668 isl_local_space
*ls
;
1671 n
= isl_set_dim(set
, isl_dim_set
);
1672 ls
= isl_local_space_from_space(isl_set_get_space(set
));
1673 obj
= isl_aff_zero_on_domain(ls
);
1674 for (i
= 0; i
< n
; ++i
) {
1677 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
1678 max
= isl_set_max_val(set
, obj
);
1679 size
[i
] = isl_val_get_num_si(max
) + 1;
1681 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
1687 /* Compute the effective block size as a list of the sizes in each dimension
1688 * and store the sizes in kernel->block_dim.
1690 * The block size specified by the user or set by default
1691 * in read_block_sizes() and applied by the thread filter,
1692 * may be too large for the given code in the sense that
1693 * it may contain threads that don't need to execute anything.
1694 * We therefore update this block size in kernel->block_dim
1695 * to the smallest block size that ensures that all threads
1696 * that actually execute code are included in the block.
1698 * The possible values of the thread ids is obtained from
1699 * the domain elements "domain" and kernel->thread_filter.
1700 * The current implementation eliminates all parameters, ensuring
1701 * that the size is a fixed constant in each dimension.
1702 * In principle we could also compute parametric sizes.
1703 * We would have to make sure to project out all b%d and t%d parameters,
1706 static void extract_block_size(struct ppcg_kernel
*kernel
,
1707 __isl_take isl_union_set
*domain
)
1713 domain
= isl_union_set_intersect(domain
,
1714 isl_union_set_copy(kernel
->thread_filter
));
1715 block
= isl_union_set_params(domain
);
1716 block
= isl_set_from_params(block
);
1717 block
= isl_set_add_dims(block
, isl_dim_set
, kernel
->n_block
);
1718 for (i
= 0; i
< kernel
->n_block
; ++i
) {
1722 id
= isl_id_list_get_id(kernel
->thread_ids
, i
);
1723 pos
= isl_set_find_dim_by_id(block
, isl_dim_param
, id
);
1726 block
= isl_set_equate(block
, isl_dim_param
, pos
,
1729 nparam
= isl_set_dim(block
, isl_dim_param
);
1730 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
1732 extract_fixed_size(block
, kernel
->block_dim
);
1735 struct ppcg_kernel
*ppcg_kernel_free(struct ppcg_kernel
*kernel
)
1742 isl_id_list_free(kernel
->block_ids
);
1743 isl_id_list_free(kernel
->thread_ids
);
1744 isl_multi_pw_aff_free(kernel
->grid_size
);
1745 isl_set_free(kernel
->context
);
1746 isl_union_set_free(kernel
->core
);
1747 isl_union_set_free(kernel
->arrays
);
1748 isl_space_free(kernel
->space
);
1749 isl_ast_node_free(kernel
->tree
);
1750 isl_union_set_free(kernel
->block_filter
);
1751 isl_union_set_free(kernel
->thread_filter
);
1753 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1754 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1756 for (j
= 0; j
< array
->n_group
; ++j
)
1757 gpu_array_ref_group_free(array
->groups
[j
]);
1758 free(array
->groups
);
1760 isl_pw_aff_list_free(array
->bound
);
1762 free(kernel
->array
);
1764 for (i
= 0; i
< kernel
->n_var
; ++i
) {
1765 free(kernel
->var
[i
].name
);
1766 isl_vec_free(kernel
->var
[i
].size
);
1769 free(kernel
->tile_size
);
1776 /* Wrapper around ppcg_kernel_free for use as a isl_id_set_free_user callback.
1778 static void ppcg_kernel_free_wrap(void *user
)
1780 struct ppcg_kernel
*kernel
= user
;
1782 ppcg_kernel_free(kernel
);
1785 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
1786 struct ppcg_kernel_var
*var
)
1789 struct gpu_array_tile
*tile
;
1793 var
->array
= group
->array
;
1795 tile
= group
->private_tile
;
1796 var
->type
= ppcg_access_private
;
1798 tile
= group
->shared_tile
;
1799 var
->type
= ppcg_access_shared
;
1802 p
= isl_printer_to_str(ctx
);
1803 p
= gpu_array_ref_group_print_name(group
, p
);
1804 var
->name
= isl_printer_get_str(p
);
1805 isl_printer_free(p
);
1807 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
1809 for (j
= 0; j
< group
->array
->n_index
; ++j
)
1810 var
->size
= isl_vec_set_element_val(var
->size
, j
,
1811 isl_val_copy(tile
->bound
[j
].size
));
1814 static void create_kernel_vars(struct ppcg_kernel
*kernel
)
1819 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1820 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1822 for (j
= 0; j
< array
->n_group
; ++j
) {
1823 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1824 if (group
->private_tile
|| group
->shared_tile
)
1830 kernel
->var
= isl_calloc_array(kernel
->ctx
, struct ppcg_kernel_var
, n
);
1831 assert(kernel
->var
);
1834 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1835 struct gpu_local_array_info
*array
= &kernel
->array
[i
];
1837 for (j
= 0; j
< array
->n_group
; ++j
) {
1838 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1839 if (!group
->private_tile
&& !group
->shared_tile
)
1841 create_kernel_var(kernel
->ctx
, group
, &kernel
->var
[n
]);
1847 /* Replace "pa" by the zero function defined over the universe domain
1848 * in the space of "pa".
1850 static __isl_give isl_pw_aff
*set_universally_zero(__isl_take isl_pw_aff
*pa
)
1855 space
= isl_space_domain(isl_pw_aff_get_space(pa
));
1856 isl_pw_aff_free(pa
);
1857 zero
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1859 return isl_pw_aff_from_aff(zero
);
1862 /* The sizes of the arrays on the host that have been computed by
1863 * extract_array_info may depend on the parameters. Use the extra
1864 * constraints on the parameters that are valid at "host_domain"
1865 * to simplify these expressions and store the results in kernel->array.
1867 * We only need these localized bounds for arrays that are accessed
1868 * by the current kernel. If we have found at least one reference group
1869 * then the array is accessed by the kernel. If the array has compound
1870 * elements then we skipped the construction of array reference groups.
1872 * The resulting sizes may be functions that are nowhere defined
1873 * in case the access function cannot possibly access anything inside
1874 * the kernel for some reason. If so, they are replaced by the zero
1875 * function. Since the access function cannot actually access anything,
1876 * there is no harm in printing the array sizes as zero.
1878 static void localize_bounds(struct ppcg_kernel
*kernel
,
1879 __isl_keep isl_set
*host_domain
)
1884 context
= isl_set_copy(host_domain
);
1885 context
= isl_set_params(context
);
1887 for (i
= 0; i
< kernel
->n_array
; ++i
) {
1888 struct gpu_local_array_info
*local
= &kernel
->array
[i
];
1889 isl_pw_aff_list
*bound
;
1892 if (local
->n_group
== 0 && !local
->array
->has_compound_element
)
1895 n_index
= local
->array
->n_index
;
1896 bound
= isl_pw_aff_list_alloc(kernel
->ctx
, n_index
);
1898 for (j
= 0; j
< n_index
; ++j
) {
1902 pwaff
= isl_pw_aff_copy(local
->array
->bound
[j
]);
1903 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
1904 empty
= isl_pw_aff_is_empty(pwaff
);
1906 pwaff
= isl_pw_aff_free(pwaff
);
1908 pwaff
= set_universally_zero(pwaff
);
1909 bound
= isl_pw_aff_list_add(bound
, pwaff
);
1912 local
->n_index
= n_index
;
1913 local
->bound
= bound
;
1915 isl_set_free(context
);
1918 /* Create the array of gpu_local_array_info structures "array"
1919 * inside "kernel". The number of elements in this array is
1920 * the same as the number of arrays in "prog".
1921 * Initialize the "array" field of each local array to point
1922 * to the corresponding array in "prog".
1924 static struct ppcg_kernel
*ppcg_kernel_create_local_arrays(
1925 struct ppcg_kernel
*kernel
, struct gpu_prog
*prog
)
1930 ctx
= isl_set_get_ctx(prog
->context
);
1931 kernel
->array
= isl_calloc_array(ctx
,
1932 struct gpu_local_array_info
, prog
->n_array
);
1934 return ppcg_kernel_free(kernel
);
1935 kernel
->n_array
= prog
->n_array
;
1937 for (i
= 0; i
< prog
->n_array
; ++i
)
1938 kernel
->array
[i
].array
= &prog
->array
[i
];
1943 /* Find the element in gen->stmt that has the given "id".
1944 * Return NULL if no such gpu_stmt can be found.
1946 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
1950 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
1951 if (id
== prog
->stmts
[i
].id
)
1955 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
1958 void ppcg_kernel_stmt_free(void *user
)
1961 struct ppcg_kernel_stmt
*stmt
= user
;
1966 switch (stmt
->type
) {
1967 case ppcg_kernel_copy
:
1968 isl_ast_expr_free(stmt
->u
.c
.index
);
1969 isl_ast_expr_free(stmt
->u
.c
.local_index
);
1971 case ppcg_kernel_domain
:
1972 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
1974 case ppcg_kernel_sync
:
1981 /* Set the options of "context" to
1983 * { space -> [x] : x >= first }
1985 static __isl_give isl_ast_build
*set_unroll(
1986 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
1993 ctx
= isl_ast_build_get_ctx(build
);
1995 space
= isl_space_from_domain(space
);
1996 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
1997 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
1998 unroll
= isl_map_universe(space
);
1999 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
2000 opt
= isl_union_map_from_map(unroll
);
2002 build
= isl_ast_build_set_options(build
, opt
);
2007 /* Extend the schedule "schedule" with the part of "extension"
2008 * starting at "first" up to "len".
2010 static __isl_give isl_union_map
*extend_schedule(
2011 __isl_take isl_union_map
*schedule
,
2012 __isl_take isl_union_map
*extension
, int first
, int len
)
2016 isl_union_map
*umap
;
2019 space
= isl_union_map_get_space(schedule
);
2020 space
= isl_space_set_from_params(space
);
2021 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
2022 proj
= isl_set_identity(isl_set_universe(space
));
2023 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
2024 extension
= isl_union_map_apply_range(extension
,
2025 isl_union_map_from_map(proj
));
2027 schedule
= isl_union_map_range_product(schedule
, extension
);
2032 /* Return the gpu_stmt_access in the list "accesses" that corresponds
2035 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
2036 __isl_keep isl_id
*ref_id
)
2038 struct gpu_stmt_access
*access
;
2040 for (access
= accesses
; access
; access
= access
->next
)
2041 if (access
->ref_id
== ref_id
)
2047 /* Return the index of the array called "name" in the list of arrays.
2049 static int find_array_index(struct ppcg_kernel
*kernel
, const char *name
)
2053 for (i
= 0; i
< kernel
->n_array
; ++i
)
2054 if (!strcmp(name
, kernel
->array
[i
].array
->name
))
2060 /* Internal data structure for the index and AST expression transformation
2061 * callbacks for pet_stmt_build_ast_exprs.
2063 * "accesses" is the list of gpu_stmt_access in the statement.
2064 * "iterator_map" expresses the statement iterators in terms of
2065 * the AST loop iterators.
2066 * "sched2shared" expresses the first shared_len dimensions of
2067 * the computed schedule in terms of the AST loop iterators.
2069 * The following fields are set in transform_index and used in transform_expr.
2070 * "array" is the array that is being accessed.
2071 * "global" is set if the global array is accessed (rather than
2072 * shared/private memory).
2073 * "local_array" refers to information on the array specialized
2074 * to the current kernel.
2076 struct ppcg_transform_data
{
2077 struct gpu_gen
*gen
;
2078 struct gpu_stmt_access
*accesses
;
2079 isl_pw_multi_aff
*iterator_map
;
2080 isl_pw_multi_aff
*sched2shared
;
2082 struct gpu_array_info
*array
;
2084 struct gpu_local_array_info
*local_array
;
2087 /* Return the name of the outer array (of structs) accessed by "access".
2089 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
2094 space
= isl_space_range(isl_map_get_space(access
));
2095 while (space
&& isl_space_is_wrapping(space
))
2096 space
= isl_space_domain(isl_space_unwrap(space
));
2097 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
2098 isl_space_free(space
);
2103 /* Return a pointer to the gpu_array_ref_group in "local"
2104 * that contains the reference "access".
2105 * Return NULL if no such group can be found.
2107 static struct gpu_array_ref_group
*find_ref_group(
2108 struct gpu_local_array_info
*local
, struct gpu_stmt_access
*access
)
2112 for (i
= 0; i
< local
->n_group
; ++i
) {
2113 struct gpu_array_ref_group
*group
= local
->groups
[i
];
2115 for (j
= 0; j
< group
->n_ref
; ++j
)
2116 if (group
->refs
[j
] == access
)
2123 /* Index transformation callback for pet_stmt_build_ast_exprs.
2125 * "index" expresses the array indices in terms of statement iterators
2127 * We first reformulate "index" in terms of the AST loop iterators.
2128 * Then we check if we are accessing the global array or
2129 * a shared/private copy. In the former case, we simply return
2130 * the updated index. If "index" is an affine expression rather
2131 * than an array access, then we also return the updated index here.
2133 * If no reference groups have been computed for the array,
2134 * then we can only be accessing the global array.
2136 * Otherwise, we apply the tiling to the index.
2137 * This tiling is of the form
2141 * The index is of the form
2145 * We update the tiling to refer to the AST loop iterators
2149 * and modify index to keep track of those iterators
2153 * Combining these two yields a tiled index expression in terms
2154 * of the AST loop iterators
2158 static __isl_give isl_multi_pw_aff
*transform_index(
2159 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
2162 struct ppcg_transform_data
*data
= user
;
2163 struct gpu_stmt_access
*access
;
2164 struct gpu_array_ref_group
*group
;
2165 struct gpu_array_tile
*tile
;
2166 isl_pw_multi_aff
*iterator_map
;
2170 isl_multi_pw_aff
*tiling
;
2171 isl_pw_multi_aff
*pma
;
2172 isl_multi_pw_aff
*mpa
;
2176 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
2177 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
2179 access
= find_access(data
->accesses
, ref_id
);
2182 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
2185 name
= get_outer_array_name(access
->access
);
2186 i
= find_array_index(data
->gen
->kernel
, name
);
2188 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
2189 "cannot find array",
2190 return isl_multi_pw_aff_free(index
));
2191 data
->array
= &data
->gen
->prog
->array
[i
];
2192 data
->local_array
= &data
->gen
->kernel
->array
[i
];
2194 group
= find_ref_group(data
->local_array
, access
);
2200 tile
= group
->private_tile
;
2202 tile
= group
->shared_tile
;
2203 data
->global
= !tile
;
2207 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
2208 space
= isl_space_map_from_set(space
);
2209 pma
= isl_pw_multi_aff_identity(space
);
2210 pma
= isl_pw_multi_aff_product(
2211 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
2212 tiling
= isl_multi_pw_aff_from_multi_aff(
2213 isl_multi_aff_copy(tile
->tiling
));
2214 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
2216 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
2217 space
= isl_space_map_from_set(space
);
2218 mpa
= isl_multi_pw_aff_identity(space
);
2219 index
= isl_multi_pw_aff_range_product(mpa
, index
);
2220 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
2225 /* Dereference "expr" by adding an index [0].
2226 * The original "expr" is assumed not to have any indices.
2228 * If "expr" is a member access, then the dereferencing needs
2229 * to be applied to the structure argument of this member access.
2231 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
2234 isl_ast_expr
*arg0
, *res
;
2235 isl_ast_expr_list
*list
;
2237 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2239 return isl_ast_expr_free(expr
);
2240 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2241 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2244 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2245 arg
= dereference(arg
);
2246 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2247 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2251 isl_ast_expr_free(arg0
);
2253 ctx
= isl_ast_expr_get_ctx(expr
);
2254 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
2255 list
= isl_ast_expr_list_from_ast_expr(res
);
2256 res
= isl_ast_expr_get_op_arg(expr
, 0);
2257 res
= isl_ast_expr_access(res
, list
);
2258 isl_ast_expr_free(expr
);
2263 /* Linearize the index expression "expr" based on the array bounds
2266 * That is, transform expression
2268 * A[i_0][i_1]...[i_n]
2272 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
2274 * where b_0, b_1, ..., b_n are the bounds on the array.
2276 * If the base of "expr" is a member access, then the linearization needs
2277 * to be applied to the structure argument of this member access.
2279 * In the base case, if "expr" has no arguments (other than the name of
2280 * the array), then we are passing an entire array to a function.
2281 * In this case, there is nothing to linearize.
2282 * Note that at this point an expression with no arguments can
2283 * only be an entire array because the scalar case and
2284 * the case of single struct are handled by the caller.
2286 * If the number of specified index expressions in "expr"
2287 * is smaller than the dimension of the accessed array,
2288 * then the missing i_j also do not appear in the linearized expression.
2289 * Furthermore, since such an expression does not refer to a single
2290 * element while the default linearized expression would refer to
2291 * a single element, we return the expression
2293 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
2295 * instead. Note that because of the special case handling above,
2296 * we can assume here that here that there is at least one index expression.
2298 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
2299 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
2306 isl_ast_expr_list
*list
;
2307 isl_ast_build
*build
;
2309 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
2310 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
2311 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
2314 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
2315 arg
= gpu_local_array_info_linearize_index(array
, arg
);
2316 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
2317 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
2321 isl_ast_expr_free(arg0
);
2323 if (isl_ast_expr_get_op_n_arg(expr
) == 1)
2326 ctx
= isl_ast_expr_get_ctx(expr
);
2327 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
2328 build
= isl_ast_build_from_context(context
);
2330 n
= isl_ast_expr_get_op_n_arg(expr
);
2331 res
= isl_ast_expr_get_op_arg(expr
, 1);
2332 for (i
= 1; i
< array
->n_index
; ++i
) {
2333 isl_pw_aff
*bound_i
;
2334 isl_ast_expr
*expr_i
;
2336 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
);
2337 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
2338 res
= isl_ast_expr_mul(res
, expr_i
);
2342 expr_i
= isl_ast_expr_get_op_arg(expr
, i
+ 1);
2343 res
= isl_ast_expr_add(res
, expr_i
);
2346 isl_ast_build_free(build
);
2348 if (1 + array
->n_index
> n
) {
2349 res
= isl_ast_expr_add(isl_ast_expr_get_op_arg(expr
, 0), res
);
2351 list
= isl_ast_expr_list_from_ast_expr(res
);
2352 res
= isl_ast_expr_get_op_arg(expr
, 0);
2353 res
= isl_ast_expr_access(res
, list
);
2356 isl_ast_expr_free(expr
);
2361 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
2363 * If the AST expression refers to an array that is not accessed
2364 * at all, then this means the value of the expression is not used,
2365 * so we might as well print zero (NULL pointer) instead.
2367 * If the AST expression refers to a global scalar that is not
2368 * a read-only scalar, then its address was passed to the kernel and
2369 * we need to dereference it.
2371 * If the AST expression refers to an access to a global array,
2372 * then we linearize the access exploiting the bounds in data->local_array.
2374 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
2375 __isl_keep isl_id
*id
, void *user
)
2377 struct ppcg_transform_data
*data
= user
;
2381 if (!data
->array
->accessed
) {
2384 ctx
= isl_ast_expr_get_ctx(expr
);
2385 isl_ast_expr_free(expr
);
2386 return isl_ast_expr_from_val(isl_val_zero(ctx
));
2388 if (gpu_array_is_read_only_scalar(data
->array
))
2392 if (data
->array
->n_index
== 0)
2393 return dereference(expr
);
2394 if (!data
->array
->linearize
)
2397 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
2400 /* This function is called for each instance of a user statement
2403 * We attach a struct ppcg_kernel_stmt to the "node", containing
2404 * a computed AST expression for each access.
2405 * These AST expressions are computed from iterator_map,
2406 * which expresses the domain
2407 * elements in terms of the generated loops, and sched2shared,
2408 * which expresses the first shared_len dimensions of the schedule
2409 * computed by PPCG in terms of the generated loops.
2411 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
2412 __isl_keep isl_ast_build
*build
, void *user
)
2414 struct ppcg_transform_data data
;
2415 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2416 struct gpu_stmt
*gpu_stmt
;
2417 struct ppcg_kernel_stmt
*stmt
;
2419 isl_pw_multi_aff
*sched2shared
;
2421 isl_pw_multi_aff
*iterator_map
;
2422 isl_ast_expr
*expr
, *arg
;
2423 isl_union_map
*schedule
;
2425 expr
= isl_ast_node_user_get_expr(node
);
2426 arg
= isl_ast_expr_get_op_arg(expr
, 0);
2427 id
= isl_ast_expr_get_id(arg
);
2428 gpu_stmt
= find_stmt(gen
->prog
, id
);
2430 isl_ast_expr_free(arg
);
2431 isl_ast_expr_free(expr
);
2433 isl_die(gen
->ctx
, isl_error_internal
,
2434 "statement not found", return isl_ast_node_free(node
));
2436 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2438 return isl_ast_node_free(node
);
2440 schedule
= isl_ast_build_get_schedule(build
);
2441 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
2442 iterator_map
= isl_pw_multi_aff_from_map(map
);
2443 sched2shared
= compute_sched_to_shared(gen
,
2444 isl_pw_multi_aff_copy(iterator_map
));
2446 stmt
->type
= ppcg_kernel_domain
;
2447 stmt
->u
.d
.stmt
= gpu_stmt
;
2450 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
2451 data
.iterator_map
= iterator_map
;
2452 data
.sched2shared
= sched2shared
;
2453 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
2454 build
, &transform_index
, &data
,
2455 &transform_expr
, &data
);
2457 isl_pw_multi_aff_free(iterator_map
);
2458 isl_pw_multi_aff_free(sched2shared
);
2460 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2461 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2462 return isl_ast_node_set_annotation(node
, id
);
2465 /* This function is called when code has been generated for the shared
2466 * tile loops. The "schedule" refers only to the original statements.
2468 * We extend the schedule with that part of gen->local_sched that hasn't
2469 * been taken into account yet. This introduces parameters referring
2470 * to thread ids in the schedule, so we add them (with the appropriate
2471 * bounds to the context as well).
2472 * Finally, we set the appropriate unrolling options
2473 * if gen->first_unroll is set.
2475 static __isl_give isl_ast_node
*create_domain_leaf(
2476 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
2479 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2481 isl_union_map
*sched
;
2484 isl_id_list
*iterators
;
2487 schedule
= extend_schedule(schedule
,
2488 isl_union_map_copy(gen
->local_sched
),
2489 gen
->shared_len
, gen
->thread_tiled_len
);
2491 space
= isl_ast_build_get_schedule_space(build
);
2492 set
= isl_set_universe(space
);
2493 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2494 gen
->kernel
->thread_ids
);
2495 build
= isl_ast_build_restrict(build
, set
);
2497 n
= gen
->thread_tiled_len
- gen
->shared_len
;
2499 if (gen
->first_unroll
>= 0) {
2500 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
2501 build
= set_unroll(build
, space
, gen
->first_unroll
);
2503 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2504 build
= isl_ast_build_set_iterators(build
, iterators
);
2505 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
2506 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
2507 isl_ast_build_free(build
);
2512 /* This function is called for each statement node in the AST of the code
2513 * for copying to or from shared/private memory.
2514 * Attach a pointer to a ppcg_kernel_stmt representing the copy
2515 * statement to the node.
2516 * The statement name is "read" or "write", depending on whether we are
2517 * reading from global memory or writing to global memory.
2518 * The name of the T space is {shared,private}_<array>.
2520 * The schedule is of the form
2524 * where A refers to a piece of an array and T to the corresponding
2525 * shifted tile. We split this schedule into mappings L -> A and L -> T
2526 * and store the corresponding expressions in stmt->index and stmt->local_index,
2527 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
2529 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
2530 __isl_keep isl_ast_build
*build
, void *user
)
2532 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2533 struct ppcg_kernel_stmt
*stmt
;
2537 isl_map
*access
, *local_access
, *map
;
2538 isl_pw_multi_aff
*pma
;
2541 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2543 return isl_ast_node_free(node
);
2545 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
2546 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
2547 stmt
->u
.c
.read
= !strcmp(type
, "read");
2548 access
= isl_map_reverse(access
);
2549 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
2550 local_access
= isl_map_copy(access
);
2552 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
2553 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
2554 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2555 access
= isl_map_apply_range(access
, map
);
2556 pma
= isl_pw_multi_aff_from_map(access
);
2557 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2558 stmt
->u
.c
.index
= expr
;
2560 map
= isl_map_range_map(isl_map_universe(space
));
2561 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
2562 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
2563 local_access
= isl_map_apply_range(local_access
, map
);
2564 pma
= isl_pw_multi_aff_from_map(local_access
);
2565 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
2566 stmt
->u
.c
.local_index
= expr
;
2568 stmt
->u
.c
.array
= gen
->copy_group
->array
;
2569 stmt
->u
.c
.local_array
= gen
->copy_group
->local_array
;
2570 stmt
->type
= ppcg_kernel_copy
;
2572 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2573 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2574 return isl_ast_node_set_annotation(node
, id
);
2577 /* Given a schedule of the form
2581 * (with S the first shared_len dimensions of the computed schedule,
2582 * A the array and L the schedule correponding to the generated loops),
2583 * indicating where to copy the array elements that need to be copied,
2584 * construct code for performing the copying.
2586 * "group" is the array reference group that is being copied
2587 * "type" is either "read" or "write"
2588 * private is set if copying needs to be performed to/from registers
2590 * We first construct a mapping to a shifted tile of the array,
2592 * [S -> A] -> T(S,A) (1)
2594 * If private is set, then we also use this mapping as a schedule
2595 * (which is already thread-specific and will be completely unrolled).
2596 * Otherwise, we wrap/tile the range over the threads.
2599 * [S -> A] -> T'(S,A)
2601 * Combined with the given schedule, we have
2603 * [S -> A] -> [L -> T'(S,A)] (2)
2605 * From the shifted tile mapping, we construct a mapping
2607 * [S -> A] -> [A -> T(S,A)]
2609 * and apply it to the schedule (2), obtaining
2611 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
2613 * Note that we can project out S because it is uniquely defined by L.
2615 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
2616 __isl_take isl_map
*sched
,
2617 const char *type
, struct gpu_array_ref_group
*group
,
2618 __isl_take isl_ast_build
*build
, int private)
2622 isl_map
*schedule
, *shift
, *map
;
2624 isl_id_list
*iterators
;
2627 shift
= shift_access(group
);
2629 schedule
= isl_map_copy(shift
);
2630 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
2632 schedule
= tile_access_schedule(gen
, schedule
);
2634 n
= isl_map_dim(schedule
, isl_dim_out
);
2635 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
2636 set
= add_bounded_parameters(set
, gen
->kernel
->block_dim
,
2637 gen
->kernel
->thread_ids
);
2639 schedule
= isl_map_range_product(sched
, schedule
);
2641 space
= isl_space_domain(isl_map_get_space(shift
));
2642 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
2643 map
= isl_map_range_product(map
, shift
);
2645 schedule
= isl_map_apply_domain(schedule
, map
);
2647 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
2649 build
= isl_ast_build_restrict(build
, set
);
2651 gen
->copy_group
= group
;
2654 space
= isl_space_range(isl_map_get_space(schedule
));
2655 space
= isl_space_range(isl_space_unwrap(space
));
2656 build
= set_unroll(build
, space
, 0);
2658 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, n
, "c");
2659 build
= isl_ast_build_set_iterators(build
, iterators
);
2660 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
2661 tree
= isl_ast_build_node_from_schedule_map(build
,
2662 isl_union_map_from_map(schedule
));
2663 isl_ast_build_free(build
);
2668 /* Return code for reading into or writing from shared memory
2669 * the given array reference group.
2671 * If we are performing a read from global memory to shared memory and
2672 * if the array involved is not a scalar, then we copy
2673 * the entire tile to shared memory. This may result in some extra
2674 * elements getting copied, but it should lead to simpler code
2675 * (which means that fewer registers may be needed) and less divergence.
2677 * Otherwise, we only copy the elements that will be read or have been written
2681 * The input "sched" is of the form.
2685 * with S the first shared_len dimensions of the computed schedule,
2686 * A the array and L the schedule correponding to the generated loops.
2688 * We first drop "type",
2692 * If the above conditions are satisfied, we project out A,
2697 * and then introduce the group tile [S -> T], resulting in
2701 static __isl_give isl_ast_node
*copy_group_shared_accesses(
2702 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2703 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2707 isl_union_map
*access
;
2709 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2710 read
= !strcmp(type
, "read");
2712 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2714 if (read
&& !gpu_array_is_scalar(group
->array
)) {
2718 space
= isl_space_domain(isl_map_get_space(sched
));
2719 space
= isl_space_unwrap(space
);
2720 map
= isl_map_domain_map(isl_map_universe(space
));
2721 sched
= isl_map_apply_domain(sched
, map
);
2723 map
= group_tile(group
);
2724 map
= isl_map_reverse(isl_map_domain_map(map
));
2725 sched
= isl_map_apply_domain(sched
, map
);
2728 return copy_access(gen
, sched
, type
, group
, build
, 0);
2731 /* Return code for reading into or writing from private memory
2732 * the given array reference group.
2734 * Let S be the first shared_len dimensions of the computed schedule,
2735 * D the iteration domains, A the array and L the schedule correponding
2736 * to the generated loops.
2737 * "sched" is of the form
2741 * where type is either "read" or "write".
2742 * We apply the privatization D -> S(t), with t the thread ids,
2743 * to the access relation D -> A to obtain the privatized access relation
2747 * We drop the type from "sched" and intersect with the privatized access
2748 * relation to obtain
2752 static __isl_give isl_ast_node
*copy_group_private_accesses(
2753 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
2754 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
2758 isl_union_map
*priv
;
2759 isl_union_map
*access
;
2760 isl_map
*access_map
;
2762 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
2763 read
= !strcmp(type
, "read");
2765 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
2766 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
2769 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
2770 access
= isl_union_map_apply_domain(access
, priv
);
2771 access_map
= isl_map_from_union_map(access
);
2773 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
2774 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
2776 return copy_access(gen
, sched
, type
, group
, build
, 1);
2779 /* Return code for reading into or writing from shared or private memory.
2781 * "schedule" is of the form
2785 * with S be the first shared_len dimensions of the computed schedule,
2786 * A the array and L the schedule correponding to the generated loops.
2787 * The array reference group is attached to "type".
2789 static __isl_give isl_ast_node
*create_access_leaf(
2790 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2791 __isl_take isl_ast_build
*build
)
2793 struct gpu_array_ref_group
*group
;
2796 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
2797 group
= isl_id_get_user(id
);
2800 if (group
->private_tile
)
2801 return copy_group_private_accesses(gen
, group
, schedule
,
2804 return copy_group_shared_accesses(gen
, group
, schedule
,
2808 /* Create a domain node representing a synchronization.
2810 static __isl_give isl_ast_node
*create_sync_leaf(
2811 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
2812 __isl_take isl_ast_build
*build
)
2814 struct ppcg_kernel_stmt
*stmt
;
2820 isl_map_free(schedule
);
2822 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
2826 stmt
->type
= ppcg_kernel_sync
;
2828 space
= isl_ast_build_get_schedule_space(build
);
2829 space
= isl_space_from_domain(space
);
2830 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
2831 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
2832 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
2833 node
= isl_ast_node_alloc_user(expr
);
2834 isl_ast_build_free(build
);
2836 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
2837 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
2838 return isl_ast_node_set_annotation(node
, id
);
2841 /* This function is called during the code generation at the point
2842 * where the schedule domain element is completely determined by
2843 * the generated code. The input schedule contains the original
2844 * statements as well as synchronization and copy "statements".
2845 * The latter are scheduled at different points than any of the original
2846 * statements, so they will only arrive here in isolation.
2848 * If the current schedule only refers to a single statement,
2849 * we check if it is a copy or synchronization statement and
2850 * call the appropriate functions.
2851 * Otherwise, we assume we are dealing with the original statements
2852 * and we call create_domain_leaf.
2854 static __isl_give isl_ast_node
*create_kernel_leaf(
2855 __isl_take isl_ast_build
*build
, void *user
)
2857 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
2859 isl_union_map
*schedule
;
2862 schedule
= isl_ast_build_get_schedule(build
);
2864 if (isl_union_map_n_map(schedule
) != 1)
2865 return create_domain_leaf(schedule
, build
, user
);
2867 map
= isl_map_from_union_map(schedule
);
2868 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
2869 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
2870 return create_access_leaf(gen
, map
, build
);
2871 if (!strcmp(name
, "sync"))
2872 return create_sync_leaf(gen
, map
, build
);
2874 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
2877 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
2878 * have value 0) and all even schedule dimensions as "unroll".
2880 * That is, the options look as follows
2882 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
2883 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
2885 * The even positions are used to be able to schedule copying blocks
2886 * and synchronization before or after each level of the shared memory
2887 * tile loops and we want to make sure that code for these is generated
2888 * separately (within each level).
2890 static __isl_give isl_ast_build
*set_atomic_and_unroll(
2891 __isl_take isl_ast_build
*build
,
2892 __isl_take isl_space
*space
, int sched_len
)
2898 isl_local_space
*ls
;
2901 ctx
= isl_ast_build_get_ctx(build
);
2903 space
= isl_space_params(space
);
2904 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
2905 space
= isl_space_from_domain(space
);
2906 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
2907 map
= isl_map_universe(isl_space_copy(space
));
2908 for (i
= 0; i
< sched_len
; i
+= 2)
2909 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
2910 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2911 c
= isl_equality_alloc(ls
);
2912 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2913 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2914 c
= isl_constraint_set_constant_si(c
, 1);
2915 map
= isl_map_add_constraint(map
, c
);
2916 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2917 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
2918 opt
= isl_union_map_from_map(map
);
2920 map
= isl_map_universe(space
);
2921 ls
= isl_local_space_from_space(isl_map_get_space(map
));
2922 c
= isl_equality_alloc(ls
);
2923 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
2924 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
2925 map
= isl_map_add_constraint(map
, c
);
2926 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
2927 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
2928 opt
= isl_union_map_add_map(opt
, map
);
2930 build
= isl_ast_build_set_options(build
, opt
);
2935 /* Return a map that maps a space of dimension gen->shared_len
2936 * to its last dimensions starting at gen->tile_first.
2937 * The range is of dimension
2939 * 2 * (gen->shared_len - gen->tile_first) + 1
2941 * The input dimensions are mapped to the odd dimensions in the output,
2942 * while the even dimensions (except 2*pos) are fixed to 0.
2943 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
2944 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
2945 * are mapped to the output. The remaining input dimensions are projected
2946 * out and the corresponding output dimensions are fixed to 0.
2948 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
2949 __isl_take isl_space
*space
, int pos
, int val
)
2954 space
= isl_space_set_from_params(space
);
2955 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
2956 space
= isl_space_map_from_set(space
);
2957 proj
= isl_map_identity(space
);
2958 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
2959 n
= gen
->shared_len
- gen
->tile_first
;
2960 for (i
= 0; i
<= n
; ++i
) {
2961 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
2963 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
2965 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
2971 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
2972 gen
->shared_len
- (gen
->tile_first
+ pos
));
2973 for (i
= pos
; i
< n
; ++i
)
2974 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
2979 /* Given the AST context schedule "schedule" and the mapping from
2980 * domains to the shared tile loops "shared_sched", add a schedule
2981 * for a synchronization operation at position "val" of loop level "pos".
2983 * schedule is of the form
2987 * (with D the iteration domains and L the already generated loops),
2988 * while shared_sched is of the form
2992 * We combine them into
2998 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3000 * and use the result as a schedule for "sync".
3002 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
3003 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3004 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
3007 isl_map
*proj
, *map
;
3009 shared_sched
= isl_union_map_copy(shared_sched
);
3010 schedule
= isl_union_map_copy(schedule
);
3012 space
= isl_union_map_get_space(shared_sched
);
3013 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
3014 map
= isl_map_from_union_map(schedule
);
3016 proj
= insert_even(gen
, space
, pos
, val
);
3017 map
= isl_map_apply_range(map
, proj
);
3018 map
= isl_map_from_range(isl_map_wrap(map
));
3019 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
3021 res
= isl_union_map_add_map(res
, map
);
3026 /* Given a set of wrapped references "ref", return the corresponding
3027 * access relations based on the tagged access relations "tagged".
3029 * The elements of "ref" are of the form
3033 * with D an iteration domains and R a reference.
3034 * The elements of "tagged" are of the form
3040 * Extend "tagged" to include the iteration domain in the range, i.e.,
3042 * [D -> R] -> [D -> A]
3044 * apply the result to "ref" and then unwrap the resulting set
3045 * to obtain relations of the form
3049 static __isl_give isl_union_map
*wrapped_reference_to_access(
3050 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
3052 isl_union_map
*tag2access
;
3054 tag2access
= isl_union_map_copy(tagged
);
3055 tag2access
= isl_union_map_universe(tag2access
);
3056 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
3057 tag2access
= isl_union_map_domain_map(tag2access
);
3058 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
3060 ref
= isl_union_set_coalesce(ref
);
3061 ref
= isl_union_set_apply(ref
, tag2access
);
3063 return isl_union_set_unwrap(ref
);
3066 /* Given an access relation "access" from "group", remove those reads
3067 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
3068 * communicate data within the same iteration of "sched".
3070 * If the access is a read then it is either an element of
3072 * live_in union (range flow)
3074 * where live_in and flow may be overapproximations, or
3075 * it reads an uninitialized value (that is not live-in because
3076 * there is an intermediate kill) or it reads a value that was
3077 * written within the same (compound) statement instance.
3078 * If the access is a write then it is either an element of
3080 * live_out union (domain flow)
3082 * or it writes a value that is never read (and is not live-out
3083 * because of an intermediate kill) or only
3084 * within the same (compound) statement instance.
3085 * In both cases, the access relation is also a subset of
3086 * the group access relation.
3088 * The cases where an uninitialized value is read or a value is written
3089 * that is never read or where the dataflow occurs within a statement
3090 * instance are also considered local and may also be removed.
3092 * Essentially, we compute the intersection of "access" with either
3094 * live_in union (range non-local-flow)
3098 * live_out union (domain non-local-flow)
3100 * We first construct a relation "local"
3102 * [[D -> R] -> [D' -> R']]
3104 * of pairs of domain iterations accessing the reference group
3105 * and references in the group that are coscheduled by "sched".
3107 * If this relation does not intersect the dataflow dependences,
3108 * then there is nothing we can possibly remove, unless the dataflow
3109 * dependences themselves only relate a subset of the accesses.
3110 * In particular, the accesses may not be involved in any dataflow
3111 * dependences, either because they are uninitialized reads/dead writes
3112 * or because the dataflow occurs inside a statement instance.
3114 * Since the computation below may break up the access relation
3115 * into smaller pieces, we only perform the intersection with
3116 * the non-local dependent accesses if the local pairs
3117 * intersect the dataflow dependences. Otherwise, we intersect
3118 * with the universe of the non-local dependent accesses.
3119 * This should at least remove accesses from statements that
3120 * do not participate in any dependences.
3122 * In particular, we remove the "local" dataflow dependences from
3123 * the set of all dataflow dependences.
3124 * Note that if the potential dataflow dependences are an overapproximation
3125 * of the actual dataflow dependences, then the result remains an
3126 * overapproximation of the non-local dataflow dependences.
3127 * Copying to/from global memory is only needed for the references
3128 * in the domain/range of the result or for accesses that are live out/in
3129 * for the entire scop.
3131 * We therefore map the domain/range of the "external" relation
3132 * to the corresponding access relation and take the union with
3133 * the live out/in relation.
3135 static __isl_give isl_union_map
*remove_local_accesses(
3136 struct gpu_prog
*prog
, struct gpu_array_ref_group
*group
,
3137 __isl_take isl_union_map
*access
, __isl_take isl_union_map
*sched
,
3141 isl_union_pw_multi_aff
*tagger
;
3142 isl_union_set
*domain
;
3143 isl_union_map
*local
, *tagged
, *external
;
3144 isl_union_set
*tag_set
;
3146 if (isl_union_map_is_empty(access
)) {
3147 isl_union_map_free(sched
);
3151 tagged
= group_tagged_access_relation(group
);
3153 tagger
= isl_union_pw_multi_aff_copy(prog
->scop
->tagger
);
3154 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
3155 tagger
= isl_union_pw_multi_aff_intersect_domain(tagger
, domain
);
3156 sched
= isl_union_map_preimage_domain_union_pw_multi_aff(sched
, tagger
);
3158 local
= isl_union_map_apply_range(sched
,
3159 isl_union_map_reverse(isl_union_map_copy(sched
)));
3160 local
= isl_union_map_intersect(local
,
3161 isl_union_map_copy(prog
->scop
->tagged_dep_flow
));
3163 empty
= isl_union_map_is_empty(local
);
3165 external
= isl_union_map_copy(prog
->scop
->tagged_dep_flow
);
3166 external
= isl_union_map_intersect_params(external
,
3167 isl_set_copy(prog
->scop
->context
));
3168 external
= isl_union_map_subtract(external
, local
);
3171 tag_set
= isl_union_map_range(external
);
3172 external
= wrapped_reference_to_access(tag_set
, tagged
);
3173 external
= isl_union_map_union(external
,
3174 isl_union_map_copy(prog
->scop
->live_in
));
3176 tag_set
= isl_union_map_domain(external
);
3177 external
= wrapped_reference_to_access(tag_set
, tagged
);
3178 external
= isl_union_map_union(external
,
3179 isl_union_map_copy(prog
->scop
->live_out
));
3183 external
= isl_union_map_free(external
);
3185 external
= isl_union_map_universe(external
);
3187 access
= isl_union_map_intersect(access
, external
);
3192 /* Given an access relation "access" from "group", remove those reads
3193 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
3194 * communicate data within the same iteration of the schedule at the
3195 * position where the copying of the group is inserted.
3197 * We extract a schedule that picks out the iterations of the outer
3198 * group->depth dimensions and call remove_local_accesses.
3200 static __isl_give isl_union_map
*remove_local_accesses_group(
3201 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
3202 __isl_take isl_union_map
*access
, int read
)
3204 isl_union_map
*sched
;
3208 if (isl_union_map_is_empty(access
))
3211 sched
= isl_union_map_copy(gen
->sched
);
3213 space
= isl_union_map_get_space(sched
);
3214 proj
= projection(space
, gen
->untiled_len
, group
->depth
);
3215 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3217 return remove_local_accesses(gen
->prog
, group
, access
, sched
, read
);
3220 /* Given the AST context schedule "schedule" and the mapping from
3221 * domains to the shared tile loops "shared_sched", add a schedule
3222 * for copying an array reference group to/from shared/private memory.
3223 * "read" is set if data should be copied from global memory
3224 * to shared/private memory.
3225 * "k" represents the current group
3226 * "s" is the total number of groups
3228 * We schedule an operation before or after the innermost loop
3229 * of "shared_sched" that affects the tile of the array reference group.
3231 * schedule is of the form
3235 * (with D the iteration domains and L the already generated loops),
3236 * while shared_sched is of the form
3240 * We first compute the access relation for the reference group
3244 * and remove from this access relation those reads or writes
3245 * that only needed to communicate data within the same iteration
3246 * of the outer part of the schedule where the copying for the group
3248 * We then combine what is left with shared_sched into
3252 * If this results in an empty relation, no copying needs to be performed
3254 * Otherwise, we invert the relation and combine it with "schedule" into
3258 * The actual additional piece of the schedule is obtained from combining
3264 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
3266 * The position of "val" corresponds to the innermost loop that affects
3267 * the tile and the value indicates where the copying is scheduled
3268 * with respect to the actual kernel code (at value 0).
3269 * Reads are schedule before the code, writes to global memory from
3270 * private memory are scheduled at values 1 to s, writes to global
3271 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
3273 * If we are scheduling a read from global memory to shared memory,
3274 * we insert a synchronization before the kernel code (at the innermost
3276 * If we are scheduling a write to global memory, then we add
3277 * a synchronization after all writes (at value 2 *s + 2).
3278 * However, there is no need for a synchronization after the outermost loop.
3279 * A write to global memory from private memory at the innermost level
3280 * does not require a synchronization, because it is covered by
3281 * the synchronization after the kernel inserted by body_schedule.
3283 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
3284 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
3285 __isl_keep isl_union_map
*shared_sched
,
3286 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
3291 isl_union_map
*access
;
3292 isl_map
*map
, *proj
, *access_map
;
3295 access
= gpu_array_ref_group_access_relation(group
, read
, !read
);
3296 access
= remove_local_accesses_group(gen
, group
, access
, read
);
3297 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
3300 if (isl_union_map_is_empty(access
)) {
3301 isl_union_map_free(access
);
3305 access
= isl_union_map_reverse(access
);
3306 access
= isl_union_map_apply_range(access
,
3307 isl_union_map_copy(schedule
));
3308 access_map
= isl_map_from_union_map(access
);
3310 space
= isl_space_copy(group
->array
->space
);
3311 space
= isl_space_from_range(space
);
3312 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
3313 map
= isl_map_domain_map(isl_map_universe(space
));
3315 space
= isl_union_map_get_space(schedule
);
3316 pos
= group
->depth
- gen
->tile_first
;
3320 else if (group
->private_tile
)
3323 val
= 1 + s
+ 1 + k
;
3324 proj
= insert_even(gen
, space
, pos
, val
);
3325 map
= isl_map_apply_range(map
, proj
);
3327 access_map
= isl_map_range_product(access_map
, map
);
3329 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
3330 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
3332 res
= isl_union_map_add_map(res
, access_map
);
3334 n
= gen
->shared_len
- gen
->tile_first
;
3336 if (!group
->private_tile
)
3337 res
= add_sync_schedule(gen
, res
, schedule
,
3338 shared_sched
, n
, -1);
3342 if (pos
== n
&& group
->private_tile
)
3344 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3351 /* Return a schedule for the shared tile loops based on the current
3352 * AST context schedule.
3354 * We create a "shared_sched" that maps the domains to the first
3355 * shared_len dimensions of the computed schedule, project out the
3356 * first tile_first dimensions (as these are already covered by
3357 * the host code) and insert "statement-level" dimensions at even
3358 * positions so that we can schedule copy blocks and synchronization
3359 * before/after each level.
3361 * In particular, copy blocks are inserted inside the innermost
3362 * level that affect the tile. For the copying to global memory,
3363 * those from private memory are scheduled before those from shared
3364 * memory such that synchronization can be inserted between the two
3365 * at the innermost level.
3366 * Synchronization is inserted at the innermost level before the
3367 * actual kernel code if there is any copying from global memory
3368 * to shared memory. It is inserted unconditionally at the innermost
3369 * level after the actual kernel code and the copying to global memory
3370 * from private memory (if any). Finally, it is inserted after
3371 * any copying to global memory, except at the outermost level
3372 * and at the innermost level if there is no copying from shared
3373 * memory. The copying from private memory is covered by the unconditional
3374 * synchronization at the innermost level.
3376 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
3377 __isl_take isl_union_map
*schedule
)
3381 isl_union_map
*shared_sched
;
3382 isl_union_map
*sched
;
3383 isl_map
*proj
, *map
;
3386 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
3387 proj
= projection(isl_union_map_get_space(shared_sched
),
3388 gen
->tiled_len
, gen
->shared_len
);
3389 shared_sched
= isl_union_map_apply_range(shared_sched
,
3390 isl_union_map_from_map(proj
));
3391 space
= isl_union_map_get_space(shared_sched
);
3392 proj
= insert_even(gen
, space
, -1, 0);
3393 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
3394 isl_union_map_from_map(proj
));
3396 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
3399 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
)
3400 s
+= gen
->kernel
->array
[i
].n_group
;
3403 for (i
= 0; i
< gen
->kernel
->n_array
; ++i
) {
3404 struct gpu_local_array_info
*array
= &gen
->kernel
->array
[i
];
3406 for (j
= 0; j
< array
->n_group
; ++j
) {
3407 struct gpu_array_ref_group
*group
;
3409 group
= array
->groups
[j
];
3410 if (!group
->private_tile
&& !group
->shared_tile
)
3412 res
= add_group_schedule(gen
, res
, schedule
,
3413 shared_sched
, group
, 0, k
, s
);
3414 res
= add_group_schedule(gen
, res
, schedule
,
3415 shared_sched
, group
, 1, k
, s
);
3420 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
3421 gen
->shared_len
- gen
->tile_first
, 1 + s
);
3423 isl_union_map_free(shared_sched
);
3424 isl_union_map_free(schedule
);
3429 /* Generate code for "kernel" in the given "context".
3431 * We first generate code for the shared tile loops (T1T, T1P and T2)
3432 * in a context that includes the block ids.
3433 * Within each iteration of these loops an additional code generation
3434 * is performed (within create_kernel_leaf) for the rest of the schedule
3435 * in a context that includes the thread ids.
3437 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
3438 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
3439 __isl_keep isl_multi_pw_aff
*grid_size
)
3443 isl_id_list
*iterators
;
3444 isl_union_map
*schedule
;
3448 schedule
= isl_ast_build_get_schedule(build
);
3450 build
= isl_ast_build_copy(build
);
3451 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
3452 space
= isl_ast_build_get_schedule_space(build
);
3453 set
= isl_set_universe(isl_space_copy(space
));
3454 set
= add_bounded_parameters_dynamic(set
, grid_size
,
3455 gen
->kernel
->block_ids
);
3456 build
= isl_ast_build_restrict(build
, set
);
3458 schedule
= body_schedule(gen
, schedule
);
3460 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
3462 build
= set_atomic_and_unroll(build
, space
, sched_len
);
3463 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
, sched_len
, "g");
3464 build
= isl_ast_build_set_iterators(build
, iterators
);
3465 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
3466 tree
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3467 isl_ast_build_free(build
);
3472 /* Attach "id" to the given node.
3474 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
3475 __isl_keep isl_ast_build
*build
, void *user
)
3479 node
= isl_ast_node_set_annotation(node
, id
);
3484 /* Construct an AST node for performing a kernel launch and attach
3485 * the information about the kernel to that node.
3486 * "kernel_id" has name "kernel" and contains a pointer
3487 * to the ppcg_kernel structure.
3489 * The kernel AST has been constructed in the context of the range
3490 * of "schedule". In particular, the grid size has been computed
3491 * in the context. We therefore still need to make sure that these
3492 * constraints are expressed in the code. We do this by creating a schedule
3494 * kernel[] -> [S -> []]
3496 * where S is the schedule domain, i.e., the range of "schedule".
3497 * The AST generation will then create a single call surrounded by
3498 * all the condition in "S" that have not been expressed yet.
3500 * The kernel information is attached to this node in attach_id.
3502 static __isl_give isl_ast_node
*construct_launch(
3503 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
3504 __isl_take isl_id
*kernel_id
)
3507 isl_union_set
*domain
;
3512 ctx
= isl_ast_build_get_ctx(build
);
3514 domain
= isl_union_map_range(schedule
);
3515 set
= isl_set_from_union_set(domain
);
3516 map
= isl_map_from_domain(set
);
3517 map
= isl_map_from_range(isl_map_wrap(map
));
3518 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
3519 schedule
= isl_union_map_from_map(map
);
3521 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, kernel_id
);
3522 node
= isl_ast_build_node_from_schedule_map(build
, schedule
);
3523 isl_ast_build_free(build
);
3528 /* This function is called for each leaf in the AST of the host code.
3529 * We first specialize the schedule to the site of the leaf, compute
3530 * the size of shared memory and then construct the body of the host code
3531 * and the associated kernel.
3533 * The necessary information for printing the kernel launch is
3534 * stored in the struct ppcg_kernel that was created in create_kernel and
3535 * attached to an outer mark node in the schedule tree.
3536 * Note that this assumes that a kernel is only launched once.
3537 * The kernel pointer itself is stored in gen->kernel by before_mark,
3538 * while the isl_id containing this pointer is stored in gen->kernel_mark.
3539 * The latter is attached to the leaf AST node created to represent the launch.
3541 static __isl_give isl_ast_node
*create_host_leaf(
3542 __isl_take isl_ast_build
*build
, void *user
)
3544 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3547 struct ppcg_kernel
*kernel
;
3548 isl_set
*host_domain
;
3549 isl_union_map
*schedule
;
3550 isl_union_map
*local_sched
;
3551 isl_union_set
*domain
;
3554 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
3555 schedule
= isl_ast_build_get_schedule(build
);
3557 kernel
= gen
->kernel
;
3561 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
3563 local_sched
= isl_union_map_copy(gen
->sched
);
3564 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
3566 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
3567 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
3568 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
3570 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
3571 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
3572 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
3574 kernel
->space
= isl_ast_build_get_schedule_space(build
);
3576 compute_shared_sched(gen
);
3577 gen
->privatization
= compute_privatization(gen
);
3578 if (gpu_group_references(gen
) < 0)
3579 schedule
= isl_union_map_free(schedule
);
3580 host_domain
= isl_set_from_union_set(isl_union_map_range(
3581 isl_union_map_copy(schedule
)));
3582 localize_bounds(kernel
, host_domain
);
3584 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
3585 check_shared_memory_bound(gen
->kernel
);
3586 compute_group_tilings(gen
->kernel
);
3588 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
3590 create_kernel_vars(kernel
);
3592 isl_map_free(gen
->privatization
);
3593 isl_union_map_free(gen
->local_sched
);
3594 isl_union_map_free(gen
->tiled_sched
);
3595 isl_union_map_free(gen
->shared_sched
);
3596 isl_union_map_free(gen
->shared_proj
);
3597 isl_set_free(host_domain
);
3599 node
= construct_launch(build
, schedule
, isl_id_copy(gen
->kernel_mark
));
3601 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 0);
3605 isl_union_map_free(schedule
);
3609 /* This function is called before the AST generator starts traversing
3610 * the schedule subtree of a node with mark "mark".
3612 * If the mark is called "kernel", store the mark itself in gen->kernel_mark
3613 * and the kernel pointer in gen->kernel for use in create_host_leaf.
3615 static int before_mark(__isl_keep isl_id
*mark
,
3616 __isl_keep isl_ast_build
*build
, void *user
)
3618 struct gpu_gen
*gen
= user
;
3622 if (!strcmp(isl_id_get_name(mark
), "kernel")) {
3623 gen
->kernel_mark
= isl_id_copy(mark
);
3624 gen
->kernel
= isl_id_get_user(mark
);
3629 /* This function is called after the AST generator has finished traversing
3630 * the schedule subtree of a mark node. "node" points to the corresponding
3633 * If the mark is called "kernel", then clear kernel and gen->kernel_mark.
3635 static __isl_give isl_ast_node
*after_mark(__isl_take isl_ast_node
*node
,
3636 __isl_keep isl_ast_build
*build
, void *user
)
3638 struct gpu_gen
*gen
= user
;
3641 id
= isl_ast_node_mark_get_id(node
);
3643 return isl_ast_node_free(node
);
3644 if (!strcmp(isl_id_get_name(id
), "kernel") && gen
->kernel
) {
3645 gen
->kernel_mark
= isl_id_free(gen
->kernel_mark
);
3653 /* Use isl to generate host code from gen->host_schedule, which corresponds to
3654 * the outer gen->tile_first loops of the global schedule in gen->sched.
3655 * Within each iteration of this partial schedule, i.e., for each kernel
3656 * launch, create_host_leaf takes care of generating the kernel code.
3657 * The ppcg_kernel objects are stored in mark nodes in the schedule
3658 * tree and are extracted in before_mark.
3660 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
3662 isl_ast_build
*build
;
3664 isl_schedule
*schedule
;
3665 isl_id_list
*iterators
;
3667 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
3668 iterators
= ppcg_scop_generate_names(gen
->prog
->scop
,
3669 gen
->tile_first
, "h");
3670 build
= isl_ast_build_set_iterators(build
, iterators
);
3671 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
3672 build
= isl_ast_build_set_before_each_mark(build
, &before_mark
, gen
);
3673 build
= isl_ast_build_set_after_each_mark(build
, &after_mark
, gen
);
3674 schedule
= isl_schedule_copy(gen
->host_schedule
);
3675 tree
= isl_ast_build_node_from_schedule(build
, schedule
);
3676 isl_ast_build_free(build
);
3681 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
3685 return isl_union_map_read_from_str(ctx
, str
);
3688 /* Information about the outermost tilable bands in the forest of bands.
3690 * prefix is the (padded) schedule leading up to the outermost tilable bands.
3692 * tile_first is the number of schedule dimensions in prefix.
3694 * suffix is the schedule of the outermost tilable bands and their descendants.
3697 struct gpu_gen
*gen
;
3699 isl_union_map
*prefix
;
3700 isl_union_map
*suffix
;
3703 /* Construct an isl_multi_val for use as tile sizes for tiling "node"
3704 * from the elements in "tile_size".
3706 static __isl_give isl_multi_val
*construct_band_tiles_sizes(
3707 __isl_keep isl_schedule_node
*node
, int *tile_size
)
3717 ctx
= isl_schedule_node_get_ctx(node
);
3718 space
= isl_schedule_node_band_get_space(node
);
3719 n
= isl_schedule_node_band_n_member(node
);
3720 mv
= isl_multi_val_zero(space
);
3721 for (i
= 0; i
< n
; ++i
) {
3724 v
= isl_val_int_from_si(ctx
, tile_size
[i
]);
3725 mv
= isl_multi_val_set_val(mv
, i
, v
);
3731 /* Replace the partial schedule S of the band node "node" by
3739 * if scale_tile_loops is set, with f the integers in "factor".
3740 * The list that "factor" points to is assumed to contain at least
3741 * as many elements as the number of members in the band.
3743 static __isl_give isl_schedule_node
*snap_band_to_sizes(
3744 __isl_take isl_schedule_node
*node
, int *factor
,
3745 struct ppcg_options
*options
)
3749 mv
= construct_band_tiles_sizes(node
, factor
);
3750 node
= isl_schedule_node_band_scale_down(node
, isl_multi_val_copy(mv
));
3751 if (options
->scale_tile_loops
)
3752 node
= isl_schedule_node_band_scale(node
,
3753 isl_multi_val_copy(mv
));
3754 isl_multi_val_free(mv
);
3759 /* Tile "band" with tile size specified by "sizes".
3761 * Since the tile loops will be mapped to block ids, we forcibly
3762 * turn off tile loop scaling. We may want to enable tile loop scaling
3763 * at some later point, but then we would have to support the detection
3764 * of strides during the mapping to block ids.
3765 * Similarly, since the point loops will be mapped to thread ids,
3766 * we forcibly shift the point loops so that they start at zero.
3768 static __isl_give isl_schedule_node
*tile_band(
3769 __isl_take isl_schedule_node
*node
, __isl_take isl_multi_val
*sizes
)
3771 isl_ctx
*ctx
= isl_schedule_node_get_ctx(node
);
3775 scale_tile
= isl_options_get_tile_scale_tile_loops(ctx
);
3776 isl_options_set_tile_scale_tile_loops(ctx
, 0);
3777 shift_point
= isl_options_get_tile_shift_point_loops(ctx
);
3778 isl_options_set_tile_shift_point_loops(ctx
, 1);
3780 node
= isl_schedule_node_band_tile(node
, sizes
);
3782 isl_options_set_tile_scale_tile_loops(ctx
, scale_tile
);
3783 isl_options_set_tile_shift_point_loops(ctx
, shift_point
);
3788 /* Extract the set of parameter values and outer schedule dimensions
3789 * for which any statement instance
3790 * in the kernel inserted at "node" needs to be executed.
3791 * Intersect the set of parameter values derived from the host schedule
3792 * relation with the context of "prog".
3794 static __isl_give isl_set
*extract_context(__isl_keep isl_schedule_node
*node
,
3795 struct gpu_prog
*prog
)
3797 isl_union_map
*schedule
;
3798 isl_union_set
*schedule_domain
;
3802 schedule
= isl_schedule_node_get_prefix_schedule_relation(node
);
3803 schedule_domain
= isl_union_map_range(schedule
);
3804 empty
= isl_union_set_is_empty(schedule_domain
);
3806 isl_union_set_free(schedule_domain
);
3813 space
= isl_union_set_get_space(schedule_domain
);
3814 isl_union_set_free(schedule_domain
);
3815 space
= isl_space_set_from_params(space
);
3816 depth
= isl_schedule_node_get_schedule_depth(node
);
3817 space
= isl_space_add_dims(space
, isl_dim_set
, depth
);
3818 context
= isl_set_empty(space
);
3820 context
= isl_set_from_union_set(schedule_domain
);
3822 context
= isl_set_intersect_params(context
,
3823 isl_set_copy(prog
->context
));
3828 /* Return the set of outer array elements accessed by
3829 * by the statement instance in "domain" in "prog".
3831 static __isl_give isl_union_set
*accessed_by_domain(
3832 __isl_take isl_union_set
*domain
, struct gpu_prog
*prog
)
3834 isl_union_map
*access
;
3835 isl_union_set
*arrays
;
3837 access
= isl_union_map_union(isl_union_map_copy(prog
->read
),
3838 isl_union_map_copy(prog
->may_write
));
3839 access
= isl_union_map_intersect_domain(access
, domain
);
3840 arrays
= isl_union_map_range(access
);
3841 arrays
= isl_union_set_apply(arrays
,
3842 isl_union_map_copy(prog
->to_outer
));
3847 /* Return the number of outer band members of the band node "node"
3848 * that are marked coincident.
3850 static int n_outer_coincidence(__isl_keep isl_schedule_node
*node
)
3854 n
= isl_schedule_node_band_n_member(node
);
3856 for (i
= 0; i
< n
; ++i
)
3857 if (!isl_schedule_node_band_member_get_coincident(node
, i
))
3863 /* If the band node "node" has more than "n" members, then split off
3864 * the first "n" of them.
3866 static __isl_give isl_schedule_node
*split_band(
3867 __isl_take isl_schedule_node
*node
, int n
)
3871 dim
= isl_schedule_node_band_n_member(node
);
3873 node
= isl_schedule_node_band_split(node
, n
);
3878 /* Scale a band node that may have been split by split_band.
3879 * "sizes" are the scaling factors for the original node.
3880 * "node" either points to the original band node, or the outer
3881 * of the two pieces after splitting.
3883 * If the number of elements in "node" is smaller than the number of
3884 * elements in "sizes", then some splitting has occurred and we split
3885 * "sizes" in the same way.
3887 static __isl_give isl_schedule_node
*scale_band(
3888 __isl_take isl_schedule_node
*node
, __isl_take isl_multi_val
*sizes
)
3892 n
= isl_multi_val_dim(sizes
, isl_dim_set
);
3893 dim
= isl_schedule_node_band_n_member(node
);
3895 isl_multi_val
*sizes2
;
3897 sizes2
= isl_multi_val_copy(sizes
);
3898 sizes
= isl_multi_val_drop_dims(sizes
,
3899 isl_dim_set
, dim
, n
- dim
);
3900 sizes2
= isl_multi_val_drop_dims(sizes2
, isl_dim_set
, 0, dim
);
3901 node
= isl_schedule_node_child(node
, 0);
3902 node
= isl_schedule_node_band_scale(node
, sizes2
);
3903 node
= isl_schedule_node_parent(node
);
3906 return isl_schedule_node_band_scale(node
, sizes
);
3909 /* Return an isl_multi_aff, with as elements the parameters in "space"
3910 * that have the names specified by the elements in "names".
3911 * If (some of) these parameters do not already appear in "space",
3912 * then they are added first.
3914 static __isl_give isl_multi_aff
*parameter_vector(__isl_take isl_space
*space
,
3915 __isl_keep isl_id_list
*names
)
3918 isl_local_space
*ls
;
3922 space
= isl_space_free(space
);
3924 n
= isl_id_list_n_id(names
);
3925 for (i
= 0; i
< n
; ++i
) {
3929 id
= isl_id_list_get_id(names
, i
);
3930 pos
= isl_space_find_dim_by_id(space
, isl_dim_param
, id
);
3935 pos
= isl_space_dim(space
, isl_dim_param
);
3936 space
= isl_space_add_dims(space
, isl_dim_param
, 1);
3937 space
= isl_space_set_dim_id(space
, isl_dim_param
, pos
, id
);
3939 ma
= isl_multi_aff_zero(isl_space_copy(space
));
3940 ls
= isl_local_space_from_space(isl_space_domain(space
));
3941 for (i
= 0; i
< n
; ++i
) {
3946 id
= isl_id_list_get_id(names
, i
);
3947 pos
= isl_space_find_dim_by_id(space
, isl_dim_param
, id
);
3949 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
3950 isl_dim_param
, pos
);
3951 ma
= isl_multi_aff_set_aff(ma
, i
, aff
);
3953 isl_local_space_free(ls
);
3958 /* Return constraints on the domain elements that equate a sequence of
3959 * parameters called "names", to the partial schedule
3960 * of "node" modulo the integers in "size".
3961 * The number of elements in the array "size" should be equal
3962 * to the number of members of the band node "node" and
3963 * to the number of elements in "names".
3965 static __isl_give isl_union_set
*set_schedule_modulo(
3966 __isl_keep isl_schedule_node
*node
, __isl_keep isl_id_list
*names
,
3971 isl_multi_union_pw_aff
*mupa
, *mupa2
;
3973 isl_union_set
*domain
;
3977 if (isl_schedule_node_band_n_member(node
) == 0)
3978 return isl_schedule_node_get_universe_domain(node
);
3980 mupa
= isl_schedule_node_band_get_partial_schedule(node
);
3981 mv
= construct_band_tiles_sizes(node
, size
);
3982 mupa
= isl_multi_union_pw_aff_mod_multi_val(mupa
, mv
);
3984 space
= isl_multi_union_pw_aff_get_space(mupa
);
3985 ma
= parameter_vector(space
, names
);
3987 domain
= isl_schedule_node_get_universe_domain(node
);
3989 mupa2
= isl_multi_union_pw_aff_multi_aff_on_domain(domain
, ma
);
3990 mupa
= isl_multi_union_pw_aff_sub(mupa
, mupa2
);
3992 return isl_multi_union_pw_aff_zero_union_set(mupa
);
3995 /* Insert a context node at "node" introducing the block and thread
3996 * identifiers along with their bounds, which are stored in kernel->grid_size
3997 * and kernel->block_dim.
3998 * Note that the bounds on the block identifiers may implicitly impose
3999 * constraints on the parameters. A guard needs to be inserted
4000 * in the schedule tree to ensure that those bounds hold at "node".
4001 * This guard is inserted in insert_guard.
4003 static __isl_give isl_schedule_node
*insert_context(struct ppcg_kernel
*kernel
,
4004 __isl_take isl_schedule_node
*node
)
4008 context
= isl_set_universe(isl_set_get_space(kernel
->context
));
4010 context
= add_bounded_parameters_dynamic(context
,
4011 kernel
->grid_size
, kernel
->block_ids
);
4012 context
= add_bounded_parameters(context
,
4013 kernel
->block_dim
, kernel
->thread_ids
);
4015 node
= isl_schedule_node_insert_context(node
, context
);
4020 /* Insert a guard that eliminates kernel launches where the kernel
4021 * obviously does not have any work to do.
4023 * In particular, eliminate kernel launches where there are obviously
4025 * Use the same block size constraints that are used to create the context
4026 * to ensure that all constraints implicit in the constructed context
4027 * are imposed by the guard.
4029 * Additionally, add other constraints that are valid
4030 * for each executed instance ("context"), as long as this does not result
4033 static __isl_give isl_schedule_node
*insert_guard(
4034 __isl_take isl_schedule_node
*node
, __isl_keep isl_set
*context
,
4035 __isl_keep isl_multi_pw_aff
*size
, struct ppcg_scop
*scop
)
4041 guard
= isl_set_copy(context
);
4042 guard
= isl_set_compute_divs(guard
);
4043 guard
= isl_set_from_basic_set(isl_set_simple_hull(guard
));
4045 nparam
= isl_set_dim(guard
, isl_dim_param
);
4046 n
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
4047 ids
= ppcg_scop_generate_names(scop
, n
, "__ppcg_tmp");
4048 guard
= add_bounded_parameters_dynamic(guard
, size
, ids
);
4049 isl_id_list_free(ids
);
4050 guard
= isl_set_project_out(guard
, isl_dim_param
, nparam
, n
);
4052 node
= isl_schedule_node_insert_guard(node
, guard
);
4057 /* Mark all dimensions in the current band node atomic.
4059 static __isl_give isl_schedule_node
*atomic(__isl_take isl_schedule_node
*node
)
4063 n
= isl_schedule_node_band_n_member(node
);
4064 for (i
= 0; i
< n
; ++i
)
4065 node
= isl_schedule_node_band_member_set_ast_loop_type(node
, i
,
4066 isl_ast_loop_atomic
);
4071 /* Mark "node" atomic, if it is a band node.
4072 * Do the same for all ancestors.
4073 * Return a pointer to "node" (in the updated schedule tree).
4075 static __isl_give isl_schedule_node
*atomic_ancestors(
4076 __isl_take isl_schedule_node
*node
)
4082 if (!isl_schedule_node_has_parent(node
))
4085 pos
= isl_schedule_node_get_child_position(node
);
4086 node
= isl_schedule_node_parent(node
);
4087 if (isl_schedule_node_get_type(node
) == isl_schedule_node_band
)
4088 node
= atomic(node
);
4089 node
= atomic_ancestors(node
);
4090 node
= isl_schedule_node_child(node
, pos
);
4095 /* Group the domain elements into a single space, named kernelX,
4096 * with X the kernel sequence number "kernel_id".
4098 static __isl_give isl_schedule_node
*group_statements(
4099 __isl_take isl_schedule_node
*node
, int kernel_id
)
4107 snprintf(buffer
, sizeof(buffer
), "kernel%d", kernel_id
);
4108 id
= isl_id_alloc(isl_schedule_node_get_ctx(node
), buffer
, NULL
);
4109 return isl_schedule_node_group(node
, id
);
4112 /* Create a ppcg_kernel representing the domain instances that reach "node"
4113 * and replace the subtree at "node" by a mark node pointing
4114 * to the ppcg_kernel.
4115 * The band that "node" points to is the band that needs to be mapped
4116 * to block identifiers. The band that needs to be mapped to thread
4117 * identifiers should be marked by a "thread" mark by the caller.
4118 * If "scale" is set, then the band that "node" points to is scaled
4121 * Mark all outer band nodes as atomic to ensure each kernel is only
4123 * If the domain elements that reach "node" live in more than one space,
4124 * then group the domain elements into a single space, named kernelX,
4125 * with X the kernel sequence number.
4127 * Insert a guard node governing the kernel node to ensure that
4128 * no kernels with zero blocks are launched.
4130 * Temporarily adjust the schedule tree underneath the kernel mark as follows.
4131 * Insert a context node describing the block and thread
4132 * identifiers inside the kernel mark.
4133 * The context node needs to be inserted after the effective block size
4134 * has been determined such that the bounds on the thread identifiers
4135 * would reflect the effective block size.
4136 * Insert a filter node inside the context node mapping the statement
4137 * instances to block identifiers. In particular, the block identifiers
4138 * are equated to the partial schedule of band that was marked for mapping
4139 * to blocks modulo the grid size.
4140 * Insert a filter node inside the "thread" mark mapping the statement
4141 * instances to thread identifiers. In particular, the thread identifiers
4142 * are equated to the partial schedule of band that was marked for mapping
4143 * to threads modulo the block size.
4145 * Store a pointer to the created ppcg_kernel in gen->kernel.
4147 * We keep a copy of the isl_id that points to the kernel to ensure
4148 * that the kernel does not get destroyed if the schedule node
4149 * is freed due to some error condition.
4151 static __isl_give isl_schedule_node
*create_kernel(struct gpu_gen
*gen
,
4152 __isl_take isl_schedule_node
*node
, int scale
,
4153 __isl_keep isl_multi_val
*sizes
)
4155 struct ppcg_kernel
*kernel
;
4157 isl_schedule_node
*node_thread
;
4158 isl_union_set
*domain
;
4159 int single_statement
;
4161 kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
4162 kernel
= ppcg_kernel_create_local_arrays(kernel
, gen
->prog
);
4164 return isl_schedule_node_free(node
);
4166 domain
= isl_schedule_node_get_domain(node
);
4167 single_statement
= isl_union_set_n_set(domain
) == 1;
4169 kernel
->ctx
= gen
->ctx
;
4170 kernel
->options
= gen
->options
;
4171 kernel
->context
= extract_context(node
, gen
->prog
);
4172 kernel
->core
= isl_union_set_universe(isl_union_set_copy(domain
));
4173 kernel
->arrays
= accessed_by_domain(isl_union_set_copy(domain
),
4175 kernel
->tile_len
= isl_schedule_node_band_n_member(node
);
4176 kernel
->n_parallel
= n_outer_coincidence(node
);
4177 kernel
->n_grid
= kernel
->n_parallel
;
4178 node_thread
= isl_schedule_node_copy(node
);
4179 node_thread
= gpu_tree_move_down_to_thread(node_thread
, kernel
->core
);
4180 node_thread
= isl_schedule_node_child(node_thread
, 0);
4181 kernel
->n_block
= n_outer_coincidence(node_thread
);
4182 isl_schedule_node_free(node_thread
);
4183 kernel
->id
= gen
->kernel_id
++;
4184 read_grid_and_block_sizes(kernel
, gen
);
4186 gen
->kernel
= kernel
;
4188 node
= atomic_ancestors(node
);
4190 id
= isl_id_alloc(gen
->ctx
, "kernel", kernel
);
4191 id
= isl_id_set_free_user(id
, &ppcg_kernel_free_wrap
);
4192 node
= isl_schedule_node_insert_mark(node
, isl_id_copy(id
));
4194 if (!single_statement
)
4195 node
= group_statements(node
, kernel
->id
);
4197 node
= isl_schedule_node_child(node
, 0);
4198 node
= split_band(node
, kernel
->n_grid
);
4199 kernel
->block_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
4200 kernel
->n_grid
, "b");
4201 kernel
->block_filter
= set_schedule_modulo(node
, kernel
->block_ids
,
4203 kernel
->grid_size
= extract_grid_size(kernel
,
4204 isl_union_set_copy(domain
));
4205 if (!kernel
->options
->wrap
)
4206 node
= snap_band_to_sizes(node
, kernel
->grid_dim
,
4209 node
= scale_band(node
, isl_multi_val_copy(sizes
));
4210 node
= isl_schedule_node_parent(node
);
4211 if (!single_statement
)
4212 node
= isl_schedule_node_parent(node
);
4213 node
= insert_guard(node
, kernel
->context
, kernel
->grid_size
,
4215 node
= gpu_tree_move_down_to_thread(node
, kernel
->core
);
4216 node
= isl_schedule_node_child(node
, 0);
4217 node
= split_band(node
, kernel
->n_block
);
4218 kernel
->thread_ids
= ppcg_scop_generate_names(gen
->prog
->scop
,
4219 kernel
->n_block
, "t");
4220 kernel
->thread_filter
= set_schedule_modulo(node
, kernel
->thread_ids
,
4222 extract_block_size(kernel
, domain
);
4224 node
= gpu_tree_move_up_to_kernel(node
);
4225 node
= isl_schedule_node_child(node
, 0);
4226 node
= insert_context(kernel
, node
);
4227 node
= isl_schedule_node_child(node
, 0);
4228 node
= isl_schedule_node_insert_filter(node
,
4229 isl_union_set_copy(kernel
->block_filter
));
4231 node
= gpu_tree_move_down_to_thread(node
, kernel
->core
);
4232 node
= isl_schedule_node_child(node
, 0);
4233 if (!kernel
->options
->wrap
)
4234 node
= snap_band_to_sizes(node
, kernel
->block_dim
,
4236 node
= isl_schedule_node_insert_filter(node
,
4237 isl_union_set_copy(kernel
->thread_filter
));
4239 node
= gpu_tree_move_up_to_kernel(node
);
4241 node
= isl_schedule_node_child(node
, 0);
4242 node
= isl_schedule_node_cut(node
);
4243 node
= isl_schedule_node_parent(node
);
4245 if (!single_statement
)
4246 node
= isl_schedule_node_parent(node
);
4247 node
= isl_schedule_node_parent(node
);
4253 /* Insert a zero-dimensional permutable band at "node".
4255 static __isl_give isl_schedule_node
*insert_empty_permutable_band(
4256 __isl_take isl_schedule_node
*node
)
4259 isl_schedule
*schedule
;
4260 isl_union_set
*domain
;
4261 isl_multi_union_pw_aff
*mupa
;
4263 schedule
= isl_schedule_node_get_schedule(node
);
4264 domain
= isl_schedule_get_domain(schedule
);
4265 space
= isl_union_set_get_space(domain
);
4266 isl_union_set_free(domain
);
4267 isl_schedule_free(schedule
);
4269 space
= isl_space_set_from_params(space
);
4270 mupa
= isl_multi_union_pw_aff_zero(space
);
4271 node
= isl_schedule_node_insert_partial_schedule(node
, mupa
);
4272 node
= isl_schedule_node_band_set_permutable(node
, 1);
4277 /* Mark "node" as outer permutable.
4279 * If "node" originally points to a leaf, then insert a zero-dimensional
4280 * permutable band such that we can assume that "node" always
4281 * points to a band node.
4283 * Tile "node" using user specified tile sizes, after splitting the band
4284 * if the number of specified tile sizes is smaller than the dimension
4285 * of the band. Mark the point band of this tiling as the band that
4286 * needs to be mapped to threads.
4287 * Create a kernel representing the domain instances that reach "node" and
4288 * replace the band node with a mark node pointing to the kernel.
4290 static __isl_give isl_schedule_node
*mark_outer_permutable(
4291 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
)
4293 struct ppcg_kernel
*kernel
;
4298 isl_multi_val
*sizes
;
4300 if (isl_schedule_node_get_type(node
) == isl_schedule_node_leaf
)
4301 node
= insert_empty_permutable_band(node
);
4303 tile_len
= isl_schedule_node_band_n_member(node
);
4304 tile_size
= read_tile_sizes(gen
, &tile_len
);
4306 return isl_schedule_node_free(node
);
4307 if (tile_len
< isl_schedule_node_band_n_member(node
))
4308 node
= isl_schedule_node_band_split(node
, tile_len
);
4309 sizes
= construct_band_tiles_sizes(node
, tile_size
);
4310 node
= tile_band(node
, isl_multi_val_copy(sizes
));
4311 node
= isl_schedule_node_child(node
, 0);
4312 id
= isl_id_alloc(gen
->ctx
, "thread", NULL
);
4313 node
= isl_schedule_node_insert_mark(node
, id
);
4314 node
= isl_schedule_node_parent(node
);
4316 scale
= gen
->options
->scale_tile_loops
;
4317 node
= create_kernel(gen
, node
, scale
, sizes
);
4318 isl_multi_val_free(sizes
);
4321 kernel
= gen
->kernel
;
4322 kernel
->tile_len
= tile_len
;
4323 kernel
->tile_size
= tile_size
;
4328 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
4329 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
);
4331 /* Check if this band node is tilable and has any parallel loops. If so,
4332 * take it as the outermost tilable band. If not, continue looking for the
4333 * outermost tilable band in the children of the current band.
4334 * Return a pointer to the same node in a tree where all outermost tilable
4335 * bands in the current subtree have been replaced by mark nodes
4336 * containing a pointer to a ppcg_kernel object.
4338 static __isl_give isl_schedule_node
*band_select_outer_band(struct gpu_gen
*gen
,
4339 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4341 int n
= isl_schedule_node_band_n_member(node
);
4344 n_parallel
= n_outer_coincidence(node
);
4346 if (!isl_schedule_node_band_get_permutable(node
) || n_parallel
== 0) {
4347 node
= isl_schedule_node_child(node
, 0);
4348 node
= select_outer_band(gen
, node
, pos
+ n
, info
);
4349 return isl_schedule_node_parent(node
);
4352 gen
->any_parallelism
= 1;
4354 info
->tile_first
= pos
;
4355 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
4356 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
4358 node
= mark_outer_permutable(gen
, node
);
4363 /* Extend "umap" with coordinates with fixed value "val"
4364 * to a total length of "dst_len", assuming the original dimension is "src_len".
4366 static __isl_give isl_union_map
*extend_range(
4367 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
4373 dim
= isl_union_map_get_space(umap
);
4374 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
4375 for (i
= src_len
; i
< dst_len
; ++i
)
4376 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
4378 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
4383 /* Select the outermost bands in the elements of the sequence or set
4384 * node "node", align their prefix schedules and combine the resulting
4385 * prefix and suffix schedules into a single pair of prefix and
4386 * suffix schedules for the entire list.
4387 * Return a pointer to the same node in a tree where all outermost tilable
4388 * bands in the current subtree have been replaced by mark nodes
4389 * containing a pointer to a ppcg_kernel object.
4391 static __isl_give isl_schedule_node
*list_select_outer_band(
4392 struct gpu_gen
*gen
, __isl_take isl_schedule_node
*node
, int pos
,
4393 struct band_info
*list_info
)
4396 int n
= isl_schedule_node_n_children(node
);
4397 isl_ctx
*ctx
= isl_schedule_node_get_ctx(node
);
4398 struct band_info
*info
;
4400 isl_union_map
*prefix
;
4401 isl_union_map
*suffix
;
4404 info
= isl_calloc_array(ctx
, struct band_info
, n
);
4408 for (i
= 0; i
< n
; ++i
) {
4409 node
= isl_schedule_node_child(node
, i
);
4410 node
= select_outer_band(gen
, node
, pos
, &info
[i
]);
4411 if (info
[i
].tile_first
> max_tile_first
)
4412 max_tile_first
= info
[i
].tile_first
;
4413 node
= isl_schedule_node_parent(node
);
4416 for (i
= 0; i
< n
; ++i
) {
4417 if (info
[i
].tile_first
== max_tile_first
)
4419 info
[i
].prefix
= extend_range(info
[i
].prefix
,
4420 info
[i
].tile_first
, max_tile_first
, 0);
4421 info
[i
].tile_first
= max_tile_first
;
4424 prefix
= info
[0].prefix
;
4425 suffix
= info
[0].suffix
;
4427 for (i
= 1; i
< n
; ++i
) {
4428 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
4429 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
4432 list_info
->tile_first
= info
[0].tile_first
;
4433 list_info
->prefix
= prefix
;
4434 list_info
->suffix
= suffix
;
4440 /* If we reach a leaf node, then we have not found any outer tilable
4441 * band with parallel loops, so consider the leaf node as the outermost
4443 * Return a pointer to a mark node containing a pointer
4444 * to a ppcg_kernel object inserted at the original leaf node.
4446 static __isl_give isl_schedule_node
*leaf_select_outer_band(struct gpu_gen
*gen
,
4447 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4450 info
->tile_first
= pos
;
4451 info
->prefix
= isl_schedule_node_get_prefix_schedule_union_map(node
);
4452 info
->suffix
= isl_schedule_node_get_subtree_schedule_union_map(node
);
4454 node
= mark_outer_permutable(gen
, node
);
4459 /* Select the outermost tilable band in the subtree that "node" points to and
4460 * return a pointer to the same node in a tree where all outermost tilable
4461 * bands in the current subtree have been replaced by mark nodes
4462 * containing a pointer to a ppcg_kernel object.
4464 static __isl_give isl_schedule_node
*select_outer_band(struct gpu_gen
*gen
,
4465 __isl_take isl_schedule_node
*node
, int pos
, struct band_info
*info
)
4467 enum isl_schedule_node_type type
;
4469 type
= isl_schedule_node_get_type(node
);
4471 case isl_schedule_node_domain
:
4472 case isl_schedule_node_filter
:
4473 node
= isl_schedule_node_child(node
, 0);
4474 node
= select_outer_band(gen
, node
, pos
, info
);
4475 return isl_schedule_node_parent(node
);
4476 case isl_schedule_node_leaf
:
4477 return leaf_select_outer_band(gen
, node
, pos
, info
);
4478 case isl_schedule_node_band
:
4479 return band_select_outer_band(gen
, node
, pos
, info
);
4480 case isl_schedule_node_set
:
4481 case isl_schedule_node_sequence
:
4482 return list_select_outer_band(gen
, node
, pos
, info
);
4484 isl_die(isl_schedule_node_get_ctx(node
),
4485 isl_error_unsupported
, "unhandled schedule node type",
4487 case isl_schedule_node_error
:
4488 info
->prefix
= NULL
;
4489 info
->suffix
= NULL
;
4493 return isl_schedule_node_free(node
);
4496 /* Select the outermost tilable band that (by construction)
4497 * has at least one parallel loop.
4498 * The starting position of the aligned band is stored in the pair
4500 * The sizes and number of parallel loops may be different in different
4501 * parts of the band forest and are therefore stored in the gpu_stmts.
4503 * Return the complete schedule, with the tilable bands aligned
4504 * at gen->tile_first and padded with zero, if needed.
4505 * Store a schedule tree corresponding to the outer gen->tile_first
4506 * dimensions, with mark nodes containing pointers to ppcg_kernel objects,
4507 * in gen->host_schedule.
4509 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
4510 __isl_keep isl_schedule
*schedule
)
4512 isl_schedule_node
*node
;
4513 struct band_info info
;
4515 node
= isl_schedule_get_root(schedule
);
4516 node
= select_outer_band(gen
, node
, 0, &info
);
4517 gen
->host_schedule
= isl_schedule_node_get_schedule(node
);
4518 isl_schedule_node_free(node
);
4520 gen
->tile_first
= info
.tile_first
;
4521 info
.suffix
= align_range(info
.suffix
);
4523 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
4526 /* Set gen->untiled_len to the number of scheduling dimensions
4527 * for the schedule of the first domain.
4528 * We assume here that this number is the same for all domains.
4530 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
4532 unsigned *untiled_len
= user
;
4534 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
4540 /* Compute an appropriate schedule based on the accesses in
4541 * gen->read and gen->write.
4543 * We use the dependences in gen->prog->scop to compute
4544 * a schedule that has a parallel loop in each tilable band.
4545 * Finally, we select the outermost tilable band.
4547 * If live range reordering is allowed, then we need to make sure
4548 * that live ranges on arrays are not run in parallel since doing
4549 * so would require array expansion. We therefore add the array
4550 * order dependences to the coincidence dependences. Non-zero array
4551 * order dependences will then prevent a schedule dimension from being
4552 * considered parallel.
4553 * Live ranges derived from scalars are allowed to be run in parallel
4554 * since we force the scalars to be mapped to private memory in
4555 * check_scalar_live_ranges.
4556 * If live range reordering is allowed, then the false dependences
4557 * are not added to the validity constraints as that would prevent
4558 * reordering. Instead, the external false dependences that enforce that reads
4559 * from potentially live-in data precede any later write and
4560 * that writes of potentially live-out data follow any other earlier write
4561 * are added to the validity and the coincidence constraints.
4562 * The false dependences are still added to the proximity constraints
4563 * for consistency with the case where live range reordering is not allowed.
4564 * The coincidence constraints then consist of flow dependences,
4565 * external false dependences and array order dependences.
4566 * The independences can be filtered out from the first two sets.
4567 * They have already been filtered out from the array order dependences
4568 * on a per array basis in collect_order_dependences.
4569 * There is no need for a per array handling of the other two sets
4570 * as there should be no flow or external false dependence on local
4571 * variables that can be filtered out.
4573 static void compute_schedule(struct gpu_gen
*gen
)
4575 isl_union_set
*domain
;
4576 isl_union_map
*dep_raw
, *dep
;
4577 isl_union_map
*validity
, *proximity
, *coincidence
;
4578 isl_union_map
*sched
;
4579 isl_schedule_constraints
*sc
;
4580 isl_schedule
*schedule
;
4582 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
4583 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
4584 sc
= isl_schedule_constraints_set_context(sc
,
4585 isl_set_copy(gen
->prog
->scop
->context
));
4586 if (gen
->options
->live_range_reordering
) {
4587 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
4588 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
4589 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
4590 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4591 validity
= isl_union_map_copy(proximity
);
4592 validity
= isl_union_map_union(validity
,
4593 isl_union_map_copy(gen
->prog
->scop
->dep_forced
));
4594 proximity
= isl_union_map_union(proximity
,
4595 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
4596 coincidence
= isl_union_map_copy(validity
);
4597 coincidence
= isl_union_map_subtract(coincidence
,
4598 isl_union_map_copy(gen
->prog
->scop
->independence
));
4599 coincidence
= isl_union_map_union(coincidence
,
4600 isl_union_map_copy(gen
->prog
->array_order
));
4602 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
4603 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
4604 dep
= isl_union_map_union(dep
, dep_raw
);
4605 dep
= isl_union_map_coalesce(dep
);
4606 proximity
= isl_union_map_copy(dep
);
4607 coincidence
= isl_union_map_copy(dep
);
4610 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
4611 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
4612 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
4614 if (gen
->options
->debug
->dump_schedule_constraints
)
4615 isl_schedule_constraints_dump(sc
);
4616 schedule
= isl_schedule_constraints_compute_schedule(sc
);
4617 if (gen
->options
->debug
->dump_schedule
)
4618 isl_schedule_dump(schedule
);
4620 sched
= select_outer_tilable_band(gen
, schedule
);
4622 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
4623 sched
= isl_union_map_intersect_domain(sched
, domain
);
4626 isl_schedule_free(schedule
);
4629 /* Compute the sets of outer array elements that need to be copied in and out.
4631 * In particular, for each array that is possibly written anywhere in
4632 * gen->prog and that is visible outside the corresponding scop,
4633 * we copy out its entire extent.
4635 * Any array elements that is read without first being written needs
4636 * to be copied in. Furthermore, if there are any array elements that
4637 * are copied out, but that may not be written inside gen->prog, then
4638 * they also need to be copied in to ensure that the value after execution
4639 * is the same as the value before execution, at least for those array
4640 * elements that may have their values preserved by the scop.
4641 * In case the array elements are structures, we need to take into
4642 * account that all members of the structures need to be written
4643 * by gen->prog before we can avoid copying the data structure in.
4645 * While computing the set of array elements that are copied out but
4646 * not necessarily written, we intersect both sets with the context.
4647 * This helps in those cases where the arrays are declared with a fixed size,
4648 * while the accesses are parametric and the context assigns a fixed value
4649 * to the parameters.
4651 * If an element from a local array is read without first being written,
4652 * then there is no point in copying it in since it cannot have been
4653 * written prior to the scop. Warn about the uninitialized read instead.
4655 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
4658 isl_union_set
*local
;
4659 isl_union_set
*may_write
, *must_write
;
4660 isl_union_set
*copy_in
, *copy_out
;
4661 isl_union_set
*not_written
;
4662 isl_union_map
*uninitialized
;
4663 isl_union_map
*local_uninitialized
;
4665 must_write
= isl_union_map_range(
4666 isl_union_map_copy(gen
->prog
->must_write
));
4667 must_write
= isl_union_set_intersect_params(must_write
,
4668 isl_set_copy(gen
->prog
->context
));
4669 may_write
= isl_union_map_range(
4670 isl_union_map_copy(gen
->prog
->may_write
));
4671 may_write
= isl_union_set_intersect_params(may_write
,
4672 isl_set_copy(gen
->prog
->context
));
4673 may_write
= isl_union_set_universe(may_write
);
4674 may_write
= isl_union_set_apply(may_write
,
4675 isl_union_map_copy(gen
->prog
->to_outer
));
4676 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
4677 local
= isl_union_set_copy(copy_out
);
4679 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4684 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
4686 if (gen
->prog
->array
[i
].local
) {
4689 set
= isl_set_universe(space
);
4690 local
= isl_union_set_add_set(local
, set
);
4694 write_i
= isl_union_set_extract_set(may_write
, space
);
4695 empty
= isl_set_plain_is_empty(write_i
);
4696 isl_set_free(write_i
);
4700 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
4701 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
4703 isl_union_set_free(may_write
);
4705 copy_out
= isl_union_set_intersect_params(copy_out
,
4706 isl_set_copy(gen
->prog
->context
));
4708 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
4710 copy_out
= isl_union_set_apply(copy_out
,
4711 isl_union_map_copy(gen
->prog
->to_inner
));
4712 copy_out
= isl_union_set_intersect(copy_out
,
4713 isl_union_set_copy(gen
->prog
->may_persist
));
4714 not_written
= isl_union_set_subtract(copy_out
, must_write
);
4716 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
4717 local_uninitialized
= isl_union_map_copy(uninitialized
);
4719 local
= isl_union_set_apply(local
,
4720 isl_union_map_copy(gen
->prog
->to_inner
));
4721 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
4723 if (!isl_union_map_is_empty(local_uninitialized
)) {
4725 "possibly uninitialized reads (not copied in):\n");
4726 isl_union_map_dump(local_uninitialized
);
4728 uninitialized
= isl_union_map_subtract(uninitialized
,
4729 local_uninitialized
);
4730 copy_in
= isl_union_map_range(uninitialized
);
4731 copy_in
= isl_union_set_union(copy_in
, not_written
);
4732 copy_in
= isl_union_set_apply(copy_in
,
4733 isl_union_map_copy(gen
->prog
->to_outer
));
4735 gen
->prog
->copy_in
= copy_in
;
4738 /* Internal data structure for extract_access.
4739 * "next_access" points to the end of a linked list that is extended
4740 * by extract_access.
4741 * "single_expression" is set if the access expressions belong to
4742 * an expression statement (i.e., a statement without internal control).
4743 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4745 struct ppcg_extract_access_data
{
4746 struct gpu_stmt_access
**next_access
;
4747 int single_expression
;
4748 isl_union_map
*any_to_outer
;
4751 /* Given a tagged access relation to a single array "tagged", extract it
4752 * as a map, taking into account that the input may be empty.
4753 * If the access relation is empty, then it does not contain
4754 * any space information, so we try to recover it from the index
4756 * The space of the index expression is of the form I -> A,
4757 * with I the statement instances and A the array, or [I -> F] -> A,
4758 * with F the filters corresponding to arguments.
4759 * We first drop F, if present, obtaining I -> A.
4760 * Then we construct I -> R, with R the reference tag,
4761 * combine the two into I -> [R -> A] and uncurry to obtain
4762 * the final result [I -> R] -> A.
4763 * Note that the index expression may have a lower dimension
4764 * than that of the array, but this dimension is not used
4765 * if the access relation is empty.
4767 static __isl_give isl_map
*extract_single_tagged_access(
4768 __isl_take isl_union_map
*tagged
, __isl_keep pet_expr
*expr
)
4772 isl_space
*space
, *space2
;
4773 isl_multi_pw_aff
*index
;
4775 empty
= isl_union_map_is_empty(tagged
);
4779 return isl_map_from_union_map(tagged
);
4780 isl_union_map_free(tagged
);
4782 index
= pet_expr_access_get_index(expr
);
4783 space
= isl_multi_pw_aff_get_space(index
);
4784 isl_multi_pw_aff_free(index
);
4785 if (isl_space_domain_is_wrapping(space
))
4786 space
= isl_space_domain_factor_domain(space
);
4787 space2
= isl_space_copy(space
);
4788 space2
= isl_space_from_domain(isl_space_domain(space
));
4789 id
= pet_expr_access_get_ref_id(expr
);
4790 space2
= isl_space_set_tuple_id(space2
, isl_dim_out
, id
);
4791 space
= isl_space_range_product(space2
, space
);
4792 space
= isl_space_uncurry(space
);
4794 return isl_map_empty(space
);
4796 isl_union_map_free(tagged
);
4800 /* Extract a gpu_stmt_access from "expr", append it to the list
4801 * that ends in *data->next_access and update the end of the list.
4802 * If the access expression performs a write, then it is considered
4803 * exact only if it appears in a single expression statement and
4804 * if its may access relation is equal to its must access relation.
4806 * The combined set of may accesses may be union if member accesses
4807 * are involved, but the entire set is derived from a single reference and
4808 * therefore from a single index expression. These accesses therefore
4809 * all map to the same outer array.
4811 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
4813 struct ppcg_extract_access_data
*data
= user
;
4814 isl_union_map
*tagged
;
4815 struct gpu_stmt_access
*access
;
4816 isl_ctx
*ctx
= pet_expr_get_ctx(expr
);
4817 isl_multi_pw_aff
*index
;
4819 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
4821 access
->next
= NULL
;
4822 access
->read
= pet_expr_access_is_read(expr
);
4823 access
->write
= pet_expr_access_is_write(expr
);
4824 tagged
= pet_expr_access_get_tagged_may_read(expr
);
4825 tagged
= isl_union_map_union(tagged
,
4826 pet_expr_access_get_tagged_may_write(expr
));
4827 tagged
= isl_union_map_apply_range(tagged
,
4828 isl_union_map_copy(data
->any_to_outer
));
4829 if (!access
->write
) {
4830 access
->exact_write
= 1;
4831 } else if (!data
->single_expression
) {
4832 access
->exact_write
= 0;
4834 isl_union_map
*must
, *may
;
4835 may
= isl_union_map_copy(tagged
);
4836 may
= isl_union_map_domain_factor_domain(may
);
4837 must
= pet_expr_access_get_must_write(expr
);
4838 access
->exact_write
= isl_union_map_is_equal(must
, may
);
4839 isl_union_map_free(must
);
4840 isl_union_map_free(may
);
4842 index
= pet_expr_access_get_index(expr
);
4843 access
->n_index
= isl_multi_pw_aff_dim(index
, isl_dim_out
);
4844 isl_multi_pw_aff_free(index
);
4845 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
4846 access
->tagged_access
= extract_single_tagged_access(tagged
, expr
);
4847 access
->access
= isl_map_copy(access
->tagged_access
);
4848 access
->access
= isl_map_domain_factor_domain(access
->access
);
4850 *data
->next_access
= access
;
4851 data
->next_access
= &(*data
->next_access
)->next
;
4853 if (!access
->access
)
4859 /* Construct a linked list of gpu_stmt_access objects,
4860 * one for each access expression in the statement body.
4861 * "any_to_outer" maps all intermediate arrays to their outer arrays.
4863 static int pet_stmt_extract_accesses(struct gpu_stmt
*stmt
,
4864 __isl_keep isl_union_map
*any_to_outer
)
4866 struct ppcg_extract_access_data data
;
4868 stmt
->accesses
= NULL
;
4869 data
.next_access
= &stmt
->accesses
;
4870 data
.single_expression
=
4871 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
4872 data
.any_to_outer
= any_to_outer
;
4873 return pet_tree_foreach_access_expr(stmt
->stmt
->body
,
4874 &extract_access
, &data
);
4877 /* Return an array of gpu_stmt representing the statements in "scop".
4879 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
4880 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*any_to_outer
)
4883 struct gpu_stmt
*stmts
;
4885 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->pet
->n_stmt
);
4889 for (i
= 0; i
< scop
->pet
->n_stmt
; ++i
) {
4890 struct gpu_stmt
*s
= &stmts
[i
];
4892 s
->id
= isl_set_get_tuple_id(scop
->pet
->stmts
[i
]->domain
);
4893 s
->stmt
= scop
->pet
->stmts
[i
];
4894 if (pet_stmt_extract_accesses(s
, any_to_outer
) < 0)
4895 return free_stmts(stmts
, i
+ 1);
4901 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
4903 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
4905 struct gpu_gen
*gen
= user
;
4907 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
4911 /* Generate CUDA code for "scop" and print it to "p".
4912 * After generating an AST for the transformed scop as explained below,
4913 * we call "gen->print" to print the AST in the desired output format
4916 * If it turns out that it does not make sense to generate GPU code,
4917 * then we generate CPU code instead.
4919 * The GPU code is generated in a context where at least one
4920 * statement instance is executed. The corresponding guard (if any) is printed
4921 * around the entire generated GPU code, except for the declaration
4922 * of the arrays that are visible outside of the scop and that therefore
4923 * cannot be declared inside the body of any possible guard.
4925 * We first compute a schedule that respects the dependences
4926 * of the original program and select the outermost band
4927 * of tilable dimensions that has at least one parallel loop.
4928 * We then have three blocks of dimensions
4932 * The tilable band "B" is first tiled according to "tile" sizes, resulting
4937 * For each iteration of the T loop and for each array, we compute
4938 * the array elements accessed by that iteration, construct a rectangular
4939 * box around it and shift it to the origin. The result is used
4940 * as shared memory for the array.
4942 * We then split off at most 2 parallel loops from the T loops and
4943 * at most 3 parallel loops from the P loops
4947 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
4948 * according to "grid"/"block" sizes.
4950 * H T1T T1P T2 P1T P1P P2 G
4952 * Finally, the T1P and P1P iterators are equated to the block and
4953 * thread dimensions respectively and so are effectively removed.
4954 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
4955 * are run on the GPU.
4957 * Code is generated in three stages. We first generate code for the
4958 * host (the H loops), with iterators h%d. Then, for each leaf node
4959 * of the resulting AST, we generate code for the shared loops (up to
4960 * and including T2), with iterators g%d and after equating the H loops
4961 * to h%d parameters and the T1P loops to the block dimensions.
4962 * Finally, we generate code for the remaining loops in a similar fashion.
4964 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
4965 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
4966 struct ppcg_options
*options
)
4968 struct gpu_prog
*prog
;
4970 isl_set
*context
, *guard
;
4973 return isl_printer_free(p
);
4975 ctx
= isl_printer_get_ctx(p
);
4976 prog
= gpu_prog_alloc(ctx
, scop
);
4978 return isl_printer_free(p
);
4980 context
= isl_set_copy(prog
->context
);
4981 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
4982 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
4985 gen
->any_parallelism
= 0;
4986 compute_schedule(gen
);
4988 if (!gen
->any_parallelism
) {
4989 isl_set_free(context
);
4990 isl_set_free(guard
);
4991 p
= print_cpu(p
, scop
, options
);
4993 compute_copy_in_and_out(gen
);
4994 gen
->tree
= generate_host_code(gen
);
4995 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
4996 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
4997 isl_ast_node_free(gen
->tree
);
5000 isl_union_map_free(gen
->sched
);
5001 isl_schedule_free(gen
->host_schedule
);
5003 gpu_prog_free(prog
);
5008 /* Wrapper around generate for use as a ppcg_transform callback.
5010 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5011 struct ppcg_scop
*scop
, void *user
)
5013 struct gpu_gen
*gen
= user
;
5015 return generate(p
, gen
, scop
, gen
->options
);
5018 /* Transform the code in the file called "input" by replacing
5019 * all scops by corresponding GPU code and write the results to "out".
5021 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5022 struct ppcg_options
*options
,
5023 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5024 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5025 struct gpu_types
*types
, void *user
), void *user
)
5032 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5033 gen
.options
= options
;
5036 gen
.print_user
= user
;
5038 gen
.types
.name
= NULL
;
5040 if (options
->debug
->dump_sizes
) {
5041 isl_space
*space
= isl_space_params_alloc(ctx
, 0);
5042 gen
.used_sizes
= isl_union_map_empty(space
);
5045 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5047 if (options
->debug
->dump_sizes
) {
5048 isl_union_map_dump(gen
.used_sizes
);
5049 isl_union_map_free(gen
.used_sizes
);
5052 isl_union_map_free(gen
.sizes
);
5053 for (i
= 0; i
< gen
.types
.n
; ++i
)
5054 free(gen
.types
.name
[i
]);
5055 free(gen
.types
.name
);
5060 /* Compute the set of inner array elements that may have their values
5061 * preserved by "prog". In particular, collect the array elements of
5062 * arrays that are not local to "prog" and remove those elements that
5063 * are definitely killed or definitely written by "prog".
5065 static __isl_give isl_union_set
*compute_may_persist(struct gpu_prog
*prog
)
5068 isl_union_set
*may_persist
, *killed
;
5069 isl_union_map
*must_kill
;
5071 may_persist
= isl_union_set_empty(isl_set_get_space(prog
->context
));
5072 for (i
= 0; i
< prog
->n_array
; ++i
) {
5075 if (prog
->array
[i
].local
)
5078 extent
= isl_set_copy(prog
->array
[i
].extent
);
5079 may_persist
= isl_union_set_add_set(may_persist
, extent
);
5082 may_persist
= isl_union_set_intersect_params(may_persist
,
5083 isl_set_copy(prog
->context
));
5084 may_persist
= isl_union_set_apply(may_persist
,
5085 isl_union_map_copy(prog
->to_inner
));
5086 must_kill
= isl_union_map_copy(prog
->tagged_must_kill
);
5087 killed
= isl_union_map_range(must_kill
);
5088 must_kill
= isl_union_map_copy(prog
->must_write
);
5089 killed
= isl_union_set_union(killed
, isl_union_map_range(must_kill
));
5091 may_persist
= isl_union_set_subtract(may_persist
, killed
);
5095 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5097 struct gpu_prog
*prog
;
5104 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5109 prog
->context
= isl_set_copy(scop
->context
);
5110 prog
->n_stmts
= scop
->pet
->n_stmt
;
5111 prog
->any_to_outer
= pet_scop_compute_outer_to_any(scop
->pet
);
5112 prog
->any_to_outer
= isl_union_map_reverse(prog
->any_to_outer
);
5113 space
= isl_union_map_get_space(prog
->any_to_outer
);
5114 space
= isl_space_set_from_params(space
);
5115 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
5116 space
= isl_space_map_from_set(space
);
5117 id
= isl_map_identity(space
);
5118 prog
->any_to_outer
= isl_union_map_add_map(prog
->any_to_outer
, id
);
5119 prog
->stmts
= extract_stmts(ctx
, scop
,
5120 prog
->context
, prog
->any_to_outer
);
5121 prog
->read
= isl_union_map_copy(scop
->reads
);
5122 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
5123 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
5124 prog
->tagged_must_kill
= isl_union_map_copy(scop
->tagged_must_kills
);
5125 prog
->to_inner
= pet_scop_compute_outer_to_inner(scop
->pet
);
5126 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5127 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5130 return gpu_prog_free(prog
);
5132 if (collect_array_info(prog
) < 0)
5133 return gpu_prog_free(prog
);
5134 prog
->may_persist
= compute_may_persist(prog
);
5139 void *gpu_prog_free(struct gpu_prog
*prog
)
5143 free_array_info(prog
);
5144 free_stmts(prog
->stmts
, prog
->n_stmts
);
5145 isl_union_map_free(prog
->any_to_outer
);
5146 isl_union_map_free(prog
->to_outer
);
5147 isl_union_map_free(prog
->to_inner
);
5148 isl_union_set_free(prog
->copy_in
);
5149 isl_union_set_free(prog
->copy_out
);
5150 isl_union_map_free(prog
->read
);
5151 isl_union_map_free(prog
->may_write
);
5152 isl_union_map_free(prog
->must_write
);
5153 isl_union_map_free(prog
->tagged_must_kill
);
5154 isl_union_map_free(prog
->array_order
);
5155 isl_union_set_free(prog
->may_persist
);
5156 isl_set_free(prog
->context
);