gpu.h

   1 #ifndef _GPU_H
   2 #define _GPU_H
   3
   4 #include <isl/ast.h>
   5 #include <isl/id_to_ast_expr.h>
   6
   7 #include "ppcg.h"
   8 #include "ppcg_options.h"
   9
  10 /* Represents an outer array possibly accessed by a gpu_prog.
  11  * If this outer array contains structures, then the references are not
  12  * collected and the reference groups are not computed.
  13  */
  14 struct gpu_array_info {
  15         /* The array data space. */
  16         isl_space *space;
  17         /* Element type. */
  18         char *type;
  19         /* Element size. */
  20         int size;
  21         /* Name of the array. */
  22         char *name;
  23         /* Extent of the array that needs to be copied. */
  24         isl_set *extent;
  25         /* Number of indices. */
  26         unsigned n_index;
  27         /* For each index, a bound on "extent" in that direction. */
  28         isl_pw_aff **bound;
  29
  30         /* All references to this array; point to elements of a linked list. */
  31         int n_ref;
  32         struct gpu_stmt_access **refs;
  33
  34         /* The reference groups associated to this array. */
  35         int n_group;
  36         struct gpu_array_ref_group **groups;
  37
  38         /* Is this array accessed at all by the program? */
  39         int accessed;
  40
  41         /* Is this a scalar that is read-only within the entire program? */
  42         int read_only_scalar;
  43
  44         /* Are the elements of the array structures? */
  45         int has_compound_element;
  46
  47         /* Is the array local to the scop? */
  48         int local;
  49
  50         /* Should the array be linearized? */
  51         int linearize;
  52
  53         /* Order dependences on this array.
  54          * Only used if live_range_reordering option is set.
  55          * It is set to NULL otherwise.
  56          */
  57         isl_union_map *dep_order;
  58         /* Should the array (scalar) be forcibly mapped to a register? */
  59         int force_private;
  60 };
  61
  62 /* For each index i with 0 <= i < n_index,
  63  * bound[i] is equal to array->bound[i] specialized to the current kernel.
  64  */
  65 struct gpu_local_array_info {
  66         unsigned n_index;
  67         isl_pw_aff_list *bound;
  68 };
  69
  70 __isl_give isl_ast_expr *gpu_local_array_info_linearize_index(
  71         struct gpu_local_array_info *array, __isl_take isl_ast_expr *expr);
  72
  73 /* A sequence of "n" names of types.
  74  */
  75 struct gpu_types {
  76         int n;
  77         char **name;
  78 };
  79
  80 /* "read" and "write" contain the original access relations, possibly
  81  * involving member accesses.
  82  *
  83  * The elements of "array", as well as the ranges of "copy_in" and "copy_out"
  84  * only refer to the outer arrays of any possible member accesses.
  85  */
  86 struct gpu_prog {
  87         isl_ctx *ctx;
  88
  89         struct ppcg_scop *scop;
  90
  91         /* Set of parameter values */
  92         isl_set *context;
  93
  94         /* All potential read accesses in the entire program */
  95         isl_union_map *read;
  96
  97         /* All potential write accesses in the entire program */
  98         isl_union_map *may_write;
  99         /* All definite write accesses in the entire program */
 100         isl_union_map *must_write;
 101         /* All tagged definite kills in the entire program */
 102         isl_union_map *tagged_must_kill;
 103
 104         /* The set of inner array elements that may be preserved. */
 105         isl_union_set *may_persist;
 106
 107         /* Set of outer array elements that need to be copied in. */
 108         isl_union_set *copy_in;
 109         /* Set of outer array elements that need to be copied out. */
 110         isl_union_set *copy_out;
 111
 112         /* A mapping from all innermost arrays to their outer arrays. */
 113         isl_union_map *to_outer;
 114         /* A mapping from the outer arrays to all corresponding inner arrays. */
 115         isl_union_map *to_inner;
 116         /* A mapping from all intermediate arrays to their outer arrays,
 117          * including an identity mapping from the anoymous 1D space to itself.
 118          */
 119         isl_union_map *any_to_outer;
 120
 121         /* Order dependences on non-scalars. */
 122         isl_union_map *array_order;
 123
 124         /* Array of statements */
 125         int n_stmts;
 126         struct gpu_stmt *stmts;
 127
 128         int n_array;
 129         struct gpu_array_info *array;
 130 };
 131
 132 struct gpu_gen {
 133         isl_ctx *ctx;
 134         struct ppcg_options *options;
 135
 136         /* Callback for printing of AST in appropriate format. */
 137         __isl_give isl_printer *(*print)(__isl_take isl_printer *p,
 138                 struct gpu_prog *prog, __isl_keep isl_ast_node *tree,
 139                 struct gpu_types *types, void *user);
 140         void *print_user;
 141
 142         struct gpu_prog *prog;
 143         /* The generated AST. */
 144         isl_ast_node *tree;
 145
 146         /* The sequence of types for which a definition has been printed. */
 147         struct gpu_types types;
 148
 149         /* User specified tile, grid and block sizes for each kernel */
 150         isl_union_map *sizes;
 151
 152         /* Effectively used tile, grid and block sizes for each kernel */
 153         isl_union_map *used_sizes;
 154
 155         /* Identifier of current kernel. */
 156         int kernel_id;
 157         /* Pointer to the current kernel. */
 158         struct ppcg_kernel *kernel;
 159         /* Does the computed schedule exhibit any parallelism? */
 160         int any_parallelism;
 161
 162         /* First tile dimension. */
 163         int tile_first;
 164         /* Number of tile dimensions. */
 165         int tile_len;
 166         /* Number of initial parallel loops among tile dimensions. */
 167         int n_parallel;
 168
 169         /* Number of dimensions determining shared memory. */
 170         int shared_len;
 171
 172         /* Number of rows in the untiled schedule. */
 173         int untiled_len;
 174         /* Number of rows in the tiled schedule. */
 175         int tiled_len;
 176         /* Number of rows in schedule after tiling/wrapping over threads. */
 177         int thread_tiled_len;
 178
 179         /* Global untiled schedule. */
 180         isl_union_map *sched;
 181         /* Local (per kernel launch) tiled schedule. */
 182         isl_union_map *tiled_sched;
 183         /* Local schedule per shared memory tile loop iteration. */
 184         isl_union_map *local_sched;
 185
 186         /* Local tiled schedule projected onto the shared tile loops and
 187          * the loops that will be wrapped over the threads,
 188          * with all shared tile loops parametrized.
 189          */
 190         isl_union_map *shared_sched;
 191         /* Projects out the loops that will be wrapped over the threads
 192          * from shared_sched.
 193          */
 194         isl_union_map *shared_proj;
 195
 196         /* A map that takes the range of shared_sched as input,
 197          * wraps the appropriate loops over the threads and then projects
 198          * out these loops.
 199          */
 200         isl_map *privatization;
 201
 202         /* The array reference group corresponding to copy_sched. */
 203         struct gpu_array_ref_group *copy_group;
 204
 205         /* Is any array in the current kernel marked force_private? */
 206         int any_force_private;
 207
 208         /* First loop to unroll (or -1 if none) in the current part of the
 209          * schedule.
 210          */
 211         int first_unroll;
 212
 213         int n_grid;
 214         int n_block;
 215         /* Note: in the input file, the sizes of the grid and the blocks
 216          * are specified in the order x, y, z, but internally, the sizes
 217          * are stored in reverse order, so that the last element always
 218          * refers to the x dimension.
 219          */
 220         int grid_dim[2];
 221         int block_dim[3];
 222         int *tile_size;
 223 };
 224
 225 enum ppcg_kernel_access_type {
 226         ppcg_access_global,
 227         ppcg_access_shared,
 228         ppcg_access_private
 229 };
 230
 231 enum ppcg_kernel_stmt_type {
 232         ppcg_kernel_copy,
 233         ppcg_kernel_domain,
 234         ppcg_kernel_sync
 235 };
 236
 237 /* Representation of special statements, in particular copy statements
 238  * and __syncthreads statements, inside a kernel.
 239  *
 240  * type represents the kind of statement
 241  *
 242  *
 243  * for ppcg_kernel_copy statements we have
 244  *
 245  * read is set if the statement should copy data from global memory
 246  * to shared memory or registers.
 247  *
 248  * index expresses an access to the array element that needs to be copied
 249  * local_index expresses the corresponding element in the tile
 250  *
 251  * array refers to the original array being copied
 252  * local_array is a pointer to the appropriate element in the "array"
 253  *      array of the ppcg_kernel to which this copy access belongs
 254  *
 255  *
 256  * for ppcg_kernel_domain statements we have
 257  *
 258  * stmt is the corresponding input statement
 259  *
 260  * n_access is the number of accesses in stmt
 261  * access is an array of local information about the accesses
 262  */
 263 struct ppcg_kernel_stmt {
 264         enum ppcg_kernel_stmt_type type;
 265
 266         union {
 267                 struct {
 268                         int read;
 269                         isl_ast_expr *index;
 270                         isl_ast_expr *local_index;
 271                         struct gpu_array_info *array;
 272                         struct gpu_local_array_info *local_array;
 273                 } c;
 274                 struct {
 275                         struct gpu_stmt *stmt;
 276                         isl_id_to_ast_expr *ref2expr;
 277                 } d;
 278         } u;
 279 };
 280
 281 /* Representation of a local variable in a kernel.
 282  */
 283 struct ppcg_kernel_var {
 284         struct gpu_array_info *array;
 285         enum ppcg_kernel_access_type type;
 286         char *name;
 287         isl_vec *size;
 288 };
 289
 290 /* Representation of a kernel.
 291  *
 292  * id is the sequence number of the kernel.
 293  *
 294  * block_ids contains the list of block identifiers for this kernel.
 295  * thread_ids contains the list of thread identifiers for this kernel.
 296  *
 297  * the first n_block elements of block_dim represent the effective size
 298  * of the block.
 299  *
 300  * grid_size reflects the effective grid size.
 301  *
 302  * context is a parametric set containing the values of the parameters
 303  * for which this kernel may be run.
 304  *
 305  * arrays is the set of possibly accessed outer array elements.
 306  *
 307  * space is the schedule space of the AST context.  That is, it represents
 308  * the loops of the generated host code containing the kernel launch.
 309  *
 310  * n_array is the total number of arrays in the input program and also
 311  * the number of element in the array array.
 312  * array contains information about each array that is local
 313  * to the current kernel.  If an array is not used in a kernel,
 314  * then the corresponding entry does not contain any information.
 315  */
 316 struct ppcg_kernel {
 317         isl_ctx *ctx;
 318         struct ppcg_options *options;
 319
 320         int id;
 321
 322         isl_id_list *block_ids;
 323         isl_id_list *thread_ids;
 324
 325         int n_block;
 326         int block_dim[3];
 327
 328         isl_multi_pw_aff *grid_size;
 329         isl_set *context;
 330
 331         isl_union_set *arrays;
 332
 333         isl_space *space;
 334
 335         int n_array;
 336         struct gpu_local_array_info *array;
 337
 338         int n_var;
 339         struct ppcg_kernel_var *var;
 340
 341         isl_ast_node *tree;
 342 };
 343
 344 int gpu_array_is_scalar(struct gpu_array_info *array);
 345 int gpu_array_is_read_only_scalar(struct gpu_array_info *array);
 346 __isl_give isl_set *gpu_array_positive_size_guard(struct gpu_array_info *array);
 347
 348 struct gpu_prog *gpu_prog_alloc(isl_ctx *ctx, struct ppcg_scop *scop);
 349 void *gpu_prog_free(struct gpu_prog *prog);
 350
 351 int generate_gpu(isl_ctx *ctx, const char *input, FILE *out,
 352         struct ppcg_options *options,
 353         __isl_give isl_printer *(*print)(__isl_take isl_printer *p,
 354                 struct gpu_prog *prog, __isl_keep isl_ast_node *tree,
 355                 struct gpu_types *types, void *user), void *user);
 356
 357 #endif