1 ; RUN: opt %loadPolly -polly-scops -analyze -polly-allow-modref-calls \
2 ; RUN: -polly-invariant-load-hoisting=true \
3 ; RUN: < %s | FileCheck %s
4 ; RUN: opt %loadPolly -polly-scops -polly-allow-nonaffine -analyze \
5 ; RUN: -polly-invariant-load-hoisting=true \
6 ; RUN: -polly-allow-modref-calls < %s | FileCheck %s --check-prefix=NONAFFINE
8 ; TODO: We should delinearize the accesses despite the use in a call to a
9 ; readonly function. For now we verify we do not delinearize them though.
11 ; CHECK: Function: ham
12 ; CHECK-NEXT: Region: %bb12---%bb28
13 ; CHECK-NEXT: Max Loop Depth: 1
14 ; CHECK-NEXT: Invariant Accesses: {
15 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
16 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> MemRef_arg1[0] };
17 ; CHECK-NEXT: Execution Context: [tmp14, p_1] -> { : }
19 ; CHECK-NEXT: Context:
20 ; CHECK-NEXT: [tmp14, p_1] -> { : -9223372036854775808 <= tmp14 <= 9223372036854775807 and -9223372036854775808 <= p_1 <= 9223372036854775807 }
21 ; CHECK-NEXT: Assumed Context:
22 ; CHECK-NEXT: [tmp14, p_1] -> { : }
23 ; CHECK-NEXT: Invalid Context:
24 ; CHECK-NEXT: [tmp14, p_1] -> { : tmp14 > 0 and (p_1 <= -1152921504606846977 or tmp14 >= 1152921504606846977 or p_1 >= 1152921504606846977 - tmp14) }
25 ; CHECK-NEXT: p0: %tmp14
26 ; CHECK-NEXT: p1: {0,+,(0 smax %tmp)}<%bb12>
27 ; CHECK-NEXT: Arrays {
28 ; CHECK-NEXT: i64 MemRef_arg1[*]; // Element size 8
29 ; CHECK-NEXT: i64 MemRef_tmp13; // Element size 8
30 ; CHECK-NEXT: double MemRef_arg4[*]; // Element size 8
32 ; CHECK-NEXT: Arrays (Bounds as pw_affs) {
33 ; CHECK-NEXT: i64 MemRef_arg1[*]; // Element size 8
34 ; CHECK-NEXT: i64 MemRef_tmp13; // Element size 8
35 ; CHECK-NEXT: double MemRef_arg4[*]; // Element size 8
37 ; CHECK-NEXT: Alias Groups (0):
39 ; CHECK-NEXT: Statements {
40 ; CHECK-NEXT: Stmt_bb12
41 ; CHECK-NEXT: Domain :=
42 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] };
43 ; CHECK-NEXT: Schedule :=
44 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> [0, 0] };
45 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
46 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> MemRef_tmp13[] };
47 ; CHECK-NEXT: Stmt_bb17
48 ; CHECK-NEXT: Domain :=
49 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] : 0 <= i0 < tmp14 };
50 ; CHECK-NEXT: Schedule :=
51 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> [1, i0] };
52 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
53 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> MemRef_arg4[p_1 + i0] };
54 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
55 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> MemRef_arg1[o0] };
56 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
57 ; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> MemRef_arg4[o0] };
60 ; NONAFFINE: Function: ham
61 ; NONAFFINE-NEXT: Region: %bb5---%bb32
62 ; NONAFFINE-NEXT: Max Loop Depth: 2
63 ; NONAFFINE-NEXT: Invariant Accesses: {
64 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
65 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_arg[0] };
66 ; NONAFFINE-NEXT: Execution Context: [tmp9, tmp14] -> { : }
67 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
68 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb12[i0] -> MemRef_arg1[0] };
69 ; NONAFFINE-NEXT: Execution Context: [tmp9, tmp14] -> { : }
71 ; NONAFFINE-NEXT: Context:
72 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { : -9223372036854775808 <= tmp9 <= 9223372036854775807 and -9223372036854775808 <= tmp14 <= 9223372036854775807 }
73 ; NONAFFINE-NEXT: Assumed Context:
74 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { : }
75 ; NONAFFINE-NEXT: Invalid Context:
76 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { : 1 = 0 }
77 ; NONAFFINE-NEXT: p0: %tmp9
78 ; NONAFFINE-NEXT: p1: %tmp14
79 ; NONAFFINE-NEXT: Arrays {
80 ; NONAFFINE-NEXT: i64 MemRef_arg[*]; // Element size 8
81 ; NONAFFINE-NEXT: i64 MemRef_arg1[*]; // Element size 8
82 ; NONAFFINE-NEXT: i64 MemRef_tmp7; // Element size 8
83 ; NONAFFINE-NEXT: i64 MemRef_tmp8; // Element size 8
84 ; NONAFFINE-NEXT: double MemRef_arg4[*]; // Element size 8
86 ; NONAFFINE-NEXT: Arrays (Bounds as pw_affs) {
87 ; NONAFFINE-NEXT: i64 MemRef_arg[*]; // Element size 8
88 ; NONAFFINE-NEXT: i64 MemRef_arg1[*]; // Element size 8
89 ; NONAFFINE-NEXT: i64 MemRef_tmp7; // Element size 8
90 ; NONAFFINE-NEXT: i64 MemRef_tmp8; // Element size 8
91 ; NONAFFINE-NEXT: double MemRef_arg4[*]; // Element size 8
93 ; NONAFFINE-NEXT: Alias Groups (0):
95 ; NONAFFINE-NEXT: Statements {
96 ; NONAFFINE-NEXT: Stmt_bb5
97 ; NONAFFINE-NEXT: Domain :=
98 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] };
99 ; NONAFFINE-NEXT: Schedule :=
100 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> [0, 0, 0] };
101 ; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
102 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_tmp7[] };
103 ; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
104 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_tmp8[] };
105 ; NONAFFINE-NEXT: Stmt_bb17
106 ; NONAFFINE-NEXT: Domain :=
107 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] : 0 <= i0 < tmp9 and 0 <= i1 < tmp14 };
108 ; NONAFFINE-NEXT: Schedule :=
109 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> [1, i0, i1] };
110 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
111 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp7[] };
112 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
113 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp8[] };
114 ; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
115 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
116 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
117 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg[o0] };
118 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
119 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg1[o0] };
120 ; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
121 ; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
125 target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
127 define void @ham(i64* noalias %arg, i64* noalias %arg1, i64* noalias %arg2, i64* noalias %arg3, [0 x double]* noalias %arg4) unnamed_addr {
132 %tmp = load i64, i64* %arg1, align 8
133 %tmp6 = icmp slt i64 %tmp, 0
134 %tmp7 = select i1 %tmp6, i64 0, i64 %tmp
135 %tmp8 = xor i64 %tmp7, -1
136 %tmp9 = load i64, i64* %arg, align 8
137 %tmp10 = icmp sgt i64 %tmp9, 0
138 br i1 %tmp10, label %bb11, label %bb32
143 bb12: ; preds = %bb28, %bb11
144 %tmp13 = phi i64 [ %tmp30, %bb28 ], [ 1, %bb11 ]
145 %tmp14 = load i64, i64* %arg1, align 8
146 %tmp15 = icmp sgt i64 %tmp14, 0
147 br i1 %tmp15, label %bb16, label %bb28
149 bb16: ; preds = %bb12
152 bb17: ; preds = %bb17, %bb16
153 %tmp18 = phi i64 [ %tmp26, %bb17 ], [ 1, %bb16 ]
154 %tmp19 = mul i64 %tmp13, %tmp7
155 %tmp20 = add i64 %tmp19, %tmp8
156 %tmp21 = add i64 %tmp20, %tmp18
157 %tmp22 = add i64 %tmp18, %tmp13
158 %tmp23 = sitofp i64 %tmp22 to double
159 %tmp24 = getelementptr [0 x double], [0 x double]* %arg4, i64 0, i64 %tmp21
160 %call = call double @func(double* %tmp24) #2
161 %sum = fadd double %call, %tmp23
162 store double %sum, double* %tmp24, align 8
163 %tmp25 = icmp eq i64 %tmp18, %tmp14
164 %tmp26 = add i64 %tmp18, 1
165 br i1 %tmp25, label %bb27, label %bb17
167 bb27: ; preds = %bb17
170 bb28: ; preds = %bb27, %bb12
171 %tmp29 = icmp eq i64 %tmp13, %tmp9
172 %tmp30 = add i64 %tmp13, 1
173 br i1 %tmp29, label %bb31, label %bb12
175 bb31: ; preds = %bb28
178 bb32: ; preds = %bb31, %bb5
182 declare double @func(double*) #1
184 attributes #1 = { nounwind readonly }