1 //===--------- SCEVAffinator.cpp - Create Scops from LLVM IR -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Create a polyhedral description for a SCEV value.
12 //===----------------------------------------------------------------------===//
14 #include "polly/Support/SCEVAffinator.h"
15 #include "polly/Options.h"
16 #include "polly/ScopInfo.h"
17 #include "polly/Support/GICHelper.h"
18 #include "polly/Support/SCEVValidator.h"
19 #include "polly/Support/ScopHelper.h"
21 #include "isl/local_space.h"
26 using namespace polly
;
28 static cl::opt
<bool> IgnoreIntegerWrapping(
29 "polly-ignore-integer-wrapping",
30 cl::desc("Do not build run-time checks to proof absence of integer "
32 cl::Hidden
, cl::ZeroOrMore
, cl::init(false), cl::cat(PollyCategory
));
34 // The maximal number of basic sets we allow during the construction of a
35 // piecewise affine function. More complex ones will result in very high
37 static int const MaxDisjunctionsInPwAff
= 100;
39 // The maximal number of bits for which a general expression is modeled
41 static unsigned const MaxSmallBitWidth
= 7;
43 /// Add the number of basic sets in @p Domain to @p User
44 static isl_stat
addNumBasicSets(__isl_take isl_set
*Domain
,
45 __isl_take isl_aff
*Aff
, void *User
) {
46 auto *NumBasicSets
= static_cast<unsigned *>(User
);
47 *NumBasicSets
+= isl_set_n_basic_set(Domain
);
53 /// Helper to free a PWACtx object.
54 static void freePWACtx(__isl_take PWACtx
&PWAC
) {
55 isl_pw_aff_free(PWAC
.first
);
56 isl_set_free(PWAC
.second
);
59 /// Helper to copy a PWACtx object.
60 static __isl_give PWACtx
copyPWACtx(const __isl_keep PWACtx
&PWAC
) {
61 return std::make_pair(isl_pw_aff_copy(PWAC
.first
), isl_set_copy(PWAC
.second
));
64 /// Determine if @p PWAC is too complex to continue.
66 /// Note that @p PWAC will be "free" (deallocated) if this function returns
67 /// true, but not if this function returns false.
68 static bool isTooComplex(PWACtx
&PWAC
) {
69 unsigned NumBasicSets
= 0;
70 isl_pw_aff_foreach_piece(PWAC
.first
, addNumBasicSets
, &NumBasicSets
);
71 if (NumBasicSets
<= MaxDisjunctionsInPwAff
)
77 /// Return the flag describing the possible wrapping of @p Expr.
78 static SCEV::NoWrapFlags
getNoWrapFlags(const SCEV
*Expr
) {
79 if (auto *NAry
= dyn_cast
<SCEVNAryExpr
>(Expr
))
80 return NAry
->getNoWrapFlags();
81 return SCEV::NoWrapMask
;
84 static void combine(__isl_keep PWACtx
&PWAC0
, const __isl_take PWACtx
&PWAC1
,
85 isl_pw_aff
*(Fn
)(isl_pw_aff
*, isl_pw_aff
*)) {
86 PWAC0
.first
= Fn(PWAC0
.first
, PWAC1
.first
);
87 PWAC0
.second
= isl_set_union(PWAC0
.second
, PWAC1
.second
);
90 static __isl_give isl_pw_aff
*getWidthExpValOnDomain(unsigned Width
,
91 __isl_take isl_set
*Dom
) {
92 auto *Ctx
= isl_set_get_ctx(Dom
);
93 auto *WidthVal
= isl_val_int_from_ui(Ctx
, Width
);
94 auto *ExpVal
= isl_val_2exp(WidthVal
);
95 return isl_pw_aff_val_on_domain(Dom
, ExpVal
);
98 SCEVAffinator::SCEVAffinator(Scop
*S
, LoopInfo
&LI
)
99 : S(S
), Ctx(S
->getIslCtx()), SE(*S
->getSE()), LI(LI
),
100 TD(S
->getFunction().getParent()->getDataLayout()) {}
102 SCEVAffinator::~SCEVAffinator() {
103 for (auto &CachedPair
: CachedExpressions
)
104 freePWACtx(CachedPair
.second
);
107 Loop
*SCEVAffinator::getScope() { return BB
? LI
.getLoopFor(BB
) : nullptr; }
109 void SCEVAffinator::interpretAsUnsigned(__isl_keep PWACtx
&PWAC
,
111 auto *PWA
= PWAC
.first
;
112 auto *NonNegDom
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(PWA
));
113 auto *NonNegPWA
= isl_pw_aff_intersect_domain(isl_pw_aff_copy(PWA
),
114 isl_set_copy(NonNegDom
));
115 auto *ExpPWA
= getWidthExpValOnDomain(Width
, isl_set_complement(NonNegDom
));
116 PWAC
.first
= isl_pw_aff_union_add(NonNegPWA
, isl_pw_aff_add(PWA
, ExpPWA
));
119 void SCEVAffinator::takeNonNegativeAssumption(PWACtx
&PWAC
) {
120 auto *NegPWA
= isl_pw_aff_neg(isl_pw_aff_copy(PWAC
.first
));
121 auto *NegDom
= isl_pw_aff_pos_set(NegPWA
);
122 PWAC
.second
= isl_set_union(PWAC
.second
, isl_set_copy(NegDom
));
123 auto *Restriction
= BB
? NegDom
: isl_set_params(NegDom
);
124 auto DL
= BB
? BB
->getTerminator()->getDebugLoc() : DebugLoc();
125 S
->recordAssumption(UNSIGNED
, Restriction
, DL
, AS_RESTRICTION
, BB
);
128 __isl_give PWACtx
SCEVAffinator::getPWACtxFromPWA(__isl_take isl_pw_aff
*PWA
) {
129 return std::make_pair(
130 PWA
, isl_set_empty(isl_space_set_alloc(Ctx
, 0, NumIterators
)));
133 __isl_give PWACtx
SCEVAffinator::getPwAff(const SCEV
*Expr
, BasicBlock
*BB
) {
137 auto *DC
= S
->getDomainConditions(BB
);
138 NumIterators
= isl_set_n_dim(DC
);
146 __isl_give PWACtx
SCEVAffinator::checkForWrapping(const SCEV
*Expr
,
148 // If the SCEV flags do contain NSW (no signed wrap) then PWA already
149 // represents Expr in modulo semantic (it is not allowed to overflow), thus we
150 // are done. Otherwise, we will compute:
151 // PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1)
152 // whereas n is the number of bits of the Expr, hence:
153 // n = bitwidth(ExprType)
155 if (IgnoreIntegerWrapping
|| (getNoWrapFlags(Expr
) & SCEV::FlagNSW
))
158 auto *PWA
= PWAC
.first
;
159 auto *PWAMod
= addModuloSemantic(isl_pw_aff_copy(PWA
), Expr
->getType());
160 auto *NotEqualSet
= isl_pw_aff_ne_set(isl_pw_aff_copy(PWA
), PWAMod
);
161 PWAC
.second
= isl_set_union(PWAC
.second
, isl_set_copy(NotEqualSet
));
162 PWAC
.second
= isl_set_coalesce(PWAC
.second
);
164 const DebugLoc
&Loc
= BB
? BB
->getTerminator()->getDebugLoc() : DebugLoc();
165 NotEqualSet
= BB
? NotEqualSet
: isl_set_params(NotEqualSet
);
166 NotEqualSet
= isl_set_coalesce(NotEqualSet
);
168 if (isl_set_is_empty(NotEqualSet
))
169 isl_set_free(NotEqualSet
);
171 S
->recordAssumption(WRAPPING
, NotEqualSet
, Loc
, AS_RESTRICTION
, BB
);
176 __isl_give isl_pw_aff
*
177 SCEVAffinator::addModuloSemantic(__isl_take isl_pw_aff
*PWA
,
178 Type
*ExprType
) const {
179 unsigned Width
= TD
.getTypeSizeInBits(ExprType
);
180 isl_ctx
*Ctx
= isl_pw_aff_get_ctx(PWA
);
182 isl_val
*ModVal
= isl_val_int_from_ui(Ctx
, Width
);
183 ModVal
= isl_val_2exp(ModVal
);
185 isl_set
*Domain
= isl_pw_aff_domain(isl_pw_aff_copy(PWA
));
186 isl_pw_aff
*AddPW
= getWidthExpValOnDomain(Width
- 1, Domain
);
188 PWA
= isl_pw_aff_add(PWA
, isl_pw_aff_copy(AddPW
));
189 PWA
= isl_pw_aff_mod_val(PWA
, ModVal
);
190 PWA
= isl_pw_aff_sub(PWA
, AddPW
);
195 bool SCEVAffinator::hasNSWAddRecForLoop(Loop
*L
) const {
196 for (const auto &CachedPair
: CachedExpressions
) {
197 auto *AddRec
= dyn_cast
<SCEVAddRecExpr
>(CachedPair
.first
.first
);
200 if (AddRec
->getLoop() != L
)
202 if (AddRec
->getNoWrapFlags() & SCEV::FlagNSW
)
209 bool SCEVAffinator::computeModuloForExpr(const SCEV
*Expr
) {
210 unsigned Width
= TD
.getTypeSizeInBits(Expr
->getType());
211 // We assume nsw expressions never overflow.
212 if (auto *NAry
= dyn_cast
<SCEVNAryExpr
>(Expr
))
213 if (NAry
->getNoWrapFlags() & SCEV::FlagNSW
)
215 return Width
<= MaxSmallBitWidth
;
218 __isl_give PWACtx
SCEVAffinator::visit(const SCEV
*Expr
) {
220 auto Key
= std::make_pair(Expr
, BB
);
221 PWACtx PWAC
= CachedExpressions
[Key
];
223 return copyPWACtx(PWAC
);
225 auto ConstantAndLeftOverPair
= extractConstantFactor(Expr
, SE
);
226 auto *Factor
= ConstantAndLeftOverPair
.first
;
227 Expr
= ConstantAndLeftOverPair
.second
;
229 auto *Scope
= getScope();
230 S
->addParams(getParamsInAffineExpr(&S
->getRegion(), Scope
, Expr
, SE
));
232 // In case the scev is a valid parameter, we do not further analyze this
233 // expression, but create a new parameter in the isl_pw_aff. This allows us
234 // to treat subexpressions that we cannot translate into an piecewise affine
235 // expression, as constant parameters of the piecewise affine expression.
236 if (isl_id
*Id
= S
->getIdForParam(Expr
)) {
237 isl_space
*Space
= isl_space_set_alloc(Ctx
, 1, NumIterators
);
238 Space
= isl_space_set_dim_id(Space
, isl_dim_param
, 0, Id
);
240 isl_set
*Domain
= isl_set_universe(isl_space_copy(Space
));
241 isl_aff
*Affine
= isl_aff_zero_on_domain(isl_local_space_from_space(Space
));
242 Affine
= isl_aff_add_coefficient_si(Affine
, isl_dim_param
, 0, 1);
244 PWAC
= getPWACtxFromPWA(isl_pw_aff_alloc(Domain
, Affine
));
246 PWAC
= SCEVVisitor
<SCEVAffinator
, PWACtx
>::visit(Expr
);
247 if (computeModuloForExpr(Expr
))
248 PWAC
.first
= addModuloSemantic(PWAC
.first
, Expr
->getType());
250 PWAC
= checkForWrapping(Expr
, PWAC
);
253 if (!Factor
->getType()->isIntegerTy(1)) {
254 combine(PWAC
, visitConstant(Factor
), isl_pw_aff_mul
);
255 if (computeModuloForExpr(Key
.first
))
256 PWAC
.first
= addModuloSemantic(PWAC
.first
, Expr
->getType());
259 // For compile time reasons we need to simplify the PWAC before we cache and
261 PWAC
.first
= isl_pw_aff_coalesce(PWAC
.first
);
262 if (!computeModuloForExpr(Key
.first
))
263 PWAC
= checkForWrapping(Key
.first
, PWAC
);
265 CachedExpressions
[Key
] = copyPWACtx(PWAC
);
269 __isl_give PWACtx
SCEVAffinator::visitConstant(const SCEVConstant
*Expr
) {
270 ConstantInt
*Value
= Expr
->getValue();
273 // LLVM does not define if an integer value is interpreted as a signed or
274 // unsigned value. Hence, without further information, it is unknown how
275 // this value needs to be converted to GMP. At the moment, we only support
276 // signed operations. So we just interpret it as signed. Later, there are
279 // 1. We always interpret any value as signed and convert the values on
281 // 2. We pass down the signedness of the calculation and use it to interpret
282 // this constant correctly.
283 v
= isl_valFromAPInt(Ctx
, Value
->getValue(), /* isSigned */ true);
285 isl_space
*Space
= isl_space_set_alloc(Ctx
, 0, NumIterators
);
286 isl_local_space
*ls
= isl_local_space_from_space(Space
);
287 return getPWACtxFromPWA(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls
, v
)));
291 SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr
*Expr
) {
292 // Truncate operations are basically modulo operations, thus we can
293 // model them that way. However, for large types we assume the operand
294 // to fit in the new type size instead of introducing a modulo with a very
297 auto *Op
= Expr
->getOperand();
298 auto OpPWAC
= visit(Op
);
300 unsigned Width
= TD
.getTypeSizeInBits(Expr
->getType());
302 if (computeModuloForExpr(Expr
))
305 auto *Dom
= isl_pw_aff_domain(isl_pw_aff_copy(OpPWAC
.first
));
306 auto *ExpPWA
= getWidthExpValOnDomain(Width
- 1, Dom
);
308 isl_pw_aff_ge_set(isl_pw_aff_copy(OpPWAC
.first
), isl_pw_aff_copy(ExpPWA
));
310 isl_pw_aff_lt_set(isl_pw_aff_copy(OpPWAC
.first
), isl_pw_aff_neg(ExpPWA
));
311 auto *OutOfBoundsDom
= isl_set_union(SmallerDom
, GreaterDom
);
312 OpPWAC
.second
= isl_set_union(OpPWAC
.second
, isl_set_copy(OutOfBoundsDom
));
315 assert(isl_set_dim(OutOfBoundsDom
, isl_dim_set
) == 0 &&
316 "Expected a zero dimensional set for non-basic-block domains");
317 OutOfBoundsDom
= isl_set_params(OutOfBoundsDom
);
320 S
->recordAssumption(UNSIGNED
, OutOfBoundsDom
, DebugLoc(), AS_RESTRICTION
, BB
);
326 SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr
*Expr
) {
327 // A zero-extended value can be interpreted as a piecewise defined signed
328 // value. If the value was non-negative it stays the same, otherwise it
329 // is the sum of the original value and 2^n where n is the bit-width of
330 // the original (or operand) type. Examples:
331 // zext i8 127 to i32 -> { [127] }
332 // zext i8 -1 to i32 -> { [256 + (-1)] } = { [255] }
333 // zext i8 %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 }
335 // However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a
336 // truncate) to represent some forms of modulo computation. The left-hand side
337 // of the condition in the code below would result in the SCEV
338 // "zext i1 <false, +, true>for.body" which is just another description
339 // of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0".
341 // for (i = 0; i < N; i++)
342 // if (i & 1 != 0 /* == i % 2 */)
343 // /* do something */
345 // If we do not make the modulo explicit but only use the mechanism described
346 // above we will get the very restrictive assumption "N < 3", because for all
347 // values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap.
348 // Alternatively, we can make the modulo in the operand explicit in the
349 // resulting piecewise function and thereby avoid the assumption on N. For the
350 // example this would result in the following piecewise affine function:
351 // { [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0;
352 // [i0] -> [(0)] : 2*floor((i0)/2) = i0 }
353 // To this end we can first determine if the (immediate) operand of the
354 // zero-extend can wrap and, in case it might, we will use explicit modulo
355 // semantic to compute the result instead of emitting non-wrapping
358 // Note that operands with large bit-widths are less likely to be negative
359 // because it would result in a very large access offset or loop bound after
360 // the zero-extend. To this end one can optimistically assume the operand to
361 // be positive and avoid the piecewise definition if the bit-width is bigger
362 // than some threshold (here MaxZextSmallBitWidth).
364 // We choose to go with a hybrid solution of all modeling techniques described
365 // above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the
366 // wrapping explicitly and use a piecewise defined function. However, if the
367 // bit-width is bigger than MaxZextSmallBitWidth we will employ overflow
368 // assumptions and assume the "former negative" piece will not exist.
370 auto *Op
= Expr
->getOperand();
371 auto OpPWAC
= visit(Op
);
373 // If the width is to big we assume the negative part does not occur.
374 if (!computeModuloForExpr(Op
)) {
375 takeNonNegativeAssumption(OpPWAC
);
379 // If the width is small build the piece for the non-negative part and
380 // the one for the negative part and unify them.
381 unsigned Width
= TD
.getTypeSizeInBits(Op
->getType());
382 interpretAsUnsigned(OpPWAC
, Width
);
387 SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr
*Expr
) {
388 // As all values are represented as signed, a sign extension is a noop.
389 return visit(Expr
->getOperand());
392 __isl_give PWACtx
SCEVAffinator::visitAddExpr(const SCEVAddExpr
*Expr
) {
393 PWACtx Sum
= visit(Expr
->getOperand(0));
395 for (int i
= 1, e
= Expr
->getNumOperands(); i
< e
; ++i
) {
396 combine(Sum
, visit(Expr
->getOperand(i
)), isl_pw_aff_add
);
397 if (isTooComplex(Sum
))
398 return std::make_pair(nullptr, nullptr);
404 __isl_give PWACtx
SCEVAffinator::visitMulExpr(const SCEVMulExpr
*Expr
) {
405 PWACtx Prod
= visit(Expr
->getOperand(0));
407 for (int i
= 1, e
= Expr
->getNumOperands(); i
< e
; ++i
) {
408 combine(Prod
, visit(Expr
->getOperand(i
)), isl_pw_aff_mul
);
409 if (isTooComplex(Prod
))
410 return std::make_pair(nullptr, nullptr);
416 __isl_give PWACtx
SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr
*Expr
) {
417 assert(Expr
->isAffine() && "Only affine AddRecurrences allowed");
419 auto Flags
= Expr
->getNoWrapFlags();
421 // Directly generate isl_pw_aff for Expr if 'start' is zero.
422 if (Expr
->getStart()->isZero()) {
423 assert(S
->contains(Expr
->getLoop()) &&
424 "Scop does not contain the loop referenced in this AddRec");
426 PWACtx Step
= visit(Expr
->getOperand(1));
427 isl_space
*Space
= isl_space_set_alloc(Ctx
, 0, NumIterators
);
428 isl_local_space
*LocalSpace
= isl_local_space_from_space(Space
);
430 unsigned loopDimension
= S
->getRelativeLoopDepth(Expr
->getLoop());
432 isl_aff
*LAff
= isl_aff_set_coefficient_si(
433 isl_aff_zero_on_domain(LocalSpace
), isl_dim_in
, loopDimension
, 1);
434 isl_pw_aff
*LPwAff
= isl_pw_aff_from_aff(LAff
);
436 Step
.first
= isl_pw_aff_mul(Step
.first
, LPwAff
);
440 // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}'
441 // if 'start' is not zero.
442 // TODO: Using the original SCEV no-wrap flags is not always safe, however
443 // as our code generation is reordering the expression anyway it doesn't
445 const SCEV
*ZeroStartExpr
=
446 SE
.getAddRecExpr(SE
.getConstant(Expr
->getStart()->getType(), 0),
447 Expr
->getStepRecurrence(SE
), Expr
->getLoop(), Flags
);
449 PWACtx Result
= visit(ZeroStartExpr
);
450 PWACtx Start
= visit(Expr
->getStart());
451 combine(Result
, Start
, isl_pw_aff_add
);
455 __isl_give PWACtx
SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr
*Expr
) {
456 PWACtx Max
= visit(Expr
->getOperand(0));
458 for (int i
= 1, e
= Expr
->getNumOperands(); i
< e
; ++i
) {
459 combine(Max
, visit(Expr
->getOperand(i
)), isl_pw_aff_max
);
460 if (isTooComplex(Max
))
461 return std::make_pair(nullptr, nullptr);
467 __isl_give PWACtx
SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr
*Expr
) {
468 llvm_unreachable("SCEVUMaxExpr not yet supported");
471 __isl_give PWACtx
SCEVAffinator::visitUDivExpr(const SCEVUDivExpr
*Expr
) {
472 // The handling of unsigned division is basically the same as for signed
473 // division, except the interpretation of the operands. As the divisor
474 // has to be constant in both cases we can simply interpret it as an
475 // unsigned value without additional complexity in the representation.
476 // For the dividend we could choose from the different representation
477 // schemes introduced for zero-extend operations but for now we will
478 // simply use an assumption.
479 auto *Dividend
= Expr
->getLHS();
480 auto *Divisor
= Expr
->getRHS();
481 assert(isa
<SCEVConstant
>(Divisor
) &&
482 "UDiv is no parameter but has a non-constant RHS.");
484 auto DividendPWAC
= visit(Dividend
);
485 auto DivisorPWAC
= visit(Divisor
);
487 if (SE
.isKnownNegative(Divisor
)) {
488 // Interpret negative divisors unsigned. This is a special case of the
489 // piece-wise defined value described for zero-extends as we already know
490 // the actual value of the constant divisor.
491 unsigned Width
= TD
.getTypeSizeInBits(Expr
->getType());
492 auto *DivisorDom
= isl_pw_aff_domain(isl_pw_aff_copy(DivisorPWAC
.first
));
493 auto *WidthExpPWA
= getWidthExpValOnDomain(Width
, DivisorDom
);
494 DivisorPWAC
.first
= isl_pw_aff_add(DivisorPWAC
.first
, WidthExpPWA
);
497 // TODO: One can represent the dividend as piece-wise function to be more
498 // precise but therefor a heuristic is needed.
500 // Assume a non-negative dividend.
501 takeNonNegativeAssumption(DividendPWAC
);
503 combine(DividendPWAC
, DivisorPWAC
, isl_pw_aff_div
);
504 DividendPWAC
.first
= isl_pw_aff_floor(DividendPWAC
.first
);
509 __isl_give PWACtx
SCEVAffinator::visitSDivInstruction(Instruction
*SDiv
) {
510 assert(SDiv
->getOpcode() == Instruction::SDiv
&& "Assumed SDiv instruction!");
512 auto *Scope
= getScope();
513 auto *Divisor
= SDiv
->getOperand(1);
514 auto *DivisorSCEV
= SE
.getSCEVAtScope(Divisor
, Scope
);
515 auto DivisorPWAC
= visit(DivisorSCEV
);
516 assert(isa
<SCEVConstant
>(DivisorSCEV
) &&
517 "SDiv is no parameter but has a non-constant RHS.");
519 auto *Dividend
= SDiv
->getOperand(0);
520 auto *DividendSCEV
= SE
.getSCEVAtScope(Dividend
, Scope
);
521 auto DividendPWAC
= visit(DividendSCEV
);
522 combine(DividendPWAC
, DivisorPWAC
, isl_pw_aff_tdiv_q
);
526 __isl_give PWACtx
SCEVAffinator::visitSRemInstruction(Instruction
*SRem
) {
527 assert(SRem
->getOpcode() == Instruction::SRem
&& "Assumed SRem instruction!");
529 auto *Scope
= getScope();
530 auto *Divisor
= SRem
->getOperand(1);
531 auto *DivisorSCEV
= SE
.getSCEVAtScope(Divisor
, Scope
);
532 auto DivisorPWAC
= visit(DivisorSCEV
);
533 assert(isa
<ConstantInt
>(Divisor
) &&
534 "SRem is no parameter but has a non-constant RHS.");
536 auto *Dividend
= SRem
->getOperand(0);
537 auto *DividendSCEV
= SE
.getSCEVAtScope(Dividend
, Scope
);
538 auto DividendPWAC
= visit(DividendSCEV
);
539 combine(DividendPWAC
, DivisorPWAC
, isl_pw_aff_tdiv_r
);
543 __isl_give PWACtx
SCEVAffinator::visitUnknown(const SCEVUnknown
*Expr
) {
544 if (Instruction
*I
= dyn_cast
<Instruction
>(Expr
->getValue())) {
545 switch (I
->getOpcode()) {
546 case Instruction::IntToPtr
:
547 return visit(SE
.getSCEVAtScope(I
->getOperand(0), getScope()));
548 case Instruction::PtrToInt
:
549 return visit(SE
.getSCEVAtScope(I
->getOperand(0), getScope()));
550 case Instruction::SDiv
:
551 return visitSDivInstruction(I
);
552 case Instruction::SRem
:
553 return visitSRemInstruction(I
);
555 break; // Fall through.
560 "Unknowns SCEV was neither parameter nor a valid instruction.");