1 ; RUN: opt %loadPolly -polly-detect-unprofitable -basicaa -polly-prepare -polly-scops -analyze < %s | FileCheck %s
3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4 target triple = "x86_64-linux-gnu"
6 ;long f(long a[], long n) {
9 ; for (i = 1; i < n; ++i) {
10 ; a[i] = k * a[i - 1];
11 ; k = a[i + 3] + a[2 * i];
16 define i64 @f(i64* nocapture %a, i64 %n) nounwind {
18 %0 = icmp sgt i64 %n, 1 ; <i1> [#uses=1]
19 br i1 %0, label %bb.nph, label %bb2
21 bb.nph: ; preds = %entry
22 %tmp = add i64 %n, -1 ; <i64> [#uses=1]
23 %.pre = load i64* %a, align 8 ; <i64> [#uses=1]
26 bb: ; preds = %bb, %bb.nph
27 %1 = phi i64 [ %.pre, %bb.nph ], [ %2, %bb ] ; <i64> [#uses=1]
28 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ] ; <i64> [#uses=3]
29 %k.05 = phi i64 [ 1, %bb.nph ], [ %5, %bb ] ; <i64> [#uses=1]
30 %tmp6 = add i64 %indvar, 1 ; <i64> [#uses=3]
31 %scevgep = getelementptr i64, i64* %a, i64 %tmp6 ; <i64*> [#uses=1]
32 %2 = mul nsw i64 %1, %k.05 ; <i64> [#uses=2]
33 store i64 %2, i64* %scevgep, align 8
34 %tmp7 = shl i64 %indvar, 1 ; <i64> [#uses=1]
35 %tmp11 = add i64 %indvar, 4 ; <i64> [#uses=1]
36 %tmp8 = add i64 %tmp7, 2 ; <i64> [#uses=1]
37 %scevgep12 = getelementptr i64, i64* %a, i64 %tmp11 ; <i64*> [#uses=1]
38 %scevgep9 = getelementptr i64, i64* %a, i64 %tmp8 ; <i64*> [#uses=1]
39 %3 = load i64* %scevgep9, align 8 ; <i64> [#uses=1]
40 %4 = load i64* %scevgep12, align 8 ; <i64> [#uses=1]
41 %5 = add nsw i64 %3, %4 ; <i64> [#uses=1]
42 %exitcond = icmp eq i64 %tmp6, %tmp ; <i1> [#uses=1]
43 br i1 %exitcond, label %bb2, label %bb
45 bb2: ; preds = %bb, %entry
54 ; CHECK: [n] -> { Stmt_bb_nph[] : n >= 2 };
55 ; CHECK: Scattering :=
56 ; CHECK: [n] -> { Stmt_bb_nph[] -> [0, 0] };
57 ; CHECK: ReadAccess :=
58 ; CHECK: [n] -> { Stmt_bb_nph[] -> MemRef_a[0] };
59 ; CHECK: MustWriteAccess :=
60 ; CHECK: [n] -> { Stmt_bb_nph[] -> MemRef_k_05_reg2mem[0] };
61 ; CHECK: MustWriteAccess :=
62 ; CHECK: [n] -> { Stmt_bb_nph[] -> MemRef__reg2mem[0] };
65 ; CHECK: [n] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -2 + n and n >= 2 };
66 ; CHECK: Scattering :=
67 ; CHECK: [n] -> { Stmt_bb[i0] -> [1, i0] };
68 ; CHECK: ReadAccess :=
69 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef__reg2mem[0] };
70 ; CHECK: ReadAccess :=
71 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_k_05_reg2mem[0] };
72 ; CHECK: MustWriteAccess :=
73 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[1 + i0] };
74 ; CHECK: ReadAccess :=
75 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[2 + 2i0] };
76 ; CHECK: ReadAccess :=
77 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[4 + i0] };
78 ; CHECK: MustWriteAccess :=
79 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_k_05_reg2mem[0] };
80 ; CHECK: MustWriteAccess :=
81 ; CHECK: [n] -> { Stmt_bb[i0] -> MemRef__reg2mem[0] };