1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/hpet.h>
8 #include <linux/init.h>
13 #include <asm/fixmap.h>
14 #include <asm/i8253.h>
17 #define HPET_MASK CLOCKSOURCE_MASK(32)
22 #define FSEC_PER_NSEC 1000000L
24 #define HPET_DEV_USED_BIT 2
25 #define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
26 #define HPET_DEV_VALID 0x8
27 #define HPET_DEV_FSB_CAP 0x1000
28 #define HPET_DEV_PERI_CAP 0x2000
30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
35 unsigned long hpet_address
;
37 static unsigned long hpet_num_timers
;
39 static void __iomem
*hpet_virt_address
;
42 struct clock_event_device evt
;
50 unsigned long hpet_readl(unsigned long a
)
52 return readl(hpet_virt_address
+ a
);
55 static inline void hpet_writel(unsigned long d
, unsigned long a
)
57 writel(d
, hpet_virt_address
+ a
);
61 #include <asm/pgtable.h>
64 static inline void hpet_set_mapping(void)
66 hpet_virt_address
= ioremap_nocache(hpet_address
, HPET_MMAP_SIZE
);
68 __set_fixmap(VSYSCALL_HPET
, hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
72 static inline void hpet_clear_mapping(void)
74 iounmap(hpet_virt_address
);
75 hpet_virt_address
= NULL
;
79 * HPET command line enable / disable
81 static int boot_hpet_disable
;
84 static int __init
hpet_setup(char *str
)
87 if (!strncmp("disable", str
, 7))
88 boot_hpet_disable
= 1;
89 if (!strncmp("force", str
, 5))
94 __setup("hpet=", hpet_setup
);
96 static int __init
disable_hpet(char *str
)
98 boot_hpet_disable
= 1;
101 __setup("nohpet", disable_hpet
);
103 static inline int is_hpet_capable(void)
105 return !boot_hpet_disable
&& hpet_address
;
109 * HPET timer interrupt enable / disable
111 static int hpet_legacy_int_enabled
;
114 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
116 int is_hpet_enabled(void)
118 return is_hpet_capable() && hpet_legacy_int_enabled
;
120 EXPORT_SYMBOL_GPL(is_hpet_enabled
);
123 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
124 * timer 0 and timer 1 in case of RTC emulation.
128 static void hpet_reserve_msi_timers(struct hpet_data
*hd
);
130 static void hpet_reserve_platform_timers(unsigned long id
)
132 struct hpet __iomem
*hpet
= hpet_virt_address
;
133 struct hpet_timer __iomem
*timer
= &hpet
->hpet_timers
[2];
134 unsigned int nrtimers
, i
;
137 nrtimers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
139 memset(&hd
, 0, sizeof(hd
));
140 hd
.hd_phys_address
= hpet_address
;
141 hd
.hd_address
= hpet
;
142 hd
.hd_nirqs
= nrtimers
;
143 hpet_reserve_timer(&hd
, 0);
145 #ifdef CONFIG_HPET_EMULATE_RTC
146 hpet_reserve_timer(&hd
, 1);
150 * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
151 * is wrong for i8259!) not the output IRQ. Many BIOS writers
152 * don't bother configuring *any* comparator interrupts.
154 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
155 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
157 for (i
= 2; i
< nrtimers
; timer
++, i
++) {
158 hd
.hd_irq
[i
] = (readl(&timer
->hpet_config
) &
159 Tn_INT_ROUTE_CNF_MASK
) >> Tn_INT_ROUTE_CNF_SHIFT
;
162 hpet_reserve_msi_timers(&hd
);
168 static void hpet_reserve_platform_timers(unsigned long id
) { }
174 static unsigned long hpet_period
;
176 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
177 struct clock_event_device
*evt
);
178 static int hpet_legacy_next_event(unsigned long delta
,
179 struct clock_event_device
*evt
);
182 * The hpet clock event device
184 static struct clock_event_device hpet_clockevent
= {
186 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
187 .set_mode
= hpet_legacy_set_mode
,
188 .set_next_event
= hpet_legacy_next_event
,
194 static void hpet_start_counter(void)
196 unsigned long cfg
= hpet_readl(HPET_CFG
);
198 cfg
&= ~HPET_CFG_ENABLE
;
199 hpet_writel(cfg
, HPET_CFG
);
200 hpet_writel(0, HPET_COUNTER
);
201 hpet_writel(0, HPET_COUNTER
+ 4);
202 cfg
|= HPET_CFG_ENABLE
;
203 hpet_writel(cfg
, HPET_CFG
);
206 static void hpet_resume_device(void)
211 static void hpet_restart_counter(void)
213 hpet_resume_device();
214 hpet_start_counter();
217 static void hpet_enable_legacy_int(void)
219 unsigned long cfg
= hpet_readl(HPET_CFG
);
221 cfg
|= HPET_CFG_LEGACY
;
222 hpet_writel(cfg
, HPET_CFG
);
223 hpet_legacy_int_enabled
= 1;
226 static void hpet_legacy_clockevent_register(void)
228 /* Start HPET legacy interrupts */
229 hpet_enable_legacy_int();
232 * The mult factor is defined as (include/linux/clockchips.h)
233 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
234 * hpet_period is in units of femtoseconds (per cycle), so
235 * mult/2^shift = cyc/ns = 10^6/hpet_period
236 * mult = (10^6 * 2^shift)/hpet_period
237 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
239 hpet_clockevent
.mult
= div_sc((unsigned long) FSEC_PER_NSEC
,
240 hpet_period
, hpet_clockevent
.shift
);
241 /* Calculate the min / max delta */
242 hpet_clockevent
.max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF,
244 /* 5 usec minimum reprogramming delta. */
245 hpet_clockevent
.min_delta_ns
= 5000;
248 * Start hpet with the boot cpu mask and make it
249 * global after the IO_APIC has been initialized.
251 hpet_clockevent
.cpumask
= cpumask_of(smp_processor_id());
252 clockevents_register_device(&hpet_clockevent
);
253 global_clock_event
= &hpet_clockevent
;
254 printk(KERN_DEBUG
"hpet clockevent registered\n");
257 static int hpet_setup_msi_irq(unsigned int irq
);
259 static void hpet_set_mode(enum clock_event_mode mode
,
260 struct clock_event_device
*evt
, int timer
)
262 unsigned long cfg
, cmp
, now
;
266 case CLOCK_EVT_MODE_PERIODIC
:
267 delta
= ((uint64_t)(NSEC_PER_SEC
/HZ
)) * evt
->mult
;
268 delta
>>= evt
->shift
;
269 now
= hpet_readl(HPET_COUNTER
);
270 cmp
= now
+ (unsigned long) delta
;
271 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
272 /* Make sure we use edge triggered interrupts */
273 cfg
&= ~HPET_TN_LEVEL
;
274 cfg
|= HPET_TN_ENABLE
| HPET_TN_PERIODIC
|
275 HPET_TN_SETVAL
| HPET_TN_32BIT
;
276 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
278 * The first write after writing TN_SETVAL to the
279 * config register sets the counter value, the second
280 * write sets the period.
282 hpet_writel(cmp
, HPET_Tn_CMP(timer
));
284 hpet_writel((unsigned long) delta
, HPET_Tn_CMP(timer
));
287 case CLOCK_EVT_MODE_ONESHOT
:
288 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
289 cfg
&= ~HPET_TN_PERIODIC
;
290 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
291 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
294 case CLOCK_EVT_MODE_UNUSED
:
295 case CLOCK_EVT_MODE_SHUTDOWN
:
296 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
297 cfg
&= ~HPET_TN_ENABLE
;
298 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
301 case CLOCK_EVT_MODE_RESUME
:
303 hpet_enable_legacy_int();
305 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
306 hpet_setup_msi_irq(hdev
->irq
);
307 disable_irq(hdev
->irq
);
308 irq_set_affinity(hdev
->irq
, cpumask_of(hdev
->cpu
));
309 enable_irq(hdev
->irq
);
315 static int hpet_next_event(unsigned long delta
,
316 struct clock_event_device
*evt
, int timer
)
320 cnt
= hpet_readl(HPET_COUNTER
);
322 hpet_writel(cnt
, HPET_Tn_CMP(timer
));
325 * We need to read back the CMP register to make sure that
326 * what we wrote hit the chip before we compare it to the
329 WARN_ON_ONCE((u32
)hpet_readl(HPET_Tn_CMP(timer
)) != cnt
);
331 return (s32
)((u32
)hpet_readl(HPET_COUNTER
) - cnt
) >= 0 ? -ETIME
: 0;
334 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
335 struct clock_event_device
*evt
)
337 hpet_set_mode(mode
, evt
, 0);
340 static int hpet_legacy_next_event(unsigned long delta
,
341 struct clock_event_device
*evt
)
343 return hpet_next_event(delta
, evt
, 0);
349 #ifdef CONFIG_PCI_MSI
351 static DEFINE_PER_CPU(struct hpet_dev
*, cpu_hpet_dev
);
352 static struct hpet_dev
*hpet_devs
;
354 void hpet_msi_unmask(unsigned int irq
)
356 struct hpet_dev
*hdev
= get_irq_data(irq
);
360 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
362 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
365 void hpet_msi_mask(unsigned int irq
)
368 struct hpet_dev
*hdev
= get_irq_data(irq
);
371 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
373 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
376 void hpet_msi_write(unsigned int irq
, struct msi_msg
*msg
)
378 struct hpet_dev
*hdev
= get_irq_data(irq
);
380 hpet_writel(msg
->data
, HPET_Tn_ROUTE(hdev
->num
));
381 hpet_writel(msg
->address_lo
, HPET_Tn_ROUTE(hdev
->num
) + 4);
384 void hpet_msi_read(unsigned int irq
, struct msi_msg
*msg
)
386 struct hpet_dev
*hdev
= get_irq_data(irq
);
388 msg
->data
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
));
389 msg
->address_lo
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
) + 4);
393 static void hpet_msi_set_mode(enum clock_event_mode mode
,
394 struct clock_event_device
*evt
)
396 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
397 hpet_set_mode(mode
, evt
, hdev
->num
);
400 static int hpet_msi_next_event(unsigned long delta
,
401 struct clock_event_device
*evt
)
403 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
404 return hpet_next_event(delta
, evt
, hdev
->num
);
407 static int hpet_setup_msi_irq(unsigned int irq
)
409 if (arch_setup_hpet_msi(irq
)) {
416 static int hpet_assign_irq(struct hpet_dev
*dev
)
424 set_irq_data(irq
, dev
);
426 if (hpet_setup_msi_irq(irq
))
433 static irqreturn_t
hpet_interrupt_handler(int irq
, void *data
)
435 struct hpet_dev
*dev
= (struct hpet_dev
*)data
;
436 struct clock_event_device
*hevt
= &dev
->evt
;
438 if (!hevt
->event_handler
) {
439 printk(KERN_INFO
"Spurious HPET timer interrupt on HPET timer %d\n",
444 hevt
->event_handler(hevt
);
448 static int hpet_setup_irq(struct hpet_dev
*dev
)
451 if (request_irq(dev
->irq
, hpet_interrupt_handler
,
452 IRQF_DISABLED
|IRQF_NOBALANCING
, dev
->name
, dev
))
455 disable_irq(dev
->irq
);
456 irq_set_affinity(dev
->irq
, cpumask_of(dev
->cpu
));
457 enable_irq(dev
->irq
);
459 printk(KERN_DEBUG
"hpet: %s irq %d for MSI\n",
460 dev
->name
, dev
->irq
);
465 /* This should be called in specific @cpu */
466 static void init_one_hpet_msi_clockevent(struct hpet_dev
*hdev
, int cpu
)
468 struct clock_event_device
*evt
= &hdev
->evt
;
471 WARN_ON(cpu
!= smp_processor_id());
472 if (!(hdev
->flags
& HPET_DEV_VALID
))
475 if (hpet_setup_msi_irq(hdev
->irq
))
479 per_cpu(cpu_hpet_dev
, cpu
) = hdev
;
480 evt
->name
= hdev
->name
;
481 hpet_setup_irq(hdev
);
482 evt
->irq
= hdev
->irq
;
485 evt
->features
= CLOCK_EVT_FEAT_ONESHOT
;
486 if (hdev
->flags
& HPET_DEV_PERI_CAP
)
487 evt
->features
|= CLOCK_EVT_FEAT_PERIODIC
;
489 evt
->set_mode
= hpet_msi_set_mode
;
490 evt
->set_next_event
= hpet_msi_next_event
;
494 * The period is a femto seconds value. We need to calculate the
495 * scaled math multiplication factor for nanosecond to hpet tick
498 hpet_freq
= 1000000000000000ULL;
499 do_div(hpet_freq
, hpet_period
);
500 evt
->mult
= div_sc((unsigned long) hpet_freq
,
501 NSEC_PER_SEC
, evt
->shift
);
502 /* Calculate the max delta */
503 evt
->max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF, evt
);
504 /* 5 usec minimum reprogramming delta. */
505 evt
->min_delta_ns
= 5000;
507 evt
->cpumask
= cpumask_of(hdev
->cpu
);
508 clockevents_register_device(evt
);
512 /* Reserve at least one timer for userspace (/dev/hpet) */
513 #define RESERVE_TIMERS 1
515 #define RESERVE_TIMERS 0
518 static void hpet_msi_capability_lookup(unsigned int start_timer
)
521 unsigned int num_timers
;
522 unsigned int num_timers_used
= 0;
525 id
= hpet_readl(HPET_ID
);
527 num_timers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
);
528 num_timers
++; /* Value read out starts from 0 */
530 hpet_devs
= kzalloc(sizeof(struct hpet_dev
) * num_timers
, GFP_KERNEL
);
534 hpet_num_timers
= num_timers
;
536 for (i
= start_timer
; i
< num_timers
- RESERVE_TIMERS
; i
++) {
537 struct hpet_dev
*hdev
= &hpet_devs
[num_timers_used
];
538 unsigned long cfg
= hpet_readl(HPET_Tn_CFG(i
));
540 /* Only consider HPET timer with MSI support */
541 if (!(cfg
& HPET_TN_FSB_CAP
))
545 if (cfg
& HPET_TN_PERIODIC_CAP
)
546 hdev
->flags
|= HPET_DEV_PERI_CAP
;
549 sprintf(hdev
->name
, "hpet%d", i
);
550 if (hpet_assign_irq(hdev
))
553 hdev
->flags
|= HPET_DEV_FSB_CAP
;
554 hdev
->flags
|= HPET_DEV_VALID
;
556 if (num_timers_used
== num_possible_cpus())
560 printk(KERN_INFO
"HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
561 num_timers
, num_timers_used
);
565 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
572 for (i
= 0; i
< hpet_num_timers
; i
++) {
573 struct hpet_dev
*hdev
= &hpet_devs
[i
];
575 if (!(hdev
->flags
& HPET_DEV_VALID
))
578 hd
->hd_irq
[hdev
->num
] = hdev
->irq
;
579 hpet_reserve_timer(hd
, hdev
->num
);
584 static struct hpet_dev
*hpet_get_unused_timer(void)
591 for (i
= 0; i
< hpet_num_timers
; i
++) {
592 struct hpet_dev
*hdev
= &hpet_devs
[i
];
594 if (!(hdev
->flags
& HPET_DEV_VALID
))
596 if (test_and_set_bit(HPET_DEV_USED_BIT
,
597 (unsigned long *)&hdev
->flags
))
604 struct hpet_work_struct
{
605 struct delayed_work work
;
606 struct completion complete
;
609 static void hpet_work(struct work_struct
*w
)
611 struct hpet_dev
*hdev
;
612 int cpu
= smp_processor_id();
613 struct hpet_work_struct
*hpet_work
;
615 hpet_work
= container_of(w
, struct hpet_work_struct
, work
.work
);
617 hdev
= hpet_get_unused_timer();
619 init_one_hpet_msi_clockevent(hdev
, cpu
);
621 complete(&hpet_work
->complete
);
624 static int hpet_cpuhp_notify(struct notifier_block
*n
,
625 unsigned long action
, void *hcpu
)
627 unsigned long cpu
= (unsigned long)hcpu
;
628 struct hpet_work_struct work
;
629 struct hpet_dev
*hdev
= per_cpu(cpu_hpet_dev
, cpu
);
631 switch (action
& 0xf) {
633 INIT_DELAYED_WORK_ON_STACK(&work
.work
, hpet_work
);
634 init_completion(&work
.complete
);
635 /* FIXME: add schedule_work_on() */
636 schedule_delayed_work_on(cpu
, &work
.work
, 0);
637 wait_for_completion(&work
.complete
);
638 destroy_timer_on_stack(&work
.work
.timer
);
642 free_irq(hdev
->irq
, hdev
);
643 hdev
->flags
&= ~HPET_DEV_USED
;
644 per_cpu(cpu_hpet_dev
, cpu
) = NULL
;
652 static int hpet_setup_msi_irq(unsigned int irq
)
656 static void hpet_msi_capability_lookup(unsigned int start_timer
)
662 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
668 static int hpet_cpuhp_notify(struct notifier_block
*n
,
669 unsigned long action
, void *hcpu
)
677 * Clock source related code
679 static cycle_t
read_hpet(void)
681 return (cycle_t
)hpet_readl(HPET_COUNTER
);
685 static cycle_t __vsyscall_fn
vread_hpet(void)
687 return readl((const void __iomem
*)fix_to_virt(VSYSCALL_HPET
) + 0xf0);
691 static struct clocksource clocksource_hpet
= {
697 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
698 .resume
= hpet_restart_counter
,
704 static int hpet_clocksource_register(void)
709 /* Start the counter */
710 hpet_start_counter();
712 /* Verify whether hpet counter works */
717 * We don't know the TSC frequency yet, but waiting for
718 * 200000 TSC cycles is safe:
725 } while ((now
- start
) < 200000UL);
727 if (t1
== read_hpet()) {
729 "HPET counter not counting. HPET disabled\n");
734 * The definition of mult is (include/linux/clocksource.h)
735 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
736 * so we first need to convert hpet_period to ns/cyc units:
737 * mult/2^shift = ns/cyc = hpet_period/10^6
738 * mult = (hpet_period * 2^shift)/10^6
739 * mult = (hpet_period << shift)/FSEC_PER_NSEC
741 clocksource_hpet
.mult
= div_sc(hpet_period
, FSEC_PER_NSEC
, HPET_SHIFT
);
743 clocksource_register(&clocksource_hpet
);
749 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
751 int __init
hpet_enable(void)
756 if (!is_hpet_capable())
762 * Read the period and check for a sane value:
764 hpet_period
= hpet_readl(HPET_PERIOD
);
767 * AMD SB700 based systems with spread spectrum enabled use a
768 * SMM based HPET emulation to provide proper frequency
769 * setting. The SMM code is initialized with the first HPET
770 * register access and takes some time to complete. During
771 * this time the config register reads 0xffffffff. We check
772 * for max. 1000 loops whether the config register reads a non
773 * 0xffffffff value to make sure that HPET is up and running
774 * before we go further. A counting loop is safe, as the HPET
775 * access takes thousands of CPU cycles. On non SB700 based
776 * machines this check is only done once and has no side
779 for (i
= 0; hpet_readl(HPET_CFG
) == 0xFFFFFFFF; i
++) {
782 "HPET config register value = 0xFFFFFFFF. "
788 if (hpet_period
< HPET_MIN_PERIOD
|| hpet_period
> HPET_MAX_PERIOD
)
792 * Read the HPET ID register to retrieve the IRQ routing
793 * information and the number of channels
795 id
= hpet_readl(HPET_ID
);
797 #ifdef CONFIG_HPET_EMULATE_RTC
799 * The legacy routing mode needs at least two channels, tick timer
800 * and the rtc emulation channel.
802 if (!(id
& HPET_ID_NUMBER
))
806 if (hpet_clocksource_register())
809 if (id
& HPET_ID_LEGSUP
) {
810 hpet_legacy_clockevent_register();
811 hpet_msi_capability_lookup(2);
814 hpet_msi_capability_lookup(0);
818 hpet_clear_mapping();
824 * Needs to be late, as the reserve_timer code calls kalloc !
826 * Not a problem on i386 as hpet_enable is called from late_time_init,
827 * but on x86_64 it is necessary !
829 static __init
int hpet_late_init(void)
833 if (boot_hpet_disable
)
837 if (!force_hpet_address
)
840 hpet_address
= force_hpet_address
;
844 if (!hpet_virt_address
)
847 hpet_reserve_platform_timers(hpet_readl(HPET_ID
));
849 for_each_online_cpu(cpu
) {
850 hpet_cpuhp_notify(NULL
, CPU_ONLINE
, (void *)(long)cpu
);
853 /* This notifier should be called after workqueue is ready */
854 hotcpu_notifier(hpet_cpuhp_notify
, -20);
858 fs_initcall(hpet_late_init
);
860 void hpet_disable(void)
862 if (is_hpet_capable()) {
863 unsigned long cfg
= hpet_readl(HPET_CFG
);
865 if (hpet_legacy_int_enabled
) {
866 cfg
&= ~HPET_CFG_LEGACY
;
867 hpet_legacy_int_enabled
= 0;
869 cfg
&= ~HPET_CFG_ENABLE
;
870 hpet_writel(cfg
, HPET_CFG
);
874 #ifdef CONFIG_HPET_EMULATE_RTC
876 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
877 * is enabled, we support RTC interrupt functionality in software.
878 * RTC has 3 kinds of interrupts:
879 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
881 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
882 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
883 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
884 * (1) and (2) above are implemented using polling at a frequency of
885 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
886 * overhead. (DEFAULT_RTC_INT_FREQ)
887 * For (3), we use interrupts at 64Hz or user specified periodic
888 * frequency, whichever is higher.
890 #include <linux/mc146818rtc.h>
891 #include <linux/rtc.h>
894 #define DEFAULT_RTC_INT_FREQ 64
895 #define DEFAULT_RTC_SHIFT 6
896 #define RTC_NUM_INTS 1
898 static unsigned long hpet_rtc_flags
;
899 static int hpet_prev_update_sec
;
900 static struct rtc_time hpet_alarm_time
;
901 static unsigned long hpet_pie_count
;
902 static unsigned long hpet_t1_cmp
;
903 static unsigned long hpet_default_delta
;
904 static unsigned long hpet_pie_delta
;
905 static unsigned long hpet_pie_limit
;
907 static rtc_irq_handler irq_handler
;
910 * Registers a IRQ handler.
912 int hpet_register_irq_handler(rtc_irq_handler handler
)
914 if (!is_hpet_enabled())
919 irq_handler
= handler
;
923 EXPORT_SYMBOL_GPL(hpet_register_irq_handler
);
926 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
929 void hpet_unregister_irq_handler(rtc_irq_handler handler
)
931 if (!is_hpet_enabled())
937 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler
);
940 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
941 * is not supported by all HPET implementations for timer 1.
943 * hpet_rtc_timer_init() is called when the rtc is initialized.
945 int hpet_rtc_timer_init(void)
947 unsigned long cfg
, cnt
, delta
, flags
;
949 if (!is_hpet_enabled())
952 if (!hpet_default_delta
) {
955 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
956 clc
>>= hpet_clockevent
.shift
+ DEFAULT_RTC_SHIFT
;
957 hpet_default_delta
= (unsigned long) clc
;
960 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
961 delta
= hpet_default_delta
;
963 delta
= hpet_pie_delta
;
965 local_irq_save(flags
);
967 cnt
= delta
+ hpet_readl(HPET_COUNTER
);
968 hpet_writel(cnt
, HPET_T1_CMP
);
971 cfg
= hpet_readl(HPET_T1_CFG
);
972 cfg
&= ~HPET_TN_PERIODIC
;
973 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
974 hpet_writel(cfg
, HPET_T1_CFG
);
976 local_irq_restore(flags
);
980 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init
);
983 * The functions below are called from rtc driver.
984 * Return 0 if HPET is not being used.
985 * Otherwise do the necessary changes and return 1.
987 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
989 if (!is_hpet_enabled())
992 hpet_rtc_flags
&= ~bit_mask
;
995 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit
);
997 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
999 unsigned long oldbits
= hpet_rtc_flags
;
1001 if (!is_hpet_enabled())
1004 hpet_rtc_flags
|= bit_mask
;
1006 if ((bit_mask
& RTC_UIE
) && !(oldbits
& RTC_UIE
))
1007 hpet_prev_update_sec
= -1;
1010 hpet_rtc_timer_init();
1014 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit
);
1016 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
,
1019 if (!is_hpet_enabled())
1022 hpet_alarm_time
.tm_hour
= hrs
;
1023 hpet_alarm_time
.tm_min
= min
;
1024 hpet_alarm_time
.tm_sec
= sec
;
1028 EXPORT_SYMBOL_GPL(hpet_set_alarm_time
);
1030 int hpet_set_periodic_freq(unsigned long freq
)
1034 if (!is_hpet_enabled())
1037 if (freq
<= DEFAULT_RTC_INT_FREQ
)
1038 hpet_pie_limit
= DEFAULT_RTC_INT_FREQ
/ freq
;
1040 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1042 clc
>>= hpet_clockevent
.shift
;
1043 hpet_pie_delta
= (unsigned long) clc
;
1047 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq
);
1049 int hpet_rtc_dropped_irq(void)
1051 return is_hpet_enabled();
1053 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq
);
1055 static void hpet_rtc_timer_reinit(void)
1057 unsigned long cfg
, delta
;
1060 if (unlikely(!hpet_rtc_flags
)) {
1061 cfg
= hpet_readl(HPET_T1_CFG
);
1062 cfg
&= ~HPET_TN_ENABLE
;
1063 hpet_writel(cfg
, HPET_T1_CFG
);
1067 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1068 delta
= hpet_default_delta
;
1070 delta
= hpet_pie_delta
;
1073 * Increment the comparator value until we are ahead of the
1077 hpet_t1_cmp
+= delta
;
1078 hpet_writel(hpet_t1_cmp
, HPET_T1_CMP
);
1080 } while ((long)(hpet_readl(HPET_COUNTER
) - hpet_t1_cmp
) > 0);
1083 if (hpet_rtc_flags
& RTC_PIE
)
1084 hpet_pie_count
+= lost_ints
;
1085 if (printk_ratelimit())
1086 printk(KERN_WARNING
"hpet1: lost %d rtc interrupts\n",
1091 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
)
1093 struct rtc_time curr_time
;
1094 unsigned long rtc_int_flag
= 0;
1096 hpet_rtc_timer_reinit();
1097 memset(&curr_time
, 0, sizeof(struct rtc_time
));
1099 if (hpet_rtc_flags
& (RTC_UIE
| RTC_AIE
))
1100 get_rtc_time(&curr_time
);
1102 if (hpet_rtc_flags
& RTC_UIE
&&
1103 curr_time
.tm_sec
!= hpet_prev_update_sec
) {
1104 if (hpet_prev_update_sec
>= 0)
1105 rtc_int_flag
= RTC_UF
;
1106 hpet_prev_update_sec
= curr_time
.tm_sec
;
1109 if (hpet_rtc_flags
& RTC_PIE
&&
1110 ++hpet_pie_count
>= hpet_pie_limit
) {
1111 rtc_int_flag
|= RTC_PF
;
1115 if (hpet_rtc_flags
& RTC_AIE
&&
1116 (curr_time
.tm_sec
== hpet_alarm_time
.tm_sec
) &&
1117 (curr_time
.tm_min
== hpet_alarm_time
.tm_min
) &&
1118 (curr_time
.tm_hour
== hpet_alarm_time
.tm_hour
))
1119 rtc_int_flag
|= RTC_AF
;
1122 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
1124 irq_handler(rtc_int_flag
, dev_id
);
1128 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt
);