enic: Use (netdev|dev|pr)_<level> macro helpers for logging
[pohmelfs.git] / drivers / net / enic / vnic_dev.c
blob042f4b84a870a58de29e2758ef6c49e1b84f5d80
1 /*
2 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <linux/if_ether.h>
26 #include <linux/slab.h>
28 #include "vnic_resource.h"
29 #include "vnic_devcmd.h"
30 #include "vnic_dev.h"
31 #include "vnic_stats.h"
33 struct vnic_res {
34 void __iomem *vaddr;
35 dma_addr_t bus_addr;
36 unsigned int count;
39 #define VNIC_DEV_CAP_INIT 0x0001
41 struct vnic_dev {
42 void *priv;
43 struct pci_dev *pdev;
44 struct vnic_res res[RES_TYPE_MAX];
45 enum vnic_dev_intr_mode intr_mode;
46 struct vnic_devcmd __iomem *devcmd;
47 struct vnic_devcmd_notify *notify;
48 struct vnic_devcmd_notify notify_copy;
49 dma_addr_t notify_pa;
50 u32 notify_sz;
51 u32 *linkstatus;
52 dma_addr_t linkstatus_pa;
53 struct vnic_stats *stats;
54 dma_addr_t stats_pa;
55 struct vnic_devcmd_fw_info *fw_info;
56 dma_addr_t fw_info_pa;
57 u32 cap_flags;
60 #define VNIC_MAX_RES_HDR_SIZE \
61 (sizeof(struct vnic_resource_header) + \
62 sizeof(struct vnic_resource) * RES_TYPE_MAX)
63 #define VNIC_RES_STRIDE 128
65 void *vnic_dev_priv(struct vnic_dev *vdev)
67 return vdev->priv;
70 static int vnic_dev_discover_res(struct vnic_dev *vdev,
71 struct vnic_dev_bar *bar, unsigned int num_bars)
73 struct vnic_resource_header __iomem *rh;
74 struct vnic_resource __iomem *r;
75 u8 type;
77 if (num_bars == 0)
78 return -EINVAL;
80 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
81 pr_err("vNIC BAR0 res hdr length error\n");
82 return -EINVAL;
85 rh = bar->vaddr;
86 if (!rh) {
87 pr_err("vNIC BAR0 res hdr not mem-mapped\n");
88 return -EINVAL;
91 if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
92 ioread32(&rh->version) != VNIC_RES_VERSION) {
93 pr_err("vNIC BAR0 res magic/version error "
94 "exp (%lx/%lx) curr (%x/%x)\n",
95 VNIC_RES_MAGIC, VNIC_RES_VERSION,
96 ioread32(&rh->magic), ioread32(&rh->version));
97 return -EINVAL;
100 r = (struct vnic_resource __iomem *)(rh + 1);
102 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
104 u8 bar_num = ioread8(&r->bar);
105 u32 bar_offset = ioread32(&r->bar_offset);
106 u32 count = ioread32(&r->count);
107 u32 len;
109 r++;
111 if (bar_num >= num_bars)
112 continue;
114 if (!bar[bar_num].len || !bar[bar_num].vaddr)
115 continue;
117 switch (type) {
118 case RES_TYPE_WQ:
119 case RES_TYPE_RQ:
120 case RES_TYPE_CQ:
121 case RES_TYPE_INTR_CTRL:
122 /* each count is stride bytes long */
123 len = count * VNIC_RES_STRIDE;
124 if (len + bar_offset > bar[bar_num].len) {
125 pr_err("vNIC BAR0 resource %d "
126 "out-of-bounds, offset 0x%x + "
127 "size 0x%x > bar len 0x%lx\n",
128 type, bar_offset,
129 len,
130 bar[bar_num].len);
131 return -EINVAL;
133 break;
134 case RES_TYPE_INTR_PBA_LEGACY:
135 case RES_TYPE_DEVCMD:
136 len = count;
137 break;
138 default:
139 continue;
142 vdev->res[type].count = count;
143 vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
144 bar_offset;
145 vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
148 return 0;
151 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
152 enum vnic_res_type type)
154 return vdev->res[type].count;
157 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
158 unsigned int index)
160 if (!vdev->res[type].vaddr)
161 return NULL;
163 switch (type) {
164 case RES_TYPE_WQ:
165 case RES_TYPE_RQ:
166 case RES_TYPE_CQ:
167 case RES_TYPE_INTR_CTRL:
168 return (char __iomem *)vdev->res[type].vaddr +
169 index * VNIC_RES_STRIDE;
170 default:
171 return (char __iomem *)vdev->res[type].vaddr;
175 dma_addr_t vnic_dev_get_res_bus_addr(struct vnic_dev *vdev,
176 enum vnic_res_type type, unsigned int index)
178 switch (type) {
179 case RES_TYPE_WQ:
180 case RES_TYPE_RQ:
181 case RES_TYPE_CQ:
182 case RES_TYPE_INTR_CTRL:
183 return vdev->res[type].bus_addr +
184 index * VNIC_RES_STRIDE;
185 default:
186 return vdev->res[type].bus_addr;
190 unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
191 unsigned int desc_count, unsigned int desc_size)
193 /* The base address of the desc rings must be 512 byte aligned.
194 * Descriptor count is aligned to groups of 32 descriptors. A
195 * count of 0 means the maximum 4096 descriptors. Descriptor
196 * size is aligned to 16 bytes.
199 unsigned int count_align = 32;
200 unsigned int desc_align = 16;
202 ring->base_align = 512;
204 if (desc_count == 0)
205 desc_count = 4096;
207 ring->desc_count = ALIGN(desc_count, count_align);
209 ring->desc_size = ALIGN(desc_size, desc_align);
211 ring->size = ring->desc_count * ring->desc_size;
212 ring->size_unaligned = ring->size + ring->base_align;
214 return ring->size_unaligned;
217 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
219 memset(ring->descs, 0, ring->size);
222 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
223 unsigned int desc_count, unsigned int desc_size)
225 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
227 ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
228 ring->size_unaligned,
229 &ring->base_addr_unaligned);
231 if (!ring->descs_unaligned) {
232 pr_err("Failed to allocate ring (size=%d), aborting\n",
233 (int)ring->size);
234 return -ENOMEM;
237 ring->base_addr = ALIGN(ring->base_addr_unaligned,
238 ring->base_align);
239 ring->descs = (u8 *)ring->descs_unaligned +
240 (ring->base_addr - ring->base_addr_unaligned);
242 vnic_dev_clear_desc_ring(ring);
244 ring->desc_avail = ring->desc_count - 1;
246 return 0;
249 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
251 if (ring->descs) {
252 pci_free_consistent(vdev->pdev,
253 ring->size_unaligned,
254 ring->descs_unaligned,
255 ring->base_addr_unaligned);
256 ring->descs = NULL;
260 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
261 u64 *a0, u64 *a1, int wait)
263 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
264 int delay;
265 u32 status;
266 int err;
268 status = ioread32(&devcmd->status);
269 if (status & STAT_BUSY) {
270 pr_err("Busy devcmd %d\n", _CMD_N(cmd));
271 return -EBUSY;
274 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
275 writeq(*a0, &devcmd->args[0]);
276 writeq(*a1, &devcmd->args[1]);
277 wmb();
280 iowrite32(cmd, &devcmd->cmd);
282 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
283 return 0;
285 for (delay = 0; delay < wait; delay++) {
287 udelay(100);
289 status = ioread32(&devcmd->status);
290 if (!(status & STAT_BUSY)) {
292 if (status & STAT_ERROR) {
293 err = (int)readq(&devcmd->args[0]);
294 if (err != ERR_ECMDUNKNOWN ||
295 cmd != CMD_CAPABILITY)
296 pr_err("Error %d devcmd %d\n",
297 err, _CMD_N(cmd));
298 return err;
301 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
302 rmb();
303 *a0 = readq(&devcmd->args[0]);
304 *a1 = readq(&devcmd->args[1]);
307 return 0;
311 pr_err("Timedout devcmd %d\n", _CMD_N(cmd));
312 return -ETIMEDOUT;
315 static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
317 u64 a0 = (u32)cmd, a1 = 0;
318 int wait = 1000;
319 int err;
321 err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
323 return !(err || a0);
326 int vnic_dev_fw_info(struct vnic_dev *vdev,
327 struct vnic_devcmd_fw_info **fw_info)
329 u64 a0, a1 = 0;
330 int wait = 1000;
331 int err = 0;
333 if (!vdev->fw_info) {
334 vdev->fw_info = pci_alloc_consistent(vdev->pdev,
335 sizeof(struct vnic_devcmd_fw_info),
336 &vdev->fw_info_pa);
337 if (!vdev->fw_info)
338 return -ENOMEM;
340 a0 = vdev->fw_info_pa;
342 /* only get fw_info once and cache it */
343 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
346 *fw_info = vdev->fw_info;
348 return err;
351 int vnic_dev_hw_version(struct vnic_dev *vdev, enum vnic_dev_hw_version *hw_ver)
353 struct vnic_devcmd_fw_info *fw_info;
354 int err;
356 err = vnic_dev_fw_info(vdev, &fw_info);
357 if (err)
358 return err;
360 if (strncmp(fw_info->hw_version, "A1", sizeof("A1")) == 0)
361 *hw_ver = VNIC_DEV_HW_VER_A1;
362 else if (strncmp(fw_info->hw_version, "A2", sizeof("A2")) == 0)
363 *hw_ver = VNIC_DEV_HW_VER_A2;
364 else
365 *hw_ver = VNIC_DEV_HW_VER_UNKNOWN;
367 return 0;
370 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
371 void *value)
373 u64 a0, a1;
374 int wait = 1000;
375 int err;
377 a0 = offset;
378 a1 = size;
380 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
382 switch (size) {
383 case 1: *(u8 *)value = (u8)a0; break;
384 case 2: *(u16 *)value = (u16)a0; break;
385 case 4: *(u32 *)value = (u32)a0; break;
386 case 8: *(u64 *)value = a0; break;
387 default: BUG(); break;
390 return err;
393 int vnic_dev_stats_clear(struct vnic_dev *vdev)
395 u64 a0 = 0, a1 = 0;
396 int wait = 1000;
397 return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
400 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
402 u64 a0, a1;
403 int wait = 1000;
405 if (!vdev->stats) {
406 vdev->stats = pci_alloc_consistent(vdev->pdev,
407 sizeof(struct vnic_stats), &vdev->stats_pa);
408 if (!vdev->stats)
409 return -ENOMEM;
412 *stats = vdev->stats;
413 a0 = vdev->stats_pa;
414 a1 = sizeof(struct vnic_stats);
416 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
419 int vnic_dev_close(struct vnic_dev *vdev)
421 u64 a0 = 0, a1 = 0;
422 int wait = 1000;
423 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
426 int vnic_dev_enable(struct vnic_dev *vdev)
428 u64 a0 = 0, a1 = 0;
429 int wait = 1000;
430 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
433 int vnic_dev_disable(struct vnic_dev *vdev)
435 u64 a0 = 0, a1 = 0;
436 int wait = 1000;
437 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
440 int vnic_dev_open(struct vnic_dev *vdev, int arg)
442 u64 a0 = (u32)arg, a1 = 0;
443 int wait = 1000;
444 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
447 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
449 u64 a0 = 0, a1 = 0;
450 int wait = 1000;
451 int err;
453 *done = 0;
455 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
456 if (err)
457 return err;
459 *done = (a0 == 0);
461 return 0;
464 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
466 u64 a0 = (u32)arg, a1 = 0;
467 int wait = 1000;
468 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
471 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
473 u64 a0 = 0, a1 = 0;
474 int wait = 1000;
475 int err;
477 *done = 0;
479 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
480 if (err)
481 return err;
483 *done = (a0 == 0);
485 return 0;
488 int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
490 u64 a0 = (u32)arg, a1 = 0;
491 int wait = 1000;
492 int err;
494 err = vnic_dev_cmd(vdev, CMD_HANG_RESET, &a0, &a1, wait);
495 if (err == ERR_ECMDUNKNOWN) {
496 err = vnic_dev_soft_reset(vdev, arg);
497 if (err)
498 return err;
500 return vnic_dev_init(vdev, 0);
503 return err;
506 int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
508 u64 a0 = 0, a1 = 0;
509 int wait = 1000;
510 int err;
512 *done = 0;
514 err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS, &a0, &a1, wait);
515 if (err) {
516 if (err == ERR_ECMDUNKNOWN)
517 return vnic_dev_soft_reset_done(vdev, done);
518 return err;
521 *done = (a0 == 0);
523 return 0;
526 int vnic_dev_hang_notify(struct vnic_dev *vdev)
528 u64 a0, a1;
529 int wait = 1000;
530 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
533 int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
535 u64 a0, a1;
536 int wait = 1000;
537 int err, i;
539 for (i = 0; i < ETH_ALEN; i++)
540 mac_addr[i] = 0;
542 err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a0, &a1, wait);
543 if (err)
544 return err;
546 for (i = 0; i < ETH_ALEN; i++)
547 mac_addr[i] = ((u8 *)&a0)[i];
549 return 0;
552 int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
553 int broadcast, int promisc, int allmulti)
555 u64 a0, a1 = 0;
556 int wait = 1000;
557 int err;
559 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
560 (multicast ? CMD_PFILTER_MULTICAST : 0) |
561 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
562 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
563 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
565 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
566 if (err)
567 pr_err("Can't set packet filter\n");
569 return err;
572 int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
574 u64 a0 = 0, a1 = 0;
575 int wait = 1000;
576 int err;
577 int i;
579 for (i = 0; i < ETH_ALEN; i++)
580 ((u8 *)&a0)[i] = addr[i];
582 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
583 if (err)
584 pr_err("Can't add addr [%pM], %d\n", addr, err);
586 return err;
589 int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
591 u64 a0 = 0, a1 = 0;
592 int wait = 1000;
593 int err;
594 int i;
596 for (i = 0; i < ETH_ALEN; i++)
597 ((u8 *)&a0)[i] = addr[i];
599 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
600 if (err)
601 pr_err("Can't del addr [%pM], %d\n", addr, err);
603 return err;
606 int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
607 u8 ig_vlan_rewrite_mode)
609 u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
610 int wait = 1000;
611 int err;
613 err = vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE, &a0, &a1, wait);
614 if (err == ERR_ECMDUNKNOWN)
615 return 0;
617 return err;
620 int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr)
622 u64 a0 = intr, a1 = 0;
623 int wait = 1000;
624 int err;
626 err = vnic_dev_cmd(vdev, CMD_IAR, &a0, &a1, wait);
627 if (err)
628 pr_err("Failed to raise INTR[%d], err %d\n", intr, err);
630 return err;
633 int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
634 void *notify_addr, dma_addr_t notify_pa, u16 intr)
636 u64 a0, a1;
637 int wait = 1000;
638 int r;
640 memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
641 vdev->notify = notify_addr;
642 vdev->notify_pa = notify_pa;
644 a0 = (u64)notify_pa;
645 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
646 a1 += sizeof(struct vnic_devcmd_notify);
648 r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
649 vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
650 return r;
653 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
655 void *notify_addr;
656 dma_addr_t notify_pa;
658 if (vdev->notify || vdev->notify_pa) {
659 pr_err("notify block %p still allocated", vdev->notify);
660 return -EINVAL;
663 notify_addr = pci_alloc_consistent(vdev->pdev,
664 sizeof(struct vnic_devcmd_notify),
665 &notify_pa);
666 if (!notify_addr)
667 return -ENOMEM;
669 return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
672 int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
674 u64 a0, a1;
675 int wait = 1000;
676 int err;
678 a0 = 0; /* paddr = 0 to unset notify buffer */
679 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
680 a1 += sizeof(struct vnic_devcmd_notify);
682 err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
683 vdev->notify = NULL;
684 vdev->notify_pa = 0;
685 vdev->notify_sz = 0;
687 return err;
690 int vnic_dev_notify_unset(struct vnic_dev *vdev)
692 if (vdev->notify) {
693 pci_free_consistent(vdev->pdev,
694 sizeof(struct vnic_devcmd_notify),
695 vdev->notify,
696 vdev->notify_pa);
699 return vnic_dev_notify_unsetcmd(vdev);
702 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
704 u32 *words;
705 unsigned int nwords = vdev->notify_sz / 4;
706 unsigned int i;
707 u32 csum;
709 if (!vdev->notify || !vdev->notify_sz)
710 return 0;
712 do {
713 csum = 0;
714 memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
715 words = (u32 *)&vdev->notify_copy;
716 for (i = 1; i < nwords; i++)
717 csum += words[i];
718 } while (csum != words[0]);
720 return 1;
723 int vnic_dev_init(struct vnic_dev *vdev, int arg)
725 u64 a0 = (u32)arg, a1 = 0;
726 int wait = 1000;
727 int r = 0;
729 if (vdev->cap_flags & VNIC_DEV_CAP_INIT)
730 r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
731 else {
732 vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
733 if (a0 & CMD_INITF_DEFAULT_MAC) {
734 // Emulate these for old CMD_INIT_v1 which
735 // didn't pass a0 so no CMD_INITF_*.
736 vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a0, &a1, wait);
737 vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
740 return r;
743 int vnic_dev_init_done(struct vnic_dev *vdev, int *done, int *err)
745 u64 a0 = 0, a1 = 0;
746 int wait = 1000;
747 int ret;
749 *done = 0;
751 ret = vnic_dev_cmd(vdev, CMD_INIT_STATUS, &a0, &a1, wait);
752 if (ret)
753 return ret;
755 *done = (a0 == 0);
757 *err = (a0 == 0) ? a1 : 0;
759 return 0;
762 int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len)
764 u64 a0, a1 = len;
765 int wait = 1000;
766 dma_addr_t prov_pa;
767 void *prov_buf;
768 int ret;
770 prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
771 if (!prov_buf)
772 return -ENOMEM;
774 memcpy(prov_buf, buf, len);
776 a0 = prov_pa;
778 ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO, &a0, &a1, wait);
780 pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
782 return ret;
785 int vnic_dev_deinit(struct vnic_dev *vdev)
787 u64 a0 = 0, a1 = 0;
788 int wait = 1000;
790 return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
793 int vnic_dev_link_status(struct vnic_dev *vdev)
795 if (vdev->linkstatus)
796 return *vdev->linkstatus;
798 if (!vnic_dev_notify_ready(vdev))
799 return 0;
801 return vdev->notify_copy.link_state;
804 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
806 if (!vnic_dev_notify_ready(vdev))
807 return 0;
809 return vdev->notify_copy.port_speed;
812 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
814 if (!vnic_dev_notify_ready(vdev))
815 return 0;
817 return vdev->notify_copy.msglvl;
820 u32 vnic_dev_mtu(struct vnic_dev *vdev)
822 if (!vnic_dev_notify_ready(vdev))
823 return 0;
825 return vdev->notify_copy.mtu;
828 u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
830 if (!vnic_dev_notify_ready(vdev))
831 return 0;
833 return vdev->notify_copy.link_down_cnt;
836 u32 vnic_dev_notify_status(struct vnic_dev *vdev)
838 if (!vnic_dev_notify_ready(vdev))
839 return 0;
841 return vdev->notify_copy.status;
844 u32 vnic_dev_uif(struct vnic_dev *vdev)
846 if (!vnic_dev_notify_ready(vdev))
847 return 0;
849 return vdev->notify_copy.uif;
852 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
853 enum vnic_dev_intr_mode intr_mode)
855 vdev->intr_mode = intr_mode;
858 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
859 struct vnic_dev *vdev)
861 return vdev->intr_mode;
864 void vnic_dev_unregister(struct vnic_dev *vdev)
866 if (vdev) {
867 if (vdev->notify)
868 pci_free_consistent(vdev->pdev,
869 sizeof(struct vnic_devcmd_notify),
870 vdev->notify,
871 vdev->notify_pa);
872 if (vdev->linkstatus)
873 pci_free_consistent(vdev->pdev,
874 sizeof(u32),
875 vdev->linkstatus,
876 vdev->linkstatus_pa);
877 if (vdev->stats)
878 pci_free_consistent(vdev->pdev,
879 sizeof(struct vnic_dev),
880 vdev->stats, vdev->stats_pa);
881 if (vdev->fw_info)
882 pci_free_consistent(vdev->pdev,
883 sizeof(struct vnic_devcmd_fw_info),
884 vdev->fw_info, vdev->fw_info_pa);
885 kfree(vdev);
889 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
890 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
891 unsigned int num_bars)
893 if (!vdev) {
894 vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
895 if (!vdev)
896 return NULL;
899 vdev->priv = priv;
900 vdev->pdev = pdev;
902 if (vnic_dev_discover_res(vdev, bar, num_bars))
903 goto err_out;
905 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
906 if (!vdev->devcmd)
907 goto err_out;
909 vdev->cap_flags = 0;
911 if (vnic_dev_capable(vdev, CMD_INIT))
912 vdev->cap_flags |= VNIC_DEV_CAP_INIT;
914 return vdev;
916 err_out:
917 vnic_dev_unregister(vdev);
918 return NULL;