drivers/staging/brcm80211/include/sbdma.h

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef _sbdma_h_
  18 #define _sbdma_h_
  19
  20 /* DMA structure:
  21  *  support two DMA engines: 32 bits address or 64 bit addressing
  22  *  basic DMA register set is per channel(transmit or receive)
  23  *  a pair of channels is defined for convenience
  24  */
  25
  26 /* 32 bits addressing */
  27
  28 typedef volatile struct {       /* diag access */
  29         u32 fifoaddr;   /* diag address */
  30         u32 fifodatalow;        /* low 32bits of data */
  31         u32 fifodatahigh;       /* high 32bits of data */
  32         u32 pad;                /* reserved */
  33 } dma32diag_t;
  34
  35 /* 64 bits addressing */
  36
  37 /* dma registers per channel(xmt or rcv) */
  38 typedef volatile struct {
  39         u32 control;            /* enable, et al */
  40         u32 ptr;                /* last descriptor posted to chip */
  41         u32 addrlow;            /* descriptor ring base address low 32-bits (8K aligned) */
  42         u32 addrhigh;   /* descriptor ring base address bits 63:32 (8K aligned) */
  43         u32 status0;            /* current descriptor, xmt state */
  44         u32 status1;            /* active descriptor, xmt error */
  45 } dma64regs_t;
  46
  47 #endif                          /* _sbdma_h_ */