2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/device.h>
21 #include <linux/interrupt.h>
22 #include <linux/mutex.h>
23 #include <linux/math64.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/partitions.h>
28 #include <linux/spi/spi.h>
29 #include <linux/spi/flash.h>
32 #define FLASH_PAGESIZE 256
35 #define OPCODE_WREN 0x06 /* Write enable */
36 #define OPCODE_RDSR 0x05 /* Read status register */
37 #define OPCODE_WRSR 0x01 /* Write status register 1 byte */
38 #define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */
39 #define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
40 #define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
41 #define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
42 #define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
43 #define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
44 #define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
45 #define OPCODE_RDID 0x9f /* Read JEDEC ID */
47 /* Used for SST flashes only. */
48 #define OPCODE_BP 0x02 /* Byte program */
49 #define OPCODE_WRDI 0x04 /* Write disable */
50 #define OPCODE_AAI_WP 0xad /* Auto address increment word program */
52 /* Status Register bits. */
53 #define SR_WIP 1 /* Write in progress */
54 #define SR_WEL 2 /* Write enable latch */
55 /* meaning of other SR_* bits may differ between vendors */
56 #define SR_BP0 4 /* Block protect 0 */
57 #define SR_BP1 8 /* Block protect 1 */
58 #define SR_BP2 0x10 /* Block protect 2 */
59 #define SR_SRWD 0x80 /* SR write protect */
61 /* Define max times to check status register before we give up. */
62 #define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
65 #ifdef CONFIG_M25PXX_USE_FAST_READ
66 #define OPCODE_READ OPCODE_FAST_READ
67 #define FAST_READ_DUMMY_BYTE 1
69 #define OPCODE_READ OPCODE_NORM_READ
70 #define FAST_READ_DUMMY_BYTE 0
73 /****************************************************************************/
76 struct spi_device
*spi
;
79 unsigned partitioned
:1;
84 static inline struct m25p
*mtd_to_m25p(struct mtd_info
*mtd
)
86 return container_of(mtd
, struct m25p
, mtd
);
89 /****************************************************************************/
92 * Internal helper functions
96 * Read the status register, returning its value in the location
97 * Return the status register value.
98 * Returns negative if error occurred.
100 static int read_sr(struct m25p
*flash
)
103 u8 code
= OPCODE_RDSR
;
106 retval
= spi_write_then_read(flash
->spi
, &code
, 1, &val
, 1);
109 dev_err(&flash
->spi
->dev
, "error %d reading SR\n",
118 * Write status register 1 byte
119 * Returns negative if error occurred.
121 static int write_sr(struct m25p
*flash
, u8 val
)
123 flash
->command
[0] = OPCODE_WRSR
;
124 flash
->command
[1] = val
;
126 return spi_write(flash
->spi
, flash
->command
, 2);
130 * Set write enable latch with Write Enable command.
131 * Returns negative if error occurred.
133 static inline int write_enable(struct m25p
*flash
)
135 u8 code
= OPCODE_WREN
;
137 return spi_write_then_read(flash
->spi
, &code
, 1, NULL
, 0);
141 * Send write disble instruction to the chip.
143 static inline int write_disable(struct m25p
*flash
)
145 u8 code
= OPCODE_WRDI
;
147 return spi_write_then_read(flash
->spi
, &code
, 1, NULL
, 0);
151 * Service routine to read status register until ready, or timeout occurs.
152 * Returns non-zero if error.
154 static int wait_till_ready(struct m25p
*flash
)
156 unsigned long deadline
;
159 deadline
= jiffies
+ MAX_READY_WAIT_JIFFIES
;
162 if ((sr
= read_sr(flash
)) < 0)
164 else if (!(sr
& SR_WIP
))
169 } while (!time_after_eq(jiffies
, deadline
));
175 * Erase the whole flash memory
177 * Returns 0 if successful, non-zero otherwise.
179 static int erase_chip(struct m25p
*flash
)
181 DEBUG(MTD_DEBUG_LEVEL3
, "%s: %s %lldKiB\n",
182 dev_name(&flash
->spi
->dev
), __func__
,
183 (long long)(flash
->mtd
.size
>> 10));
185 /* Wait until finished previous write command. */
186 if (wait_till_ready(flash
))
189 /* Send write enable, then erase commands. */
192 /* Set up command buffer. */
193 flash
->command
[0] = OPCODE_CHIP_ERASE
;
195 spi_write(flash
->spi
, flash
->command
, 1);
201 * Erase one sector of flash memory at offset ``offset'' which is any
202 * address within the sector which should be erased.
204 * Returns 0 if successful, non-zero otherwise.
206 static int erase_sector(struct m25p
*flash
, u32 offset
)
208 DEBUG(MTD_DEBUG_LEVEL3
, "%s: %s %dKiB at 0x%08x\n",
209 dev_name(&flash
->spi
->dev
), __func__
,
210 flash
->mtd
.erasesize
/ 1024, offset
);
212 /* Wait until finished previous write command. */
213 if (wait_till_ready(flash
))
216 /* Send write enable, then erase commands. */
219 /* Set up command buffer. */
220 flash
->command
[0] = flash
->erase_opcode
;
221 flash
->command
[1] = offset
>> 16;
222 flash
->command
[2] = offset
>> 8;
223 flash
->command
[3] = offset
;
225 spi_write(flash
->spi
, flash
->command
, CMD_SIZE
);
230 /****************************************************************************/
237 * Erase an address range on the flash chip. The address range may extend
238 * one or more erase sectors. Return an error is there is a problem erasing.
240 static int m25p80_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
242 struct m25p
*flash
= mtd_to_m25p(mtd
);
246 DEBUG(MTD_DEBUG_LEVEL2
, "%s: %s %s 0x%llx, len %lld\n",
247 dev_name(&flash
->spi
->dev
), __func__
, "at",
248 (long long)instr
->addr
, (long long)instr
->len
);
251 if (instr
->addr
+ instr
->len
> flash
->mtd
.size
)
253 div_u64_rem(instr
->len
, mtd
->erasesize
, &rem
);
260 mutex_lock(&flash
->lock
);
262 /* whole-chip erase? */
263 if (len
== flash
->mtd
.size
) {
264 if (erase_chip(flash
)) {
265 instr
->state
= MTD_ERASE_FAILED
;
266 mutex_unlock(&flash
->lock
);
270 /* REVISIT in some cases we could speed up erasing large regions
271 * by using OPCODE_SE instead of OPCODE_BE_4K. We may have set up
272 * to use "small sector erase", but that's not always optimal.
275 /* "sector"-at-a-time erase */
278 if (erase_sector(flash
, addr
)) {
279 instr
->state
= MTD_ERASE_FAILED
;
280 mutex_unlock(&flash
->lock
);
284 addr
+= mtd
->erasesize
;
285 len
-= mtd
->erasesize
;
289 mutex_unlock(&flash
->lock
);
291 instr
->state
= MTD_ERASE_DONE
;
292 mtd_erase_callback(instr
);
298 * Read an address range from the flash chip. The address range
299 * may be any size provided it is within the physical boundaries.
301 static int m25p80_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
302 size_t *retlen
, u_char
*buf
)
304 struct m25p
*flash
= mtd_to_m25p(mtd
);
305 struct spi_transfer t
[2];
306 struct spi_message m
;
308 DEBUG(MTD_DEBUG_LEVEL2
, "%s: %s %s 0x%08x, len %zd\n",
309 dev_name(&flash
->spi
->dev
), __func__
, "from",
316 if (from
+ len
> flash
->mtd
.size
)
319 spi_message_init(&m
);
320 memset(t
, 0, (sizeof t
));
323 * OPCODE_FAST_READ (if available) is faster.
324 * Should add 1 byte DUMMY_BYTE.
326 t
[0].tx_buf
= flash
->command
;
327 t
[0].len
= CMD_SIZE
+ FAST_READ_DUMMY_BYTE
;
328 spi_message_add_tail(&t
[0], &m
);
332 spi_message_add_tail(&t
[1], &m
);
334 /* Byte count starts at zero. */
338 mutex_lock(&flash
->lock
);
340 /* Wait till previous write/erase is done. */
341 if (wait_till_ready(flash
)) {
342 /* REVISIT status return?? */
343 mutex_unlock(&flash
->lock
);
347 /* FIXME switch to OPCODE_FAST_READ. It's required for higher
348 * clocks; and at this writing, every chip this driver handles
349 * supports that opcode.
352 /* Set up the write data buffer. */
353 flash
->command
[0] = OPCODE_READ
;
354 flash
->command
[1] = from
>> 16;
355 flash
->command
[2] = from
>> 8;
356 flash
->command
[3] = from
;
358 spi_sync(flash
->spi
, &m
);
360 *retlen
= m
.actual_length
- CMD_SIZE
- FAST_READ_DUMMY_BYTE
;
362 mutex_unlock(&flash
->lock
);
368 * Write an address range to the flash chip. Data must be written in
369 * FLASH_PAGESIZE chunks. The address range may be any size provided
370 * it is within the physical boundaries.
372 static int m25p80_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
373 size_t *retlen
, const u_char
*buf
)
375 struct m25p
*flash
= mtd_to_m25p(mtd
);
376 u32 page_offset
, page_size
;
377 struct spi_transfer t
[2];
378 struct spi_message m
;
380 DEBUG(MTD_DEBUG_LEVEL2
, "%s: %s %s 0x%08x, len %zd\n",
381 dev_name(&flash
->spi
->dev
), __func__
, "to",
391 if (to
+ len
> flash
->mtd
.size
)
394 spi_message_init(&m
);
395 memset(t
, 0, (sizeof t
));
397 t
[0].tx_buf
= flash
->command
;
399 spi_message_add_tail(&t
[0], &m
);
402 spi_message_add_tail(&t
[1], &m
);
404 mutex_lock(&flash
->lock
);
406 /* Wait until finished previous write command. */
407 if (wait_till_ready(flash
)) {
408 mutex_unlock(&flash
->lock
);
414 /* Set up the opcode in the write buffer. */
415 flash
->command
[0] = OPCODE_PP
;
416 flash
->command
[1] = to
>> 16;
417 flash
->command
[2] = to
>> 8;
418 flash
->command
[3] = to
;
420 /* what page do we start with? */
421 page_offset
= to
% FLASH_PAGESIZE
;
423 /* do all the bytes fit onto one page? */
424 if (page_offset
+ len
<= FLASH_PAGESIZE
) {
427 spi_sync(flash
->spi
, &m
);
429 *retlen
= m
.actual_length
- CMD_SIZE
;
433 /* the size of data remaining on the first page */
434 page_size
= FLASH_PAGESIZE
- page_offset
;
436 t
[1].len
= page_size
;
437 spi_sync(flash
->spi
, &m
);
439 *retlen
= m
.actual_length
- CMD_SIZE
;
441 /* write everything in PAGESIZE chunks */
442 for (i
= page_size
; i
< len
; i
+= page_size
) {
444 if (page_size
> FLASH_PAGESIZE
)
445 page_size
= FLASH_PAGESIZE
;
447 /* write the next page to flash */
448 flash
->command
[1] = (to
+ i
) >> 16;
449 flash
->command
[2] = (to
+ i
) >> 8;
450 flash
->command
[3] = (to
+ i
);
452 t
[1].tx_buf
= buf
+ i
;
453 t
[1].len
= page_size
;
455 wait_till_ready(flash
);
459 spi_sync(flash
->spi
, &m
);
462 *retlen
+= m
.actual_length
- CMD_SIZE
;
466 mutex_unlock(&flash
->lock
);
471 static int sst_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
472 size_t *retlen
, const u_char
*buf
)
474 struct m25p
*flash
= mtd_to_m25p(mtd
);
475 struct spi_transfer t
[2];
476 struct spi_message m
;
487 if (to
+ len
> flash
->mtd
.size
)
490 spi_message_init(&m
);
491 memset(t
, 0, (sizeof t
));
493 t
[0].tx_buf
= flash
->command
;
495 spi_message_add_tail(&t
[0], &m
);
498 spi_message_add_tail(&t
[1], &m
);
500 mutex_lock(&flash
->lock
);
502 /* Wait until finished previous write command. */
503 ret
= wait_till_ready(flash
);
510 /* Start write from odd address. */
512 flash
->command
[0] = OPCODE_BP
;
513 flash
->command
[1] = to
>> 16;
514 flash
->command
[2] = to
>> 8;
515 flash
->command
[3] = to
;
517 /* write one byte. */
519 spi_sync(flash
->spi
, &m
);
520 ret
= wait_till_ready(flash
);
523 *retlen
+= m
.actual_length
- CMD_SIZE
;
527 flash
->command
[0] = OPCODE_AAI_WP
;
528 flash
->command
[1] = to
>> 16;
529 flash
->command
[2] = to
>> 8;
530 flash
->command
[3] = to
;
532 /* Write out most of the data here. */
534 for (; actual
< len
- 1; actual
+= 2) {
536 /* write two bytes. */
538 t
[1].tx_buf
= buf
+ actual
;
540 spi_sync(flash
->spi
, &m
);
541 ret
= wait_till_ready(flash
);
544 *retlen
+= m
.actual_length
- cmd_sz
;
548 write_disable(flash
);
549 ret
= wait_till_ready(flash
);
553 /* Write out trailing byte if it exists. */
556 flash
->command
[0] = OPCODE_BP
;
557 flash
->command
[1] = to
>> 16;
558 flash
->command
[2] = to
>> 8;
559 flash
->command
[3] = to
;
562 t
[1].tx_buf
= buf
+ actual
;
564 spi_sync(flash
->spi
, &m
);
565 ret
= wait_till_ready(flash
);
568 *retlen
+= m
.actual_length
- CMD_SIZE
;
569 write_disable(flash
);
573 mutex_unlock(&flash
->lock
);
577 /****************************************************************************/
580 * SPI device driver setup and teardown
586 /* JEDEC id zero means "no ID" (most older chips); otherwise it has
587 * a high byte of zero plus three data bytes: the manufacturer id,
588 * then a two byte device id.
593 /* The size listed here is what works with OPCODE_SE, which isn't
594 * necessarily called a "sector" by the vendor.
596 unsigned sector_size
;
600 #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
604 /* NOTE: double check command sets and memory organization when you add
605 * more flash chips. This current list focusses on newer chips, which
606 * have been converging on command sets which including JEDEC ID.
608 static struct flash_info __devinitdata m25p_data
[] = {
610 /* Atmel -- some are (confusingly) marketed as "DataFlash" */
611 { "at25fs010", 0x1f6601, 0, 32 * 1024, 4, SECT_4K
, },
612 { "at25fs040", 0x1f6604, 0, 64 * 1024, 8, SECT_4K
, },
614 { "at25df041a", 0x1f4401, 0, 64 * 1024, 8, SECT_4K
, },
615 { "at25df641", 0x1f4800, 0, 64 * 1024, 128, SECT_4K
, },
617 { "at26f004", 0x1f0400, 0, 64 * 1024, 8, SECT_4K
, },
618 { "at26df081a", 0x1f4501, 0, 64 * 1024, 16, SECT_4K
, },
619 { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K
, },
620 { "at26df321", 0x1f4701, 0, 64 * 1024, 64, SECT_4K
, },
623 { "mx25l3205d", 0xc22016, 0, 64 * 1024, 64, },
624 { "mx25l6405d", 0xc22017, 0, 64 * 1024, 128, },
625 { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
626 { "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
628 /* Spansion -- single (large) sector size only, at least
629 * for the chips listed here (without boot sectors).
631 { "s25sl004a", 0x010212, 0, 64 * 1024, 8, },
632 { "s25sl008a", 0x010213, 0, 64 * 1024, 16, },
633 { "s25sl016a", 0x010214, 0, 64 * 1024, 32, },
634 { "s25sl032a", 0x010215, 0, 64 * 1024, 64, },
635 { "s25sl064a", 0x010216, 0, 64 * 1024, 128, },
636 { "s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, },
637 { "s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, },
638 { "s25fl129p0", 0x012018, 0x4d00, 256 * 1024, 64, },
639 { "s25fl129p1", 0x012018, 0x4d01, 64 * 1024, 256, },
641 /* SST -- large erase sizes are "overlays", "sectors" are 4K */
642 { "sst25vf040b", 0xbf258d, 0, 64 * 1024, 8, SECT_4K
, },
643 { "sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K
, },
644 { "sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K
, },
645 { "sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K
, },
646 { "sst25wf512", 0xbf2501, 0, 64 * 1024, 1, SECT_4K
, },
647 { "sst25wf010", 0xbf2502, 0, 64 * 1024, 2, SECT_4K
, },
648 { "sst25wf020", 0xbf2503, 0, 64 * 1024, 4, SECT_4K
, },
649 { "sst25wf040", 0xbf2504, 0, 64 * 1024, 8, SECT_4K
, },
651 /* ST Microelectronics -- newer production may have feature updates */
652 { "m25p05", 0x202010, 0, 32 * 1024, 2, },
653 { "m25p10", 0x202011, 0, 32 * 1024, 4, },
654 { "m25p20", 0x202012, 0, 64 * 1024, 4, },
655 { "m25p40", 0x202013, 0, 64 * 1024, 8, },
656 { "m25p80", 0, 0, 64 * 1024, 16, },
657 { "m25p16", 0x202015, 0, 64 * 1024, 32, },
658 { "m25p32", 0x202016, 0, 64 * 1024, 64, },
659 { "m25p64", 0x202017, 0, 64 * 1024, 128, },
660 { "m25p128", 0x202018, 0, 256 * 1024, 64, },
662 { "m45pe10", 0x204011, 0, 64 * 1024, 2, },
663 { "m45pe80", 0x204014, 0, 64 * 1024, 16, },
664 { "m45pe16", 0x204015, 0, 64 * 1024, 32, },
666 { "m25pe80", 0x208014, 0, 64 * 1024, 16, },
667 { "m25pe16", 0x208015, 0, 64 * 1024, 32, SECT_4K
, },
669 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
670 { "w25x10", 0xef3011, 0, 64 * 1024, 2, SECT_4K
, },
671 { "w25x20", 0xef3012, 0, 64 * 1024, 4, SECT_4K
, },
672 { "w25x40", 0xef3013, 0, 64 * 1024, 8, SECT_4K
, },
673 { "w25x80", 0xef3014, 0, 64 * 1024, 16, SECT_4K
, },
674 { "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K
, },
675 { "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K
, },
676 { "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K
, },
679 static struct flash_info
*__devinit
jedec_probe(struct spi_device
*spi
)
682 u8 code
= OPCODE_RDID
;
686 struct flash_info
*info
;
688 /* JEDEC also defines an optional "extended device information"
689 * string for after vendor-specific data, after the three bytes
690 * we use here. Supporting some chips might require using it.
692 tmp
= spi_write_then_read(spi
, &code
, 1, id
, 5);
694 DEBUG(MTD_DEBUG_LEVEL0
, "%s: error %d reading JEDEC ID\n",
695 dev_name(&spi
->dev
), tmp
);
704 ext_jedec
= id
[3] << 8 | id
[4];
706 for (tmp
= 0, info
= m25p_data
;
707 tmp
< ARRAY_SIZE(m25p_data
);
709 if (info
->jedec_id
== jedec
) {
710 if (info
->ext_id
!= 0 && info
->ext_id
!= ext_jedec
)
715 dev_err(&spi
->dev
, "unrecognized JEDEC id %06x\n", jedec
);
721 * board specific setup should have ensured the SPI clock used here
722 * matches what the READ command supports, at least until this driver
723 * understands FAST_READ (for clocks over 25 MHz).
725 static int __devinit
m25p_probe(struct spi_device
*spi
)
727 struct flash_platform_data
*data
;
729 struct flash_info
*info
;
732 /* Platform data helps sort out which chip type we have, as
733 * well as how this board partitions it. If we don't have
734 * a chip ID, try the JEDEC id commands; they'll work for most
735 * newer chips, even if we don't recognize the particular chip.
737 data
= spi
->dev
.platform_data
;
738 if (data
&& data
->type
) {
739 for (i
= 0, info
= m25p_data
;
740 i
< ARRAY_SIZE(m25p_data
);
742 if (strcmp(data
->type
, info
->name
) == 0)
746 /* unrecognized chip? */
747 if (i
== ARRAY_SIZE(m25p_data
)) {
748 DEBUG(MTD_DEBUG_LEVEL0
, "%s: unrecognized id %s\n",
749 dev_name(&spi
->dev
), data
->type
);
752 /* recognized; is that chip really what's there? */
753 } else if (info
->jedec_id
) {
754 struct flash_info
*chip
= jedec_probe(spi
);
756 if (!chip
|| chip
!= info
) {
757 dev_warn(&spi
->dev
, "found %s, expected %s\n",
758 chip
? chip
->name
: "UNKNOWN",
764 info
= jedec_probe(spi
);
769 flash
= kzalloc(sizeof *flash
, GFP_KERNEL
);
772 flash
->command
= kmalloc(CMD_SIZE
+ FAST_READ_DUMMY_BYTE
, GFP_KERNEL
);
773 if (!flash
->command
) {
779 mutex_init(&flash
->lock
);
780 dev_set_drvdata(&spi
->dev
, flash
);
783 * Atmel and SST serial flash tend to power
784 * up with the software protection bits set
787 if (info
->jedec_id
>> 16 == 0x1f ||
788 info
->jedec_id
>> 16 == 0xbf) {
793 if (data
&& data
->name
)
794 flash
->mtd
.name
= data
->name
;
796 flash
->mtd
.name
= dev_name(&spi
->dev
);
798 flash
->mtd
.type
= MTD_NORFLASH
;
799 flash
->mtd
.writesize
= 1;
800 flash
->mtd
.flags
= MTD_CAP_NORFLASH
;
801 flash
->mtd
.size
= info
->sector_size
* info
->n_sectors
;
802 flash
->mtd
.erase
= m25p80_erase
;
803 flash
->mtd
.read
= m25p80_read
;
805 /* sst flash chips use AAI word program */
806 if (info
->jedec_id
>> 16 == 0xbf)
807 flash
->mtd
.write
= sst_write
;
809 flash
->mtd
.write
= m25p80_write
;
811 /* prefer "small sector" erase if possible */
812 if (info
->flags
& SECT_4K
) {
813 flash
->erase_opcode
= OPCODE_BE_4K
;
814 flash
->mtd
.erasesize
= 4096;
816 flash
->erase_opcode
= OPCODE_SE
;
817 flash
->mtd
.erasesize
= info
->sector_size
;
820 flash
->mtd
.dev
.parent
= &spi
->dev
;
822 dev_info(&spi
->dev
, "%s (%lld Kbytes)\n", info
->name
,
823 (long long)flash
->mtd
.size
>> 10);
825 DEBUG(MTD_DEBUG_LEVEL2
,
826 "mtd .name = %s, .size = 0x%llx (%lldMiB) "
827 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
829 (long long)flash
->mtd
.size
, (long long)(flash
->mtd
.size
>> 20),
830 flash
->mtd
.erasesize
, flash
->mtd
.erasesize
/ 1024,
831 flash
->mtd
.numeraseregions
);
833 if (flash
->mtd
.numeraseregions
)
834 for (i
= 0; i
< flash
->mtd
.numeraseregions
; i
++)
835 DEBUG(MTD_DEBUG_LEVEL2
,
836 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
837 ".erasesize = 0x%.8x (%uKiB), "
838 ".numblocks = %d }\n",
839 i
, (long long)flash
->mtd
.eraseregions
[i
].offset
,
840 flash
->mtd
.eraseregions
[i
].erasesize
,
841 flash
->mtd
.eraseregions
[i
].erasesize
/ 1024,
842 flash
->mtd
.eraseregions
[i
].numblocks
);
845 /* partitions should match sector boundaries; and it may be good to
846 * use readonly partitions for writeprotected sectors (BP2..BP0).
848 if (mtd_has_partitions()) {
849 struct mtd_partition
*parts
= NULL
;
852 if (mtd_has_cmdlinepart()) {
853 static const char *part_probes
[]
854 = { "cmdlinepart", NULL
, };
856 nr_parts
= parse_mtd_partitions(&flash
->mtd
,
857 part_probes
, &parts
, 0);
860 if (nr_parts
<= 0 && data
&& data
->parts
) {
862 nr_parts
= data
->nr_parts
;
866 for (i
= 0; i
< nr_parts
; i
++) {
867 DEBUG(MTD_DEBUG_LEVEL2
, "partitions[%d] = "
868 "{.name = %s, .offset = 0x%llx, "
869 ".size = 0x%llx (%lldKiB) }\n",
871 (long long)parts
[i
].offset
,
872 (long long)parts
[i
].size
,
873 (long long)(parts
[i
].size
>> 10));
875 flash
->partitioned
= 1;
876 return add_mtd_partitions(&flash
->mtd
, parts
, nr_parts
);
878 } else if (data
&& data
->nr_parts
)
879 dev_warn(&spi
->dev
, "ignoring %d default partitions on %s\n",
880 data
->nr_parts
, data
->name
);
882 return add_mtd_device(&flash
->mtd
) == 1 ? -ENODEV
: 0;
886 static int __devexit
m25p_remove(struct spi_device
*spi
)
888 struct m25p
*flash
= dev_get_drvdata(&spi
->dev
);
891 /* Clean up MTD stuff. */
892 if (mtd_has_partitions() && flash
->partitioned
)
893 status
= del_mtd_partitions(&flash
->mtd
);
895 status
= del_mtd_device(&flash
->mtd
);
897 kfree(flash
->command
);
904 static struct spi_driver m25p80_driver
= {
907 .bus
= &spi_bus_type
,
908 .owner
= THIS_MODULE
,
911 .remove
= __devexit_p(m25p_remove
),
913 /* REVISIT: many of these chips have deep power-down modes, which
914 * should clearly be entered on suspend() to minimize power use.
915 * And also when they're otherwise idle...
920 static int __init
m25p80_init(void)
922 return spi_register_driver(&m25p80_driver
);
926 static void __exit
m25p80_exit(void)
928 spi_unregister_driver(&m25p80_driver
);
932 module_init(m25p80_init
);
933 module_exit(m25p80_exit
);
935 MODULE_LICENSE("GPL");
936 MODULE_AUTHOR("Mike Lavender");
937 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");