arch/mn10300/unit-asb2305/pci-asb2305.c

   1 /* ASB2305 PCI resource stuff
   2  *
   3  * Copyright (C) 2001 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  * - Derived from arch/i386/pci-i386.c
   6  *   - Copyright 1997--2000 Martin Mares <mj@suse.cz>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public Licence
  10  * as published by the Free Software Foundation; either version
  11  * 2 of the Licence, or (at your option) any later version.
  12  */
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/pci.h>
  16 #include <linux/init.h>
  17 #include <linux/ioport.h>
  18 #include <linux/errno.h>
  19 #include "pci-asb2305.h"
  20
  21 /*
  22  * We need to avoid collisions with `mirrored' VGA ports
  23  * and other strange ISA hardware, so we always want the
  24  * addresses to be allocated in the 0x000-0x0ff region
  25  * modulo 0x400.
  26  *
  27  * Why? Because some silly external IO cards only decode
  28  * the low 10 bits of the IO address. The 0x00-0xff region
  29  * is reserved for motherboard devices that decode all 16
  30  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
  31  * but we want to try to avoid allocating at 0x2900-0x2bff
  32  * which might have be mirrored at 0x0100-0x03ff..
  33  */
  34 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  35                                 resource_size_t size, resource_size_t align)
  36 {
  37         resource_size_t start = res->start;
  38
  39 #if 0
  40         struct pci_dev *dev = data;
  41
  42         printk(KERN_DEBUG
  43                "### PCIBIOS_ALIGN_RESOURCE(%s,,{%08lx-%08lx,%08lx},%lx)\n",
  44                pci_name(dev),
  45                res->start,
  46                res->end,
  47                res->flags,
  48                size
  49                );
  50 #endif
  51
  52         if ((res->flags & IORESOURCE_IO) && (start & 0x300))
  53                 start = (start + 0x3ff) & ~0x3ff;
  54
  55         return start;
  56 }
  57
  58
  59 /*
  60  *  Handle resources of PCI devices.  If the world were perfect, we could
  61  *  just allocate all the resource regions and do nothing more.  It isn't.
  62  *  On the other hand, we cannot just re-allocate all devices, as it would
  63  *  require us to know lots of host bridge internals.  So we attempt to
  64  *  keep as much of the original configuration as possible, but tweak it
  65  *  when it's found to be wrong.
  66  *
  67  *  Known BIOS problems we have to work around:
  68  *      - I/O or memory regions not configured
  69  *      - regions configured, but not enabled in the command register
  70  *      - bogus I/O addresses above 64K used
  71  *      - expansion ROMs left enabled (this may sound harmless, but given
  72  *        the fact the PCI specs explicitly allow address decoders to be
  73  *        shared between expansion ROMs and other resource regions, it's
  74  *        at least dangerous)
  75  *
  76  *  Our solution:
  77  *      (1) Allocate resources for all buses behind PCI-to-PCI bridges.
  78  *          This gives us fixed barriers on where we can allocate.
  79  *      (2) Allocate resources for all enabled devices.  If there is
  80  *          a collision, just mark the resource as unallocated. Also
  81  *          disable expansion ROMs during this step.
  82  *      (3) Try to allocate resources for disabled devices.  If the
  83  *          resources were assigned correctly, everything goes well,
  84  *          if they weren't, they won't disturb allocation of other
  85  *          resources.
  86  *      (4) Assign new addresses to resources which were either
  87  *          not configured at all or misconfigured.  If explicitly
  88  *          requested by the user, configure expansion ROM address
  89  *          as well.
  90  */
  91 static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
  92 {
  93         struct pci_bus *bus;
  94         struct pci_dev *dev;
  95         int idx;
  96         struct resource *r, *pr;
  97
  98         /* Depth-First Search on bus tree */
  99         list_for_each_entry(bus, bus_list, node) {
 100                 dev = bus->self;
 101                 if (dev) {
 102                         for (idx = PCI_BRIDGE_RESOURCES;
 103                              idx < PCI_NUM_RESOURCES;
 104                              idx++) {
 105                                 r = &dev->resource[idx];
 106                                 if (!r->flags)
 107                                         continue;
 108                                 pr = pci_find_parent_resource(dev, r);
 109                                 if (!r->start ||
 110                                     !pr ||
 111                                     request_resource(pr, r) < 0) {
 112                                         printk(KERN_ERR "PCI:"
 113                                                " Cannot allocate resource"
 114                                                " region %d of bridge %s\n",
 115                                                idx, pci_name(dev));
 116                                         /* Something is wrong with the region.
 117                                          * Invalidate the resource to prevent
 118                                          * child resource allocations in this
 119                                          * range. */
 120                                         r->flags = 0;
 121                                 }
 122                         }
 123                 }
 124                 pcibios_allocate_bus_resources(&bus->children);
 125         }
 126 }
 127
 128 static void __init pcibios_allocate_resources(int pass)
 129 {
 130         struct pci_dev *dev = NULL;
 131         int idx, disabled;
 132         u16 command;
 133         struct resource *r, *pr;
 134
 135         for_each_pci_dev(dev) {
 136                 pci_read_config_word(dev, PCI_COMMAND, &command);
 137                 for (idx = 0; idx < 6; idx++) {
 138                         r = &dev->resource[idx];
 139                         if (r->parent)          /* Already allocated */
 140                                 continue;
 141                         if (!r->start)          /* Address not assigned */
 142                                 continue;
 143                         if (r->flags & IORESOURCE_IO)
 144                                 disabled = !(command & PCI_COMMAND_IO);
 145                         else
 146                                 disabled = !(command & PCI_COMMAND_MEMORY);
 147                         if (pass == disabled) {
 148                                 DBG("PCI[%s]: Resource %08lx-%08lx"
 149                                     " (f=%lx, d=%d, p=%d)\n",
 150                                     pci_name(dev), r->start, r->end, r->flags,
 151                                     disabled, pass);
 152                                 pr = pci_find_parent_resource(dev, r);
 153                                 if (!pr || request_resource(pr, r) < 0) {
 154                                         printk(KERN_ERR "PCI:"
 155                                                " Cannot allocate resource"
 156                                                " region %d of device %s\n",
 157                                                idx, pci_name(dev));
 158                                         /* We'll assign a new address later */
 159                                         r->end -= r->start;
 160                                         r->start = 0;
 161                                 }
 162                         }
 163                 }
 164                 if (!pass) {
 165                         r = &dev->resource[PCI_ROM_RESOURCE];
 166                         if (r->flags & IORESOURCE_ROM_ENABLE) {
 167                                 /* Turn the ROM off, leave the resource region,
 168                                  * but keep it unregistered. */
 169                                 u32 reg;
 170                                 DBG("PCI: Switching off ROM of %s\n",
 171                                     pci_name(dev));
 172                                 r->flags &= ~IORESOURCE_ROM_ENABLE;
 173                                 pci_read_config_dword(
 174                                         dev, dev->rom_base_reg, &reg);
 175                                 pci_write_config_dword(
 176                                         dev, dev->rom_base_reg,
 177                                         reg & ~PCI_ROM_ADDRESS_ENABLE);
 178                         }
 179                 }
 180         }
 181 }
 182
 183 static int __init pcibios_assign_resources(void)
 184 {
 185         struct pci_dev *dev = NULL;
 186         struct resource *r, *pr;
 187
 188         if (!(pci_probe & PCI_ASSIGN_ROMS)) {
 189                 /* Try to use BIOS settings for ROMs, otherwise let
 190                    pci_assign_unassigned_resources() allocate the new
 191                    addresses. */
 192                 for_each_pci_dev(dev) {
 193                         r = &dev->resource[PCI_ROM_RESOURCE];
 194                         if (!r->flags || !r->start)
 195                                 continue;
 196                         pr = pci_find_parent_resource(dev, r);
 197                         if (!pr || request_resource(pr, r) < 0) {
 198                                 r->end -= r->start;
 199                                 r->start = 0;
 200                         }
 201                 }
 202         }
 203
 204         pci_assign_unassigned_resources();
 205
 206         return 0;
 207 }
 208
 209 fs_initcall(pcibios_assign_resources);
 210
 211 void __init pcibios_resource_survey(void)
 212 {
 213         DBG("PCI: Allocating resources\n");
 214         pcibios_allocate_bus_resources(&pci_root_buses);
 215         pcibios_allocate_resources(0);
 216         pcibios_allocate_resources(1);
 217 }
 218
 219 /*
 220  *  If we set up a device for bus mastering, we need to check the latency
 221  *  timer as certain crappy BIOSes forget to set it properly.
 222  */
 223 unsigned int pcibios_max_latency = 255;
 224
 225 void pcibios_set_master(struct pci_dev *dev)
 226 {
 227         u8 lat;
 228
 229         pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
 230
 231         if (lat < 16)
 232                 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
 233         else if (lat > pcibios_max_latency)
 234                 lat = pcibios_max_latency;
 235         else
 236                 return;
 237
 238         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
 239 }
 240
 241 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 242                         enum pci_mmap_state mmap_state, int write_combine)
 243 {
 244         unsigned long prot;
 245
 246         /* Leave vm_pgoff as-is, the PCI space address is the physical
 247          * address on this platform.
 248          */
 249         vma->vm_flags |= VM_LOCKED | VM_IO;
 250
 251         prot = pgprot_val(vma->vm_page_prot);
 252         prot &= ~_PAGE_CACHE;
 253         vma->vm_page_prot = __pgprot(prot);
 254
 255         /* Write-combine setting is ignored */
 256         if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
 257                                vma->vm_end - vma->vm_start,
 258                                vma->vm_page_prot))
 259                 return -EAGAIN;
 260
 261         return 0;
 262 }