[POWERPC] Enable tickless idle and high res timers for powerpc
[pohmelfs.git] / arch / powerpc / platforms / iseries / setup.c
blob37ae07ee54a9886944d5f15e932deac4abeb9432
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #undef DEBUG
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/seq_file.h>
25 #include <linux/kdev_t.h>
26 #include <linux/major.h>
27 #include <linux/root_dev.h>
28 #include <linux/kernel.h>
29 #include <linux/hrtimer.h>
30 #include <linux/tick.h>
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
34 #include <asm/page.h>
35 #include <asm/mmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42 #include <asm/system.h>
43 #include <asm/time.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/abs_addr.h>
47 #include <asm/iseries/hv_lp_config.h>
48 #include <asm/iseries/hv_call_event.h>
49 #include <asm/iseries/hv_call_xm.h>
50 #include <asm/iseries/it_lp_queue.h>
51 #include <asm/iseries/mf.h>
52 #include <asm/iseries/hv_lp_event.h>
53 #include <asm/iseries/lpar_map.h>
54 #include <asm/udbg.h>
55 #include <asm/irq.h>
57 #include "naca.h"
58 #include "setup.h"
59 #include "irq.h"
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "it_lp_naca.h"
63 #include "main_store.h"
64 #include "call_sm.h"
65 #include "call_hpt.h"
67 #ifdef DEBUG
68 #define DBG(fmt...) udbg_printf(fmt)
69 #else
70 #define DBG(fmt...)
71 #endif
73 /* Function Prototypes */
74 static unsigned long build_iSeries_Memory_Map(void);
75 static void iseries_shared_idle(void);
76 static void iseries_dedicated_idle(void);
77 #ifdef CONFIG_PCI
78 extern void iSeries_pci_final_fixup(void);
79 #else
80 static void iSeries_pci_final_fixup(void) { }
81 #endif
84 struct MemoryBlock {
85 unsigned long absStart;
86 unsigned long absEnd;
87 unsigned long logicalStart;
88 unsigned long logicalEnd;
92 * Process the main store vpd to determine where the holes in memory are
93 * and return the number of physical blocks and fill in the array of
94 * block data.
96 static unsigned long iSeries_process_Condor_mainstore_vpd(
97 struct MemoryBlock *mb_array, unsigned long max_entries)
99 unsigned long holeFirstChunk, holeSizeChunks;
100 unsigned long numMemoryBlocks = 1;
101 struct IoHriMainStoreSegment4 *msVpd =
102 (struct IoHriMainStoreSegment4 *)xMsVpd;
103 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
104 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
105 unsigned long holeSize = holeEnd - holeStart;
107 printk("Mainstore_VPD: Condor\n");
109 * Determine if absolute memory has any
110 * holes so that we can interpret the
111 * access map we get back from the hypervisor
112 * correctly.
114 mb_array[0].logicalStart = 0;
115 mb_array[0].logicalEnd = 0x100000000;
116 mb_array[0].absStart = 0;
117 mb_array[0].absEnd = 0x100000000;
119 if (holeSize) {
120 numMemoryBlocks = 2;
121 holeStart = holeStart & 0x000fffffffffffff;
122 holeStart = addr_to_chunk(holeStart);
123 holeFirstChunk = holeStart;
124 holeSize = addr_to_chunk(holeSize);
125 holeSizeChunks = holeSize;
126 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
127 holeFirstChunk, holeSizeChunks );
128 mb_array[0].logicalEnd = holeFirstChunk;
129 mb_array[0].absEnd = holeFirstChunk;
130 mb_array[1].logicalStart = holeFirstChunk;
131 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
132 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
133 mb_array[1].absEnd = 0x100000000;
135 return numMemoryBlocks;
138 #define MaxSegmentAreas 32
139 #define MaxSegmentAdrRangeBlocks 128
140 #define MaxAreaRangeBlocks 4
142 static unsigned long iSeries_process_Regatta_mainstore_vpd(
143 struct MemoryBlock *mb_array, unsigned long max_entries)
145 struct IoHriMainStoreSegment5 *msVpdP =
146 (struct IoHriMainStoreSegment5 *)xMsVpd;
147 unsigned long numSegmentBlocks = 0;
148 u32 existsBits = msVpdP->msAreaExists;
149 unsigned long area_num;
151 printk("Mainstore_VPD: Regatta\n");
153 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
154 unsigned long numAreaBlocks;
155 struct IoHriMainStoreArea4 *currentArea;
157 if (existsBits & 0x80000000) {
158 unsigned long block_num;
160 currentArea = &msVpdP->msAreaArray[area_num];
161 numAreaBlocks = currentArea->numAdrRangeBlocks;
162 printk("ms_vpd: processing area %2ld blocks=%ld",
163 area_num, numAreaBlocks);
164 for (block_num = 0; block_num < numAreaBlocks;
165 ++block_num ) {
166 /* Process an address range block */
167 struct MemoryBlock tempBlock;
168 unsigned long i;
170 tempBlock.absStart =
171 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
172 tempBlock.absEnd =
173 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
174 tempBlock.logicalStart = 0;
175 tempBlock.logicalEnd = 0;
176 printk("\n block %ld absStart=%016lx absEnd=%016lx",
177 block_num, tempBlock.absStart,
178 tempBlock.absEnd);
180 for (i = 0; i < numSegmentBlocks; ++i) {
181 if (mb_array[i].absStart ==
182 tempBlock.absStart)
183 break;
185 if (i == numSegmentBlocks) {
186 if (numSegmentBlocks == max_entries)
187 panic("iSeries_process_mainstore_vpd: too many memory blocks");
188 mb_array[numSegmentBlocks] = tempBlock;
189 ++numSegmentBlocks;
190 } else
191 printk(" (duplicate)");
193 printk("\n");
195 existsBits <<= 1;
197 /* Now sort the blocks found into ascending sequence */
198 if (numSegmentBlocks > 1) {
199 unsigned long m, n;
201 for (m = 0; m < numSegmentBlocks - 1; ++m) {
202 for (n = numSegmentBlocks - 1; m < n; --n) {
203 if (mb_array[n].absStart <
204 mb_array[n-1].absStart) {
205 struct MemoryBlock tempBlock;
207 tempBlock = mb_array[n];
208 mb_array[n] = mb_array[n-1];
209 mb_array[n-1] = tempBlock;
215 * Assign "logical" addresses to each block. These
216 * addresses correspond to the hypervisor "bitmap" space.
217 * Convert all addresses into units of 256K chunks.
220 unsigned long i, nextBitmapAddress;
222 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
223 nextBitmapAddress = 0;
224 for (i = 0; i < numSegmentBlocks; ++i) {
225 unsigned long length = mb_array[i].absEnd -
226 mb_array[i].absStart;
228 mb_array[i].logicalStart = nextBitmapAddress;
229 mb_array[i].logicalEnd = nextBitmapAddress + length;
230 nextBitmapAddress += length;
231 printk(" Bitmap range: %016lx - %016lx\n"
232 " Absolute range: %016lx - %016lx\n",
233 mb_array[i].logicalStart,
234 mb_array[i].logicalEnd,
235 mb_array[i].absStart, mb_array[i].absEnd);
236 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
237 0x000fffffffffffff);
238 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
239 0x000fffffffffffff);
240 mb_array[i].logicalStart =
241 addr_to_chunk(mb_array[i].logicalStart);
242 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
246 return numSegmentBlocks;
249 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
250 unsigned long max_entries)
252 unsigned long i;
253 unsigned long mem_blocks = 0;
255 if (cpu_has_feature(CPU_FTR_SLB))
256 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
257 max_entries);
258 else
259 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
260 max_entries);
262 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
263 for (i = 0; i < mem_blocks; ++i) {
264 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
265 " abs chunks %016lx - %016lx\n",
266 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
267 mb_array[i].absStart, mb_array[i].absEnd);
269 return mem_blocks;
272 static void __init iSeries_get_cmdline(void)
274 char *p, *q;
276 /* copy the command line parameter from the primary VSP */
277 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
278 HvLpDma_Direction_RemoteToLocal);
280 p = cmd_line;
281 q = cmd_line + 255;
282 while(p < q) {
283 if (!*p || *p == '\n')
284 break;
285 ++p;
287 *p = 0;
290 static void __init iSeries_init_early(void)
292 DBG(" -> iSeries_init_early()\n");
294 /* Snapshot the timebase, for use in later recalibration */
295 iSeries_time_init_early();
298 * Initialize the DMA/TCE management
300 iommu_init_early_iSeries();
302 /* Initialize machine-dependency vectors */
303 #ifdef CONFIG_SMP
304 smp_init_iSeries();
305 #endif
307 /* Associate Lp Event Queue 0 with processor 0 */
308 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
310 mf_init();
312 DBG(" <- iSeries_init_early()\n");
315 struct mschunks_map mschunks_map = {
316 /* XXX We don't use these, but Piranha might need them. */
317 .chunk_size = MSCHUNKS_CHUNK_SIZE,
318 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
319 .chunk_mask = MSCHUNKS_OFFSET_MASK,
321 EXPORT_SYMBOL(mschunks_map);
323 void mschunks_alloc(unsigned long num_chunks)
325 klimit = _ALIGN(klimit, sizeof(u32));
326 mschunks_map.mapping = (u32 *)klimit;
327 klimit += num_chunks * sizeof(u32);
328 mschunks_map.num_chunks = num_chunks;
332 * The iSeries may have very large memories ( > 128 GB ) and a partition
333 * may get memory in "chunks" that may be anywhere in the 2**52 real
334 * address space. The chunks are 256K in size. To map this to the
335 * memory model Linux expects, the AS/400 specific code builds a
336 * translation table to translate what Linux thinks are "physical"
337 * addresses to the actual real addresses. This allows us to make
338 * it appear to Linux that we have contiguous memory starting at
339 * physical address zero while in fact this could be far from the truth.
340 * To avoid confusion, I'll let the words physical and/or real address
341 * apply to the Linux addresses while I'll use "absolute address" to
342 * refer to the actual hardware real address.
344 * build_iSeries_Memory_Map gets information from the Hypervisor and
345 * looks at the Main Store VPD to determine the absolute addresses
346 * of the memory that has been assigned to our partition and builds
347 * a table used to translate Linux's physical addresses to these
348 * absolute addresses. Absolute addresses are needed when
349 * communicating with the hypervisor (e.g. to build HPT entries)
351 * Returns the physical memory size
354 static unsigned long __init build_iSeries_Memory_Map(void)
356 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
357 u32 nextPhysChunk;
358 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
359 u32 totalChunks,moreChunks;
360 u32 currChunk, thisChunk, absChunk;
361 u32 currDword;
362 u32 chunkBit;
363 u64 map;
364 struct MemoryBlock mb[32];
365 unsigned long numMemoryBlocks, curBlock;
367 /* Chunk size on iSeries is 256K bytes */
368 totalChunks = (u32)HvLpConfig_getMsChunks();
369 mschunks_alloc(totalChunks);
372 * Get absolute address of our load area
373 * and map it to physical address 0
374 * This guarantees that the loadarea ends up at physical 0
375 * otherwise, it might not be returned by PLIC as the first
376 * chunks
379 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
380 loadAreaSize = itLpNaca.xLoadAreaChunks;
383 * Only add the pages already mapped here.
384 * Otherwise we might add the hpt pages
385 * The rest of the pages of the load area
386 * aren't in the HPT yet and can still
387 * be assigned an arbitrary physical address
389 if ((loadAreaSize * 64) > HvPagesToMap)
390 loadAreaSize = HvPagesToMap / 64;
392 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
395 * TODO Do we need to do something if the HPT is in the 64MB load area?
396 * This would be required if the itLpNaca.xLoadAreaChunks includes
397 * the HPT size
400 printk("Mapping load area - physical addr = 0000000000000000\n"
401 " absolute addr = %016lx\n",
402 chunk_to_addr(loadAreaFirstChunk));
403 printk("Load area size %dK\n", loadAreaSize * 256);
405 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
406 mschunks_map.mapping[nextPhysChunk] =
407 loadAreaFirstChunk + nextPhysChunk;
410 * Get absolute address of our HPT and remember it so
411 * we won't map it to any physical address
413 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
414 hptSizePages = (u32)HvCallHpt_getHptPages();
415 hptSizeChunks = hptSizePages >>
416 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
417 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
419 printk("HPT absolute addr = %016lx, size = %dK\n",
420 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
423 * Determine if absolute memory has any
424 * holes so that we can interpret the
425 * access map we get back from the hypervisor
426 * correctly.
428 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
431 * Process the main store access map from the hypervisor
432 * to build up our physical -> absolute translation table
434 curBlock = 0;
435 currChunk = 0;
436 currDword = 0;
437 moreChunks = totalChunks;
439 while (moreChunks) {
440 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
441 currDword);
442 thisChunk = currChunk;
443 while (map) {
444 chunkBit = map >> 63;
445 map <<= 1;
446 if (chunkBit) {
447 --moreChunks;
448 while (thisChunk >= mb[curBlock].logicalEnd) {
449 ++curBlock;
450 if (curBlock >= numMemoryBlocks)
451 panic("out of memory blocks");
453 if (thisChunk < mb[curBlock].logicalStart)
454 panic("memory block error");
456 absChunk = mb[curBlock].absStart +
457 (thisChunk - mb[curBlock].logicalStart);
458 if (((absChunk < hptFirstChunk) ||
459 (absChunk > hptLastChunk)) &&
460 ((absChunk < loadAreaFirstChunk) ||
461 (absChunk > loadAreaLastChunk))) {
462 mschunks_map.mapping[nextPhysChunk] =
463 absChunk;
464 ++nextPhysChunk;
467 ++thisChunk;
469 ++currDword;
470 currChunk += 64;
474 * main store size (in chunks) is
475 * totalChunks - hptSizeChunks
476 * which should be equal to
477 * nextPhysChunk
479 return chunk_to_addr(nextPhysChunk);
483 * Document me.
485 static void __init iSeries_setup_arch(void)
487 if (get_lppaca()->shared_proc) {
488 ppc_md.idle_loop = iseries_shared_idle;
489 printk(KERN_DEBUG "Using shared processor idle loop\n");
490 } else {
491 ppc_md.idle_loop = iseries_dedicated_idle;
492 printk(KERN_DEBUG "Using dedicated idle loop\n");
495 /* Setup the Lp Event Queue */
496 setup_hvlpevent_queue();
498 printk("Max logical processors = %d\n",
499 itVpdAreas.xSlicMaxLogicalProcs);
500 printk("Max physical processors = %d\n",
501 itVpdAreas.xSlicMaxPhysicalProcs);
504 static void iSeries_show_cpuinfo(struct seq_file *m)
506 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
509 static void __init iSeries_progress(char * st, unsigned short code)
511 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
512 mf_display_progress(code);
515 static void __init iSeries_fixup_klimit(void)
518 * Change klimit to take into account any ram disk
519 * that may be included
521 if (naca.xRamDisk)
522 klimit = KERNELBASE + (u64)naca.xRamDisk +
523 (naca.xRamDiskSize * HW_PAGE_SIZE);
526 static int __init iSeries_src_init(void)
528 /* clear the progress line */
529 if (firmware_has_feature(FW_FEATURE_ISERIES))
530 ppc_md.progress(" ", 0xffff);
531 return 0;
534 late_initcall(iSeries_src_init);
536 static inline void process_iSeries_events(void)
538 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
541 static void yield_shared_processor(void)
543 unsigned long tb;
545 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
546 HvCall_MaskLpEvent |
547 HvCall_MaskLpProd |
548 HvCall_MaskTimeout);
550 tb = get_tb();
551 /* Compute future tb value when yield should expire */
552 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
555 * The decrementer stops during the yield. Force a fake decrementer
556 * here and let the timer_interrupt code sort out the actual time.
558 get_lppaca()->int_dword.fields.decr_int = 1;
559 ppc64_runlatch_on();
560 process_iSeries_events();
563 static void iseries_shared_idle(void)
565 while (1) {
566 tick_nohz_stop_sched_tick();
567 while (!need_resched() && !hvlpevent_is_pending()) {
568 local_irq_disable();
569 ppc64_runlatch_off();
571 /* Recheck with irqs off */
572 if (!need_resched() && !hvlpevent_is_pending())
573 yield_shared_processor();
575 HMT_medium();
576 local_irq_enable();
579 ppc64_runlatch_on();
580 tick_nohz_restart_sched_tick();
582 if (hvlpevent_is_pending())
583 process_iSeries_events();
585 preempt_enable_no_resched();
586 schedule();
587 preempt_disable();
591 static void iseries_dedicated_idle(void)
593 set_thread_flag(TIF_POLLING_NRFLAG);
595 while (1) {
596 tick_nohz_stop_sched_tick();
597 if (!need_resched()) {
598 while (!need_resched()) {
599 ppc64_runlatch_off();
600 HMT_low();
602 if (hvlpevent_is_pending()) {
603 HMT_medium();
604 ppc64_runlatch_on();
605 process_iSeries_events();
609 HMT_medium();
612 ppc64_runlatch_on();
613 tick_nohz_restart_sched_tick();
614 preempt_enable_no_resched();
615 schedule();
616 preempt_disable();
620 #ifndef CONFIG_PCI
621 void __init iSeries_init_IRQ(void) { }
622 #endif
624 static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
625 unsigned long flags)
627 return (void __iomem *)address;
630 static void iseries_iounmap(volatile void __iomem *token)
634 static int __init iseries_probe(void)
636 unsigned long root = of_get_flat_dt_root();
637 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
638 return 0;
640 hpte_init_iSeries();
641 /* iSeries does not support 16M pages */
642 cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
644 return 1;
647 define_machine(iseries) {
648 .name = "iSeries",
649 .setup_arch = iSeries_setup_arch,
650 .show_cpuinfo = iSeries_show_cpuinfo,
651 .init_IRQ = iSeries_init_IRQ,
652 .get_irq = iSeries_get_irq,
653 .init_early = iSeries_init_early,
654 .pcibios_fixup = iSeries_pci_final_fixup,
655 .restart = mf_reboot,
656 .power_off = mf_power_off,
657 .halt = mf_power_off,
658 .get_boot_time = iSeries_get_boot_time,
659 .set_rtc_time = iSeries_set_rtc_time,
660 .get_rtc_time = iSeries_get_rtc_time,
661 .calibrate_decr = generic_calibrate_decr,
662 .progress = iSeries_progress,
663 .probe = iseries_probe,
664 .ioremap = iseries_ioremap,
665 .iounmap = iseries_iounmap,
666 /* XXX Implement enable_pmcs for iSeries */
669 void * __init iSeries_early_setup(void)
671 unsigned long phys_mem_size;
673 /* Identify CPU type. This is done again by the common code later
674 * on but calling this function multiple times is fine.
676 identify_cpu(0, mfspr(SPRN_PVR));
678 powerpc_firmware_features |= FW_FEATURE_ISERIES;
679 powerpc_firmware_features |= FW_FEATURE_LPAR;
681 iSeries_fixup_klimit();
684 * Initialize the table which translate Linux physical addresses to
685 * AS/400 absolute addresses
687 phys_mem_size = build_iSeries_Memory_Map();
689 iSeries_get_cmdline();
691 return (void *) __pa(build_flat_dt(phys_mem_size));
694 static void hvputc(char c)
696 if (c == '\n')
697 hvputc('\r');
699 HvCall_writeLogBuffer(&c, 1);
702 void __init udbg_init_iseries(void)
704 udbg_putc = hvputc;