2 * SPCA508 chip based cameras subdriver
4 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23 #define MODULE_NAME "spca508"
27 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
28 MODULE_DESCRIPTION("GSPCA/SPCA508 USB Camera Driver");
29 MODULE_LICENSE("GPL");
31 /* specific webcam descriptor */
33 struct gspca_dev gspca_dev
; /* !! must be the first item */
38 #define CreativeVista 0
39 #define HamaUSBSightcam 1
40 #define HamaUSBSightcam2 2
41 #define IntelEasyPCCamera 3
42 #define MicroInnovationIC200 4
43 #define ViewQuestVQ110 5
46 /* V4L2 controls supported by the driver */
47 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
);
48 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
);
50 static const struct ctrl sd_ctrls
[] = {
53 .id
= V4L2_CID_BRIGHTNESS
,
54 .type
= V4L2_CTRL_TYPE_INTEGER
,
59 #define BRIGHTNESS_DEF 128
60 .default_value
= BRIGHTNESS_DEF
,
62 .set
= sd_setbrightness
,
63 .get
= sd_getbrightness
,
67 static const struct v4l2_pix_format sif_mode
[] = {
68 {160, 120, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
70 .sizeimage
= 160 * 120 * 3 / 2,
71 .colorspace
= V4L2_COLORSPACE_SRGB
,
73 {176, 144, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
75 .sizeimage
= 176 * 144 * 3 / 2,
76 .colorspace
= V4L2_COLORSPACE_SRGB
,
78 {320, 240, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
80 .sizeimage
= 320 * 240 * 3 / 2,
81 .colorspace
= V4L2_COLORSPACE_SRGB
,
83 {352, 288, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
85 .sizeimage
= 352 * 288 * 3 / 2,
86 .colorspace
= V4L2_COLORSPACE_SRGB
,
90 /* Frame packet header offsets for the spca508 */
91 #define SPCA508_OFFSET_DATA 37
94 * Initialization data: this is the first set-up data written to the
95 * device (before the open data).
97 static const u16 spca508_init_data
[][2] = {
100 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
101 {0x0003, 0x8111}, /* Reset compression & memory */
102 {0x0000, 0x8110}, /* Disable all outputs */
103 /* READ {0x0000, 0x8114} -> 0000: 00 */
104 {0x0000, 0x8114}, /* SW GPIO data */
105 {0x0008, 0x8110}, /* Enable charge pump output */
106 {0x0002, 0x8116}, /* 200 kHz pump clock */
107 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE:) */
108 {0x0003, 0x8111}, /* Reset compression & memory */
109 {0x0000, 0x8111}, /* Normal mode (not reset) */
111 /* Enable charge pump output, sync.serial,external 2x clock */
112 {0x000d, 0x8114}, /* SW GPIO data */
113 {0x0002, 0x8116}, /* 200 kHz pump clock */
114 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
115 /* --------------------------------------- */
116 {0x000f, 0x8402}, /* memory bank */
117 {0x0000, 0x8403}, /* ... address */
118 /* --------------------------------------- */
119 /* 0x88__ is Synchronous Serial Interface. */
120 /* TBD: This table could be expressed more compactly */
121 /* using spca508_write_i2c_vector(). */
122 /* TBD: Should see if the values in spca50x_i2c_data */
123 /* would work with the VQ110 instead of the values */
125 {0x00c0, 0x8804}, /* SSI slave addr */
126 {0x0008, 0x8802}, /* 375 Khz SSI clock */
127 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
128 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
129 {0x0008, 0x8802}, /* 375 Khz SSI clock */
130 {0x0012, 0x8801}, /* SSI reg addr */
131 {0x0080, 0x8800}, /* SSI data to write */
132 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
133 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
134 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
135 {0x0008, 0x8802}, /* 375 Khz SSI clock */
136 {0x0012, 0x8801}, /* SSI reg addr */
137 {0x0000, 0x8800}, /* SSI data to write */
138 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
139 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
140 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
141 {0x0008, 0x8802}, /* 375 Khz SSI clock */
142 {0x0011, 0x8801}, /* SSI reg addr */
143 {0x0040, 0x8800}, /* SSI data to write */
144 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
145 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
146 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
150 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
151 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
152 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
156 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
157 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
158 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
162 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
163 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
164 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
168 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
169 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
170 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
174 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
175 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
176 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
180 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
181 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
182 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
186 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
187 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
188 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
192 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
193 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
194 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
198 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
199 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
200 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
204 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
205 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
206 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
210 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
211 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
212 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
216 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
217 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
218 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
222 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
223 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
224 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
228 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
229 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
230 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
234 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
235 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
236 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
240 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
241 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
242 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
246 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
247 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
248 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
252 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
253 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
254 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
258 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
259 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
260 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
264 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
265 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
266 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
270 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
271 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
272 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
276 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
277 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
278 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
282 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
283 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
284 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
288 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
289 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
290 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
294 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
295 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
296 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
300 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
301 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
302 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
306 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
307 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
308 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
312 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
313 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
314 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
318 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
319 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
320 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
324 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
325 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
326 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
330 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
331 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
332 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
336 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
337 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
338 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
342 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
343 /* --------------------------------------- */
344 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
345 {0x0000, 0x8701}, /* CKx1 clock delay adj */
346 {0x0000, 0x8701}, /* CKx1 clock delay adj */
347 {0x0001, 0x870c}, /* CKOx2 output */
348 /* --------------------------------------- */
349 {0x0080, 0x8600}, /* Line memory read counter (L) */
350 {0x0001, 0x8606}, /* reserved */
351 {0x0064, 0x8607}, /* Line memory read counter (H) 0x6480=25,728 */
352 {0x002a, 0x8601}, /* CDSP sharp interpolation mode,
353 * line sel for color sep, edge enhance enab */
354 {0x0000, 0x8602}, /* optical black level for user settng = 0 */
355 {0x0080, 0x8600}, /* Line memory read counter (L) */
356 {0x000a, 0x8603}, /* optical black level calc mode:
357 * auto; optical black offset = 10 */
358 {0x00df, 0x865b}, /* Horiz offset for valid pixels (L)=0xdf */
359 {0x0012, 0x865c}, /* Vert offset for valid lines (L)=0x12 */
361 /* The following two lines seem to be the "wrong" resolution. */
362 /* But perhaps these indicate the actual size of the sensor */
363 /* rather than the size of the current video mode. */
364 {0x0058, 0x865d}, /* Horiz valid pixels (*4) (L) = 352 */
365 {0x0048, 0x865e}, /* Vert valid lines (*4) (L) = 288 */
367 {0x0015, 0x8608}, /* A11 Coef ... */
376 {0x0001, 0x8611}, /* R offset for white balance ... */
380 {0x005b, 0x8651}, /* R gain for white balance ... */
385 {0x0001, 0x863f}, /* Fixed gamma correction enable, USB control,
386 * lum filter disable, lum noise clip disable */
387 {0x00a1, 0x8656}, /* Window1 size 256x256, Windows2 size 64x64,
388 * gamma look-up disable,
389 * new edge enhancement enable */
390 {0x0018, 0x8657}, /* Edge gain high thresh */
391 {0x0020, 0x8658}, /* Edge gain low thresh */
392 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
393 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
394 /* -------------------------------- */
395 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
396 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
397 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
399 {0x0034, 0x8801}, /* SSI reg addr */
401 /* SSI data to write */
402 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
403 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
404 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
408 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
410 /* ----- Read back coefs we wrote earlier. */
411 /* READ { 0x0000, 0x8608 } -> 0000: 15 */
412 /* READ { 0x0000, 0x8609 } -> 0000: 30 */
413 /* READ { 0x0000, 0x860a } -> 0000: fb */
414 /* READ { 0x0000, 0x860b } -> 0000: 3e */
415 /* READ { 0x0000, 0x860c } -> 0000: ce */
416 /* READ { 0x0000, 0x860d } -> 0000: f4 */
417 /* READ { 0x0000, 0x860e } -> 0000: eb */
418 /* READ { 0x0000, 0x860f } -> 0000: dc */
419 /* READ { 0x0000, 0x8610 } -> 0000: 39 */
420 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
421 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
425 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
428 /* This chunk is seemingly redundant with */
429 /* earlier commands (A11 Coef...), but if I disable it, */
430 /* the image appears too dark. Maybe there was some kind of */
431 /* reset since the earlier commands, so this is necessary again. */
443 {0x0000, 0x8508}, /* Disable compression. */
444 /* Previous line was:
445 {0x0021, 0x8508}, * Enable compression. */
446 {0x0032, 0x850b}, /* compression stuff */
447 {0x0003, 0x8509}, /* compression stuff */
448 {0x0011, 0x850a}, /* compression stuff */
449 {0x0021, 0x850d}, /* compression stuff */
450 {0x0010, 0x850c}, /* compression stuff */
451 {0x0003, 0x8500}, /* *** Video mode: 160x120 */
452 {0x0001, 0x8501}, /* Hardware-dominated snap control */
453 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
454 * gamma look-up disable,
455 * new edge enhancement enable */
456 {0x0018, 0x8617}, /* Window1 start X (*2) */
457 {0x0008, 0x8618}, /* Window1 start Y (*2) */
458 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
459 * gamma look-up disable,
460 * new edge enhancement enable */
461 {0x0058, 0x8619}, /* Window2 start X (*2) */
462 {0x0008, 0x861a}, /* Window2 start Y (*2) */
463 {0x00ff, 0x8615}, /* High lum thresh for white balance */
464 {0x0000, 0x8616}, /* Low lum thresh for white balance */
465 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
466 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
467 /* READ { 0x0000, 0x8656 } -> 0000: 61 */
468 {0x0028, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
469 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
470 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
471 {0x1f28, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
472 {0x0010, 0x8801}, /* SSI reg addr */
473 {0x003e, 0x8800}, /* SSI data to write */
474 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
476 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
477 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
481 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
482 {0x0001, 0x8602}, /* optical black level for user settning = 1 */
485 {0x0023, 0x8700}, /* Clock speed 48Mhz/(3+2)/4= 2.4 Mhz */
486 {0x000f, 0x8602}, /* optical black level for user settning = 15 */
489 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
490 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
494 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
495 {0x002f, 0x8651}, /* R gain for white balance ... */
497 /* READ { 0x0000, 0x8655 } -> 0000: 00 */
500 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
501 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
502 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE: (ALT=0) ) */
507 * Initialization data for Intel EasyPC Camera CS110
509 static const u16 spca508cs110_init_data
[][2] = {
510 {0x0000, 0x870b}, /* Reset CTL3 */
511 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
512 {0x0000, 0x8111}, /* Normal operation on reset */
514 /* External Clock 2x & Synchronous Serial Interface Output */
515 {0x0020, 0x8112}, /* Video Drop packet enable */
516 {0x0000, 0x8114}, /* Software GPIO output data */
522 /* Initial sequence Synchronous Serial Interface */
523 {0x000f, 0x8402}, /* Memory bank Address */
524 {0x0000, 0x8403}, /* Memory bank Address */
525 {0x00ba, 0x8804}, /* SSI Slave address */
526 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
527 {0x0010, 0x8802}, /* 93.75kHz SSI Clock two DataByte */
530 {0x000a, 0x8805}, /* a - NWG: Dunno what this is about */
564 {0x0002, 0x8704}, /* External input CKIx1 */
565 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
566 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
567 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
568 {0x0003, 0x865c}, /* 3 Vertical Offset for Valid Lines(L) */
569 {0x0058, 0x865d}, /* 58 Horizontal Valid Pixel Window(L) */
571 {0x0006, 0x8660}, /* Nibble data + input order */
573 {0x000a, 0x8602}, /* Optical black level set to 0x0a */
574 {0x0000, 0x8603}, /* Optical black level Offset */
576 /* {0x0000, 0x8611}, * 0 R Offset for white Balance */
577 /* {0x0000, 0x8612}, * 1 Gr Offset for white Balance */
578 /* {0x0000, 0x8613}, * 1f B Offset for white Balance */
579 /* {0x0000, 0x8614}, * f0 Gb Offset for white Balance */
581 {0x0040, 0x8651}, /* 2b BLUE gain for white balance good at all 60 */
582 {0x0030, 0x8652}, /* 41 Gr Gain for white Balance (L) */
583 {0x0035, 0x8653}, /* 26 RED gain for white balance */
584 {0x0035, 0x8654}, /* 40Gb Gain for white Balance (L) */
586 /* Fixed Gamma correction enabled (makes colours look better) */
589 /* High bits for white balance*****brightness control*** */
593 static const u16 spca508_sightcam_init_data
[][2] = {
594 /* This line seems to setup the frame/canvas */
597 /* These 6 lines are needed to startup the webcam */
605 /* This part seems to make the pictures darker? (autobrightness?) */
620 /* This section is just needed, it probably
621 * does something like the previous section,
622 * but the cam won't start if it's not included.
635 /* Makes the picture darker - and the
636 * cam won't start if not included
645 /* seems to place the colors ontop of each other #1 */
651 /* if not included the pictures becomes _very_ dark */
656 /* seems to place the colors ontop of each other #2 */
662 /* webcam won't start if not included */
668 /* adjusts the colors */
676 static const u16 spca508_sightcam2_init_data
[][2] = {
1013 /* This line starts it all, it is not needed here */
1014 /* since it has been build into the driver */
1015 /* jfm: don't start now */
1016 /* {0x0030, 0x8112}, */
1021 * Initialization data for Creative Webcam Vista
1023 static const u16 spca508_vista_init_data
[][2] = {
1024 {0x0008, 0x8200}, /* Clear register */
1025 {0x0000, 0x870b}, /* Reset CTL3 */
1026 {0x0020, 0x8112}, /* Video Drop packet enable */
1027 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
1028 {0x0000, 0x8110}, /* Disable everything */
1029 {0x0000, 0x8114}, /* Software GPIO output data */
1034 {0x0090, 0x8110}, /* Enable: SSI output, External 2X clock output */
1042 {0x000f, 0x8402}, /* Memory bank Address */
1043 {0x0000, 0x8403}, /* Memory bank Address */
1044 {0x00ba, 0x8804}, /* SSI Slave address */
1045 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
1047 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1048 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1049 {0x0010, 0x8802}, /* Will write 2 bytes (DATA1+DATA2) */
1050 {0x0020, 0x8801}, /* Register address for SSI read/write */
1051 {0x0044, 0x8805}, /* DATA2 */
1052 {0x0004, 0x8800}, /* DATA1 -> write triggered */
1053 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1055 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1056 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1061 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1063 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1064 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1069 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1071 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1072 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1077 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1079 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1080 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1085 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1087 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1088 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1093 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1095 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1096 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1101 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1103 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1104 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1109 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1111 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1112 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1117 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1119 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1120 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1125 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1127 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1128 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1133 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1135 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1136 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1141 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1143 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1144 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1149 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1151 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1152 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1157 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1159 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1160 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1165 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1167 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1168 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1173 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1176 {0x0002, 0x8704}, /* External input CKIx1 */
1177 {0x0001, 0x870c}, /* Select CKOx2 output */
1178 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
1179 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
1184 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
1185 {0x0003, 0x865c}, /* Vertical offset for valid lines (L) */
1186 {0x0058, 0x865d}, /* Horizontal valid pixels window (L) */
1187 {0x0048, 0x865e}, /* Vertical valid lines window (L) */
1191 /* Enable nibble data input, select nibble input order */
1193 {0x0013, 0x8608}, /* A11 Coeficients for color correction */
1195 /* Note: these values are confirmed at the end of array */
1196 {0x0005, 0x860a}, /* ... */
1202 {0x0025, 0x8610}, /* A33 Coef. */
1203 {0x00fc, 0x8611}, /* White balance offset: R */
1204 {0x0001, 0x8612}, /* White balance offset: Gr */
1205 {0x00fe, 0x8613}, /* White balance offset: B */
1206 {0x0000, 0x8614}, /* White balance offset: Gb */
1208 {0x0064, 0x8651}, /* R gain for white balance (L) */
1209 {0x0040, 0x8652}, /* Gr gain for white balance (L) */
1210 {0x0066, 0x8653}, /* B gain for white balance (L) */
1211 {0x0040, 0x8654}, /* Gb gain for white balance (L) */
1212 {0x0001, 0x863f}, /* Enable fixed gamma correction */
1214 {0x00a1, 0x8656}, /* Size - Window1: 256x256, Window2: 128x128,
1215 * UV division: UV no change,
1216 * Enable New edge enhancement */
1217 {0x0018, 0x8657}, /* Edge gain high threshold */
1218 {0x0020, 0x8658}, /* Edge gain low threshold */
1219 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
1220 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
1221 {0x0064, 0x8607}, /* UV filter enable */
1224 {0x0000, 0x86b0}, /* Bad pixels compensation address */
1225 {0x00dc, 0x86b1}, /* X coord for bad pixels compensation (L) */
1227 {0x0009, 0x86b3}, /* Y coord for bad pixels compensation (L) */
1255 /* READ { 0x0000, 0x8608 } -> 0000: 13 */
1256 /* READ { 0x0000, 0x8609 } -> 0000: 28 */
1257 /* READ { 0x0000, 0x8610 } -> 0000: 05 */
1258 /* READ { 0x0000, 0x8611 } -> 0000: 25 */
1259 /* READ { 0x0000, 0x8612 } -> 0000: e1 */
1260 /* READ { 0x0000, 0x8613 } -> 0000: fa */
1261 /* READ { 0x0000, 0x8614 } -> 0000: f4 */
1262 /* READ { 0x0000, 0x8615 } -> 0000: e8 */
1263 /* READ { 0x0000, 0x8616 } -> 0000: 25 */
1267 static int reg_write(struct usb_device
*dev
,
1268 u16 index
, u16 value
)
1272 ret
= usb_control_msg(dev
,
1273 usb_sndctrlpipe(dev
, 0),
1275 USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1276 value
, index
, NULL
, 0, 500);
1277 PDEBUG(D_USBO
, "reg write i:0x%04x = 0x%02x",
1280 pr_err("reg write: error %d\n", ret
);
1285 /* returns: negative is error, pos or zero is data */
1286 static int reg_read(struct gspca_dev
*gspca_dev
,
1287 u16 index
) /* wIndex */
1291 ret
= usb_control_msg(gspca_dev
->dev
,
1292 usb_rcvctrlpipe(gspca_dev
->dev
, 0),
1294 USB_DIR_IN
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1297 gspca_dev
->usb_buf
, 1,
1299 PDEBUG(D_USBI
, "reg read i:%04x --> %02x",
1300 index
, gspca_dev
->usb_buf
[0]);
1302 pr_err("reg_read err %d\n", ret
);
1305 return gspca_dev
->usb_buf
[0];
1308 /* send 1 or 2 bytes to the sensor via the Synchronous Serial Interface */
1309 static int ssi_w(struct gspca_dev
*gspca_dev
,
1312 struct usb_device
*dev
= gspca_dev
->dev
;
1315 ret
= reg_write(dev
, 0x8802, reg
>> 8);
1318 ret
= reg_write(dev
, 0x8801, reg
& 0x00ff);
1321 if ((reg
& 0xff00) == 0x1000) { /* if 2 bytes */
1322 ret
= reg_write(dev
, 0x8805, val
& 0x00ff);
1327 ret
= reg_write(dev
, 0x8800, val
);
1331 /* poll until not busy */
1334 ret
= reg_read(gspca_dev
, 0x8803);
1337 if (gspca_dev
->usb_buf
[0] == 0)
1340 PDEBUG(D_ERR
, "ssi_w busy %02x",
1341 gspca_dev
->usb_buf
[0]);
1352 static int write_vector(struct gspca_dev
*gspca_dev
,
1353 const u16 (*data
)[2])
1355 struct usb_device
*dev
= gspca_dev
->dev
;
1358 while ((*data
)[1] != 0) {
1359 if ((*data
)[1] & 0x8000) {
1360 if ((*data
)[1] == 0xdd00) /* delay */
1363 ret
= reg_write(dev
, (*data
)[1], (*data
)[0]);
1365 ret
= ssi_w(gspca_dev
, (*data
)[1], (*data
)[0]);
1374 /* this function is called at probe time */
1375 static int sd_config(struct gspca_dev
*gspca_dev
,
1376 const struct usb_device_id
*id
)
1378 struct sd
*sd
= (struct sd
*) gspca_dev
;
1380 const u16 (*init_data
)[2];
1381 static const u16 (*(init_data_tb
[]))[2] = {
1382 spca508_vista_init_data
, /* CreativeVista 0 */
1383 spca508_sightcam_init_data
, /* HamaUSBSightcam 1 */
1384 spca508_sightcam2_init_data
, /* HamaUSBSightcam2 2 */
1385 spca508cs110_init_data
, /* IntelEasyPCCamera 3 */
1386 spca508cs110_init_data
, /* MicroInnovationIC200 4 */
1387 spca508_init_data
, /* ViewQuestVQ110 5 */
1393 /* Read from global register the USB product and vendor IDs, just to
1394 * prove that we can communicate with the device. This works, which
1395 * confirms at we are communicating properly and that the device
1397 data1
= reg_read(gspca_dev
, 0x8104);
1398 data2
= reg_read(gspca_dev
, 0x8105);
1399 PDEBUG(D_PROBE
, "Webcam Vendor ID: 0x%02x%02x", data2
, data1
);
1401 data1
= reg_read(gspca_dev
, 0x8106);
1402 data2
= reg_read(gspca_dev
, 0x8107);
1403 PDEBUG(D_PROBE
, "Webcam Product ID: 0x%02x%02x", data2
, data1
);
1405 data1
= reg_read(gspca_dev
, 0x8621);
1406 PDEBUG(D_PROBE
, "Window 1 average luminance: %d", data1
);
1409 cam
= &gspca_dev
->cam
;
1410 cam
->cam_mode
= sif_mode
;
1411 cam
->nmodes
= ARRAY_SIZE(sif_mode
);
1413 sd
->subtype
= id
->driver_info
;
1414 sd
->brightness
= BRIGHTNESS_DEF
;
1416 init_data
= init_data_tb
[sd
->subtype
];
1417 return write_vector(gspca_dev
, init_data
);
1420 /* this function is called at probe and resume time */
1421 static int sd_init(struct gspca_dev
*gspca_dev
)
1426 static int sd_start(struct gspca_dev
*gspca_dev
)
1430 mode
= gspca_dev
->cam
.cam_mode
[gspca_dev
->curr_mode
].priv
;
1431 reg_write(gspca_dev
->dev
, 0x8500, mode
);
1435 reg_write(gspca_dev
->dev
, 0x8700, 0x28); /* clock */
1440 reg_write(gspca_dev
->dev
, 0x8700, 0x23); /* clock */
1443 reg_write(gspca_dev
->dev
, 0x8112, 0x10 | 0x20);
1447 static void sd_stopN(struct gspca_dev
*gspca_dev
)
1449 /* Video ISO disable, Video Drop Packet enable: */
1450 reg_write(gspca_dev
->dev
, 0x8112, 0x20);
1453 static void sd_pkt_scan(struct gspca_dev
*gspca_dev
,
1454 u8
*data
, /* isoc packet */
1455 int len
) /* iso packet length */
1458 case 0: /* start of frame */
1459 gspca_frame_add(gspca_dev
, LAST_PACKET
, NULL
, 0);
1460 data
+= SPCA508_OFFSET_DATA
;
1461 len
-= SPCA508_OFFSET_DATA
;
1462 gspca_frame_add(gspca_dev
, FIRST_PACKET
, data
, len
);
1464 case 0xff: /* drop */
1469 gspca_frame_add(gspca_dev
, INTER_PACKET
, data
, len
);
1474 static void setbrightness(struct gspca_dev
*gspca_dev
)
1476 struct sd
*sd
= (struct sd
*) gspca_dev
;
1477 u8 brightness
= sd
->brightness
;
1479 /* MX seem contrast */
1480 reg_write(gspca_dev
->dev
, 0x8651, brightness
);
1481 reg_write(gspca_dev
->dev
, 0x8652, brightness
);
1482 reg_write(gspca_dev
->dev
, 0x8653, brightness
);
1483 reg_write(gspca_dev
->dev
, 0x8654, brightness
);
1486 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
)
1488 struct sd
*sd
= (struct sd
*) gspca_dev
;
1490 sd
->brightness
= val
;
1491 if (gspca_dev
->streaming
)
1492 setbrightness(gspca_dev
);
1496 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
)
1498 struct sd
*sd
= (struct sd
*) gspca_dev
;
1500 *val
= sd
->brightness
;
1504 /* sub-driver description */
1505 static const struct sd_desc sd_desc
= {
1506 .name
= MODULE_NAME
,
1508 .nctrls
= ARRAY_SIZE(sd_ctrls
),
1509 .config
= sd_config
,
1513 .pkt_scan
= sd_pkt_scan
,
1516 /* -- module initialisation -- */
1517 static const struct usb_device_id device_table
[] = {
1518 {USB_DEVICE(0x0130, 0x0130), .driver_info
= HamaUSBSightcam
},
1519 {USB_DEVICE(0x041e, 0x4018), .driver_info
= CreativeVista
},
1520 {USB_DEVICE(0x0733, 0x0110), .driver_info
= ViewQuestVQ110
},
1521 {USB_DEVICE(0x0af9, 0x0010), .driver_info
= HamaUSBSightcam
},
1522 {USB_DEVICE(0x0af9, 0x0011), .driver_info
= HamaUSBSightcam2
},
1523 {USB_DEVICE(0x8086, 0x0110), .driver_info
= IntelEasyPCCamera
},
1526 MODULE_DEVICE_TABLE(usb
, device_table
);
1528 /* -- device connect -- */
1529 static int sd_probe(struct usb_interface
*intf
,
1530 const struct usb_device_id
*id
)
1532 return gspca_dev_probe(intf
, id
, &sd_desc
, sizeof(struct sd
),
1536 static struct usb_driver sd_driver
= {
1537 .name
= MODULE_NAME
,
1538 .id_table
= device_table
,
1540 .disconnect
= gspca_disconnect
,
1542 .suspend
= gspca_suspend
,
1543 .resume
= gspca_resume
,
1547 /* -- module insert / remove -- */
1548 static int __init
sd_mod_init(void)
1550 return usb_register(&sd_driver
);
1552 static void __exit
sd_mod_exit(void)
1554 usb_deregister(&sd_driver
);
1557 module_init(sd_mod_init
);
1558 module_exit(sd_mod_exit
);