2 * EHCI HCD (Host Controller Driver) PCI Bus Glue.
4 * Copyright (c) 2000-2004 by David Brownell
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
25 /*-------------------------------------------------------------------------*/
27 /* called after powerup, by probe or system-pm "wakeup" */
28 static int ehci_pci_reinit(struct ehci_hcd
*ehci
, struct pci_dev
*pdev
)
33 /* optional debug port, normally in the first BAR */
34 temp
= pci_find_capability(pdev
, 0x0a);
36 pci_read_config_dword(pdev
, temp
, &temp
);
38 if ((temp
& (3 << 13)) == (1 << 13)) {
40 ehci
->debug
= ehci_to_hcd(ehci
)->regs
+ temp
;
41 temp
= ehci_readl(ehci
, &ehci
->debug
->control
);
42 ehci_info(ehci
, "debug port %d%s\n",
43 HCS_DEBUG_PORT(ehci
->hcs_params
),
47 if (!(temp
& DBGP_ENABLED
))
52 /* we expect static quirk code to handle the "extended capabilities"
53 * (currently just BIOS handoff) allowed starting with EHCI 0.96
56 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
57 retval
= pci_set_mwi(pdev
);
59 ehci_dbg(ehci
, "MWI active\n");
61 ehci_port_power(ehci
, 0);
66 /* called during probe() after chip reset completes */
67 static int ehci_pci_setup(struct usb_hcd
*hcd
)
69 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
70 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
74 switch (pdev
->vendor
) {
75 case PCI_VENDOR_ID_TOSHIBA_2
:
76 /* celleb's companion chip */
77 if (pdev
->device
== 0x01b5) {
78 #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
79 ehci
->big_endian_mmio
= 1;
82 "unsupported big endian Toshiba quirk\n");
88 ehci
->caps
= hcd
->regs
;
89 ehci
->regs
= hcd
->regs
+
90 HC_LENGTH(ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
92 dbg_hcs_params(ehci
, "reset");
93 dbg_hcc_params(ehci
, "reset");
95 /* ehci_init() causes memory for DMA transfers to be
96 * allocated. Thus, any vendor-specific workarounds based on
97 * limiting the type of memory used for DMA transfers must
98 * happen before ehci_init() is called. */
99 switch (pdev
->vendor
) {
100 case PCI_VENDOR_ID_NVIDIA
:
101 /* NVidia reports that certain chips don't handle
102 * QH, ITD, or SITD addresses above 2GB. (But TD,
103 * data buffer, and periodic schedule are normal.)
105 switch (pdev
->device
) {
106 case 0x003c: /* MCP04 */
107 case 0x005b: /* CK804 */
108 case 0x00d8: /* CK8 */
109 case 0x00e8: /* CK8S */
110 if (pci_set_consistent_dma_mask(pdev
,
112 ehci_warn(ehci
, "can't enable NVidia "
113 "workaround for >2GB RAM\n");
119 /* cache this readonly data; minimize chip reads */
120 ehci
->hcs_params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
122 retval
= ehci_halt(ehci
);
126 /* data structure init */
127 retval
= ehci_init(hcd
);
131 switch (pdev
->vendor
) {
132 case PCI_VENDOR_ID_TDI
:
133 if (pdev
->device
== PCI_DEVICE_ID_TDI_EHCI
) {
134 ehci
->is_tdi_rh_tt
= 1;
138 case PCI_VENDOR_ID_AMD
:
139 /* AMD8111 EHCI doesn't work, according to AMD errata */
140 if (pdev
->device
== 0x7463) {
141 ehci_info(ehci
, "ignoring AMD8111 (errata)\n");
146 case PCI_VENDOR_ID_NVIDIA
:
147 switch (pdev
->device
) {
148 /* Some NForce2 chips have problems with selective suspend;
149 * fixed in newer silicon.
152 if (pdev
->revision
< 0xa4)
153 ehci
->no_selective_suspend
= 1;
159 if (ehci_is_TDI(ehci
))
162 /* at least the Genesys GL880S needs fixup here */
163 temp
= HCS_N_CC(ehci
->hcs_params
) * HCS_N_PCC(ehci
->hcs_params
);
165 if (temp
&& HCS_N_PORTS(ehci
->hcs_params
) > temp
) {
166 ehci_dbg(ehci
, "bogus port configuration: "
167 "cc=%d x pcc=%d < ports=%d\n",
168 HCS_N_CC(ehci
->hcs_params
),
169 HCS_N_PCC(ehci
->hcs_params
),
170 HCS_N_PORTS(ehci
->hcs_params
));
172 switch (pdev
->vendor
) {
173 case 0x17a0: /* GENESYS */
174 /* GL880S: should be PORTS=2 */
175 temp
|= (ehci
->hcs_params
& ~0xf);
176 ehci
->hcs_params
= temp
;
178 case PCI_VENDOR_ID_NVIDIA
:
179 /* NF4: should be PCC=10 */
184 /* Serial Bus Release Number is at PCI 0x60 offset */
185 pci_read_config_byte(pdev
, 0x60, &ehci
->sbrn
);
187 /* Workaround current PCI init glitch: wakeup bits aren't
188 * being set from PCI PM capability.
190 if (!device_can_wakeup(&pdev
->dev
)) {
193 pci_read_config_word(pdev
, 0x62, &port_wake
);
194 if (port_wake
& 0x0001)
195 device_init_wakeup(&pdev
->dev
, 1);
198 #ifdef CONFIG_USB_SUSPEND
199 /* REVISIT: the controller works fine for wakeup iff the root hub
200 * itself is "globally" suspended, but usbcore currently doesn't
201 * understand such things.
203 * System suspend currently expects to be able to suspend the entire
204 * device tree, device-at-a-time. If we failed selective suspend
205 * reports, system suspend would fail; so the root hub code must claim
206 * success. That's lying to usbcore, and it matters for for runtime
207 * PM scenarios with selective suspend and remote wakeup...
209 if (ehci
->no_selective_suspend
&& device_can_wakeup(&pdev
->dev
))
210 ehci_warn(ehci
, "selective suspend/wakeup unavailable\n");
213 retval
= ehci_pci_reinit(ehci
, pdev
);
218 /*-------------------------------------------------------------------------*/
222 /* suspend/resume, section 4.3 */
224 /* These routines rely on the PCI bus glue
225 * to handle powerdown and wakeup, and currently also on
226 * transceivers that don't need any software attention to set up
227 * the right sort of wakeup.
228 * Also they depend on separate root hub suspend/resume.
231 static int ehci_pci_suspend(struct usb_hcd
*hcd
, pm_message_t message
)
233 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
237 if (time_before(jiffies
, ehci
->next_statechange
))
240 /* Root hub was already suspended. Disable irq emission and
241 * mark HW unaccessible, bail out if RH has been resumed. Use
242 * the spinlock to properly synchronize with possible pending
243 * RH suspend or resume activity.
245 * This is still racy as hcd->state is manipulated outside of
246 * any locks =P But that will be a different fix.
248 spin_lock_irqsave (&ehci
->lock
, flags
);
249 if (hcd
->state
!= HC_STATE_SUSPENDED
) {
253 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
254 (void)ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
256 /* make sure snapshot being resumed re-enumerates everything */
257 if (message
.event
== PM_EVENT_PRETHAW
) {
262 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
264 spin_unlock_irqrestore (&ehci
->lock
, flags
);
266 // could save FLADJ in case of Vaux power loss
267 // ... we'd only use it to handle clock skew
272 static int ehci_pci_resume(struct usb_hcd
*hcd
)
274 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
275 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
277 // maybe restore FLADJ
279 if (time_before(jiffies
, ehci
->next_statechange
))
282 /* Mark hardware accessible again as we are out of D3 state by now */
283 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
285 /* If CF is still set, we maintained PCI Vaux power.
286 * Just undo the effect of ehci_pci_suspend().
288 if (ehci_readl(ehci
, &ehci
->regs
->configured_flag
) == FLAG_CF
) {
289 int mask
= INTR_MASK
;
291 if (!device_may_wakeup(&hcd
->self
.root_hub
->dev
))
293 ehci_writel(ehci
, mask
, &ehci
->regs
->intr_enable
);
294 ehci_readl(ehci
, &ehci
->regs
->intr_enable
);
298 ehci_dbg(ehci
, "lost power, restarting\n");
299 usb_root_hub_lost_power(hcd
->self
.root_hub
);
301 /* Else reset, to cope with power loss or flush-to-storage
302 * style "resume" having let BIOS kick in during reboot.
304 (void) ehci_halt(ehci
);
305 (void) ehci_reset(ehci
);
306 (void) ehci_pci_reinit(ehci
, pdev
);
308 /* emptying the schedule aborts any urbs */
309 spin_lock_irq(&ehci
->lock
);
311 ehci
->reclaim_ready
= 1;
313 spin_unlock_irq(&ehci
->lock
);
315 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
316 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
317 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
319 /* here we "know" root ports should always stay powered */
320 ehci_port_power(ehci
, 1);
321 ehci_handover_companion_ports(ehci
);
323 hcd
->state
= HC_STATE_SUSPENDED
;
328 static const struct hc_driver ehci_pci_hc_driver
= {
329 .description
= hcd_name
,
330 .product_desc
= "EHCI Host Controller",
331 .hcd_priv_size
= sizeof(struct ehci_hcd
),
334 * generic hardware linkage
337 .flags
= HCD_MEMORY
| HCD_USB2
,
340 * basic lifecycle operations
342 .reset
= ehci_pci_setup
,
345 .suspend
= ehci_pci_suspend
,
346 .resume
= ehci_pci_resume
,
349 .shutdown
= ehci_shutdown
,
352 * managing i/o requests and associated device resources
354 .urb_enqueue
= ehci_urb_enqueue
,
355 .urb_dequeue
= ehci_urb_dequeue
,
356 .endpoint_disable
= ehci_endpoint_disable
,
361 .get_frame_number
= ehci_get_frame
,
366 .hub_status_data
= ehci_hub_status_data
,
367 .hub_control
= ehci_hub_control
,
368 .bus_suspend
= ehci_bus_suspend
,
369 .bus_resume
= ehci_bus_resume
,
372 /*-------------------------------------------------------------------------*/
374 /* PCI driver selection metadata; PCI hotplugging uses this */
375 static const struct pci_device_id pci_ids
[] = { {
376 /* handle any USB 2.0 EHCI controller */
377 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI
, ~0),
378 .driver_data
= (unsigned long) &ehci_pci_hc_driver
,
380 { /* end: all zeroes */ }
382 MODULE_DEVICE_TABLE(pci
, pci_ids
);
384 /* pci driver glue; this is a "new style" PCI driver module */
385 static struct pci_driver ehci_pci_driver
= {
386 .name
= (char *) hcd_name
,
389 .probe
= usb_hcd_pci_probe
,
390 .remove
= usb_hcd_pci_remove
,
393 .suspend
= usb_hcd_pci_suspend
,
394 .resume
= usb_hcd_pci_resume
,
396 .shutdown
= usb_hcd_pci_shutdown
,