csctapi/ifd_smartreader_types.h

   1 // FTDI defines
   2 #ifndef __SMARTREADER_TYPES_H__
   3 #define __SMARTREADER_TYPES_H__
   4 /* Definitions for flow control */
   5 #define SIO_RESET          0 /* Reset the port */
   6 #define SIO_MODEM_CTRL     1 /* Set the modem control register */
   7 #define SIO_SET_FLOW_CTRL  2 /* Set flow control register */
   8 #define SIO_SET_BAUD_RATE  3 /* Set baud rate */
   9 #define SIO_SET_DATA       4 /* Set the data characteristics of the port */
  10
  11 #define FTDI_DEVICE_OUT_REQTYPE (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_OUT)
  12 #define FTDI_DEVICE_IN_REQTYPE (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE | LIBUSB_ENDPOINT_IN)
  13 /* Requests */
  14 #define SIO_RESET_REQUEST             SIO_RESET
  15 #define SIO_SET_BAUDRATE_REQUEST      SIO_SET_BAUD_RATE
  16 #define SIO_SET_DATA_REQUEST          SIO_SET_DATA
  17 #define SIO_SET_FLOW_CTRL_REQUEST     SIO_SET_FLOW_CTRL
  18 #define SIO_SET_MODEM_CTRL_REQUEST    SIO_MODEM_CTRL
  19 #define SIO_POLL_MODEM_STATUS_REQUEST 0x05
  20 #define SIO_SET_EVENT_CHAR_REQUEST    0x06
  21 #define SIO_SET_ERROR_CHAR_REQUEST    0x07
  22 #define SIO_SET_LATENCY_TIMER_REQUEST 0x09
  23 #define SIO_GET_LATENCY_TIMER_REQUEST 0x0A
  24 #define SIO_SET_BITMODE_REQUEST       0x0B
  25 #define SIO_READ_PINS_REQUEST         0x0C
  26 #define SIO_READ_EEPROM_REQUEST       0x90
  27 #define SIO_WRITE_EEPROM_REQUEST      0x91
  28 #define SIO_ERASE_EEPROM_REQUEST      0x92
  29 #define CLK_BITS        0x8e
  30 #define CLK_BYTES       0x8f
  31 #define CLK_WAIT_HIGH   0x94
  32 #define CLK_WAIT_LOW    0x95
  33 #define EN_ADAPTIVE     0x96
  34 #define DIS_ADAPTIVE    0x97
  35 #define CLK_BYTES_OR_HIGH 0x9c
  36 #define CLK_BYTES_OR_LOW  0x0d
  37
  38 #define SIO_RESET_SIO 0
  39 #define SIO_RESET_PURGE_RX 1
  40 #define SIO_RESET_PURGE_TX 2
  41
  42 #define SIO_DISABLE_FLOW_CTRL 0x0
  43 #define SIO_RTS_CTS_HS (0x1 << 8)
  44 #define SIO_DTR_DSR_HS (0x2 << 8)
  45 #define SIO_XON_XOFF_HS (0x4 << 8)
  46
  47 #define SIO_SET_DTR_MASK 0x1
  48 #define SIO_SET_DTR_HIGH ( 1 | ( SIO_SET_DTR_MASK  << 8))
  49 #define SIO_SET_DTR_LOW  ( 0 | ( SIO_SET_DTR_MASK  << 8))
  50 #define SIO_SET_RTS_MASK 0x2
  51 #define SIO_SET_RTS_HIGH ( 2 | ( SIO_SET_RTS_MASK << 8 ))
  52 #define SIO_SET_RTS_LOW ( 0 | ( SIO_SET_RTS_MASK << 8 ))
  53
  54 #define SIO_RTS_CTS_HS (0x1 << 8)
  55 /** FTDI chip type */
  56 enum smartreader_chip_type { TYPE_AM = 0, TYPE_BM = 1, TYPE_2232C = 2, TYPE_R = 3, TYPE_2232H = 4, TYPE_4232H = 5, TYPE_232H = 6 };
  57 /** Parity mode for smartreader_set_line_property() */
  58 enum smartreader_parity_type { NONE = 0, ODD = 1, EVEN = 2, MARK = 3, SPACE = 4 };
  59 /** Number of stop bits for smartreader_set_line_property() */
  60 enum smartreader_stopbits_type { STOP_BIT_1 = 0, STOP_BIT_15 = 1, STOP_BIT_2 = 2 };
  61 /** Number of bits for smartreader_set_line_property() */
  62 enum smartreader_bits_type { BITS_7 = 7, BITS_8 = 8 };
  63 /** Break type for smartreader_set_line_property2() */
  64 enum smartreader_break_type { BREAK_OFF = 0, BREAK_ON = 1 };
  65
  66 /** Port interface for chips with multiple interfaces */
  67
  68 enum smartreader_rdrtypename
  69 {
  70         SR                      = 0,
  71         Infinity        = 1,
  72         SRv2            = 2,
  73         TripleP1        = 3,
  74         TripleP2        = 4,
  75         TripleP3        = 5
  76 };
  77
  78 enum smartreader_interface
  79 {
  80         INTERFACE_ANY = 0,
  81         INTERFACE_A   = 1,
  82         INTERFACE_B   = 2,
  83         INTERFACE_C   = 3,
  84         INTERFACE_D   = 4
  85 };
  86
  87 struct s_reader_types
  88 {
  89         uint16_t rdrtypename;
  90         uint8_t in_ep;
  91         uint8_t out_ep;
  92         int32_t index;
  93         int32_t interface;
  94 };
  95
  96 const struct s_reader_types reader_types[] =
  97 {
  98         { SR, 0x01, 0x82, INTERFACE_A, 0},                      //  type 0
  99         { Infinity, 0x01, 0x81, INTERFACE_A, 0},        //  type 1
 100         { SRv2, 0x02, 0x81, INTERFACE_A, 0},            //  type 2
 101         { TripleP1, 0x02, 0x81, INTERFACE_A, 0},        //  type 3
 102         { TripleP2, 0x04, 0x83, INTERFACE_B, 1},        //  type 4
 103         { TripleP3, 0x06, 0x85, INTERFACE_C, 2}         // type 5
 104 };
 105
 106 #endif // __SMARTREADER_TYPES_H__
 107 // end of FTDI defines