3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
9 if { [info exists ENDIAN] } {
15 # Work-area is a space in RAM used for flash programming
17 if { [info exists WORKAREASIZE] } {
18 set _WORKAREASIZE $WORKAREASIZE
20 set _WORKAREASIZE 0x4000
23 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
29 #use combined on interfaces or targets that can't set TRST/SRST separately
30 reset_config trst_and_srst
33 if { [info exists CPUTAPID ] } {
34 set _CPUTAPID $CPUTAPID
36 # See STM Document RM0008
38 set _CPUTAPID 0x3ba00477
40 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
42 if { [info exists BSTAPID ] } {
45 # See STM Document RM0008
47 # Low density devices, Rev A
48 set _BSTAPID1 0x06412041
49 # Medium density devices, Rev A
50 set _BSTAPID2 0x06410041
51 # Medium density devices, Rev B and Rev Z
52 set _BSTAPID3 0x16410041
53 # High density devices, Rev A
54 set _BSTAPID4 0x06414041
55 # Connectivity line devices, Rev A and Rev Z
56 set _BSTAPID5 0x06418041
58 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
60 set _TARGETNAME $_CHIPNAME.cpu
61 target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
63 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
65 flash bank stm32x 0 0 0 0 0
67 # For more information about the configuration files, take a look at: