1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
22 * S3C2440 OpenOCD NAND Flash controller support.
24 * Many thanks to Simtec Electronics for sponsoring this work.
31 #include "s3c24xx_nand.h"
34 static int s3c2440_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct nand_device_s
*device
);
35 static int s3c2440_init(struct nand_device_s
*device
);
36 //static int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
38 nand_flash_controller_t s3c2440_nand_controller
=
41 .nand_device_command
= s3c2440_nand_device_command
,
42 .register_commands
= s3c24xx_register_commands
,
44 .reset
= s3c24xx_reset
,
45 .command
= s3c24xx_command
,
46 .address
= s3c24xx_address
,
47 .write_data
= s3c24xx_write_data
,
48 .read_data
= s3c24xx_read_data
,
49 .write_page
= s3c24xx_write_page
,
50 .read_page
= s3c24xx_read_page
,
51 .write_block_data
= s3c2440_write_block_data
,
52 .read_block_data
= s3c2440_read_block_data
,
53 .controller_ready
= s3c24xx_controller_ready
,
54 .nand_ready
= s3c2440_nand_ready
,
57 static int s3c2440_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
,
58 char **args
, int argc
,
59 struct nand_device_s
*device
)
61 s3c24xx_nand_controller_t
*info
;
63 info
= s3c24xx_nand_device_command(cmd_ctx
, cmd
, args
, argc
, device
);
65 return ERROR_NAND_DEVICE_INVALID
;
68 /* fill in the address fields for the core device */
69 info
->cmd
= S3C2440_NFCMD
;
70 info
->addr
= S3C2440_NFADDR
;
71 info
->data
= S3C2440_NFDATA
;
72 info
->nfstat
= S3C2440_NFSTAT
;
77 static int s3c2440_init(struct nand_device_s
*device
)
79 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
80 target_t
*target
= s3c24xx_info
->target
;
82 target_write_u32(target
, S3C2410_NFCONF
,
83 S3C2440_NFCONF_TACLS(3) |
84 S3C2440_NFCONF_TWRPH0(7) |
85 S3C2440_NFCONF_TWRPH1(7));
87 target_write_u32(target
, S3C2440_NFCONT
,
88 S3C2440_NFCONT_INITECC
| S3C2440_NFCONT_ENABLE
);
93 int s3c2440_nand_ready(struct nand_device_s
*device
, int timeout
)
95 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
96 target_t
*target
= s3c24xx_info
->target
;
99 if (target
->state
!= TARGET_HALTED
) {
100 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
101 return ERROR_NAND_OPERATION_FAILED
;
105 target_read_u8(target
, s3c24xx_info
->nfstat
, &status
);
107 if (status
& S3C2440_NFSTAT_READY
)
111 } while (timeout
-- > 0);
117 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
119 int s3c2440_read_block_data(struct nand_device_s
*device
, uint8_t *data
, int data_size
)
121 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
122 target_t
*target
= s3c24xx_info
->target
;
123 uint32_t nfdata
= s3c24xx_info
->data
;
126 LOG_INFO("%s: reading data: %p, %p, %d\n", __func__
, device
, data
, data_size
);
128 if (target
->state
!= TARGET_HALTED
) {
129 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
130 return ERROR_NAND_OPERATION_FAILED
;
133 while (data_size
>= 4) {
134 target_read_u32(target
, nfdata
, &tmp
);
145 while (data_size
> 0) {
146 target_read_u8(target
, nfdata
, data
);
155 int s3c2440_write_block_data(struct nand_device_s
*device
, uint8_t *data
, int data_size
)
157 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
158 target_t
*target
= s3c24xx_info
->target
;
159 uint32_t nfdata
= s3c24xx_info
->data
;
162 if (target
->state
!= TARGET_HALTED
) {
163 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
164 return ERROR_NAND_OPERATION_FAILED
;
167 while (data_size
>= 4) {
168 tmp
= le_to_h_u32(data
);
169 target_write_u32(target
, nfdata
, tmp
);
175 while (data_size
> 0) {
176 target_write_u8(target
, nfdata
, *data
);