at91: add chip register definition and generic init support
[openocd/openocdswd.git] / tcl / chip / atmel / at91 / usarts.tcl
blob68420292e91f2c53ac62bafdf0c6f5acecd978df
1 # the DBGU and USARTs are 'almost' indentical'
2 set DBGU_CR [expr $AT91C_BASE_DBGU + 0x00000000]
3 set DBGU_MR [expr $AT91C_BASE_DBGU + 0x00000004]
4 set DBGU_IER [expr $AT91C_BASE_DBGU + 0x00000008]
5 set DBGU_IDR [expr $AT91C_BASE_DBGU + 0x0000000C]
6 set DBGU_IMR [expr $AT91C_BASE_DBGU + 0x00000010]
7 set DBGU_CSR [expr $AT91C_BASE_DBGU + 0x00000014]
8 set DBGU_RHR [expr $AT91C_BASE_DBGU + 0x00000018]
9 set DBGU_THR [expr $AT91C_BASE_DBGU + 0x0000001C]
10 set DBGU_BRGR [expr $AT91C_BASE_DBGU + 0x00000020]
11 # no RTOR
12 # no TTGR
13 # no FIDI
14 # no NER
15 set DBGU_CIDR [expr $AT91C_BASE_DBGU + 0x00000040]
16 set DBGU_EXID [expr $AT91C_BASE_DBGU + 0x00000044]
17 set DBGU_FNTR [expr $AT91C_BASE_DBGU + 0x00000048]
20 set USx_CR 0x00000000
21 set USx_MR 0x00000004
22 set USx_IER 0x00000008
23 set USx_IDR 0x0000000C
24 set USx_IMR 0x00000010
25 set USx_CSR 0x00000014
26 set USx_RHR 0x00000018
27 set USx_THR 0x0000001C
28 set USx_BRGR 0x00000020
29 set USx_RTOR 0x00000024
30 set USx_TTGR 0x00000028
31 set USx_FIDI 0x00000040
32 set USx_NER 0x00000044
33 set USx_IF 0x0000004C
35 # Create all the uarts that exist..
36 # we blow up if there are >9
39 proc show_mmr_USx_MR_helper { NAME ADDR VAL } {
40 # First - just print it
42 set x [show_normalize_bitfield $VAL 3 0]
43 if { $x == 0 } {
44 echo "\tNormal operation"
45 } else {
46 echo [format "\tNon Normal operation mode: 0x%02x" $x]
49 set x [show_normalize_bitfield $VAL 11 9]
50 set s "unknown"
51 switch -exact $x {
52 0 { set s "Even" }
53 1 { set s "Odd" }
54 2 { set s "Force=0" }
55 3 { set s "Force=1" }
56 * {
57 set $x [expr $x & 6]
58 switch -exact $x {
59 4 { set s "None" }
60 6 { set s "Multidrop Mode" }
64 echo [format "\tParity: %s " $s]
66 set x [expr 5 + [show_normalize_bitfield $VAL 7 6]]
67 echo [format "\tDatabits: %d" $x]
69 set x [show_normalize_bitfield $VAL 13 12]
70 switch -exact $x {
71 0 { echo "\tStop bits: 1" }
72 1 { echo "\tStop bits: 1.5" }
73 2 { echo "\tStop bits: 2" }
74 3 { echo "\tStop bits: Illegal/Reserved" }
78 # For every possbile usart...
79 foreach WHO { US0 US1 US2 US3 US4 US5 US6 US7 US8 US9 } {
80 set n AT91C_BASE_[set WHO]
81 set str ""
83 # Only if it exists on the chip
84 if [ info exists $n ] {
85 # Hence: $n - is like AT91C_BASE_USx
86 # For every sub-register
87 foreach REG {CR MR IER IDR IMR CSR RHR THR BRGR RTOR TTGR FIDI NER IF} {
88 # vn = variable name
89 set vn [set WHO]_[set REG]
90 # vn = USx_IER
91 # vv = variable value
92 set vv [expr $$n + [set USx_[set REG]]]
93 # And VV is the address in memory of that register
96 # make that VN a GLOBAL so others can find it
97 global $vn
98 set $vn $vv
100 # Create a command for this specific register.
101 proc show_$vn { } "show_mmr32_reg $vn"
103 # Add this command to the Device(as a whole) command
104 set str "$str\nshow_$vn"
106 # Now - create the DEVICE(as a whole) command
107 set fn show_$WHO
108 proc $fn { } $str
112 # The Debug Uart is special..
113 set str ""
116 # For every sub-register
117 foreach REG {DBGU_CR DBGU_MR DBGU_IER DBGU_IDR DBGU_IMR
118 DBGU_CSR DBGU_RHR DBGU_THR DBGU_BRGR DBGU_CIDR DBGU_EXID DBGU_FNTR} {
120 # Create a command for this specific register.
121 proc show_$REG { } "show_mmr32_reg $REG"
123 # Add this command to the Device(as a whole) command
124 set str "$str\nshow_$REG"
127 # Now - create the DEVICE(as a whole) command
128 proc show_DBGU { } $str
130 unset str
132 proc show_DBGU_MR_helper { NAME ADDR VAL } { show_mmr_USx_MR_helper $NAME $ADDR $VAL }