zy1000: wait for srst to deassert
[openocd/openocdswd.git] / src / jtag / zy1000 / zy1000.c
blob092e3cd25ce013132b0c1a50f0b469556b6c9b2e
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
56 #if BUILD_ECOSBOARD
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #endif
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
73 #endif
75 static int zy1000_khz(int khz, int *jtag_speed)
77 if (khz == 0)
79 *jtag_speed = 0;
81 else
83 *jtag_speed = 64000/khz;
85 return ERROR_OK;
88 static int zy1000_speed_div(int speed, int *khz)
90 if (speed == 0)
92 *khz = 0;
94 else
96 *khz = 64000/speed;
99 return ERROR_OK;
102 static bool readPowerDropout(void)
104 uint32_t state;
105 // sample and clear power dropout
106 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
107 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
108 bool powerDropout;
109 powerDropout = (state & 0x80) != 0;
110 return powerDropout;
114 static bool readSRST(void)
116 uint32_t state;
117 // sample and clear SRST sensing
118 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
119 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
120 bool srstAsserted;
121 srstAsserted = (state & 0x40) != 0;
122 return srstAsserted;
125 static int zy1000_srst_asserted(int *srst_asserted)
127 *srst_asserted = readSRST();
128 return ERROR_OK;
131 static int zy1000_power_dropout(int *dropout)
133 *dropout = readPowerDropout();
134 return ERROR_OK;
137 void zy1000_reset(int trst, int srst)
139 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
141 /* flush the JTAG FIFO. Not flushing the queue before messing with
142 * reset has such interesting bugs as causing hard to reproduce
143 * RCLK bugs as RCLK will stop responding when TRST is asserted
145 waitIdle();
147 if (!srst)
149 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
151 else
153 /* Danger!!! if clk != 0 when in
154 * idle in TAP_IDLE, reset halt on str912 will fail.
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
159 if (!trst)
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
163 else
165 /* assert reset */
166 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
169 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
171 /* we're now in the RESET state until trst is deasserted */
172 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
173 } else
175 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
176 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
179 /* wait for srst to float back up */
180 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
181 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
183 bool first = true;
184 long long start;
185 long total = 0;
186 for (;;)
188 // We don't want to sense our own reset, so we clear here.
189 // There is of course a timing hole where we could loose
190 // a "real" reset.
191 if (!readSRST())
193 if (total > 1)
195 LOG_USER("SRST took %dms to deassert", (int)total);
197 break;
200 if (first)
202 first = false;
203 start = timeval_ms();
206 total = timeval_ms() - start;
208 if (total > 5000)
210 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
211 break;
218 int zy1000_speed(int speed)
220 /* flush JTAG master FIFO before setting speed */
221 waitIdle();
223 if (speed == 0)
225 /*0 means RCLK*/
226 speed = 0;
227 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
228 LOG_DEBUG("jtag_speed using RCLK");
230 else
232 if (speed > 8190 || speed < 2)
234 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
235 return ERROR_INVALID_ARGUMENTS;
238 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
239 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
240 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
242 return ERROR_OK;
245 static bool savePower;
248 static void setPower(bool power)
250 savePower = power;
251 if (power)
253 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
254 } else
256 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
260 COMMAND_HANDLER(handle_power_command)
262 switch (CMD_ARGC)
264 case 1: {
265 bool enable;
266 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
267 setPower(enable);
268 // fall through
270 case 0:
271 LOG_INFO("Target power %s", savePower ? "on" : "off");
272 break;
273 default:
274 return ERROR_INVALID_ARGUMENTS;
277 return ERROR_OK;
280 #if !BUILD_ECOSBOARD
281 static char *tcp_server = "notspecified";
282 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
284 if (argc != 2)
285 return JIM_ERR;
287 tcp_server = strdup(Jim_GetString(argv[1], NULL));
289 return JIM_OK;
291 #endif
293 #if BUILD_ECOSBOARD
294 /* Give TELNET a way to find out what version this is */
295 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
297 if ((argc < 1) || (argc > 3))
298 return JIM_ERR;
299 const char *version_str = NULL;
301 if (argc == 1)
303 version_str = ZYLIN_OPENOCD_VERSION;
304 } else
306 const char *str = Jim_GetString(argv[1], NULL);
307 const char *str2 = NULL;
308 if (argc > 2)
309 str2 = Jim_GetString(argv[2], NULL);
310 if (strcmp("openocd", str) == 0)
312 version_str = ZYLIN_OPENOCD;
314 else if (strcmp("zy1000", str) == 0)
316 version_str = ZYLIN_VERSION;
318 else if (strcmp("date", str) == 0)
320 version_str = ZYLIN_DATE;
322 else if (strcmp("time", str) == 0)
324 version_str = ZYLIN_TIME;
326 else if (strcmp("pcb", str) == 0)
328 #ifdef CYGPKG_HAL_NIOS2
329 version_str="c";
330 #else
331 version_str="b";
332 #endif
334 #ifdef CYGPKG_HAL_NIOS2
335 else if (strcmp("fpga", str) == 0)
338 /* return a list of 32 bit integers to describe the expected
339 * and actual FPGA
341 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
342 uint32_t id, timestamp;
343 HAL_READ_UINT32(SYSID_BASE, id);
344 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
345 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
346 version_str = fpga_id;
347 if ((argc>2) && (strcmp("time", str2) == 0))
349 time_t last_mod = timestamp;
350 char * t = ctime (&last_mod) ;
351 t[strlen(t)-1] = 0;
352 version_str = t;
355 #endif
357 else
359 return JIM_ERR;
363 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
365 return JIM_OK;
367 #endif
369 #ifdef CYGPKG_HAL_NIOS2
372 struct info_forward
374 void *data;
375 struct cyg_upgrade_info *upgraded_file;
378 static void report_info(void *data, const char * format, va_list args)
380 char *s = alloc_vprintf(format, args);
381 LOG_USER_N("%s", s);
382 free(s);
385 struct cyg_upgrade_info firmware_info =
387 (uint8_t *)0x84000000,
388 "/ram/firmware.phi",
389 "Firmware",
390 0x0300000,
391 0x1f00000 -
392 0x0300000,
393 "ZylinNiosFirmware\n",
394 report_info,
397 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
399 if (argc != 2)
400 return JIM_ERR;
402 int length;
403 const char *str = Jim_GetString(argv[1], &length);
405 /* */
406 int tmpFile;
407 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
409 return JIM_ERR;
411 bool success;
412 success = write(tmpFile, str, length) == length;
413 close(tmpFile);
414 if (!success)
415 return JIM_ERR;
417 if (!cyg_firmware_upgrade(NULL, firmware_info))
418 return JIM_ERR;
420 return JIM_OK;
422 #endif
424 static int
425 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
426 int argc,
427 Jim_Obj * const *argv)
429 if (argc != 1)
431 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
432 return JIM_ERR;
435 uint32_t status;
436 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
438 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
440 return JIM_OK;
445 int zy1000_quit(void)
448 return ERROR_OK;
453 int interface_jtag_execute_queue(void)
455 uint32_t empty;
457 waitIdle();
458 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
459 /* clear JTAG error register */
460 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
462 if ((empty&0x400) != 0)
464 LOG_WARNING("RCLK timeout");
465 /* the error is informative only as we don't want to break the firmware if there
466 * is a false positive.
468 // return ERROR_FAIL;
470 return ERROR_OK;
477 static uint32_t getShiftValue(void)
479 uint32_t value;
480 waitIdle();
481 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
482 VERBOSE(LOG_INFO("getShiftValue %08x", value));
483 return value;
485 #if 0
486 static uint32_t getShiftValueFlip(void)
488 uint32_t value;
489 waitIdle();
490 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
491 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
492 return value;
494 #endif
496 #if 0
497 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, uint32_t value)
499 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
500 uint32_t a,b;
501 a = state;
502 b = endState;
503 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
504 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
505 VERBOSE(getShiftValueFlip());
507 #endif
509 // here we shuffle N bits out/in
510 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause, tap_state_t shiftState, tap_state_t end_state)
512 tap_state_t pause_state = shiftState;
513 for (int j = 0; j < num_bits; j += 32)
515 int k = num_bits - j;
516 if (k > 32)
518 k = 32;
519 /* we have more to shift out */
520 } else if (pause)
522 /* this was the last to shift out this time */
523 pause_state = end_state;
526 // we have (num_bits + 7)/8 bytes of bits to toggle out.
527 // bits are pushed out LSB to MSB
528 uint32_t value;
529 value = 0;
530 if (out_value != NULL)
532 for (int l = 0; l < k; l += 8)
534 value|=out_value[(j + l)/8]<<l;
537 /* mask away unused bits for easier debugging */
538 if (k < 32)
540 value&=~(((uint32_t)0xffffffff) << k);
541 } else
543 /* Shifting by >= 32 is not defined by the C standard
544 * and will in fact shift by &0x1f bits on nios */
547 shiftValueInner(shiftState, pause_state, k, value);
549 if (in_value != NULL)
551 // data in, LSB to MSB
552 value = getShiftValue();
553 // we're shifting in data to MSB, shift data to be aligned for returning the value
554 value >>= 32-k;
556 for (int l = 0; l < k; l += 8)
558 in_value[(j + l)/8]=(value >> l)&0xff;
564 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
566 for (int i = 0; i < num_fields; i++)
568 scanBits(fields[i].out_value,
569 fields[i].in_value,
570 fields[i].num_bits,
571 (i == num_fields-1),
572 shiftState,
573 end_state);
577 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
579 int scan_size = 0;
580 struct jtag_tap *tap, *nextTap;
581 tap_state_t pause_state = TAP_IRSHIFT;
583 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
585 nextTap = jtag_tap_next_enabled(tap);
586 if (nextTap==NULL)
588 pause_state = state;
590 scan_size = tap->ir_length;
592 /* search the list */
593 if (tap == active)
595 scanFields(1, fields, TAP_IRSHIFT, pause_state);
596 /* update device information */
597 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
599 tap->bypass = 0;
600 } else
602 /* if a device isn't listed, set it to BYPASS */
603 assert(scan_size <= 32);
604 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
606 tap->bypass = 1;
610 return ERROR_OK;
617 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
619 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
620 return ERROR_OK;
623 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
625 struct jtag_tap *tap, *nextTap;
626 tap_state_t pause_state = TAP_DRSHIFT;
627 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
629 nextTap = jtag_tap_next_enabled(tap);
630 if (nextTap==NULL)
632 pause_state = state;
635 /* Find a range of fields to write to this tap */
636 if (tap == active)
638 assert(!tap->bypass);
640 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
641 } else
643 /* Shift out a 0 for disabled tap's */
644 assert(tap->bypass);
645 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
648 return ERROR_OK;
651 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
653 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
654 return ERROR_OK;
657 int interface_jtag_add_tlr()
659 setCurrentState(TAP_RESET);
660 return ERROR_OK;
664 int interface_jtag_add_reset(int req_trst, int req_srst)
666 zy1000_reset(req_trst, req_srst);
667 return ERROR_OK;
670 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
672 /* num_cycles can be 0 */
673 setCurrentState(clockstate);
675 /* execute num_cycles, 32 at the time. */
676 int i;
677 for (i = 0; i < num_cycles; i += 32)
679 int num;
680 num = 32;
681 if (num_cycles-i < num)
683 num = num_cycles-i;
685 shiftValueInner(clockstate, clockstate, num, 0);
688 #if !TEST_MANUAL()
689 /* finish in end_state */
690 setCurrentState(state);
691 #else
692 tap_state_t t = TAP_IDLE;
693 /* test manual drive code on any target */
694 int tms;
695 uint8_t tms_scan = tap_get_tms_path(t, state);
696 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
698 for (i = 0; i < tms_count; i++)
700 tms = (tms_scan >> i) & 1;
701 waitIdle();
702 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
704 waitIdle();
705 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
706 #endif
708 return ERROR_OK;
711 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
713 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
716 int interface_jtag_add_clocks(int num_cycles)
718 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
721 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
723 /*wait for the fifo to be empty*/
724 waitIdle();
726 for (unsigned i = 0; i < num_bits; i++)
728 int tms;
730 if (((seq[i/8] >> (i % 8)) & 1) == 0)
732 tms = 0;
734 else
736 tms = 1;
739 waitIdle();
740 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
743 waitIdle();
744 if (state != TAP_INVALID)
746 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
747 } else
749 /* this would be normal if we are switching to SWD mode */
751 return ERROR_OK;
754 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
756 int state_count;
757 int tms = 0;
759 state_count = 0;
761 tap_state_t cur_state = cmd_queue_cur_state;
763 uint8_t seq[16];
764 memset(seq, 0, sizeof(seq));
765 assert(num_states < (int)((sizeof(seq) * 8)));
767 while (num_states)
769 if (tap_state_transition(cur_state, false) == path[state_count])
771 tms = 0;
773 else if (tap_state_transition(cur_state, true) == path[state_count])
775 tms = 1;
777 else
779 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
780 exit(-1);
783 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
785 cur_state = path[state_count];
786 state_count++;
787 num_states--;
790 return interface_add_tms_seq(state_count, seq, cur_state);
793 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
795 /* bypass bits before and after */
796 int pre_bits = 0;
797 int post_bits = 0;
799 bool found = false;
800 struct jtag_tap *cur_tap, *nextTap;
801 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
803 nextTap = jtag_tap_next_enabled(cur_tap);
804 if (cur_tap == tap)
806 found = true;
807 } else
809 if (found)
811 post_bits++;
812 } else
814 pre_bits++;
818 *pre = pre_bits;
819 *post = post_bits;
822 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
825 int pre_bits;
826 int post_bits;
827 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
829 if (pre_bits + post_bits + 6 > 32)
831 int i;
832 for (i = 0; i < count; i++)
834 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
835 buffer += 4;
837 } else
839 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
840 int i;
841 for (i = 0; i < count - 1; i++)
843 /* Fewer pokes means we get to use the FIFO more efficiently */
844 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
845 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
846 buffer += 4;
848 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
849 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
855 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
857 #if 0
858 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
859 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
860 #else
861 static const int bits[] = {32, 2};
862 uint32_t values[] = {0, 0};
864 /* FIX!!!!!! the target_write_memory() API started this nasty problem
865 * with unaligned uint32_t * pointers... */
866 const uint8_t *t = (const uint8_t *)data;
869 /* bypass bits before and after */
870 int pre_bits;
871 int post_bits;
872 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
874 bool found = false;
875 struct jtag_tap *cur_tap, *nextTap;
876 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
878 nextTap = jtag_tap_next_enabled(cur_tap);
879 if (cur_tap == tap)
881 found = true;
882 } else
884 if (found)
886 post_bits++;
887 } else
889 pre_bits++;
894 post_bits+=2;
897 while (--count > 0)
899 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
901 uint32_t value;
902 value = *t++;
903 value |= (*t++<<8);
904 value |= (*t++<<16);
905 value |= (*t++<<24);
907 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
908 /* minimum 2 bits */
909 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
911 #if 1
912 /* copy & paste from arm11_dbgtap.c */
913 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
915 waitIdle();
916 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
917 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
918 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
919 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
920 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
921 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
922 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
923 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
924 /* we don't have to wait for the queue to empty here. waitIdle(); */
925 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
926 #else
927 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
929 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
932 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
933 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
934 #endif
937 values[0] = *t++;
938 values[0] |= (*t++<<8);
939 values[0] |= (*t++<<16);
940 values[0] |= (*t++<<24);
942 /* This will happen on the last iteration updating the current tap state
943 * so we don't have to track it during the common code path */
944 jtag_add_dr_out(tap,
946 bits,
947 values,
948 TAP_IDLE);
950 return jtag_execute_queue();
951 #endif
955 static const struct command_registration zy1000_commands[] = {
957 .name = "power",
958 .handler = handle_power_command,
959 .mode = COMMAND_ANY,
960 .help = "Turn power switch to target on/off. "
961 "With no arguments, prints status.",
962 .usage = "('on'|'off)",
964 #if BUILD_ECOSBOARD
966 .name = "zy1000_version",
967 .mode = COMMAND_ANY,
968 .jim_handler = jim_zy1000_version,
969 .help = "Print version info for zy1000.",
970 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
972 #else
974 .name = "zy1000_server",
975 .mode = COMMAND_ANY,
976 .jim_handler = jim_zy1000_server,
977 .help = "Tcpip address for ZY1000 server.",
978 .usage = "address",
980 #endif
982 .name = "powerstatus",
983 .mode = COMMAND_ANY,
984 .jim_handler = zylinjtag_Jim_Command_powerstatus,
985 .help = "Returns power status of target",
987 #ifdef CYGPKG_HAL_NIOS2
989 .name = "updatezy1000firmware",
990 .mode = COMMAND_ANY,
991 .jim_handler = jim_zy1000_writefirmware,
992 .help = "writes firmware to flash",
993 /* .usage = "some_string", */
995 #endif
996 COMMAND_REGISTRATION_DONE
1000 static int tcp_ip = -1;
1002 /* Write large packets if we can */
1003 static size_t out_pos;
1004 static uint8_t out_buffer[16384];
1005 static size_t in_pos;
1006 static size_t in_write;
1007 static uint8_t in_buffer[16384];
1009 static bool flush_writes(void)
1011 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1012 out_pos = 0;
1013 return ok;
1016 static bool writeLong(uint32_t l)
1018 int i;
1019 for (i = 0; i < 4; i++)
1021 uint8_t c = (l >> (i*8))&0xff;
1022 out_buffer[out_pos++] = c;
1023 if (out_pos >= sizeof(out_buffer))
1025 if (!flush_writes())
1027 return false;
1031 return true;
1034 static bool readLong(uint32_t *out_data)
1036 if (out_pos > 0)
1038 if (!flush_writes())
1040 return false;
1044 uint32_t data = 0;
1045 int i;
1046 for (i = 0; i < 4; i++)
1048 uint8_t c;
1049 if (in_pos == in_write)
1051 /* read more */
1052 int t;
1053 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1054 if (t < 1)
1056 return false;
1058 in_write = (size_t) t;
1059 in_pos = 0;
1061 c = in_buffer[in_pos++];
1063 data |= (c << (i*8));
1065 *out_data = data;
1066 return true;
1069 enum ZY1000_CMD
1071 ZY1000_CMD_POKE = 0x0,
1072 ZY1000_CMD_PEEK = 0x8,
1073 ZY1000_CMD_SLEEP = 0x1,
1077 #if !BUILD_ECOSBOARD
1079 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1080 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1082 /* We initialize this late since we need to know the server address
1083 * first.
1085 static void tcpip_open(void)
1087 if (tcp_ip >= 0)
1088 return;
1090 struct sockaddr_in echoServAddr; /* Echo server address */
1092 /* Create a reliable, stream socket using TCP */
1093 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1095 fprintf(stderr, "Failed to connect to zy1000 server\n");
1096 exit(-1);
1099 /* Construct the server address structure */
1100 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1101 echoServAddr.sin_family = AF_INET; /* Internet address family */
1102 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1103 echoServAddr.sin_port = htons(7777); /* Server port */
1105 /* Establish the connection to the echo server */
1106 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1108 fprintf(stderr, "Failed to connect to zy1000 server\n");
1109 exit(-1);
1112 int flag = 1;
1113 setsockopt(tcp_ip, /* socket affected */
1114 IPPROTO_TCP, /* set option at TCP level */
1115 TCP_NODELAY, /* name of option */
1116 (char *)&flag, /* the cast is historical cruft */
1117 sizeof(int)); /* length of option value */
1122 /* send a poke */
1123 void zy1000_tcpout(uint32_t address, uint32_t data)
1125 tcpip_open();
1126 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1127 !writeLong(data))
1129 fprintf(stderr, "Could not write to zy1000 server\n");
1130 exit(-1);
1134 uint32_t zy1000_tcpin(uint32_t address)
1136 tcpip_open();
1137 uint32_t data;
1138 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1139 !readLong(&data))
1141 fprintf(stderr, "Could not read from zy1000 server\n");
1142 exit(-1);
1144 return data;
1147 int interface_jtag_add_sleep(uint32_t us)
1149 tcpip_open();
1150 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1151 !writeLong(us))
1153 fprintf(stderr, "Could not read from zy1000 server\n");
1154 exit(-1);
1156 return ERROR_OK;
1160 #endif
1162 #if BUILD_ECOSBOARD
1163 static char tcpip_stack[2048];
1165 static cyg_thread tcpip_thread_object;
1166 static cyg_handle_t tcpip_thread_handle;
1168 /* Infinite loop peeking & poking */
1169 static void tcpipserver(void)
1171 for (;;)
1173 uint32_t address;
1174 if (!readLong(&address))
1175 return;
1176 enum ZY1000_CMD c = (address >> 24) & 0xff;
1177 address &= 0xffffff;
1178 switch (c)
1180 case ZY1000_CMD_POKE:
1182 uint32_t data;
1183 if (!readLong(&data))
1184 return;
1185 address &= ~0x80000000;
1186 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1187 break;
1189 case ZY1000_CMD_PEEK:
1191 uint32_t data;
1192 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1193 if (!writeLong(data))
1194 return;
1195 break;
1197 case ZY1000_CMD_SLEEP:
1199 uint32_t data;
1200 if (!readLong(&data))
1201 return;
1202 jtag_sleep(data);
1203 break;
1205 default:
1206 return;
1212 static void tcpip_server(cyg_addrword_t data)
1214 int so_reuseaddr_option = 1;
1216 int fd;
1217 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1219 LOG_ERROR("error creating socket: %s", strerror(errno));
1220 exit(-1);
1223 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1224 sizeof(int));
1226 struct sockaddr_in sin;
1227 unsigned int address_size;
1228 address_size = sizeof(sin);
1229 memset(&sin, 0, sizeof(sin));
1230 sin.sin_family = AF_INET;
1231 sin.sin_addr.s_addr = INADDR_ANY;
1232 sin.sin_port = htons(7777);
1234 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1236 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1237 exit(-1);
1240 if (listen(fd, 1) == -1)
1242 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1243 exit(-1);
1247 for (;;)
1249 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1250 if (tcp_ip < 0)
1252 continue;
1255 int flag = 1;
1256 setsockopt(tcp_ip, /* socket affected */
1257 IPPROTO_TCP, /* set option at TCP level */
1258 TCP_NODELAY, /* name of option */
1259 (char *)&flag, /* the cast is historical cruft */
1260 sizeof(int)); /* length of option value */
1262 bool save_poll = jtag_poll_get_enabled();
1264 /* polling will screw up the "connection" */
1265 jtag_poll_set_enabled(false);
1267 tcpipserver();
1269 jtag_poll_set_enabled(save_poll);
1271 close(tcp_ip);
1274 close(fd);
1278 int interface_jtag_add_sleep(uint32_t us)
1280 jtag_sleep(us);
1281 return ERROR_OK;
1284 #endif
1287 int zy1000_init(void)
1289 #if BUILD_ECOSBOARD
1290 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1291 #endif
1293 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1295 setPower(true); // on by default
1298 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1299 zy1000_reset(0, 0);
1300 zy1000_speed(jtag_get_speed());
1303 #if BUILD_ECOSBOARD
1304 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1305 (void *) tcpip_stack, sizeof(tcpip_stack),
1306 &tcpip_thread_handle, &tcpip_thread_object);
1307 cyg_thread_resume(tcpip_thread_handle);
1308 #endif
1310 return ERROR_OK;
1315 struct jtag_interface zy1000_interface =
1317 .name = "ZY1000",
1318 .supported = DEBUG_CAP_TMS_SEQ,
1319 .execute_queue = NULL,
1320 .speed = zy1000_speed,
1321 .commands = zy1000_commands,
1322 .init = zy1000_init,
1323 .quit = zy1000_quit,
1324 .khz = zy1000_khz,
1325 .speed_div = zy1000_speed_div,
1326 .power_dropout = zy1000_power_dropout,
1327 .srst_asserted = zy1000_srst_asserted,