src/target/adi_v5_swd.c

   1 /***************************************************************************
   2  *
   3  *   Copyright (C) 2010 by David Brownell
   4  *
   5  *   This program is free software; you can redistribute it and/or modify
   6  *   it under the terms of the GNU General Public License as published by
   7  *   the Free Software Foundation; either version 2 of the License, or
   8  *   (at your option) any later version.
   9  *
  10  *   This program is distributed in the hope that it will be useful,
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *   GNU General Public License for more details.
  14  *
  15  *   You should have received a copy of the GNU General Public License
  16  *   along with this program; if not, write to the
  17  *   Free Software Foundation, Inc.,
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19  ***************************************************************************/
  20
  21 /**
  22  * @file
  23  * This file implements SWD transport support for cores implementing
  24  the ARM Debug Interface version 5 (ADIv5).
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "arm.h"
  32 #include "arm_adi_v5.h"
  33 #include <helper/time_support.h>
  34
  35 /*
  36  * This represents the bits which must be sent out on TMS/SWDIO to
  37  * switch a DAP implemented using an SWJ-DP module into SWD mode.
  38  * These bits are stored (and transmitted) LSB-first.
  39  *
  40  * See the DAP-Lite specification, section 2.2.5 for information
  41  * about making the debug link select SWD or JTAG.  (Similar info
  42  * is in a few other ARM documents.)
  43  */
  44 static const uint8_t jtag2swd_bitseq[] = {
  45         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
  46          * putting both JTAG and SWD logic into reset state.
  47          */
  48         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  49         /* Switching sequence enables SWD and disables JTAG
  50          * NOTE: bits in the DP's IDCODE may expose the need for
  51          * an old/deprecated sequence (0xb6 0xed).
  52          */
  53         0x9e, 0xe7,
  54         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
  55          * putting both JTAG and SWD logic into reset state.
  56          */
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  58 };
  59
  60 /**
  61  * Put the debug link into SWD mode, if the target supports it.
  62  * The link's initial mode may be either JTAG (for example,
  63  * with SWJ-DP after reset) or SWD.
  64  *
  65  * @param target Enters SWD mode (if possible).
  66  *
  67  * Note that targets using the JTAG-DP do not support SWD, and that
  68  * some targets which could otherwise support it may have have been
  69  * configured to disable SWD signaling
  70  *
  71  * @return ERROR_OK or else a fault code.
  72  */
  73 int dap_to_swd(struct target *target)
  74 {
  75         int retval;
  76
  77         LOG_DEBUG("Enter SWD mode");
  78
  79         /* REVISIT it's nasty to need to make calls to a "jtag"
  80          * subsystem if the link isn't in JTAG mode...
  81          */
  82
  83         retval =  jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
  84                         jtag2swd_bitseq, TAP_INVALID);
  85         if (retval == ERROR_OK)
  86                 retval = jtag_execute_queue();
  87
  88         /* REVISIT set up the DAP's ops vector for SWD mode. */
  89
  90         return retval;
  91 }
  92