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Reorganize NAND flash table
[openocd/ntfreak.git] / src / flash / nand / core.c
bloba9fc3cdaac96d67f4d678831da59c2cdfb4e0211
1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
5 * *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifdef HAVE_CONFIG_H
24 #include "config.h"
25 #endif
26
27 #include "imp.h"
28
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device *nand_devices = NULL;
31
32 void nand_device_add(struct nand_device *c)
33 {
34 if (nand_devices) {
35 struct nand_device *p = nand_devices;
36 while (p && p->next) p = p->next;
37 p->next = c;
38 } else
39 nand_devices = c;
40 }
41
42
43 /* Chip ID list
44 *
45 * Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
46 * options, name
47 *
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
52 */
53 static struct nand_info nand_flash_ids[] =
54 {
55 /* Vendor Specific Entries */
56 { NAND_MFR_SAMSUNG, 0xD5, 0, 8192, 0, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
57 { NAND_MFR_SAMSUNG, 0xD7, 0, 8192, 0, LP_OPTIONS, "K9LBG08/K9HCG08 4/8GB NAND 3.3V x8 MLC 2b/cell"},
58
59 /* start "museum" IDs */
60 { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
61 { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
62 { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
63 { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
64 { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
65 { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
66 { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
67 { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
68 { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
69 { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
70
71 { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
72 { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
73 { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
74 { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
75 /* end "museum" IDs */
76
77 { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
78 { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
79 { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
80 { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
81
82 { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
83 { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
84 { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
85 { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
86
87 { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
88 { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
89 { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
90 { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
91
92 { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
93 { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
94 { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
95 { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
96 { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
97 { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
98 { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
99
100 { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
101
102 { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
103 { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
104 { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
105 { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
106
107 { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
108 { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
109 { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
110 { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
111
112 { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
113 { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
114 { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
115 { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
116
117 { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
118 { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
119 { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
120 { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
121
122 { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
123 { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
124 { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
125 { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
126
127 { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
128 { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
129 { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
130 { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
131
132 { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
133
134 {0, 0, 0, 0, 0, 0, NULL}
135 };
136
137 /* Manufacturer ID list
138 */
139 static struct nand_manufacturer nand_manuf_ids[] =
140 {
141 {0x0, "unknown"},
142 {NAND_MFR_TOSHIBA, "Toshiba"},
143 {NAND_MFR_SAMSUNG, "Samsung"},
144 {NAND_MFR_FUJITSU, "Fujitsu"},
145 {NAND_MFR_NATIONAL, "National"},
146 {NAND_MFR_RENESAS, "Renesas"},
147 {NAND_MFR_STMICRO, "ST Micro"},
148 {NAND_MFR_HYNIX, "Hynix"},
149 {NAND_MFR_MICRON, "Micron"},
150 {0x0, NULL},
151 };
152
153 /*
154 * Define default oob placement schemes for large and small page devices
155 */
156
157 #if 0
158 static struct nand_ecclayout nand_oob_8 = {
159 .eccbytes = 3,
160 .eccpos = {0, 1, 2},
161 .oobfree = {
162 {.offset = 3,
163 .length = 2},
164 {.offset = 6,
165 .length = 2}}
166 };
167 #endif
168
169 /**
170 * Returns the flash bank specified by @a name, which matches the
171 * driver name and a suffix (option) specify the driver-specific
172 * bank number. The suffix consists of the '.' and the driver-specific
173 * bank number: when two davinci banks are defined, then 'davinci.1' refers
174 * to the second (e.g. DM355EVM).
175 */
176 static struct nand_device *get_nand_device_by_name(const char *name)
177 {
178 unsigned requested = get_flash_name_index(name);
179 unsigned found = 0;
180
181 struct nand_device *nand;
182 for (nand = nand_devices; NULL != nand; nand = nand->next)
183 {
184 if (strcmp(nand->name, name) == 0)
185 return nand;
186 if (!flash_driver_name_matches(nand->controller->name, name))
187 continue;
188 if (++found < requested)
189 continue;
190 return nand;
191 }
192 return NULL;
193 }
194
195 struct nand_device *get_nand_device_by_num(int num)
196 {
197 struct nand_device *p;
198 int i = 0;
199
200 for (p = nand_devices; p; p = p->next)
201 {
202 if (i++ == num)
203 {
204 return p;
205 }
206 }
207
208 return NULL;
209 }
210
211 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
212 struct nand_device **nand)
213 {
214 const char *str = CMD_ARGV[name_index];
215 *nand = get_nand_device_by_name(str);
216 if (*nand)
217 return ERROR_OK;
218
219 unsigned num;
220 COMMAND_PARSE_NUMBER(uint, str, num);
221 *nand = get_nand_device_by_num(num);
222 if (!*nand) {
223 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
224 return ERROR_INVALID_ARGUMENTS;
225 }
226 return ERROR_OK;
227 }
228
229 int nand_build_bbt(struct nand_device *nand, int first, int last)
230 {
231 uint32_t page;
232 int i;
233 int pages_per_block = (nand->erase_size / nand->page_size);
234 uint8_t oob[6];
235 int ret;
236
237 if ((first < 0) || (first >= nand->num_blocks))
238 first = 0;
239
240 if ((last >= nand->num_blocks) || (last == -1))
241 last = nand->num_blocks - 1;
242
243 page = first * pages_per_block;
244 for (i = first; i <= last; i++)
245 {
246 ret = nand_read_page(nand, page, NULL, 0, oob, 6);
247 if (ret != ERROR_OK)
248 return ret;
249
250 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
251 || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
252 ((nand->page_size == 2048) && (oob[0] != 0xff))))
253 {
254 LOG_WARNING("bad block: %i", i);
255 nand->blocks[i].is_bad = 1;
256 }
257 else
258 {
259 nand->blocks[i].is_bad = 0;
260 }
261
262 page += pages_per_block;
263 }
264
265 return ERROR_OK;
266 }
267
268 int nand_read_status(struct nand_device *nand, uint8_t *status)
269 {
270 if (!nand->device)
271 return ERROR_NAND_DEVICE_NOT_PROBED;
272
273 /* Send read status command */
274 nand->controller->command(nand, NAND_CMD_STATUS);
275
276 alive_sleep(1);
277
278 /* read status */
279 if (nand->device->options & NAND_BUSWIDTH_16)
280 {
281 uint16_t data;
282 nand->controller->read_data(nand, &data);
283 *status = data & 0xff;
284 }
285 else
286 {
287 nand->controller->read_data(nand, status);
288 }
289
290 return ERROR_OK;
291 }
292
293 static int nand_poll_ready(struct nand_device *nand, int timeout)
294 {
295 uint8_t status;
296
297 nand->controller->command(nand, NAND_CMD_STATUS);
298 do {
299 if (nand->device->options & NAND_BUSWIDTH_16) {
300 uint16_t data;
301 nand->controller->read_data(nand, &data);
302 status = data & 0xff;
303 } else {
304 nand->controller->read_data(nand, &status);
305 }
306 if (status & NAND_STATUS_READY)
307 break;
308 alive_sleep(1);
309 } while (timeout--);
310
311 return (status & NAND_STATUS_READY) != 0;
312 }
313
314 int nand_probe(struct nand_device *nand)
315 {
316 uint8_t manufacturer_id, device_id;
317 uint8_t id_buff[6];
318 int retval;
319 int i;
320
321 /* clear device data */
322 nand->device = NULL;
323 nand->manufacturer = NULL;
324
325 /* clear device parameters */
326 nand->bus_width = 0;
327 nand->address_cycles = 0;
328 nand->page_size = 0;
329 nand->erase_size = 0;
330
331 /* initialize controller (device parameters are zero, use controller default) */
332 if ((retval = nand->controller->init(nand) != ERROR_OK))
333 {
334 switch (retval)
335 {
336 case ERROR_NAND_OPERATION_FAILED:
337 LOG_DEBUG("controller initialization failed");
338 return ERROR_NAND_OPERATION_FAILED;
339 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
340 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
341 return ERROR_NAND_OPERATION_FAILED;
342 default:
343 LOG_ERROR("BUG: unknown controller initialization failure");
344 return ERROR_NAND_OPERATION_FAILED;
345 }
346 }
347
348 nand->controller->command(nand, NAND_CMD_RESET);
349 nand->controller->reset(nand);
350
351 nand->controller->command(nand, NAND_CMD_READID);
352 nand->controller->address(nand, 0x0);
353
354 if (nand->bus_width == 8)
355 {
356 nand->controller->read_data(nand, &manufacturer_id);
357 nand->controller->read_data(nand, &device_id);
358 }
359 else
360 {
361 uint16_t data_buf;
362 nand->controller->read_data(nand, &data_buf);
363 manufacturer_id = data_buf & 0xff;
364 nand->controller->read_data(nand, &data_buf);
365 device_id = data_buf & 0xff;
366 }
367
368 for (i = 0; nand_flash_ids[i].name; i++)
369 {
370 if (nand_flash_ids[i].id == device_id)
371 {
372 nand->device = &nand_flash_ids[i];
373 break;
374 }
375 }
376
377 for (i = 0; nand_manuf_ids[i].name; i++)
378 {
379 if (nand_manuf_ids[i].id == manufacturer_id)
380 {
381 nand->manufacturer = &nand_manuf_ids[i];
382 break;
383 }
384 }
385
386 if (!nand->manufacturer)
387 {
388 nand->manufacturer = &nand_manuf_ids[0];
389 nand->manufacturer->id = manufacturer_id;
390 }
391
392 if (!nand->device)
393 {
394 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
395 manufacturer_id, device_id);
396 return ERROR_NAND_OPERATION_FAILED;
397 }
398
399 LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
400
401 /* initialize device parameters */
402
403 /* bus width */
404 if (nand->device->options & NAND_BUSWIDTH_16)
405 nand->bus_width = 16;
406 else
407 nand->bus_width = 8;
408
409 /* Do we need extended device probe information? */
410 if (nand->device->page_size == 0 ||
411 nand->device->erase_size == 0)
412 {
413 if (nand->bus_width == 8)
414 {
415 nand->controller->read_data(nand, id_buff + 3);
416 nand->controller->read_data(nand, id_buff + 4);
417 nand->controller->read_data(nand, id_buff + 5);
418 }
419 else
420 {
421 uint16_t data_buf;
422
423 nand->controller->read_data(nand, &data_buf);
424 id_buff[3] = data_buf;
425
426 nand->controller->read_data(nand, &data_buf);
427 id_buff[4] = data_buf;
428
429 nand->controller->read_data(nand, &data_buf);
430 id_buff[5] = data_buf >> 8;
431 }
432 }
433
434 /* page size */
435 if (nand->device->page_size == 0)
436 {
437 nand->page_size = 1 << (10 + (id_buff[4] & 3));
438 }
439 else if (nand->device->page_size == 256)
440 {
441 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
442 return ERROR_NAND_OPERATION_FAILED;
443 }
444 else
445 {
446 nand->page_size = nand->device->page_size;
447 }
448
449 /* number of address cycles */
450 if (nand->page_size <= 512)
451 {
452 /* small page devices */
453 if (nand->device->chip_size <= 32)
454 nand->address_cycles = 3;
455 else if (nand->device->chip_size <= 8*1024)
456 nand->address_cycles = 4;
457 else
458 {
459 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
460 nand->address_cycles = 5;
461 }
462 }
463 else
464 {
465 /* large page devices */
466 if (nand->device->chip_size <= 128)
467 nand->address_cycles = 4;
468 else if (nand->device->chip_size <= 32*1024)
469 nand->address_cycles = 5;
470 else
471 {
472 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
473 nand->address_cycles = 6;
474 }
475 }
476
477 /* erase size */
478 if (nand->device->erase_size == 0)
479 {
480 switch ((id_buff[4] >> 4) & 3) {
481 case 0:
482 nand->erase_size = 64 << 10;
483 break;
484 case 1:
485 nand->erase_size = 128 << 10;
486 break;
487 case 2:
488 nand->erase_size = 256 << 10;
489 break;
490 case 3:
491 nand->erase_size =512 << 10;
492 break;
493 }
494 }
495 else
496 {
497 nand->erase_size = nand->device->erase_size;
498 }
499
500 /* initialize controller, but leave parameters at the controllers default */
501 if ((retval = nand->controller->init(nand) != ERROR_OK))
502 {
503 switch (retval)
504 {
505 case ERROR_NAND_OPERATION_FAILED:
506 LOG_DEBUG("controller initialization failed");
507 return ERROR_NAND_OPERATION_FAILED;
508 case ERROR_NAND_OPERATION_NOT_SUPPORTED:
509 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
510 nand->bus_width, nand->address_cycles, nand->page_size);
511 return ERROR_NAND_OPERATION_FAILED;
512 default:
513 LOG_ERROR("BUG: unknown controller initialization failure");
514 return ERROR_NAND_OPERATION_FAILED;
515 }
516 }
517
518 nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
519 nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
520
521 for (i = 0; i < nand->num_blocks; i++)
522 {
523 nand->blocks[i].size = nand->erase_size;
524 nand->blocks[i].offset = i * nand->erase_size;
525 nand->blocks[i].is_erased = -1;
526 nand->blocks[i].is_bad = -1;
527 }
528
529 return ERROR_OK;
530 }
531
532 int nand_erase(struct nand_device *nand, int first_block, int last_block)
533 {
534 int i;
535 uint32_t page;
536 uint8_t status;
537 int retval;
538
539 if (!nand->device)
540 return ERROR_NAND_DEVICE_NOT_PROBED;
541
542 if ((first_block < 0) || (last_block >= nand->num_blocks))
543 return ERROR_INVALID_ARGUMENTS;
544
545 /* make sure we know if a block is bad before erasing it */
546 for (i = first_block; i <= last_block; i++)
547 {
548 if (nand->blocks[i].is_bad == -1)
549 {
550 nand_build_bbt(nand, i, last_block);
551 break;
552 }
553 }
554
555 for (i = first_block; i <= last_block; i++)
556 {
557 /* Send erase setup command */
558 nand->controller->command(nand, NAND_CMD_ERASE1);
559
560 page = i * (nand->erase_size / nand->page_size);
561
562 /* Send page address */
563 if (nand->page_size <= 512)
564 {
565 /* row */
566 nand->controller->address(nand, page & 0xff);
567 nand->controller->address(nand, (page >> 8) & 0xff);
568
569 /* 3rd cycle only on devices with more than 32 MiB */
570 if (nand->address_cycles >= 4)
571 nand->controller->address(nand, (page >> 16) & 0xff);
572
573 /* 4th cycle only on devices with more than 8 GiB */
574 if (nand->address_cycles >= 5)
575 nand->controller->address(nand, (page >> 24) & 0xff);
576 }
577 else
578 {
579 /* row */
580 nand->controller->address(nand, page & 0xff);
581 nand->controller->address(nand, (page >> 8) & 0xff);
582
583 /* 3rd cycle only on devices with more than 128 MiB */
584 if (nand->address_cycles >= 5)
585 nand->controller->address(nand, (page >> 16) & 0xff);
586 }
587
588 /* Send erase confirm command */
589 nand->controller->command(nand, NAND_CMD_ERASE2);
590
591 retval = nand->controller->nand_ready ?
592 nand->controller->nand_ready(nand, 1000) :
593 nand_poll_ready(nand, 1000);
594 if (!retval) {
595 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
596 return ERROR_NAND_OPERATION_TIMEOUT;
597 }
598
599 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
600 {
601 LOG_ERROR("couldn't read status");
602 return ERROR_NAND_OPERATION_FAILED;
603 }
604
605 if (status & 0x1)
606 {
607 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
608 (nand->blocks[i].is_bad == 1)
609 ? "bad " : "",
610 i, status);
611 /* continue; other blocks might still be erasable */
612 }
613
614 nand->blocks[i].is_erased = 1;
615 }
616
617 return ERROR_OK;
618 }
619
620 #if 0
621 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
622 {
623 uint8_t *page;
624
625 if (!nand->device)
626 return ERROR_NAND_DEVICE_NOT_PROBED;
627
628 if (address % nand->page_size)
629 {
630 LOG_ERROR("reads need to be page aligned");
631 return ERROR_NAND_OPERATION_FAILED;
632 }
633
634 page = malloc(nand->page_size);
635
636 while (data_size > 0)
637 {
638 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
639 uint32_t page_address;
640
641
642 page_address = address / nand->page_size;
643
644 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
645
646 memcpy(data, page, thisrun_size);
647
648 address += thisrun_size;
649 data += thisrun_size;
650 data_size -= thisrun_size;
651 }
652
653 free(page);
654
655 return ERROR_OK;
656 }
657
658 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
659 {
660 uint8_t *page;
661
662 if (!nand->device)
663 return ERROR_NAND_DEVICE_NOT_PROBED;
664
665 if (address % nand->page_size)
666 {
667 LOG_ERROR("writes need to be page aligned");
668 return ERROR_NAND_OPERATION_FAILED;
669 }
670
671 page = malloc(nand->page_size);
672
673 while (data_size > 0)
674 {
675 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
676 uint32_t page_address;
677
678 memset(page, 0xff, nand->page_size);
679 memcpy(page, data, thisrun_size);
680
681 page_address = address / nand->page_size;
682
683 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
684
685 address += thisrun_size;
686 data += thisrun_size;
687 data_size -= thisrun_size;
688 }
689
690 free(page);
691
692 return ERROR_OK;
693 }
694 #endif
695
696 int nand_write_page(struct nand_device *nand, uint32_t page,
697 uint8_t *data, uint32_t data_size,
698 uint8_t *oob, uint32_t oob_size)
699 {
700 uint32_t block;
701
702 if (!nand->device)
703 return ERROR_NAND_DEVICE_NOT_PROBED;
704
705 block = page / (nand->erase_size / nand->page_size);
706 if (nand->blocks[block].is_erased == 1)
707 nand->blocks[block].is_erased = 0;
708
709 if (nand->use_raw || nand->controller->write_page == NULL)
710 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
711 else
712 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
713 }
714
715 int nand_read_page(struct nand_device *nand, uint32_t page,
716 uint8_t *data, uint32_t data_size,
717 uint8_t *oob, uint32_t oob_size)
718 {
719 if (!nand->device)
720 return ERROR_NAND_DEVICE_NOT_PROBED;
721
722 if (nand->use_raw || nand->controller->read_page == NULL)
723 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
724 else
725 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
726 }
727
728 int nand_page_command(struct nand_device *nand, uint32_t page,
729 uint8_t cmd, bool oob_only)
730 {
731 if (!nand->device)
732 return ERROR_NAND_DEVICE_NOT_PROBED;
733
734 if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
735 cmd = NAND_CMD_READOOB;
736
737 nand->controller->command(nand, cmd);
738
739 if (nand->page_size <= 512) {
740 /* small page device */
741
742 /* column (always 0, we start at the beginning of a page/OOB area) */
743 nand->controller->address(nand, 0x0);
744
745 /* row */
746 nand->controller->address(nand, page & 0xff);
747 nand->controller->address(nand, (page >> 8) & 0xff);
748
749 /* 4th cycle only on devices with more than 32 MiB */
750 if (nand->address_cycles >= 4)
751 nand->controller->address(nand, (page >> 16) & 0xff);
752
753 /* 5th cycle only on devices with more than 8 GiB */
754 if (nand->address_cycles >= 5)
755 nand->controller->address(nand, (page >> 24) & 0xff);
756 } else {
757 /* large page device */
758
759 /* column (0 when we start at the beginning of a page,
760 * or 2048 for the beginning of OOB area)
761 */
762 nand->controller->address(nand, 0x0);
763 if (oob_only)
764 nand->controller->address(nand, 0x8);
765 else
766 nand->controller->address(nand, 0x0);
767
768 /* row */
769 nand->controller->address(nand, page & 0xff);
770 nand->controller->address(nand, (page >> 8) & 0xff);
771
772 /* 5th cycle only on devices with more than 128 MiB */
773 if (nand->address_cycles >= 5)
774 nand->controller->address(nand, (page >> 16) & 0xff);
775
776 /* large page devices need a start command if reading */
777 if (NAND_CMD_READ0 == cmd)
778 nand->controller->command(nand, NAND_CMD_READSTART);
779 }
780
781 if (nand->controller->nand_ready) {
782 if (!nand->controller->nand_ready(nand, 100))
783 return ERROR_NAND_OPERATION_TIMEOUT;
784 } else {
785 /* nand_poll_read() cannot be used during nand read */
786 alive_sleep(1);
787 }
788
789 return ERROR_OK;
790 }
791
792 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
793 {
794 int retval = ERROR_NAND_NO_BUFFER;
795
796 if (nand->controller->read_block_data != NULL)
797 retval = (nand->controller->read_block_data)(nand, data, size);
798
799 if (ERROR_NAND_NO_BUFFER == retval) {
800 uint32_t i;
801 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
802
803 retval = ERROR_OK;
804 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
805 retval = nand->controller->read_data(nand, data);
806 data += incr;
807 }
808 }
809
810 return retval;
811 }
812
813 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
814 uint8_t *data, uint32_t data_size,
815 uint8_t *oob, uint32_t oob_size)
816 {
817 int retval;
818
819 retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
820 if (ERROR_OK != retval)
821 return retval;
822
823 if (data)
824 nand_read_data_page(nand, data, data_size);
825
826 if (oob)
827 nand_read_data_page(nand, oob, oob_size);
828
829 return ERROR_OK;
830 }
831
832 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
833 {
834 int retval = ERROR_NAND_NO_BUFFER;
835
836 if (nand->controller->write_block_data != NULL)
837 retval = (nand->controller->write_block_data)(nand, data, size);
838
839 if (ERROR_NAND_NO_BUFFER == retval) {
840 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
841 uint32_t incr = is16bit ? 2 : 1;
842 uint16_t write_data;
843 uint32_t i;
844
845 for (i = 0; i < size; i += incr) {
846 if (is16bit)
847 write_data = le_to_h_u16(data);
848 else
849 write_data = *data;
850
851 retval = nand->controller->write_data(nand, write_data);
852 if (ERROR_OK != retval)
853 break;
854
855 data += incr;
856 }
857 }
858
859 return retval;
860 }
861
862 int nand_write_finish(struct nand_device *nand)
863 {
864 int retval;
865 uint8_t status;
866
867 nand->controller->command(nand, NAND_CMD_PAGEPROG);
868
869 retval = nand->controller->nand_ready ?
870 nand->controller->nand_ready(nand, 100) :
871 nand_poll_ready(nand, 100);
872 if (!retval)
873 return ERROR_NAND_OPERATION_TIMEOUT;
874
875 retval = nand_read_status(nand, &status);
876 if (ERROR_OK != retval) {
877 LOG_ERROR("couldn't read status");
878 return ERROR_NAND_OPERATION_FAILED;
879 }
880
881 if (status & NAND_STATUS_FAIL) {
882 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
883 status);
884 return ERROR_NAND_OPERATION_FAILED;
885 }
886
887 return ERROR_OK;
888 }
889
890 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
891 uint8_t *data, uint32_t data_size,
892 uint8_t *oob, uint32_t oob_size)
893 {
894 int retval;
895
896 retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
897 if (ERROR_OK != retval)
898 return retval;
899
900 if (data) {
901 retval = nand_write_data_page(nand, data, data_size);
902 if (ERROR_OK != retval) {
903 LOG_ERROR("Unable to write data to NAND device");
904 return retval;
905 }
906 }
907
908 if (oob) {
909 retval = nand_write_data_page(nand, oob, oob_size);
910 if (ERROR_OK != retval) {
911 LOG_ERROR("Unable to write OOB data to NAND device");
912 return retval;
913 }
914 }
915
916 return nand_write_finish(nand);
917 }
918
Spen's Unofficial Testing Repository