src/flash/arm_nandio.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "arm_nandio.h"
  28 #include "armv4_5.h"
  29 #include "algorithm.h"
  30
  31
  32 /*
  33  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  34  * For now this only supports ARMv4 and ARMv5 cores.
  35  *
  36  * Enhancements to target_run_algorithm() could enable:
  37  *   - ARMv6 and ARMv7 cores in ARM mode
  38  *
  39  * Different code fragments could handle:
  40  *   - Thumb2 cores like Cortex-M (needs different byteswapping)
  41  *   - 16-bit wide data (needs different setup too)
  42  */
  43 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  44 {
  45         struct target           *target = nand->target;
  46         struct armv4_5_algorithm        algo;
  47         struct arm              *armv4_5 = target->arch_info;
  48         struct reg_param        reg_params[3];
  49         uint32_t                target_buf;
  50         uint32_t                exit = 0;
  51         int                     retval;
  52
  53         /* Inputs:
  54          *  r0  NAND data address (byte wide)
  55          *  r1  buffer address
  56          *  r2  buffer length
  57          */
  58         static const uint32_t code[] = {
  59                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
  60                 0xe5c03000,     /*    strb  r3, [r0]     */
  61                 0xe2522001,     /*    subs  r2, r2, #1   */
  62                 0x1afffffb,     /*    bne   s            */
  63
  64                 /* exit: ARMv4 needs hardware breakpoint */
  65                 0xe1200070,     /* e: bkpt  #0           */
  66         };
  67
  68         if (!nand->copy_area) {
  69                 uint8_t         code_buf[sizeof(code)];
  70                 unsigned        i;
  71
  72                 /* make sure we have a working area */
  73                 if (target_alloc_working_area(target,
  74                                 sizeof(code) + nand->chunk_size,
  75                                 &nand->copy_area) != ERROR_OK) {
  76                         LOG_DEBUG("%s: no %d byte buffer",
  77                                         __FUNCTION__,
  78                                         (int) sizeof(code) + nand->chunk_size);
  79                         return ERROR_NAND_NO_BUFFER;
  80                 }
  81
  82                 /* buffer code in target endianness */
  83                 for (i = 0; i < sizeof(code) / 4; i++)
  84                         target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  85
  86                 /* copy code to work area */
  87                 retval = target_write_memory(target,
  88                                         nand->copy_area->address,
  89                                         4, sizeof(code) / 4, code_buf);
  90                 if (retval != ERROR_OK)
  91                         return retval;
  92         }
  93
  94         /* copy data to work area */
  95         target_buf = nand->copy_area->address + sizeof(code);
  96         retval = target_bulk_write_memory(target, target_buf, size / 4, data);
  97         if (retval == ERROR_OK && (size & 3) != 0)
  98                 retval = target_write_memory(target,
  99                                 target_buf + (size & ~3),
 100                                 1, size & 3, data + (size & ~3));
 101         if (retval != ERROR_OK)
 102                 return retval;
 103
 104         /* set up algorithm and parameters */
 105         algo.common_magic = ARMV4_5_COMMON_MAGIC;
 106         algo.core_mode = ARMV4_5_MODE_SVC;
 107         algo.core_state = ARMV4_5_STATE_ARM;
 108
 109         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 110         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 111         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 112
 113         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 114         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 115         buf_set_u32(reg_params[2].value, 0, 32, size);
 116
 117         /* armv4 must exit using a hardware breakpoint */
 118         if (armv4_5->is_armv4)
 119                 exit = nand->copy_area->address + sizeof(code) - 4;
 120
 121         /* use alg to write data from work area to NAND chip */
 122         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 123                         nand->copy_area->address, exit, 1000, &algo);
 124         if (retval != ERROR_OK)
 125                 LOG_ERROR("error executing hosted NAND write");
 126
 127         destroy_reg_param(&reg_params[0]);
 128         destroy_reg_param(&reg_params[1]);
 129         destroy_reg_param(&reg_params[2]);
 130
 131         return retval;
 132 }
 133
 134 /* REVISIT do the same for bulk *read* too ... */
 135