src/target/adi_v5_swd.c

   1 /***************************************************************************
   2  *
   3  *   Copyright (C) 2010 by David Brownell
   4  *
   5  *   This program is free software; you can redistribute it and/or modify
   6  *   it under the terms of the GNU General Public License as published by
   7  *   the Free Software Foundation; either version 2 of the License, or
   8  *   (at your option) any later version.
   9  *
  10  *   This program is distributed in the hope that it will be useful,
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *   GNU General Public License for more details.
  14  *
  15  *   You should have received a copy of the GNU General Public License
  16  *   along with this program; if not, write to the
  17  *   Free Software Foundation, Inc.,
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19  ***************************************************************************/
  20
  21 /**
  22  * @file
  23  * TCEDRO: THIS FILE IS A MESS, IT SHOULD BE REMOVED ASAP!!!
  24  * ITS FUNCTIONALITY IS DISTRIBUTED AMONG ARM_ADI_V5 (TARGET) + TRANSPORT (SWD)
  25  *
  26  * Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug
  27  * link protocol used in cases where JTAG is not wanted.  This is coupled to
  28  * recent versions of ARM's "CoreSight" debug framework.  This specific code
  29  * is a transport level interface, with "target/arm_adi_v5.[hc]" code
  30  * understanding operation semantics, shared with the JTAG transport.
  31  *
  32  * Single-DAP support only.
  33  *
  34  * for details, see "ARM IHI 0031A"
  35  * ARM Debug Interface v5 Architecture Specification
  36  * especially section 5.3 for SWD protocol
  37  *
  38  * On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
  39  * to JTAG.  Boards may support one or both.  There are also SWD-only chips,
  40  * (using SW-DP not SWJ-DP).
  41  *
  42  * Even boards that also support JTAG can benefit from SWD support, because
  43  * usually there's no way to access the SWO trace view mechanism in JTAG mode.
  44  * That is, trace access may require SWD support.
  45  *
  46  */
  47
  48 #ifdef HAVE_CONFIG_H
  49 #include "config.h"
  50 #endif
  51
  52 #include "arm.h"
  53 #include "arm_adi_v5.h"
  54 #include <helper/time_support.h>
  55
  56 #include <transport/transport.h>
  57 #include <jtag/interface.h>
  58
  59 #include <jtag/swd.h>
  60
  61 static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
  62                 uint32_t *data)
  63 {
  64         /* REVISIT status return vs ack ... */
  65         return swd->read_reg(swd_cmd(true,  false, reg), data);
  66 }
  67
  68 static int swd_queue_idcode_read(struct adiv5_dap *dap,
  69                 uint8_t *ack, uint32_t *data)
  70 {
  71         int status = swd_queue_dp_read(dap, DP_IDCODE, data);
  72         if (status < 0)
  73                 return status;
  74         *ack = status;
  75         /* ?? */
  76         return ERROR_OK;
  77 }
  78
  79 static int (swd_queue_dp_write)(struct adiv5_dap *dap, unsigned reg,
  80                 uint32_t data)
  81 {
  82         /* REVISIT status return vs ack ... */
  83         return swd->write_reg(swd_cmd(false,  false, reg), data);
  84 }
  85
  86
  87 static int (swd_queue_ap_read)(struct adiv5_dap *dap, unsigned reg,
  88                 uint32_t *data)
  89 {
  90         /* REVISIT  APSEL ... */
  91         /* REVISIT status return ... */
  92         return swd->read_reg(swd_cmd(true,  true, reg), data);
  93 }
  94
  95 static int (swd_queue_ap_write)(struct adiv5_dap *dap, unsigned reg,
  96                 uint32_t data)
  97 {
  98         /* REVISIT  APSEL ... */
  99         /* REVISIT status return ... */
 100         return swd->write_reg(swd_cmd(false,  true, reg), data);
 101 }
 102
 103 static int (swd_queue_ap_abort)(struct adiv5_dap *dap, uint8_t *ack)
 104 {
 105         return ERROR_FAIL;
 106 }
 107
 108 /** Executes all queued DAP operations. */
 109 static int swd_run(struct adiv5_dap *dap)
 110 {
 111         /* for now the SWD interface hard-wires a zero-size queue.  */
 112
 113         /* FIXME but we still need to check and scrub
 114          * any hardware errors ...
 115          */
 116         return ERROR_OK;
 117 }
 118
 119 const struct dap_ops swd_dap_ops = {
 120         .is_swd = true,
 121
 122         .queue_idcode_read = swd_queue_idcode_read,
 123         .queue_dp_read = swd_queue_dp_read,
 124         .queue_dp_write = swd_queue_dp_write,
 125         .queue_ap_read = swd_queue_ap_read,
 126         .queue_ap_write = swd_queue_ap_write,
 127         .queue_ap_abort = swd_queue_ap_abort,
 128         .run = swd_run,
 129 };
 130
 131 /*
 132  * This represents the bits which must be sent out on TMS/SWDIO to
 133  * switch a DAP implemented using an SWJ-DP module into SWD mode.
 134  * These bits are stored (and transmitted) LSB-first.
 135  *
 136  * See the DAP-Lite specification, section 2.2.5 for information
 137  * about making the debug link select SWD or JTAG.  (Similar info
 138  * is in a few other ARM documents.)
 139  */
 140 static const uint8_t jtag2swd_bitseq[] = {
 141         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
 142          * putting both JTAG and SWD logic into reset state.
 143          */
 144         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 145         /* Switching sequence enables SWD and disables JTAG
 146          * NOTE: bits in the DP's IDCODE may expose the need for
 147          * an old/obsolete/deprecated sequence (0xb6 0xed).
 148          */
 149         0x9e, 0xe7,
 150         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
 151          * putting both JTAG and SWD logic into reset state.
 152          */
 153         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 154 };
 155
 156 /**
 157  * Put the debug link into SWD mode, if the target supports it.
 158  * The link's initial mode may be either JTAG (for example,
 159  * with SWJ-DP after reset) or SWD.
 160  *
 161  * @param target Enters SWD mode (if possible).
 162  *
 163  * Note that targets using the JTAG-DP do not support SWD, and that
 164  * some targets which could otherwise support it may have have been
 165  * configured to disable SWD signaling
 166  *
 167  * @return ERROR_OK or else a fault code.
 168  */
 169 int dap_to_swd(struct target *target)
 170 {
 171         struct arm *arm = target_to_arm(target);
 172         int retval;
 173
 174         LOG_DEBUG("Enter SWD mode");
 175
 176         /* REVISIT it's ugly to need to make calls to a "jtag"
 177          * subsystem if the link may not be in JTAG mode...
 178          */
 179
 180         retval =  jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
 181                         jtag2swd_bitseq, TAP_INVALID);
 182         if (retval == ERROR_OK)
 183                 retval = jtag_execute_queue();
 184
 185         /* set up the DAP's ops vector for SWD mode. */
 186         arm->dap->ops = &swd_dap_ops;
 187
 188         return retval;
 189 }
 190
 191
 192
 193 COMMAND_HANDLER(handle_swd_wcr)
 194 {
 195         int retval;
 196         struct target *target = get_current_target(CMD_CTX);
 197         struct arm *arm = target_to_arm(target);
 198         struct adiv5_dap *dap = arm->dap;
 199         uint32_t wcr;
 200         unsigned trn, scale = 0;
 201
 202         switch (CMD_ARGC) {
 203         /* no-args: just dump state */
 204         case 0:
 205                 /*retval = swd_queue_dp_read(dap, DP_WCR, &wcr); */
 206                 retval = dap_queue_dp_read(dap, DP_WCR, &wcr);
 207                 if (retval == ERROR_OK)
 208                         dap->ops->run(dap);
 209                 if (retval != ERROR_OK) {
 210                         LOG_ERROR("can't read WCR?");
 211                         return retval;
 212                 }
 213
 214                 command_print(CMD_CTX,
 215                         "turnaround=%d, prescale=%d",
 216                         WCR_TO_TRN(wcr),
 217                         WCR_TO_PRESCALE(wcr));
 218         return ERROR_OK;
 219
 220         case 2:         /* TRN and prescale */
 221                 COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], scale);
 222                 if (scale > 7) {
 223                         LOG_ERROR("prescale %d is too big", scale);
 224                         return ERROR_FAIL;
 225                 }
 226                 /* FALL THROUGH */
 227
 228         case 1:         /* TRN only */
 229                 COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], trn);
 230                 if (trn < 1 || trn > 4) {
 231                         LOG_ERROR("turnaround %d is invalid", trn);
 232                         return ERROR_FAIL;
 233                 }
 234
 235                 wcr = ((trn - 1) << 8) | scale;
 236                 /* FIXME
 237                  * write WCR ...
 238                  * then, re-init adapter with new TRN
 239                  */
 240                 LOG_ERROR("can't yet modify WCR");
 241                 return ERROR_FAIL;
 242
 243         default:        /* too many arguments */
 244                 return ERROR_COMMAND_SYNTAX_ERROR;
 245         }
 246 }
 247
 248 static const struct command_registration swd_commands[] = {
 249         {
 250                 /*
 251                  * Set up SWD and JTAG targets identically, unless/until
 252                  * infrastructure improves ...  meanwhile, ignore all
 253                  * JTAG-specific stuff like IR length for SWD.
 254                  *
 255                  * REVISIT can we verify "just one SWD DAP" here/early?
 256                  */
 257                 .name = "newdap",
 258                 .jim_handler = jim_jtag_newtap,
 259                 .mode = COMMAND_CONFIG,
 260                 .help = "declare a new SWD DAP"
 261         },
 262         {
 263                 .name = "wcr",
 264                 .handler = handle_swd_wcr,
 265                 .mode = COMMAND_ANY,
 266                 .help = "display or update DAP's WCR register",
 267                 .usage = "turnaround (1..4), prescale (0..7)",
 268         },
 269
 270         /* REVISIT -- add a command for SWV trace on/off */
 271         COMMAND_REGISTRATION_DONE
 272 };
 273
 274 static const struct command_registration swd_handlers[] = {
 275         {
 276                 .name = "swd",
 277                 .mode = COMMAND_ANY,
 278                 .help = "SWD command group",
 279                 .chain = swd_commands,
 280         },
 281         COMMAND_REGISTRATION_DONE
 282 };
 283
 284 static int swd_select(struct command_context *ctx)
 285 {
 286         struct target *target = get_current_target(ctx);
 287         int retval;
 288
 289         retval = register_commands(ctx, NULL, swd_handlers);
 290
 291         if (retval != ERROR_OK)
 292                 return retval;
 293
 294          /* be sure driver is in SWD mode; start
 295           * with hardware default TRN (1), it can be changed later
 296           */
 297         if (!swd || !swd->read_reg || !swd->write_reg || !swd->init) {
 298                 LOG_DEBUG("no SWD driver?");
 299                 return ERROR_FAIL;
 300         }
 301
 302          retval = swd->init(1);
 303         if (retval != ERROR_OK) {
 304                 LOG_DEBUG("can't init SWD driver");
 305                 return retval;
 306         }
 307
 308         /* force DAP into SWD mode (not JTAG) */
 309         retval = dap_to_swd(target);
 310
 311         return retval;
 312 }
 313
 314 static int swd_init(struct command_context *ctx)
 315 {
 316         struct target *target = get_current_target(ctx);
 317         struct arm *arm = target_to_arm(target);
 318         struct adiv5_dap *dap = arm->dap;
 319         uint32_t idcode;
 320         int status;
 321
 322         /* FIXME validate transport config ... is the
 323          * configured DAP present (check IDCODE)?
 324          * Is *only* one DAP configured?
 325          *
 326          * MUST READ IDCODE
 327          */
 328
 329  /* Note, debugport_init() does setup too */
 330
 331         uint8_t ack;
 332
 333         status = swd_queue_idcode_read(dap, &ack, &idcode);
 334
 335         if (status == ERROR_OK)
 336                 LOG_INFO("SWD IDCODE %#8.8x", idcode);
 337
 338         return status;
 339
 340 }
 341
 342 static struct transport swd_transport = {
 343         .name = "swd",
 344         .select = swd_select,
 345         .init = swd_init,
 346 };
 347
 348 static void swd_constructor(void) __attribute__((constructor));
 349 static void swd_constructor(void)
 350 {
 351         transport_register(&swd_transport);
 352 }
 353
 354 /** Returns true if the current debug session
 355  * is using SWD as its transport.
 356  */
 357 bool transport_is_swd(void)
 358 {
 359         return get_current_transport() == &swd_transport;
 360 }