cfg: update for target's that support cortex_m AIRCR SYSRESETREQ
[openocd/jflash.git] / src / target / dsp563xx_once.c
blob8d62b48a5714d0d82fd640ce718b141c14f57384
1 /***************************************************************************
2 * Copyright (C) 2009 by Mathias Kuester *
3 * mkdorg@users.sourceforge.net *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 #ifdef HAVE_CONFIG_H
22 #include "config.h"
23 #endif
25 #include <jim.h>
27 #include "target.h"
28 #include "target_type.h"
29 #include "register.h"
30 #include "dsp563xx.h"
31 #include "dsp563xx_once.h"
33 #define JTAG_STATUS_STATIC_MASK 0x03
34 #define JTAG_STATUS_STATIC_VALUE 0x01
36 #define JTAG_STATUS_NORMAL 0x01
37 #define JTAG_STATUS_STOPWAIT 0x05
38 #define JTAG_STATUS_BUSY 0x09
39 #define JTAG_STATUS_DEBUG 0x0d
41 #define JTAG_INSTR_EXTEST 0x00
42 #define JTAG_INSTR_SAMPLE_PRELOAD 0x01
43 #define JTAG_INSTR_IDCODE 0x02
44 #define JTAG_INSTR_HIZ 0x04
45 #define JTAG_INSTR_CLAMP 0x05
46 #define JTAG_INSTR_ENABLE_ONCE 0x06
47 #define JTAG_INSTR_DEBUG_REQUEST 0x07
48 #define JTAG_INSTR_BYPASS 0x0F
50 /** */
51 static inline int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr_out, int dr_len, int rti)
53 jtag_add_plain_dr_scan(dr_len, dr_out, dr_in, TAP_IDLE);
55 return ERROR_OK;
58 /** */
59 static inline int dsp563xx_write_dr_u8(struct jtag_tap *tap, uint8_t * dr_in, uint8_t dr_out, int dr_len, int rti)
61 return dsp563xx_write_dr(tap, dr_in, &dr_out, dr_len, rti);
64 /** */
65 static inline int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t * dr_in, uint32_t dr_out, int dr_len, int rti)
67 return dsp563xx_write_dr(tap, (uint8_t *) dr_in, (uint8_t *) &dr_out, dr_len, rti);
70 /** single word instruction */
71 static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, int flush, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
73 int err;
75 err = dsp563xx_write_dr_u8(tap, 0, instr | (ex << 5) | (go << 6) | (rw << 7), 8, 0);
76 if (err != ERROR_OK)
77 return err;
78 if (flush)
79 err = jtag_execute_queue();
80 return err;
83 /* IR and DR functions */
84 static inline int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir_out, int ir_len, int rti)
86 jtag_add_plain_ir_scan(tap->ir_length, ir_out, ir_in, TAP_IDLE);
88 return ERROR_OK;
91 static inline int dsp563xx_write_ir_u8(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out, int ir_len, int rti)
93 return dsp563xx_write_ir(tap, ir_in, &ir_out, ir_len, rti);
96 static inline int dsp563xx_jtag_sendinstr(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out)
98 return dsp563xx_write_ir_u8(tap, ir_in, ir_out, tap->ir_length, 1);
101 /** */
102 int dsp563xx_once_target_status(struct jtag_tap *tap)
104 int err;
105 uint8_t jtag_status;
107 err = dsp563xx_jtag_sendinstr(tap, &jtag_status, JTAG_INSTR_ENABLE_ONCE);
108 if (err != ERROR_OK)
109 return TARGET_UNKNOWN;
110 err = jtag_execute_queue();
111 if (err != ERROR_OK)
112 return TARGET_UNKNOWN;
114 /* verify correct static status pattern */
115 if ((jtag_status & JTAG_STATUS_STATIC_MASK) != JTAG_STATUS_STATIC_VALUE)
116 return TARGET_UNKNOWN;
118 if (jtag_status != JTAG_STATUS_DEBUG)
119 return TARGET_RUNNING;
121 return TARGET_HALTED;
124 /** */
125 int dsp563xx_once_request_debug(struct jtag_tap *tap, int reset_state)
127 int err;
128 uint8_t ir_in = 0, pattern = 0;
129 uint32_t retry = 0;
131 /* in reset state we only get a ACK
132 * from the interface */
133 if (reset_state)
134 pattern = 1;
135 else
136 pattern = JTAG_STATUS_DEBUG;
138 /* wait until we get the ack */
139 while (ir_in != pattern) {
140 err = dsp563xx_jtag_sendinstr(tap, &ir_in, JTAG_INSTR_DEBUG_REQUEST);
141 if (err != ERROR_OK)
142 return err;
143 err = jtag_execute_queue();
144 if (err != ERROR_OK)
145 return err;
147 LOG_DEBUG("debug request: %02X", ir_in);
149 if (retry++ == 100)
150 return ERROR_TARGET_FAILURE;
153 /* we cant enable the once in reset state */
154 if (pattern == 1)
155 return ERROR_OK;
157 /* try to enable once */
158 retry = 0;
159 ir_in = 0;
160 while (ir_in != pattern) {
161 err = dsp563xx_jtag_sendinstr(tap, &ir_in, JTAG_INSTR_ENABLE_ONCE);
162 if (err != ERROR_OK)
163 return err;
164 err = jtag_execute_queue();
165 if (err != ERROR_OK)
166 return err;
168 LOG_DEBUG("enable once: %02X", ir_in);
170 if (retry++ == 100) {
171 LOG_DEBUG("error");
172 return ERROR_TARGET_FAILURE;
176 if (ir_in != JTAG_STATUS_DEBUG)
177 return ERROR_TARGET_FAILURE;
179 return ERROR_OK;
182 /** once read registers */
183 int dsp563xx_once_read_register(struct jtag_tap *tap, int flush, struct once_reg *regs, int len)
185 int i;
186 int err = ERROR_OK;
188 for (i = 0; i < len; i++) {
189 err = dsp563xx_once_reg_read_ex(tap, flush, regs[i].addr, regs[i].len, &regs[i].reg);
190 if (err != ERROR_OK)
191 return err;
194 if (flush)
195 err = jtag_execute_queue();
196 return err;
199 /** once read register with register len */
200 int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, int flush, uint8_t reg, uint8_t len, uint32_t * data)
202 int err;
204 err = dsp563xx_once_ir_exec(tap, 1, reg, 1, 0, 0);
205 if (err != ERROR_OK)
206 return err;
207 err = dsp563xx_write_dr_u32(tap, data, 0x00, len, 0);
208 if (err != ERROR_OK)
209 return err;
210 if (flush)
211 err = jtag_execute_queue();
212 return err;
215 /** once read register */
216 int dsp563xx_once_reg_read(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t * data)
218 int err;
220 err = dsp563xx_once_ir_exec(tap, flush, reg, 1, 0, 0);
221 if (err != ERROR_OK)
222 return err;
223 err = dsp563xx_write_dr_u32(tap, data, 0x00, 24, 0);
224 if (err != ERROR_OK)
225 return err;
226 if (flush)
227 err = jtag_execute_queue();
228 return err;
231 /** once write register */
232 int dsp563xx_once_reg_write(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t data)
234 int err;
236 err = dsp563xx_once_ir_exec(tap, flush, reg, 0, 0, 0);
237 if (err != ERROR_OK)
238 return err;
239 err = dsp563xx_write_dr_u32(tap, 0x00, data, 24, 0);
240 if (err != ERROR_OK)
241 return err;
242 if (flush)
243 err = jtag_execute_queue();
244 return err;
247 /** single word instruction */
248 int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, int flush, uint32_t opcode)
250 int err;
252 err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 1, 0);
253 if (err != ERROR_OK)
254 return err;
255 err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0);
256 if (err != ERROR_OK)
257 return err;
258 if (flush)
259 err = jtag_execute_queue();
260 return err;
263 /** double word instruction */
264 int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, int flush, uint32_t opcode, uint32_t operand)
266 int err;
268 err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 0, 0);
269 if (err != ERROR_OK)
270 return err;
271 err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0);
272 if (err != ERROR_OK)
273 return err;
274 if (flush) {
275 err = jtag_execute_queue();
276 if (err != ERROR_OK)
277 return err;
280 err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 1, 0);
281 if (err != ERROR_OK)
282 return err;
283 err = dsp563xx_write_dr_u32(tap, 0, operand, 24, 0);
284 if (err != ERROR_OK)
285 return err;
286 if (flush) {
287 err = jtag_execute_queue();
288 if (err != ERROR_OK)
289 return err;
292 return ERROR_OK;