2 * Copyright (C) 2009 by Marvell Semiconductors, Inc.
3 * Written by Nicolas Pitre <nico at marvell.com>
5 * Copyright (C) 2009 by David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the
19 * Free Software Foundation, Inc.,
20 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 #include "arm_nandio.h"
28 #include <target/armv4_5.h>
29 #include <target/algorithm.h>
32 * Copies code to a working area. This will allocate room for the code plus the
33 * additional amount requested if the working area pointer is null.
35 * @param target Pointer to the target to copy code to
36 * @param code Pointer to the code area to be copied
37 * @param code_size Size of the code being copied
38 * @param additional Size of the additional area to be allocated in addition to
40 * @param area Pointer to a pointer to a working area to copy code to
41 * @return Success or failure of the operation
43 int arm_code_to_working_area(struct target
*target
,
44 const uint32_t *code
, unsigned code_size
,
45 unsigned additional
, struct working_area
**area
)
47 uint8_t code_buf
[code_size
];
50 unsigned size
= code_size
+ additional
;
52 /* REVISIT this assumes size doesn't ever change.
53 * That's usually correct; but there are boards with
54 * both large and small page chips, where it won't be...
57 /* make sure we have a working area */
59 retval
= target_alloc_working_area(target
, size
, area
);
60 if (retval
!= ERROR_OK
) {
61 LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__
, (int) size
);
62 return ERROR_NAND_NO_BUFFER
;
66 /* buffer code in target endianness */
67 for (i
= 0; i
< code_size
/ 4; i
++)
68 target_buffer_set_u32(target
, code_buf
+ i
* 4, code
[i
]);
70 /* copy code to work area */
71 retval
= target_write_memory(target
, (*area
)->address
,
72 4, code_size
/ 4, code_buf
);
78 * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
79 * For now this only supports ARMv4 and ARMv5 cores.
81 * Enhancements to target_run_algorithm() could enable:
82 * - ARMv6 and ARMv7 cores in ARM mode
84 * Different code fragments could handle:
85 * - Thumb2 cores like Cortex-M (needs different byteswapping)
86 * - 16-bit wide data (needs different setup too)
88 * @param nand Pointer to the arm_nand_data struct that defines the I/O
89 * @param data Pointer to the data to be copied to flash
90 * @param size Size of the data being copied
91 * @return Success or failure of the operation
93 int arm_nandwrite(struct arm_nand_data
*nand
, uint8_t *data
, int size
)
95 struct target
*target
= nand
->target
;
96 struct armv4_5_algorithm algo
;
97 struct arm
*armv4_5
= target
->arch_info
;
98 struct reg_param reg_params
[3];
104 * r0 NAND data address (byte wide)
108 static const uint32_t code
[] = {
109 0xe4d13001, /* s: ldrb r3, [r1], #1 */
110 0xe5c03000, /* strb r3, [r0] */
111 0xe2522001, /* subs r2, r2, #1 */
112 0x1afffffb, /* bne s */
114 /* exit: ARMv4 needs hardware breakpoint */
115 0xe1200070, /* e: bkpt #0 */
118 if (nand
->op
!= ARM_NAND_WRITE
|| !nand
->copy_area
) {
119 retval
= arm_code_to_working_area(target
, code
, sizeof(code
),
120 nand
->chunk_size
, &nand
->copy_area
);
121 if (retval
!= ERROR_OK
) {
126 nand
->op
= ARM_NAND_WRITE
;
128 /* copy data to work area */
129 target_buf
= nand
->copy_area
->address
+ sizeof(code
);
130 retval
= target_bulk_write_memory(target
, target_buf
, size
/ 4, data
);
131 if (retval
== ERROR_OK
&& (size
& 3) != 0)
132 retval
= target_write_memory(target
,
133 target_buf
+ (size
& ~3),
134 1, size
& 3, data
+ (size
& ~3));
135 if (retval
!= ERROR_OK
)
138 /* set up algorithm and parameters */
139 algo
.common_magic
= ARMV4_5_COMMON_MAGIC
;
140 algo
.core_mode
= ARM_MODE_SVC
;
141 algo
.core_state
= ARM_STATE_ARM
;
143 init_reg_param(®_params
[0], "r0", 32, PARAM_IN
);
144 init_reg_param(®_params
[1], "r1", 32, PARAM_IN
);
145 init_reg_param(®_params
[2], "r2", 32, PARAM_IN
);
147 buf_set_u32(reg_params
[0].value
, 0, 32, nand
->data
);
148 buf_set_u32(reg_params
[1].value
, 0, 32, target_buf
);
149 buf_set_u32(reg_params
[2].value
, 0, 32, size
);
151 /* armv4 must exit using a hardware breakpoint */
152 if (armv4_5
->is_armv4
)
153 exit
= nand
->copy_area
->address
+ sizeof(code
) - 4;
155 /* use alg to write data from work area to NAND chip */
156 retval
= target_run_algorithm(target
, 0, NULL
, 3, reg_params
,
157 nand
->copy_area
->address
, exit
, 1000, &algo
);
158 if (retval
!= ERROR_OK
)
159 LOG_ERROR("error executing hosted NAND write");
161 destroy_reg_param(®_params
[0]);
162 destroy_reg_param(®_params
[1]);
163 destroy_reg_param(®_params
[2]);
169 * Uses an on-chip algorithm for an ARM device to read from a NAND device and
170 * store the data into the host machine's memory.
172 * @param nand Pointer to the arm_nand_data struct that defines the I/O
173 * @param data Pointer to the data buffer to store the read data
174 * @param size Amount of data to be stored to the buffer.
175 * @return Success or failure of the operation
177 int arm_nandread(struct arm_nand_data
*nand
, uint8_t *data
, uint32_t size
)
179 struct target
*target
= nand
->target
;
180 struct armv4_5_algorithm algo
;
181 struct arm
*armv4_5
= target
->arch_info
;
182 struct reg_param reg_params
[3];
189 * r1 NAND data address (byte wide)
192 static const uint32_t code
[] = {
193 0xe5d13000, /* s: ldrb r3, [r1] */
194 0xe4c03001, /* strb r3, [r0], #1 */
195 0xe2522001, /* subs r2, r2, #1 */
196 0x1afffffb, /* bne s */
198 /* exit: ARMv4 needs hardware breakpoint */
199 0xe1200070, /* e: bkpt #0 */
202 /* create the copy area if not yet available */
203 if (nand
->op
!= ARM_NAND_READ
|| !nand
->copy_area
) {
204 retval
= arm_code_to_working_area(target
, code
, sizeof(code
),
205 nand
->chunk_size
, &nand
->copy_area
);
206 if (retval
!= ERROR_OK
) {
211 nand
->op
= ARM_NAND_READ
;
212 target_buf
= nand
->copy_area
->address
+ sizeof(code
);
214 /* set up algorithm and parameters */
215 algo
.common_magic
= ARMV4_5_COMMON_MAGIC
;
216 algo
.core_mode
= ARM_MODE_SVC
;
217 algo
.core_state
= ARM_STATE_ARM
;
219 init_reg_param(®_params
[0], "r0", 32, PARAM_IN
);
220 init_reg_param(®_params
[1], "r1", 32, PARAM_IN
);
221 init_reg_param(®_params
[2], "r2", 32, PARAM_IN
);
223 buf_set_u32(reg_params
[0].value
, 0, 32, target_buf
);
224 buf_set_u32(reg_params
[1].value
, 0, 32, nand
->data
);
225 buf_set_u32(reg_params
[2].value
, 0, 32, size
);
227 /* armv4 must exit using a hardware breakpoint */
228 if (armv4_5
->is_armv4
)
229 exit
= nand
->copy_area
->address
+ sizeof(code
) - 4;
231 /* use alg to write data from NAND chip to work area */
232 retval
= target_run_algorithm(target
, 0, NULL
, 3, reg_params
,
233 nand
->copy_area
->address
, exit
, 1000, &algo
);
234 if (retval
!= ERROR_OK
)
235 LOG_ERROR("error executing hosted NAND read");
237 destroy_reg_param(®_params
[0]);
238 destroy_reg_param(®_params
[1]);
239 destroy_reg_param(®_params
[2]);
241 /* read from work area to the host's memory */
242 retval
= target_read_buffer(target
, target_buf
, size
, data
);