1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License as published by *
11 * the Free Software Foundation; either version 2 of the License, or *
12 * (at your option) any later version. *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details. *
19 * You should have received a copy of the GNU General Public License *
20 * along with this program; if not, write to the *
21 * Free Software Foundation, Inc., *
22 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
23 ***************************************************************************/
29 #include "mips_ejtag.h"
31 int mips_ejtag_set_instr(struct mips_ejtag
*ejtag_info
, int new_instr
)
35 tap
= ejtag_info
->tap
;
39 if (buf_get_u32(tap
->cur_instr
, 0, tap
->ir_length
) != (uint32_t)new_instr
)
41 struct scan_field field
;
44 field
.num_bits
= tap
->ir_length
;
46 buf_set_u32(t
, 0, field
.num_bits
, new_instr
);
47 field
.in_value
= NULL
;
49 jtag_add_ir_scan(tap
, &field
, TAP_IDLE
);
55 int mips_ejtag_get_idcode(struct mips_ejtag
*ejtag_info
, uint32_t *idcode
)
57 struct scan_field field
;
59 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IDCODE
);
62 field
.out_value
= NULL
;
63 field
.in_value
= (void*)idcode
;
65 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, TAP_IDLE
);
68 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
70 LOG_ERROR("register read failed");
76 static int mips_ejtag_get_impcode(struct mips_ejtag
*ejtag_info
, uint32_t *impcode
)
78 struct scan_field field
;
80 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_IMPCODE
);
83 field
.out_value
= NULL
;
84 field
.in_value
= (void*)impcode
;
86 jtag_add_dr_scan(ejtag_info
->tap
, 1, &field
, TAP_IDLE
);
89 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
91 LOG_ERROR("register read failed");
97 int mips_ejtag_drscan_32(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
100 tap
= ejtag_info
->tap
;
104 struct scan_field field
;
110 buf_set_u32(t
, 0, field
.num_bits
, *data
);
113 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
115 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
117 LOG_ERROR("register read failed");
121 *data
= buf_get_u32(field
.in_value
, 0, 32);
128 int mips_ejtag_drscan_8(struct mips_ejtag
*ejtag_info
, uint32_t *data
)
130 struct jtag_tap
*tap
;
131 tap
= ejtag_info
->tap
;
135 struct scan_field field
;
136 uint8_t t
[4] = {0, 0, 0, 0}, r
[4];
141 buf_set_u32(t
, 0, field
.num_bits
, *data
);
144 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
146 if ((retval
= jtag_execute_queue()) != ERROR_OK
)
148 LOG_ERROR("register read failed");
152 *data
= buf_get_u32(field
.in_value
, 0, 32);
159 static int mips_ejtag_step_enable(struct mips_ejtag
*ejtag_info
)
161 static const uint32_t code
[] = {
162 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
163 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
164 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
165 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
167 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
170 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
171 0, NULL
, 0, NULL
, 1);
176 static int mips_ejtag_step_disable(struct mips_ejtag
*ejtag_info
)
178 static const uint32_t code
[] = {
179 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
180 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK
)), /* $15 = MIPS32_PRACC_STACK */
181 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK
)),
182 MIPS32_SW(1,0,15), /* sw $1,($15) */
183 MIPS32_SW(2,0,15), /* sw $2,($15) */
184 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
185 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
186 MIPS32_ORI(2,2,0xFEFF),
188 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
192 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
195 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
196 0, NULL
, 0, NULL
, 1);
201 int mips_ejtag_config_step(struct mips_ejtag
*ejtag_info
, int enable_step
)
204 return mips_ejtag_step_enable(ejtag_info
);
205 return mips_ejtag_step_disable(ejtag_info
);
208 int mips_ejtag_enter_debug(struct mips_ejtag
*ejtag_info
)
211 mips_ejtag_set_instr(ejtag_info
, EJTAG_INST_CONTROL
);
213 /* set debug break bit */
214 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
| EJTAG_CTRL_JTAGBRK
;
215 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
217 /* break bit will be cleared by hardware */
218 ejtag_ctrl
= ejtag_info
->ejtag_ctrl
;
219 mips_ejtag_drscan_32(ejtag_info
, &ejtag_ctrl
);
220 LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32
"", ejtag_ctrl
);
221 if ((ejtag_ctrl
& EJTAG_CTRL_BRKST
) == 0)
222 LOG_DEBUG("Failed to enter Debug Mode!");
227 int mips_ejtag_exit_debug(struct mips_ejtag
*ejtag_info
)
232 /* execute our dret instruction */
233 mips32_pracc_exec(ejtag_info
, 1, &inst
, 0, NULL
, 0, NULL
, 0);
238 int mips_ejtag_read_debug(struct mips_ejtag
*ejtag_info
, uint32_t* debug_reg
)
241 static const uint32_t code
[] = {
242 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
243 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK
)), /* $15 = MIPS32_PRACC_STACK */
244 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK
)),
245 MIPS32_SW(1,0,15), /* sw $1,($15) */
246 MIPS32_SW(2,0,15), /* sw $2,($15) */
247 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT
)), /* $1 = MIPS32_PRACC_PARAM_OUT */
248 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT
)),
249 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
254 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
257 mips32_pracc_exec(ejtag_info
, ARRAY_SIZE(code
), code
, \
258 0, NULL
, 1, debug_reg
, 1);
263 int mips_ejtag_init(struct mips_ejtag
*ejtag_info
)
265 uint32_t ejtag_version
;
267 mips_ejtag_get_impcode(ejtag_info
, &ejtag_info
->impcode
);
268 LOG_DEBUG("impcode: 0x%8.8" PRIx32
"", ejtag_info
->impcode
);
270 /* get ejtag version */
271 ejtag_version
= ((ejtag_info
->impcode
>> 29) & 0x07);
273 switch (ejtag_version
)
276 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
279 LOG_DEBUG("EJTAG: Version 2.5 Detected");
282 LOG_DEBUG("EJTAG: Version 2.6 Detected");
285 LOG_DEBUG("EJTAG: Version 3.1 Detected");
288 LOG_DEBUG("EJTAG: Unknown Version Detected");
291 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
292 ejtag_info
->impcode
& EJTAG_IMP_R3K
? " R3k" : " R4k",
293 ejtag_info
->impcode
& EJTAG_IMP_DINT
? " DINT" : "",
294 ejtag_info
->impcode
& (1 << 22) ? " ASID_8" : "",
295 ejtag_info
->impcode
& (1 << 21) ? " ASID_6" : "",
296 ejtag_info
->impcode
& EJTAG_IMP_MIPS16
? " MIPS16" : "",
297 ejtag_info
->impcode
& EJTAG_IMP_NODMA
? " noDMA" : " DMA",
298 ejtag_info
->impcode
& EJTAG_DCR_MIPS64
? " MIPS64" : " MIPS32");
300 if ((ejtag_info
->impcode
& EJTAG_IMP_NODMA
) == 0)
301 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
303 /* set initial state for ejtag control reg */
304 ejtag_info
->ejtag_ctrl
= EJTAG_CTRL_ROCC
| EJTAG_CTRL_PRACC
| EJTAG_CTRL_PROBEN
| EJTAG_CTRL_SETDEV
;
305 ejtag_info
->fast_access_save
= -1;
310 int mips_ejtag_fastdata_scan(struct mips_ejtag
*ejtag_info
, int write_t
, uint32_t *data
)
312 struct jtag_tap
*tap
;
313 tap
= ejtag_info
->tap
;
318 struct scan_field fields
[2];
320 uint8_t t
[4] = {0, 0, 0, 0};
322 /* fastdata 1-bit register */
323 fields
[0].num_bits
= 1;
324 fields
[0].out_value
= &spracc
;
325 fields
[0].in_value
= NULL
;
327 /* processor access data register 32 bit */
328 fields
[1].num_bits
= 32;
329 fields
[1].out_value
= t
;
333 fields
[1].in_value
= NULL
;
334 buf_set_u32(t
, 0, 32, *data
);
338 fields
[1].in_value
= (uint8_t *) data
;
341 jtag_add_dr_scan(tap
, 2, fields
, TAP_IDLE
);