zy1000: switch to pthread
[openocd/ellerodev.git] / src / jtag / zy1000 / zy1000.c
blob71ae6f43740cc7f897e4646e74a9210988d0c303
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
48 #include <pthread.h>
50 #include <target/embeddedice.h>
51 #include <jtag/minidriver.h>
52 #include <jtag/interface.h>
53 #include <time.h>
54 #include <helper/time_support.h>
56 #include <netinet/tcp.h>
58 #if BUILD_ECOSBOARD
59 #include "zy1000_version.h"
61 #include <cyg/hal/hal_io.h> // low level i/o
62 #include <cyg/hal/hal_diag.h>
64 #ifdef CYGPKG_HAL_NIOS2
65 #include <cyg/hal/io.h>
66 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_KHZ 60000
68 #else
69 #define ZYLIN_KHZ 64000
70 #endif
72 #define ZYLIN_VERSION GIT_ZY1000_VERSION
73 #define ZYLIN_DATE __DATE__
74 #define ZYLIN_TIME __TIME__
75 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
76 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
78 #else
79 /* Assume we're connecting to a revc w/60MHz clock. */
80 #define ZYLIN_KHZ 60000
81 #endif
84 /* The software needs to check if it's in RCLK mode or not */
85 static bool zy1000_rclk = false;
87 static int zy1000_khz(int khz, int *jtag_speed)
89 if (khz == 0)
91 *jtag_speed = 0;
93 else
95 int speed;
96 /* Round speed up to nearest divisor.
98 * E.g. 16000kHz
99 * (64000 + 15999) / 16000 = 4
100 * (4 + 1) / 2 = 2
101 * 2 * 2 = 4
103 * 64000 / 4 = 16000
105 * E.g. 15999
106 * (64000 + 15998) / 15999 = 5
107 * (5 + 1) / 2 = 3
108 * 3 * 2 = 6
110 * 64000 / 6 = 10666
113 speed = (ZYLIN_KHZ + (khz -1)) / khz;
114 speed = (speed + 1 ) / 2;
115 speed *= 2;
116 if (speed > 8190)
118 /* maximum dividend */
119 speed = 8190;
121 *jtag_speed = speed;
123 return ERROR_OK;
126 static int zy1000_speed_div(int speed, int *khz)
128 if (speed == 0)
130 *khz = 0;
132 else
134 *khz = ZYLIN_KHZ / speed;
137 return ERROR_OK;
140 static bool readPowerDropout(void)
142 uint32_t state;
143 // sample and clear power dropout
144 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
145 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
146 bool powerDropout;
147 powerDropout = (state & 0x80) != 0;
148 return powerDropout;
152 static bool readSRST(void)
154 uint32_t state;
155 // sample and clear SRST sensing
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
157 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
158 bool srstAsserted;
159 srstAsserted = (state & 0x40) != 0;
160 return srstAsserted;
163 static int zy1000_srst_asserted(int *srst_asserted)
165 *srst_asserted = readSRST();
166 return ERROR_OK;
169 static int zy1000_power_dropout(int *dropout)
171 *dropout = readPowerDropout();
172 return ERROR_OK;
175 void zy1000_reset(int trst, int srst)
177 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
179 /* flush the JTAG FIFO. Not flushing the queue before messing with
180 * reset has such interesting bugs as causing hard to reproduce
181 * RCLK bugs as RCLK will stop responding when TRST is asserted
183 waitIdle();
185 if (!srst)
187 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
189 else
191 /* Danger!!! if clk != 0 when in
192 * idle in TAP_IDLE, reset halt on str912 will fail.
194 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
197 if (!trst)
199 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
201 else
203 /* assert reset */
204 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
207 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
209 /* we're now in the RESET state until trst is deasserted */
210 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
211 } else
213 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
214 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
217 /* wait for srst to float back up */
218 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
219 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
221 bool first = true;
222 long long start = 0;
223 long total = 0;
224 for (;;)
226 // We don't want to sense our own reset, so we clear here.
227 // There is of course a timing hole where we could loose
228 // a "real" reset.
229 if (!readSRST())
231 if (total > 1)
233 LOG_USER("SRST took %dms to deassert", (int)total);
235 break;
238 if (first)
240 first = false;
241 start = timeval_ms();
244 total = timeval_ms() - start;
246 keep_alive();
248 if (total > 5000)
250 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
251 break;
258 int zy1000_speed(int speed)
260 /* flush JTAG master FIFO before setting speed */
261 waitIdle();
263 zy1000_rclk = false;
265 if (speed == 0)
267 /*0 means RCLK*/
268 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
269 zy1000_rclk = true;
270 LOG_DEBUG("jtag_speed using RCLK");
272 else
274 if (speed > 8190 || speed < 2)
276 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
277 ZYLIN_KHZ, (ZYLIN_KHZ * 1000) / 8190, ZYLIN_KHZ / (2 * 1000));
278 return ERROR_INVALID_ARGUMENTS;
281 int khz;
282 speed &= ~1;
283 zy1000_speed_div(speed, &khz);
284 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
285 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
286 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
288 return ERROR_OK;
291 static bool savePower;
294 static void setPower(bool power)
296 savePower = power;
297 if (power)
299 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
300 } else
302 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
306 COMMAND_HANDLER(handle_power_command)
308 switch (CMD_ARGC)
310 case 1: {
311 bool enable;
312 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
313 setPower(enable);
314 // fall through
316 case 0:
317 LOG_INFO("Target power %s", savePower ? "on" : "off");
318 break;
319 default:
320 return ERROR_INVALID_ARGUMENTS;
323 return ERROR_OK;
326 #if !BUILD_ZY1000_MASTER
327 static char *tcp_server = "notspecified";
328 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
330 if (argc != 2)
331 return JIM_ERR;
333 tcp_server = strdup(Jim_GetString(argv[1], NULL));
335 return JIM_OK;
337 #endif
339 #if BUILD_ECOSBOARD
340 /* Give TELNET a way to find out what version this is */
341 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
343 if ((argc < 1) || (argc > 3))
344 return JIM_ERR;
345 const char *version_str = NULL;
347 if (argc == 1)
349 version_str = ZYLIN_OPENOCD_VERSION;
350 } else
352 const char *str = Jim_GetString(argv[1], NULL);
353 const char *str2 = NULL;
354 if (argc > 2)
355 str2 = Jim_GetString(argv[2], NULL);
356 if (strcmp("openocd", str) == 0)
358 version_str = ZYLIN_OPENOCD;
360 else if (strcmp("zy1000", str) == 0)
362 version_str = ZYLIN_VERSION;
364 else if (strcmp("date", str) == 0)
366 version_str = ZYLIN_DATE;
368 else if (strcmp("time", str) == 0)
370 version_str = ZYLIN_TIME;
372 else if (strcmp("pcb", str) == 0)
374 #ifdef CYGPKG_HAL_NIOS2
375 version_str="c";
376 #else
377 version_str="b";
378 #endif
380 #ifdef CYGPKG_HAL_NIOS2
381 else if (strcmp("fpga", str) == 0)
384 /* return a list of 32 bit integers to describe the expected
385 * and actual FPGA
387 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
388 uint32_t id, timestamp;
389 HAL_READ_UINT32(SYSID_BASE, id);
390 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
391 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
392 version_str = fpga_id;
393 if ((argc>2) && (strcmp("time", str2) == 0))
395 time_t last_mod = timestamp;
396 char * t = ctime (&last_mod) ;
397 t[strlen(t)-1] = 0;
398 version_str = t;
401 #endif
403 else
405 return JIM_ERR;
409 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
411 return JIM_OK;
413 #endif
415 #ifdef CYGPKG_HAL_NIOS2
418 struct info_forward
420 void *data;
421 struct cyg_upgrade_info *upgraded_file;
424 static void report_info(void *data, const char * format, va_list args)
426 char *s = alloc_vprintf(format, args);
427 LOG_USER_N("%s", s);
428 free(s);
431 struct cyg_upgrade_info firmware_info =
433 (uint8_t *)0x84000000,
434 "/ram/firmware.phi",
435 "Firmware",
436 0x0300000,
437 0x1f00000 -
438 0x0300000,
439 "ZylinNiosFirmware\n",
440 report_info,
443 // File written to /ram/firmware.phi before arriving at this fn
444 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
446 if (argc != 1)
447 return JIM_ERR;
449 if (!cyg_firmware_upgrade(NULL, firmware_info))
450 return JIM_ERR;
452 return JIM_OK;
454 #endif
456 static int
457 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
458 int argc,
459 Jim_Obj * const *argv)
461 if (argc != 1)
463 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
464 return JIM_ERR;
467 bool dropout = readPowerDropout();
469 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
471 return JIM_OK;
476 int zy1000_quit(void)
479 return ERROR_OK;
484 int interface_jtag_execute_queue(void)
486 uint32_t empty;
488 waitIdle();
490 /* We must make sure to write data read back to memory location before we return
491 * from this fn
493 zy1000_flush_readqueue();
495 /* and handle any callbacks... */
496 zy1000_flush_callbackqueue();
498 if (zy1000_rclk)
500 /* Only check for errors when using RCLK to speed up
501 * jtag over TCP/IP
503 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
504 /* clear JTAG error register */
505 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
507 if ((empty&0x400) != 0)
509 LOG_WARNING("RCLK timeout");
510 /* the error is informative only as we don't want to break the firmware if there
511 * is a false positive.
513 // return ERROR_FAIL;
516 return ERROR_OK;
522 static void writeShiftValue(uint8_t *data, int bits);
524 // here we shuffle N bits out/in
525 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
527 tap_state_t pause_state = shiftState;
528 for (int j = 0; j < num_bits; j += 32)
530 int k = num_bits - j;
531 if (k > 32)
533 k = 32;
534 /* we have more to shift out */
535 } else if (pause_now)
537 /* this was the last to shift out this time */
538 pause_state = end_state;
541 // we have (num_bits + 7)/8 bytes of bits to toggle out.
542 // bits are pushed out LSB to MSB
543 uint32_t value;
544 value = 0;
545 if (out_value != NULL)
547 for (int l = 0; l < k; l += 8)
549 value|=out_value[(j + l)/8]<<l;
552 /* mask away unused bits for easier debugging */
553 if (k < 32)
555 value&=~(((uint32_t)0xffffffff) << k);
556 } else
558 /* Shifting by >= 32 is not defined by the C standard
559 * and will in fact shift by &0x1f bits on nios */
562 shiftValueInner(shiftState, pause_state, k, value);
564 if (in_value != NULL)
566 writeShiftValue(in_value + (j/8), k);
571 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
573 for (int i = 0; i < num_fields; i++)
575 scanBits(fields[i].out_value,
576 fields[i].in_value,
577 fields[i].num_bits,
578 (i == num_fields-1),
579 shiftState,
580 end_state);
584 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
586 int scan_size = 0;
587 struct jtag_tap *tap, *nextTap;
588 tap_state_t pause_state = TAP_IRSHIFT;
590 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
592 nextTap = jtag_tap_next_enabled(tap);
593 if (nextTap==NULL)
595 pause_state = state;
597 scan_size = tap->ir_length;
599 /* search the list */
600 if (tap == active)
602 scanFields(1, fields, TAP_IRSHIFT, pause_state);
603 /* update device information */
604 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
606 tap->bypass = 0;
607 } else
609 /* if a device isn't listed, set it to BYPASS */
610 assert(scan_size <= 32);
611 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
613 tap->bypass = 1;
617 return ERROR_OK;
624 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
626 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
627 return ERROR_OK;
630 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
632 struct jtag_tap *tap, *nextTap;
633 tap_state_t pause_state = TAP_DRSHIFT;
634 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
636 nextTap = jtag_tap_next_enabled(tap);
637 if (nextTap==NULL)
639 pause_state = state;
642 /* Find a range of fields to write to this tap */
643 if (tap == active)
645 assert(!tap->bypass);
647 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
648 } else
650 /* Shift out a 0 for disabled tap's */
651 assert(tap->bypass);
652 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
655 return ERROR_OK;
658 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
660 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
661 return ERROR_OK;
664 int interface_jtag_add_tlr()
666 setCurrentState(TAP_RESET);
667 return ERROR_OK;
671 int interface_jtag_add_reset(int req_trst, int req_srst)
673 zy1000_reset(req_trst, req_srst);
674 return ERROR_OK;
677 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
679 /* num_cycles can be 0 */
680 setCurrentState(clockstate);
682 /* execute num_cycles, 32 at the time. */
683 int i;
684 for (i = 0; i < num_cycles; i += 32)
686 int num;
687 num = 32;
688 if (num_cycles-i < num)
690 num = num_cycles-i;
692 shiftValueInner(clockstate, clockstate, num, 0);
695 #if !TEST_MANUAL()
696 /* finish in end_state */
697 setCurrentState(state);
698 #else
699 tap_state_t t = TAP_IDLE;
700 /* test manual drive code on any target */
701 int tms;
702 uint8_t tms_scan = tap_get_tms_path(t, state);
703 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
705 for (i = 0; i < tms_count; i++)
707 tms = (tms_scan >> i) & 1;
708 waitIdle();
709 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
711 waitIdle();
712 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
713 #endif
715 return ERROR_OK;
718 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
720 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
723 int interface_jtag_add_clocks(int num_cycles)
725 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
728 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
730 /*wait for the fifo to be empty*/
731 waitIdle();
733 for (unsigned i = 0; i < num_bits; i++)
735 int tms;
737 if (((seq[i/8] >> (i % 8)) & 1) == 0)
739 tms = 0;
741 else
743 tms = 1;
746 waitIdle();
747 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
750 waitIdle();
751 if (state != TAP_INVALID)
753 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
754 } else
756 /* this would be normal if we are switching to SWD mode */
758 return ERROR_OK;
761 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
763 int state_count;
764 int tms = 0;
766 state_count = 0;
768 tap_state_t cur_state = cmd_queue_cur_state;
770 uint8_t seq[16];
771 memset(seq, 0, sizeof(seq));
772 assert(num_states < (int)((sizeof(seq) * 8)));
774 while (num_states)
776 if (tap_state_transition(cur_state, false) == path[state_count])
778 tms = 0;
780 else if (tap_state_transition(cur_state, true) == path[state_count])
782 tms = 1;
784 else
786 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
787 exit(-1);
790 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
792 cur_state = path[state_count];
793 state_count++;
794 num_states--;
797 return interface_add_tms_seq(state_count, seq, cur_state);
800 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
802 /* bypass bits before and after */
803 int pre_bits = 0;
804 int post_bits = 0;
806 bool found = false;
807 struct jtag_tap *cur_tap, *nextTap;
808 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
810 nextTap = jtag_tap_next_enabled(cur_tap);
811 if (cur_tap == tap)
813 found = true;
814 } else
816 if (found)
818 post_bits++;
819 } else
821 pre_bits++;
825 *pre = pre_bits;
826 *post = post_bits;
830 static const int embeddedice_num_bits[] = {32, 6};
831 uint32_t values[2];
833 values[0] = value;
834 values[1] = (1 << 5) | reg_addr;
836 jtag_add_dr_out(tap,
838 embeddedice_num_bits,
839 values,
840 TAP_IDLE);
843 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
845 #if 0
846 int i;
847 for (i = 0; i < count; i++)
849 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
850 buffer += 4;
852 #else
853 int pre_bits;
854 int post_bits;
855 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
857 if ((pre_bits > 32) || (post_bits + 6 > 32))
859 int i;
860 for (i = 0; i < count; i++)
862 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
863 buffer += 4;
865 } else
867 int i;
868 for (i = 0; i < count; i++)
870 /* Fewer pokes means we get to use the FIFO more efficiently */
871 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
872 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
873 /* Danger! here we need to exit into the TAP_IDLE state to make
874 * DCC pick up this value.
876 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
877 buffer += 4;
880 #endif
885 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
887 /* bypass bits before and after */
888 int pre_bits;
889 int post_bits;
890 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
891 post_bits+=2;
893 if ((pre_bits > 32) || (post_bits > 32))
895 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
896 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
897 } else
899 static const int bits[] = {32, 2};
900 uint32_t values[] = {0, 0};
902 /* FIX!!!!!! the target_write_memory() API started this nasty problem
903 * with unaligned uint32_t * pointers... */
904 const uint8_t *t = (const uint8_t *)data;
906 while (--count > 0)
908 #if 1
909 /* Danger! This code doesn't update cmd_queue_cur_state, so
910 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
911 * this loop would fail!
913 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
915 uint32_t value;
916 value = *t++;
917 value |= (*t++<<8);
918 value |= (*t++<<16);
919 value |= (*t++<<24);
921 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
922 /* minimum 2 bits */
923 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
925 /* copy & paste from arm11_dbgtap.c */
926 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
927 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
928 * This is probably a bug in the Avalon bus(cross clocking bridge?)
929 * or in the jtag registers module.
931 waitIdle();
932 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
933 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
934 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
935 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
936 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
937 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
938 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
939 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
940 /* we don't have to wait for the queue to empty here */
941 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
942 waitIdle();
943 #else
944 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
946 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
949 values[0] = *t++;
950 values[0] |= (*t++<<8);
951 values[0] |= (*t++<<16);
952 values[0] |= (*t++<<24);
954 jtag_add_dr_out(tap,
956 bits,
957 values,
958 TAP_IDLE);
960 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
961 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
962 #endif
965 values[0] = *t++;
966 values[0] |= (*t++<<8);
967 values[0] |= (*t++<<16);
968 values[0] |= (*t++<<24);
970 /* This will happen on the last iteration updating cmd_queue_cur_state
971 * so we don't have to track it during the common code path
973 jtag_add_dr_out(tap,
975 bits,
976 values,
977 TAP_IDLE);
979 return jtag_execute_queue();
984 static const struct command_registration zy1000_commands[] = {
986 .name = "power",
987 .handler = handle_power_command,
988 .mode = COMMAND_ANY,
989 .help = "Turn power switch to target on/off. "
990 "With no arguments, prints status.",
991 .usage = "('on'|'off)",
993 #if BUILD_ZY1000_MASTER
994 #if BUILD_ECOSBOARD
996 .name = "zy1000_version",
997 .mode = COMMAND_ANY,
998 .jim_handler = jim_zy1000_version,
999 .help = "Print version info for zy1000.",
1000 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1002 #endif
1003 #else
1005 .name = "zy1000_server",
1006 .mode = COMMAND_ANY,
1007 .jim_handler = jim_zy1000_server,
1008 .help = "Tcpip address for ZY1000 server.",
1009 .usage = "address",
1011 #endif
1013 .name = "powerstatus",
1014 .mode = COMMAND_ANY,
1015 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1016 .help = "Returns power status of target",
1018 #ifdef CYGPKG_HAL_NIOS2
1020 .name = "updatezy1000firmware",
1021 .mode = COMMAND_ANY,
1022 .jim_handler = jim_zy1000_writefirmware,
1023 .help = "writes firmware to flash",
1024 /* .usage = "some_string", */
1026 #endif
1027 COMMAND_REGISTRATION_DONE
1031 static int tcp_ip = -1;
1033 /* Write large packets if we can */
1034 static size_t out_pos;
1035 static uint8_t out_buffer[16384];
1036 static size_t in_pos;
1037 static size_t in_write;
1038 static uint8_t in_buffer[16384];
1040 static bool flush_writes(void)
1042 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1043 out_pos = 0;
1044 return ok;
1047 static bool writeLong(uint32_t l)
1049 int i;
1050 for (i = 0; i < 4; i++)
1052 uint8_t c = (l >> (i*8))&0xff;
1053 out_buffer[out_pos++] = c;
1054 if (out_pos >= sizeof(out_buffer))
1056 if (!flush_writes())
1058 return false;
1062 return true;
1065 static bool readLong(uint32_t *out_data)
1067 uint32_t data = 0;
1068 int i;
1069 for (i = 0; i < 4; i++)
1071 uint8_t c;
1072 if (in_pos == in_write)
1074 /* If we have some data that we can send, send them before
1075 * we wait for more data
1077 if (out_pos > 0)
1079 if (!flush_writes())
1081 return false;
1085 /* read more */
1086 int t;
1087 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1088 if (t < 1)
1090 return false;
1092 in_write = (size_t) t;
1093 in_pos = 0;
1095 c = in_buffer[in_pos++];
1097 data |= (c << (i*8));
1099 *out_data = data;
1100 return true;
1103 enum ZY1000_CMD
1105 ZY1000_CMD_POKE = 0x0,
1106 ZY1000_CMD_PEEK = 0x8,
1107 ZY1000_CMD_SLEEP = 0x1,
1108 ZY1000_CMD_WAITIDLE = 2
1112 #if !BUILD_ZY1000_MASTER
1114 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1115 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1117 /* We initialize this late since we need to know the server address
1118 * first.
1120 static void tcpip_open(void)
1122 if (tcp_ip >= 0)
1123 return;
1125 struct sockaddr_in echoServAddr; /* Echo server address */
1127 /* Create a reliable, stream socket using TCP */
1128 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1130 fprintf(stderr, "Failed to connect to zy1000 server\n");
1131 exit(-1);
1134 /* Construct the server address structure */
1135 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1136 echoServAddr.sin_family = AF_INET; /* Internet address family */
1137 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1138 echoServAddr.sin_port = htons(7777); /* Server port */
1140 /* Establish the connection to the echo server */
1141 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1143 fprintf(stderr, "Failed to connect to zy1000 server\n");
1144 exit(-1);
1147 int flag = 1;
1148 setsockopt(tcp_ip, /* socket affected */
1149 IPPROTO_TCP, /* set option at TCP level */
1150 TCP_NODELAY, /* name of option */
1151 (char *)&flag, /* the cast is historical cruft */
1152 sizeof(int)); /* length of option value */
1157 /* send a poke */
1158 void zy1000_tcpout(uint32_t address, uint32_t data)
1160 tcpip_open();
1161 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1162 !writeLong(data))
1164 fprintf(stderr, "Could not write to zy1000 server\n");
1165 exit(-1);
1169 /* By sending the wait to the server, we avoid a readback
1170 * of status. Radically improves performance for this operation
1171 * with long ping times.
1173 void waitIdle(void)
1175 tcpip_open();
1176 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1178 fprintf(stderr, "Could not write to zy1000 server\n");
1179 exit(-1);
1183 uint32_t zy1000_tcpin(uint32_t address)
1185 tcpip_open();
1187 zy1000_flush_readqueue();
1189 uint32_t data;
1190 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1191 !readLong(&data))
1193 fprintf(stderr, "Could not read from zy1000 server\n");
1194 exit(-1);
1196 return data;
1199 int interface_jtag_add_sleep(uint32_t us)
1201 tcpip_open();
1202 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1203 !writeLong(us))
1205 fprintf(stderr, "Could not read from zy1000 server\n");
1206 exit(-1);
1208 return ERROR_OK;
1211 /* queue a readback */
1212 #define readqueue_size 16384
1213 static struct
1215 uint8_t *dest;
1216 int bits;
1217 } readqueue[readqueue_size];
1219 static int readqueue_pos = 0;
1221 /* flush the readqueue, this means reading any data that
1222 * we're expecting and store them into the final position
1224 void zy1000_flush_readqueue(void)
1226 if (readqueue_pos == 0)
1228 /* simply debugging by allowing easy breakpoints when there
1229 * is something to do. */
1230 return;
1232 int i;
1233 tcpip_open();
1234 for (i = 0; i < readqueue_pos; i++)
1236 uint32_t value;
1237 if (!readLong(&value))
1239 fprintf(stderr, "Could not read from zy1000 server\n");
1240 exit(-1);
1243 uint8_t *in_value = readqueue[i].dest;
1244 int k = readqueue[i].bits;
1246 // we're shifting in data to MSB, shift data to be aligned for returning the value
1247 value >>= 32-k;
1249 for (int l = 0; l < k; l += 8)
1251 in_value[l/8]=(value >> l)&0xff;
1254 readqueue_pos = 0;
1257 /* By queuing the callback's we avoid flushing the
1258 read queue until jtag_execute_queue(). This can
1259 reduce latency dramatically for cases where
1260 callbacks are used extensively.
1262 #define callbackqueue_size 128
1263 static struct callbackentry
1265 jtag_callback_t callback;
1266 jtag_callback_data_t data0;
1267 jtag_callback_data_t data1;
1268 jtag_callback_data_t data2;
1269 jtag_callback_data_t data3;
1270 } callbackqueue[callbackqueue_size];
1272 static int callbackqueue_pos = 0;
1274 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1276 if (callbackqueue_pos >= callbackqueue_size)
1278 zy1000_flush_callbackqueue();
1281 callbackqueue[callbackqueue_pos].callback = callback;
1282 callbackqueue[callbackqueue_pos].data0 = data0;
1283 callbackqueue[callbackqueue_pos].data1 = data1;
1284 callbackqueue[callbackqueue_pos].data2 = data2;
1285 callbackqueue[callbackqueue_pos].data3 = data3;
1286 callbackqueue_pos++;
1289 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1291 ((jtag_callback1_t)data1)(data0);
1292 return ERROR_OK;
1295 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1297 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1300 void zy1000_flush_callbackqueue(void)
1302 /* we have to flush the read queue so we have access to
1303 the data the callbacks will use
1305 zy1000_flush_readqueue();
1306 int i;
1307 for (i = 0; i < callbackqueue_pos; i++)
1309 struct callbackentry *entry = &callbackqueue[i];
1310 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1312 callbackqueue_pos = 0;
1315 static void writeShiftValue(uint8_t *data, int bits)
1317 waitIdle();
1319 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1321 fprintf(stderr, "Could not read from zy1000 server\n");
1322 exit(-1);
1325 if (readqueue_pos >= readqueue_size)
1327 zy1000_flush_readqueue();
1330 readqueue[readqueue_pos].dest = data;
1331 readqueue[readqueue_pos].bits = bits;
1332 readqueue_pos++;
1335 #else
1337 static void writeShiftValue(uint8_t *data, int bits)
1339 uint32_t value;
1340 waitIdle();
1341 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1342 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1344 // data in, LSB to MSB
1345 // we're shifting in data to MSB, shift data to be aligned for returning the value
1346 value >>= 32 - bits;
1348 for (int l = 0; l < bits; l += 8)
1350 data[l/8]=(value >> l)&0xff;
1354 #endif
1356 #if BUILD_ZY1000_MASTER
1358 pthread_t thread;
1360 #if BUILD_ECOSBOARD
1361 static char watchdog_stack[2048];
1362 static cyg_thread watchdog_thread_object;
1363 static cyg_handle_t watchdog_thread_handle;
1364 #endif
1366 /* Infinite loop peeking & poking */
1367 static void tcpipserver(void)
1369 for (;;)
1371 uint32_t address;
1372 if (!readLong(&address))
1373 return;
1374 enum ZY1000_CMD c = (address >> 24) & 0xff;
1375 address &= 0xffffff;
1376 switch (c)
1378 case ZY1000_CMD_POKE:
1380 uint32_t data;
1381 if (!readLong(&data))
1382 return;
1383 address &= ~0x80000000;
1384 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1385 break;
1387 case ZY1000_CMD_PEEK:
1389 uint32_t data;
1390 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1391 if (!writeLong(data))
1392 return;
1393 break;
1395 case ZY1000_CMD_SLEEP:
1397 uint32_t data;
1398 if (!readLong(&data))
1399 return;
1400 /* Wait for some us */
1401 usleep(data);
1402 break;
1404 case ZY1000_CMD_WAITIDLE:
1406 waitIdle();
1407 break;
1409 default:
1410 return;
1416 static void *tcpip_server(void *data)
1418 int so_reuseaddr_option = 1;
1420 int fd;
1421 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1423 LOG_ERROR("error creating socket: %s", strerror(errno));
1424 exit(-1);
1427 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1428 sizeof(int));
1430 struct sockaddr_in sin;
1431 unsigned int address_size;
1432 address_size = sizeof(sin);
1433 memset(&sin, 0, sizeof(sin));
1434 sin.sin_family = AF_INET;
1435 sin.sin_addr.s_addr = INADDR_ANY;
1436 sin.sin_port = htons(7777);
1438 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1440 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1441 exit(-1);
1444 if (listen(fd, 1) == -1)
1446 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1447 exit(-1);
1451 for (;;)
1453 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1454 if (tcp_ip < 0)
1456 continue;
1459 int flag = 1;
1460 setsockopt(tcp_ip, /* socket affected */
1461 IPPROTO_TCP, /* set option at TCP level */
1462 TCP_NODELAY, /* name of option */
1463 (char *)&flag, /* the cast is historical cruft */
1464 sizeof(int)); /* length of option value */
1466 bool save_poll = jtag_poll_get_enabled();
1468 /* polling will screw up the "connection" */
1469 jtag_poll_set_enabled(false);
1471 tcpipserver();
1473 jtag_poll_set_enabled(save_poll);
1475 close(tcp_ip);
1478 /* Never reached actually */
1479 close(fd);
1481 return NULL;
1484 #ifdef WATCHDOG_BASE
1485 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1486 static void watchdog_server(cyg_addrword_t data)
1488 int so_reuseaddr_option = 1;
1490 int fd;
1491 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1493 LOG_ERROR("error creating socket: %s", strerror(errno));
1494 exit(-1);
1497 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1498 sizeof(int));
1500 struct sockaddr_in sin;
1501 unsigned int address_size;
1502 address_size = sizeof(sin);
1503 memset(&sin, 0, sizeof(sin));
1504 sin.sin_family = AF_INET;
1505 sin.sin_addr.s_addr = INADDR_ANY;
1506 sin.sin_port = htons(8888);
1508 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1510 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1511 exit(-1);
1514 if (listen(fd, 1) == -1)
1516 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1517 exit(-1);
1521 for (;;)
1523 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1525 /* Start watchdog, must be reset every 10 seconds. */
1526 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1528 if (watchdog_ip < 0)
1530 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1531 exit(-1);
1534 int flag = 1;
1535 setsockopt(watchdog_ip, /* socket affected */
1536 IPPROTO_TCP, /* set option at TCP level */
1537 TCP_NODELAY, /* name of option */
1538 (char *)&flag, /* the cast is historical cruft */
1539 sizeof(int)); /* length of option value */
1542 char buf;
1543 for (;;)
1545 if (read(watchdog_ip, &buf, 1) == 1)
1547 /* Reset timer */
1548 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1549 /* Echo so we can telnet in and see that resetting works */
1550 write(watchdog_ip, &buf, 1);
1551 } else
1553 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1554 * now.
1556 return;
1561 /* Never reached */
1564 #endif
1566 #endif
1568 #if BUILD_ZY1000_MASTER
1569 int interface_jtag_add_sleep(uint32_t us)
1571 jtag_sleep(us);
1572 return ERROR_OK;
1574 #endif
1576 #if BUILD_ZY1000_MASTER && !BUILD_ECOSBOARD
1577 volatile void *zy1000_jtag_master;
1578 #include <sys/mman.h>
1579 #endif
1581 int zy1000_init(void)
1583 #if BUILD_ECOSBOARD
1584 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1585 #elif BUILD_ZY1000_MASTER
1586 int fd;
1587 if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1)
1589 LOG_ERROR("No access to /dev/mem");
1590 return ERROR_FAIL;
1592 #ifndef REGISTERS_BASE
1593 #define REGISTERS_BASE 0x9002000
1594 #define REGISTERS_SPAN 128
1595 #endif
1597 zy1000_jtag_master = mmap(0, REGISTERS_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, REGISTERS_BASE);
1599 if(zy1000_jtag_master == (void *) -1)
1601 close(fd);
1602 LOG_ERROR("No access to /dev/mem");
1603 return ERROR_FAIL;
1605 #endif
1609 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1611 setPower(true); // on by default
1614 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1615 zy1000_reset(0, 0);
1616 int jtag_speed_var;
1617 int retval = jtag_get_speed(&jtag_speed_var);
1618 if (retval != ERROR_OK)
1619 return retval;
1620 zy1000_speed(jtag_speed_var);
1622 #if BUILD_ZY1000_MASTER
1623 pthread_create(&thread, NULL, tcpip_server, NULL);
1625 #if BUILD_ECOSBOARD
1626 #ifdef WATCHDOG_BASE
1627 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1628 (void *) watchdog_stack, sizeof(watchdog_stack),
1629 &watchdog_thread_handle, &watchdog_thread_object);
1630 cyg_thread_resume(watchdog_thread_handle);
1631 #endif
1632 #endif
1633 #endif
1635 return ERROR_OK;
1640 struct jtag_interface zy1000_interface =
1642 .name = "ZY1000",
1643 .supported = DEBUG_CAP_TMS_SEQ,
1644 .execute_queue = NULL,
1645 .speed = zy1000_speed,
1646 .commands = zy1000_commands,
1647 .init = zy1000_init,
1648 .quit = zy1000_quit,
1649 .khz = zy1000_khz,
1650 .speed_div = zy1000_speed_div,
1651 .power_dropout = zy1000_power_dropout,
1652 .srst_asserted = zy1000_srst_asserted,