src/target/mips_ejtag.h

   1 /***************************************************************************
   2  *   Copyright (C) 2008 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   Copyright (C) 2008 by David T.L. Wong                                 *
   6  *                                                                         *
   7  *   This program is free software; you can redistribute it and/or modify  *
   8  *   it under the terms of the GNU General Public License as published by  *
   9  *   the Free Software Foundation; either version 2 of the License, or     *
  10  *   (at your option) any later version.                                   *
  11  *                                                                         *
  12  *   This program is distributed in the hope that it will be useful,       *
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  15  *   GNU General Public License for more details.                          *
  16  *                                                                         *
  17  *   You should have received a copy of the GNU General Public License     *
  18  *   along with this program; if not, write to the                         *
  19  *   Free Software Foundation, Inc.,                                       *
  20  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  21  ***************************************************************************/
  22
  23 #ifndef MIPS_EJTAG
  24 #define MIPS_EJTAG
  25
  26 #include <jtag/jtag.h>
  27
  28 /* tap instructions */
  29 #define EJTAG_INST_IDCODE               0x01
  30 #define EJTAG_INST_IMPCODE              0x03
  31 #define EJTAG_INST_ADDRESS              0x08
  32 #define EJTAG_INST_DATA                 0x09
  33 #define EJTAG_INST_CONTROL              0x0A
  34 #define EJTAG_INST_ALL                  0x0B
  35 #define EJTAG_INST_EJTAGBOOT    0x0C
  36 #define EJTAG_INST_NORMALBOOT   0x0D
  37 #define EJTAG_INST_FASTDATA             0x0E
  38 #define EJTAG_INST_TCBCONTROLA  0x10
  39 #define EJTAG_INST_TCBCONTROLB  0x11
  40 #define EJTAG_INST_TCBDATA              0x12
  41 #define EJTAG_INST_BYPASS               0xFF
  42
  43 /* ejtag control register bits ECR */
  44 #define EJTAG_CTRL_TOF                  (1 << 1)
  45 #define EJTAG_CTRL_TIF                  (1 << 2)
  46 #define EJTAG_CTRL_BRKST                (1 << 3)
  47 #define EJTAG_CTRL_DLOCK                (1 << 5)
  48 #define EJTAG_CTRL_DRWN                 (1 << 9)
  49 #define EJTAG_CTRL_DERR                 (1 << 10)
  50 #define EJTAG_CTRL_DSTRT                (1 << 11)
  51 #define EJTAG_CTRL_JTAGBRK              (1 << 12)
  52 #define EJTAG_CTRL_SETDEV               (1 << 14)
  53 #define EJTAG_CTRL_PROBEN               (1 << 15)
  54 #define EJTAG_CTRL_PRRST                (1 << 16)
  55 #define EJTAG_CTRL_DMAACC               (1 << 17)
  56 #define EJTAG_CTRL_PRACC                (1 << 18)
  57 #define EJTAG_CTRL_PRNW                 (1 << 19)
  58 #define EJTAG_CTRL_PERRST               (1 << 20)
  59 #define EJTAG_CTRL_SYNC                 (1 << 23)
  60 #define EJTAG_CTRL_DNM                  (1 << 28)
  61 #define EJTAG_CTRL_ROCC                 (1 << 31)
  62
  63 /* Debug Register (CP0 Register 23, Select 0) */
  64
  65 #define EJTAG_DEBUG_DSS                 (1 << 0)
  66 #define EJTAG_DEBUG_DBP                 (1 << 1)
  67 #define EJTAG_DEBUG_DDBL                (1 << 2)
  68 #define EJTAG_DEBUG_DDBS                (1 << 3)
  69 #define EJTAG_DEBUG_DIB                 (1 << 4)
  70 #define EJTAG_DEBUG_DINT                (1 << 5)
  71 #define EJTAG_DEBUG_OFFLINE             (1 << 7)
  72 #define EJTAG_DEBUG_SST                 (1 << 8)
  73 #define EJTAG_DEBUG_NOSST               (1 << 9)
  74 #define EJTAG_DEBUG_DDBLIMPR    (1 << 18)
  75 #define EJTAG_DEBUG_DDBSIMPR    (1 << 19)
  76 #define EJTAG_DEBUG_IEXI                (1 << 20)
  77 #define EJTAG_DEBUG_DBUSEP              (1 << 21)
  78 #define EJTAG_DEBUG_CACHEEP             (1 << 22)
  79 #define EJTAG_DEBUG_MCHECKP             (1 << 23)
  80 #define EJTAG_DEBUG_IBUSEP              (1 << 24)
  81 #define EJTAG_DEBUG_COUNTDM             (1 << 25)
  82 #define EJTAG_DEBUG_HALT                (1 << 26)
  83 #define EJTAG_DEBUG_DOZE                (1 << 27)
  84 #define EJTAG_DEBUG_LSNM                (1 << 28)
  85 #define EJTAG_DEBUG_NODCR               (1 << 29)
  86 #define EJTAG_DEBUG_DM                  (1 << 30)
  87 #define EJTAG_DEBUG_DBD                 (1 << 31)
  88
  89 /* implementaion register bits */
  90 #define EJTAG_IMP_R3K                   (1 << 28)
  91 #define EJTAG_IMP_DINT                  (1 << 24)
  92 #define EJTAG_IMP_NODMA                 (1 << 14)
  93 #define EJTAG_IMP_MIPS16                (1 << 16)
  94 #define EJTAG_DCR_MIPS64                (1 << 0)
  95
  96 /* Debug Control Register DCR */
  97 #define EJTAG_DCR                               0xFF300000
  98 #define EJTAG_DCR_ENM                   (1 << 29)
  99 #define EJTAG_DCR_DB                    (1 << 17)
 100 #define EJTAG_DCR_IB                    (1 << 16)
 101 #define EJTAG_DCR_INTE                  (1 << 4)
 102
 103 /* breakpoint support */
 104 #define EJTAG_IBS                               0xFF301000
 105 #define EJTAG_IBA1                              0xFF301100
 106 #define EJTAG_DBS                               0xFF302000
 107 #define EJTAG_DBA1                              0xFF302100
 108 #define EJTAG_DBCn_NOSB                 (1 << 13)
 109 #define EJTAG_DBCn_NOLB                 (1 << 12)
 110 #define EJTAG_DBCn_BLM_MASK             0xff
 111 #define EJTAG_DBCn_BLM_SHIFT    4
 112 #define EJTAG_DBCn_BE                   (1 << 0)
 113
 114 struct mips_ejtag
 115 {
 116         struct jtag_tap *tap;
 117         uint32_t impcode;
 118         uint32_t idcode;
 119         uint32_t ejtag_ctrl;
 120 };
 121
 122 int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
 123                 int new_instr, void *delete_me_and_submit_patch);
 124 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
 125 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
 126 int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode);
 127 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
 128 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
 129 int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data);
 130
 131 int mips_ejtag_init(struct mips_ejtag *ejtag_info);
 132 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);
 133 int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg);
 134
 135 #endif /* MIPS_EJTAG */