1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2007,2008,2009 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
8 * Copyright (C) 2008 by Spencer Oliver *
9 * spen@spen-soft.co.uk *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
29 #include <helper/types.h>
34 * This holds methods shared between all instances of a given target
35 * type. For example, all Cortex-M3 targets on a scan chain share
36 * the same method table.
41 * Name of this type of target. Do @b not access this
42 * field directly, use target_type_name() instead.
46 /* poll current target status */
47 int (*poll
)(struct target
*target
);
48 /* Invoked only from target_arch_state().
49 * Issue USER() w/architecture specific status. */
50 int (*arch_state
)(struct target
*target
);
52 /* target request support */
53 int (*target_request_data
)(struct target
*target
, uint32_t size
, uint8_t *buffer
);
55 /* halt will log a warning, but return ERROR_OK if the target is already halted. */
56 int (*halt
)(struct target
*target
);
57 int (*resume
)(struct target
*target
, int current
, uint32_t address
, int handle_breakpoints
, int debug_execution
);
58 int (*step
)(struct target
*target
, int current
, uint32_t address
, int handle_breakpoints
);
60 /* target reset control. assert reset can be invoked when OpenOCD and
61 * the target is out of sync.
63 * A typical example is that the target was power cycled while OpenOCD
64 * thought the target was halted or running.
66 * assert_reset() can therefore make no assumptions whatsoever about the
69 * Before assert_reset() for the target is invoked, a TRST/tms and
70 * chain validation is executed. TRST should not be asserted
71 * during target assert unless there is no way around it due to
72 * the way reset's are configured.
75 int (*assert_reset
)(struct target
*target
);
76 int (*deassert_reset
)(struct target
*target
);
77 int (*soft_reset_halt_imp
)(struct target
*target
);
78 int (*soft_reset_halt
)(struct target
*target
);
81 * Target register access for GDB. Do @b not call this function
82 * directly, use target_get_gdb_reg_list() instead.
84 * Danger! this function will succeed even if the target is running
85 * and return a register list with dummy values.
87 * The reason is that GDB connection will fail without a valid register
88 * list, however it is after GDB is connected that monitor commands can
89 * be run to properly initialize the target
91 int (*get_gdb_reg_list
)(struct target
*target
, struct reg
**reg_list
[], int *reg_list_size
);
93 /* target memory access
94 * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
95 * count: number of items of <size>
97 int (*read_memory_imp
)(struct target
*target
, uint32_t address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
99 * Target memory read callback. Do @b not call this function
100 * directly, use target_read_memory() instead.
102 int (*read_memory
)(struct target
*target
, uint32_t address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
103 int (*write_memory_imp
)(struct target
*target
, uint32_t address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
105 * Target memory write callback. Do @b not call this function
106 * directly, use target_write_memory() instead.
108 int (*write_memory
)(struct target
*target
, uint32_t address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
111 * Write target memory in multiples of 4 bytes, optimized for
112 * writing large quantities of data. Do @b not call this
113 * function directly, use target_bulk_write_memory() instead.
115 int (*bulk_write_memory
)(struct target
*target
, uint32_t address
, uint32_t count
, uint8_t *buffer
);
117 int (*checksum_memory
)(struct target
*target
, uint32_t address
, uint32_t count
, uint32_t* checksum
);
118 int (*blank_check_memory
)(struct target
*target
, uint32_t address
, uint32_t count
, uint32_t* blank
);
121 * target break-/watchpoint control
122 * rw: 0 = write, 1 = read, 2 = access
124 * Target must be halted while this is invoked as this
125 * will actually set up breakpoints on target.
127 * The breakpoint hardware will be set up upon adding the
130 * Upon GDB connection all breakpoints/watchpoints are cleared.
132 int (*add_breakpoint
)(struct target
*target
, struct breakpoint
*breakpoint
);
134 /* remove breakpoint. hw will only be updated if the target
135 * is currently halted.
136 * However, this method can be invoked on unresponsive targets.
138 int (*remove_breakpoint
)(struct target
*target
, struct breakpoint
*breakpoint
);
140 /* add watchpoint ... see add_breakpoint() comment above. */
141 int (*add_watchpoint
)(struct target
*target
, struct watchpoint
*watchpoint
);
143 /* remove watchpoint. hw will only be updated if the target
144 * is currently halted.
145 * However, this method can be invoked on unresponsive targets.
147 int (*remove_watchpoint
)(struct target
*target
, struct watchpoint
*watchpoint
);
150 * Target algorithm support. Do @b not call this method directly,
151 * use target_run_algorithm() instead.
153 int (*run_algorithm
)(struct target
*target
, int num_mem_params
, struct mem_param
*mem_params
, int num_reg_params
, struct reg_param
*reg_param
, uint32_t entry_point
, uint32_t exit_point
, int timeout_ms
, void *arch_info
);
155 const struct command_registration
*commands
;
157 /* called when target is created */
158 int (*target_create
)(struct target
*target
, Jim_Interp
*interp
);
160 /* called for various config parameters */
161 /* returns JIM_CONTINUE - if option not understood */
162 /* otherwise: JIM_OK, or JIM_ERR, */
163 int (*target_jim_configure
)(struct target
*target
, Jim_GetOptInfo
*goi
);
165 /* target commands specifically handled by the target */
166 /* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
167 int (*target_jim_commands
)(struct target
*target
, Jim_GetOptInfo
*goi
);
170 * This method is used to perform target setup that requires
173 * This may be called multiple times. It is called after the
174 * scan chain is initially validated, or later after the target
175 * is enabled by a JRC. It may also be called during some
176 * parts of the reset sequence.
178 * For one-time initialization tasks, use target_was_examined()
179 * and target_set_examined(). For example, probe the hardware
180 * before setting up chip-specific state, and then set that
181 * flag so you don't do that again.
183 int (*examine
)(struct target
*target
);
185 /* Set up structures for target.
187 * It is illegal to talk to the target at this stage as this fn is invoked
188 * before the JTAG chain has been examined/verified
190 int (*init_target
)(struct command_context
*cmd_ctx
, struct target
*target
);
192 /* translate from virtual to physical address. Default implementation is successful
193 * no-op(i.e. virtual==physical).
195 int (*virt2phys
)(struct target
*target
, uint32_t address
, uint32_t *physical
);
197 /* read directly from physical memory. caches are bypassed and untouched.
199 * If the target does not support disabling caches, leaving them untouched,
200 * then minimally the actual physical memory location will be read even
201 * if cache states are unchanged, flushed, etc.
203 * Default implementation is to call read_memory.
205 int (*read_phys_memory
)(struct target
*target
, uint32_t phys_address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
208 * same as read_phys_memory, except that it writes...
210 int (*write_phys_memory
)(struct target
*target
, uint32_t phys_address
, uint32_t size
, uint32_t count
, uint8_t *buffer
);
212 int (*mmu
)(struct target
*target
, int *enabled
);
214 /* after reset is complete, the target can check if things are properly set up.
216 * This can be used to check if e.g. DCC memory writes have been enabled for
217 * arm7/9 targets, which they really should except in the most contrived
220 int (*check_reset
)(struct target
*target
);
223 #endif // TARGET_TYPE_H