ARM ADI-V5: cleanup CID/PID addressing
[openocd/dnglaze.git] / src / flash / nor / pic32mx.h
blob79fa40efd196f060895ad4461f9c7322273ad5fb
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * Copyright (C) 2008 by John McCarthy *
9 * jgmcc@magma.ca *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifndef PIC32MX_H
27 #define PIC32MX_H
29 struct pic32mx_flash_bank
31 struct working_area *write_algorithm;
32 int probed;
35 #define PIC32MX_MANUF_ID 0x029
37 /* pic32mx memory locations */
39 #define PIC32MX_PHYS_RAM 0x00000000
40 #define PIC32MX_PHYS_PGM_FLASH 0x1D000000
41 #define PIC32MX_PHYS_PERIPHERALS 0x1F800000
42 #define PIC32MX_PHYS_BOOT_FLASH 0x1FC00000
45 * Translate Virtual and Physical addresses.
46 * Note: These macros only work for KSEG0/KSEG1 addresses.
49 #define Virt2Phys(v) ((v) & 0x1FFFFFFF)
51 /* pic32mx configuration register locations */
53 #define PIC32MX_DEVCFG0 0xBFC02FFC
54 #define PIC32MX_DEVCFG1 0xBFC02FF8
55 #define PIC32MX_DEVCFG2 0xBFC02FF4
56 #define PIC32MX_DEVCFG3 0xBFC02FF0
57 #define PIC32MX_DEVID 0xBF80F220
59 #define PIC32MX_BMXPFMSZ 0xBF882060
60 #define PIC32MX_BMXBOOTSZ 0xBF882070
61 #define PIC32MX_BMXDRMSZ 0xBF882040
63 /* pic32mx flash controller register locations */
65 #define PIC32MX_NVMCON 0xBF80F400
66 #define PIC32MX_NVMCONCLR 0xBF80F404
67 #define PIC32MX_NVMCONSET 0xBF80F408
68 #define PIC32MX_NVMCONINV 0xBF80F40C
69 #define NVMCON_NVMWR (1 << 15)
70 #define NVMCON_NVMWREN (1 << 14)
71 #define NVMCON_NVMERR (1 << 13)
72 #define NVMCON_LVDERR (1 << 12)
73 #define NVMCON_LVDSTAT (1 << 11)
74 #define NVMCON_OP_PFM_ERASE 0x5
75 #define NVMCON_OP_PAGE_ERASE 0x4
76 #define NVMCON_OP_ROW_PROG 0x3
77 #define NVMCON_OP_WORD_PROG 0x1
78 #define NVMCON_OP_NOP 0x0
80 #define PIC32MX_NVMKEY 0xBF80F410
81 #define PIC32MX_NVMADDR 0xBF80F420
82 #define PIC32MX_NVMADDRCLR 0xBF80F424
83 #define PIC32MX_NVMADDRSET 0xBF80F428
84 #define PIC32MX_NVMADDRINV 0xBF80F42C
85 #define PIC32MX_NVMDATA 0xBF80F430
86 #define PIC32MX_NVMSRCADDR 0xBF80F440
88 /* flash unlock keys */
90 #define NVMKEY1 0xAA996655
91 #define NVMKEY2 0x556699AA
93 #endif /* PIC32MX_H */