stellaris: avoid chip writes
[openocd/dave.git] / src / target / dsp563xx_once.h
blob871f62280c51bdacc7de6f3e85e0017bd8c68f43
1 /***************************************************************************
2 * Copyright (C) 2009 by Mathias Kuester *
3 * mkdorg@users.sourceforge.net *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef DSP563XX_ONCE_H
21 #define DSP563XX_ONCE_H
23 #include <jtag/jtag.h>
25 #define DSP563XX_ONCE_OCR_EX (1<<5)
26 #define DSP563XX_ONCE_OCR_GO (1<<6)
27 #define DSP563XX_ONCE_OCR_RW (1<<7)
29 #define DSP563XX_ONCE_OSCR_OS1 (1<<7)
30 #define DSP563XX_ONCE_OSCR_OS0 (1<<6)
31 #define DSP563XX_ONCE_OSCR_HIT (1<<5)
32 #define DSP563XX_ONCE_OSCR_TO (1<<4)
33 #define DSP563XX_ONCE_OSCR_MBO (1<<3)
34 #define DSP563XX_ONCE_OSCR_SWO (1<<2)
35 #define DSP563XX_ONCE_OSCR_IME (1<<1)
36 #define DSP563XX_ONCE_OSCR_TME (1<<0)
38 #define DSP563XX_ONCE_OSCR_NORMAL_M (0)
39 #define DSP563XX_ONCE_OSCR_STOPWAIT_M (DSP563XX_ONCE_OSCR_OS0)
40 #define DSP563XX_ONCE_OSCR_BUSY_M (DSP563XX_ONCE_OSCR_OS1)
41 #define DSP563XX_ONCE_OSCR_DEBUG_M (DSP563XX_ONCE_OSCR_OS0|DSP563XX_ONCE_OSCR_OS1)
43 #define DSP563XX_ONCE_OSCR 0x000 /* status/ctrl reg. */
44 #define DSP563XX_ONCE_OMBC 0x001 /* memory breakp. reg. */
45 #define DSP563XX_ONCE_OBCR 0x002 /* breakp. ctrl reg */
46 #define DSP563XX_ONCE_OMLR0 0x005 /* memory limit reg */
47 #define DSP563XX_ONCE_OMLR1 0x006 /* memory limit reg */
48 #define DSP563XX_ONCE_OGDBR 0x009 /* gdb reg */
49 #define DSP563XX_ONCE_OPDBR 0x00A /* pdb reg */
50 #define DSP563XX_ONCE_OPILR 0x00B /* pil reg */
51 #define DSP563XX_ONCE_PDBGOTO 0x00C /* pdb to go reg */
52 #define DSP563XX_ONCE_OTC 0x00D /* trace cnt */
53 #define DSP563XX_ONCE_TAGB 0x00E /* tags buffer */
54 #define DSP563XX_ONCE_OPABFR 0x00F /* pab fetch reg */
55 #define DSP563XX_ONCE_OPABDR 0x010 /* pab decode reg */
56 #define DSP563XX_ONCE_OPABEX 0x011 /* pab exec reg */
57 #define DSP563XX_ONCE_OPABEX 0x011 /* trace buffer/inc ptr */
58 #define DSP563XX_ONCE_NOREG 0x01F /* no register selected */
60 /** single word instruction */
61 int dsp563xx_once_ir_exec(struct jtag_tap *tap, uint8_t instr, uint8_t rw,
62 uint8_t go, uint8_t ex);
63 /** single word instruction */
64 int dsp563xx_once_ir_exec_nq(struct jtag_tap *tap, uint8_t instr, uint8_t rw,
65 uint8_t go, uint8_t ex);
66 /** once read register */
67 int dsp563xx_once_reg_read(struct jtag_tap *tap, uint8_t reg, uint32_t * data);
68 /** once write register */
69 int dsp563xx_once_reg_write(struct jtag_tap *tap, uint8_t reg, uint32_t data);
70 /** single word instruction */
71 int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, uint32_t opcode);
72 /** double word instruction */
73 int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, uint32_t opcode,
74 uint32_t operand);
75 /** single word instruction */
76 int dsp563xx_once_execute_sw_ir_nq(struct jtag_tap *tap, uint32_t opcode);
77 /** double word instruction */
78 int dsp563xx_once_execute_dw_ir_nq(struct jtag_tap *tap, uint32_t opcode,
79 uint32_t operand);
81 #endif /* DSP563XX_ONCE_H */