flash: erase_address now has an unlock option
[openocd/cortex.git] / src / target / xscale.h
blob82f4e379a63e485e06bbca2c82d3782774505f8c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2007,2008 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifndef XSCALE_H
24 #define XSCALE_H
26 #include "arm.h"
27 #include "armv4_5_mmu.h"
28 #include "trace.h"
30 #define XSCALE_COMMON_MAGIC 0x58534341
32 /* These four JTAG instructions are architecturally defined.
33 * Lengths are core-specific; originally 5 bits, later 7.
35 #define XSCALE_DBGRX 0x02
36 #define XSCALE_DBGTX 0x10
37 #define XSCALE_LDIC 0x07
38 #define XSCALE_SELDCSR 0x09
40 /* Possible CPU types */
41 #define XSCALE_IXP4XX_PXA2XX 0x0
42 #define XSCALE_PXA3XX 0x4
44 enum xscale_debug_reason
46 XSCALE_DBG_REASON_GENERIC,
47 XSCALE_DBG_REASON_RESET,
48 XSCALE_DBG_REASON_TB_FULL,
51 enum xscale_trace_entry_type
53 XSCALE_TRACE_MESSAGE = 0x0,
54 XSCALE_TRACE_ADDRESS = 0x1,
57 struct xscale_trace_entry
59 uint8_t data;
60 enum xscale_trace_entry_type type;
63 struct xscale_trace_data
65 struct xscale_trace_entry *entries;
66 int depth;
67 uint32_t chkpt0;
68 uint32_t chkpt1;
69 uint32_t last_instruction;
70 unsigned int num_checkpoints;
71 struct xscale_trace_data *next;
74 struct xscale_trace
76 trace_status_t capture_status; /* current state of capture run */
77 struct image *image; /* source for target opcodes */
78 struct xscale_trace_data *data; /* linked list of collected trace data */
79 int buffer_enabled; /* whether trace buffer is enabled */
80 int buffer_fill; /* maximum number of trace runs to read (-1 for wrap-around) */
81 enum arm_state core_state; /* current core state (ARM, Thumb) */
84 struct xscale_common
86 /* armv4/5 common stuff */
87 struct arm armv4_5_common;
89 int common_magic;
91 /* XScale registers (CP15, DBG) */
92 struct reg_cache *reg_cache;
94 /* current state of the debug handler */
95 uint32_t handler_address;
97 /* target-endian buffers with exception vectors */
98 uint32_t low_vectors[8];
99 uint32_t high_vectors[8];
101 /* static low vectors */
102 uint8_t static_low_vectors_set; /* bit field with static vectors set by the user */
103 uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
104 uint32_t static_low_vectors[8];
105 uint32_t static_high_vectors[8];
107 /* DCache cleaning */
108 uint32_t cache_clean_address;
110 /* whether hold_rst and ext_dbg_break should be set */
111 int hold_rst;
112 int external_debug_break;
114 /* breakpoint / watchpoint handling */
115 int dbr_available;
116 int dbr0_used;
117 int dbr1_used;
118 int ibcr_available;
119 int ibcr0_used;
120 int ibcr1_used;
121 uint32_t arm_bkpt;
122 uint16_t thumb_bkpt;
124 uint8_t vector_catch;
126 struct xscale_trace trace;
128 int arch_debug_reason;
130 /* MMU/Caches */
131 struct armv4_5_mmu_common armv4_5_mmu;
132 uint32_t cp15_control_reg;
134 int fast_memory_access;
136 /* CPU variant */
137 int xscale_variant;
140 static inline struct xscale_common *
141 target_to_xscale(struct target *target)
143 return container_of(target->arch_info, struct xscale_common,
144 armv4_5_common);
147 struct xscale_reg
149 int dbg_handler_number;
150 struct target *target;
153 enum
155 XSCALE_MAINID, /* 0 */
156 XSCALE_CACHETYPE,
157 XSCALE_CTRL,
158 XSCALE_AUXCTRL,
159 XSCALE_TTB,
160 XSCALE_DAC,
161 XSCALE_FSR,
162 XSCALE_FAR,
163 XSCALE_PID,
164 XSCALE_CPACCESS,
165 XSCALE_IBCR0, /* 10 */
166 XSCALE_IBCR1,
167 XSCALE_DBR0,
168 XSCALE_DBR1,
169 XSCALE_DBCON,
170 XSCALE_TBREG,
171 XSCALE_CHKPT0,
172 XSCALE_CHKPT1,
173 XSCALE_DCSR,
174 XSCALE_TX,
175 XSCALE_RX, /* 20 */
176 XSCALE_TXRXCTRL,
179 #define ERROR_XSCALE_NO_TRACE_DATA (-1500)
181 #endif /* XSCALE_H */