4 reset_config trst_and_srst srst_gates_jtag
6 if { [info exists CHIPNAME] } {
7 set _CHIPNAME $CHIPNAME
12 if { [info exists ENDIAN] } {
18 if { [info exists CPUTAPID ] } {
19 set _CPUTAPID $CPUTAPID
21 set _CPUTAPID 0x07b3601d
24 if { [info exists SDMATAPID ] } {
25 set _SDMATAPID $SDMATAPID
27 set _SDMATAPID 0x0882601d
30 if { [info exists ETBTAPID ] } {
31 set _ETBTAPID $ETBTAPID
33 set _ETBTAPID 0x2b900f0f
36 #========================================
38 jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
39 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
41 # No IDCODE for this TAP
42 jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected-id 0x0
44 jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
46 set _TARGETNAME $_CHIPNAME.cpu
47 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
49 proc power_restore {} { puts "Sensed power restore. No action." }
50 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
52 # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
53 etm config $_TARGETNAME 16 normal full etb
54 etb config $_TARGETNAME $_CHIPNAME.etb