target/armv7m: prevent storing invalid register
commitbced97cce95a31987f18674bb022e6d263b4f29c
authorTomas Vanek <vanekt@fbl.cz>
Sun, 2 Oct 2022 07:30:50 +0000 (2 09:30 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 8 Oct 2022 07:46:16 +0000 (8 07:46 +0000)
tree53ec57b44fc247570eca244f9f9ba243a6e96f31
parentdce9a03cb2c50ef6c3f084c7d13325369559ebce
target/armv7m: prevent storing invalid register

armv7m_start_algorithm() stored all non-debug execution
registers from register cache without checking validity.

Check if the register cache is valid.
Try to read from CPU if not valid.
Issue a warning if register read fails.

Change-Id: I365f86d65243230cf521b13909575e5986a87a50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7240
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
src/target/armv7m.c