1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /***************************************************************************
4 * Copyright (C) 2022 by Daniel Anselmi *
6 ***************************************************************************/
12 #include <jtag/jtag.h>
13 #include <jtag/adapter.h>
14 #include <helper/system.h>
15 #include <helper/log.h>
33 struct intel_pld_device
{
35 unsigned int boundary_scan_length
;
37 enum intel_family_e family
;
40 struct intel_device_parameters_elem
{
42 unsigned int boundary_scan_length
;
44 enum intel_family_e family
;
47 static const struct intel_device_parameters_elem intel_device_parameters
[] = {
48 {0x020f10dd, 603, 226, INTEL_CYCLONEIII
}, /* EP3C5 EP3C10 */
49 {0x020f20dd, 1080, 409, INTEL_CYCLONEIII
}, /* EP3C16 */
50 {0x020f30dd, 732, 286, INTEL_CYCLONEIII
}, /* EP3C25 */
51 {0x020f40dd, 1632, 604, INTEL_CYCLONEIII
}, /* EP3C40 */
52 {0x020f50dd, 1164, 442, INTEL_CYCLONEIII
}, /* EP3C55 */
53 {0x020f60dd, 1314, 502, INTEL_CYCLONEIII
}, /* EP3C80 */
54 {0x020f70dd, 1620, 613, INTEL_CYCLONEIII
}, /* EP3C120*/
55 {0x027010dd, 1314, 226, INTEL_CYCLONEIII
}, /* EP3CLS70 */
56 {0x027000dd, 1314, 226, INTEL_CYCLONEIII
}, /* EP3CLS100 */
57 {0x027030dd, 1314, 409, INTEL_CYCLONEIII
}, /* EP3CLS150 */
58 {0x027020dd, 1314, 409, INTEL_CYCLONEIII
}, /* EP3CLS200 */
60 {0x020f10dd, 603, 226, INTEL_CYCLONEIV
}, /* EP4CE6 EP4CE10 */
61 {0x020f20dd, 1080, 409, INTEL_CYCLONEIV
}, /* EP4CE15 */
62 {0x020f30dd, 732, 286, INTEL_CYCLONEIV
}, /* EP4CE22 */
63 {0x020f40dd, 1632, 604, INTEL_CYCLONEIV
}, /* EP4CE30 EP4CE40 */
64 {0x020f50dd, 1164, 442, INTEL_CYCLONEIV
}, /* EP4CE55 */
65 {0x020f60dd, 1314, 502, INTEL_CYCLONEIV
}, /* EP4CE75 */
66 {0x020f70dd, 1620, 613, INTEL_CYCLONEIV
}, /* EP4CE115 */
67 {0x028010dd, 260, 229, INTEL_CYCLONEIV
}, /* EP4CGX15 */
68 {0x028120dd, 494, 463, INTEL_CYCLONEIV
}, /* EP4CGX22 */
69 {0x028020dd, 494, 463, INTEL_CYCLONEIV
}, /* EP4CGX30 */
70 {0x028230dd, 1006, 943, INTEL_CYCLONEIV
}, /* EP4CGX30 */
71 {0x028130dd, 1006, 943, INTEL_CYCLONEIV
}, /* EP4CGX50 */
72 {0x028030dd, 1006, 943, INTEL_CYCLONEIV
}, /* EP4CGX75 */
73 {0x028140dd, 1495, 1438, INTEL_CYCLONEIV
}, /* EP4CGX110 */
74 {0x028040dd, 1495, 1438, INTEL_CYCLONEIV
}, /* EP4CGX150 */
76 {0x02b150dd, 864, 163, INTEL_CYCLONEV
}, /* 5CEBA2F23 5CEBA2F17 5CEFA2M13 5CEFA2F23 5CEBA2U15 5CEFA2U19 5CEBA2U19 */
77 {0x02d020dd, 1485, 19, INTEL_CYCLONEV
}, /* 5CSXFC6D6F31 5CSTFD6D5F31 5CSEBA6U23 5CSEMA6U23 5CSEBA6U19 5CSEBA6U23
78 5CSEBA6U19 5CSEMA6F31 5CSXFC6C6U23 */
79 {0x02b040dd, 1728, -1, INTEL_CYCLONEV
}, /* 5CGXFC9EF35 5CGXBC9AU19 5CGXBC9CF23 5CGTFD9CF23 5CGXFC9AU19 5CGXFC9CF23
80 5CGXFC9EF31 5CGXFC9DF27 5CGXBC9DF27 5CGXBC9EF31 5CGTFD9EF31 5CGTFD9EF35
81 5CGTFD9AU19 5CGXBC9EF35 5CGTFD9DF27 */
82 {0x02b050dd, 864, 163, INTEL_CYCLONEV
}, /* 5CEFA4U19 5CEFA4F23 5CEFA4M13 5CEBA4F17 5CEBA4U15 5CEBA4U19 5CEBA4F23 */
83 {0x02b030dd, 1488, 19, INTEL_CYCLONEV
}, /* 5CGXBC7CU19 5CGTFD7CU19 5CGTFD7DF27 5CGXFC7BM15 5CGXFC7DF27 5CGXFC7DF31
84 5CGTFD7CF23 5CGXBC7CF23 5CGXBC7DF31 5CGTFD7BM15 5CGXFC7CU19 5CGTFD7DF31
85 5CGXBC7BM15 5CGXFC7CF23 5CGXBC7DF27 */
86 {0x02d120dd, 1485, -1, INTEL_CYCLONEV
}, /* 5CSEBA5U23 5CSEBA5U23 5CSTFD5D5F31 5CSEBA5U19 5CSXFC5D6F31 5CSEMA5U23
87 5CSEMA5F31 5CSXFC5C6U23 5CSEBA5U19 */
88 {0x02b220dd, 1104, 19, INTEL_CYCLONEV
}, /* 5CEBA5U19 5CEFA5U19 5CEFA5M13 5CEBA5F23 5CEFA5F23 */
89 {0x02b020dd, 1104, 19, INTEL_CYCLONEV
}, /* 5CGXBC5CU19 5CGXFC5F6M11 5CGXFC5CM13 5CGTFD5CF23 5CGXBC5CF23 5CGTFD5CF27
90 5CGTFD5F5M11 5CGXFC5CF27 5CGXFC5CU19 5CGTFD5CM13 5CGXFC5CF23 5CGXBC5CF27
92 {0x02d010dd, 1197, -1, INTEL_CYCLONEV
}, /* 5CSEBA4U23 5CSXFC4C6U23 5CSEMA4U23 5CSEBA4U23 5CSEBA4U19 5CSEBA4U19
94 {0x02b120dd, 1104, 19, INTEL_CYCLONEV
}, /* 5CGXFC4CM13 5CGXFC4CU19 5CGXFC4F6M11 5CGXBC4CU19 5CGXFC4CF27 5CGXBC4CF23
95 5CGXBC4CF27 5CGXFC4CF23 */
96 {0x02b140dd, 1728, -1, INTEL_CYCLONEV
}, /* 5CEFA9F31 5CEBA9F31 5CEFA9F27 5CEBA9U19 5CEBA9F27 5CEFA9U19 5CEBA9F23
98 {0x02b010dd, 720, 19, INTEL_CYCLONEV
}, /* 5CGXFC3U15 5CGXBC3U15 5CGXFC3F23 5CGXFC3U19 5CGXBC3U19 5CGXBC3F23 */
99 {0x02b130dd, 1488, 19, INTEL_CYCLONEV
}, /* 5CEFA7F31 5CEBA7F27 5CEBA7M15 5CEFA7U19 5CEBA7F23 5CEFA7F23 5CEFA7F27
100 5CEFA7M15 5CEBA7U19 5CEBA7F31 */
101 {0x02d110dd, 1197, -1, INTEL_CYCLONEV
}, /* 5CSEBA2U23 5CSEMA2U23 5CSEBA2U23 5CSEBA2U19 5CSEBA2U19 */
103 {0x020f10dd, 603, 226, INTEL_CYCLONE10
}, /* 10CL006E144 10CL006U256 10CL010M164 10CL010U256 10CL010E144 */
104 {0x020f20dd, 1080, 409, INTEL_CYCLONE10
}, /* 10CL016U256 10CL016E144 10CL016U484 10CL016F484 10CL016M164 */
105 {0x020f30dd, 732, 286, INTEL_CYCLONE10
}, /* 10CL025U256 10CL025E144 */
106 {0x020f40dd, 1632, 604, INTEL_CYCLONE10
}, /* 10CL040F484 10CL040U484 */
107 {0x020f50dd, 1164, 442, INTEL_CYCLONE10
}, /* 10CL055F484 10CL055U484 */
108 {0x020f60dd, 1314, 502, INTEL_CYCLONE10
}, /* 10CL080F484 10CL080F780 10CL080U484 */
109 {0x020f70dd, 1620, 613, INTEL_CYCLONE10
}, /* 10CL120F484 10CL120F780 */
111 {0x02e120dd, 1339, -1, INTEL_CYCLONE10
}, /* 10CX085U484 10CX085F672 */
112 {0x02e320dd, 1339, -1, INTEL_CYCLONE10
}, /* 10CX105F780 10CX105U484 10CX105F672 */
113 {0x02e720dd, 1339, -1, INTEL_CYCLONE10
}, /* 10CX150F672 10CX150F780 10CX150U484 */
114 {0x02ef20dd, 1339, -1, INTEL_CYCLONE10
}, /* 10CX220F672 10CX220F780 10CX220U484 */
116 {0x025120dd, 1227, 1174, INTEL_ARRIAII
}, /* EP2AGX45 */
117 {0x025020dd, 1227, -1, INTEL_ARRIAII
}, /* EP2AGX65 */
118 {0x025130dd, 1467, -1, INTEL_ARRIAII
}, /* EP2AGX95 */
119 {0x025030dd, 1467, -1, INTEL_ARRIAII
}, /* EP2AGX125 */
120 {0x025140dd, 1971, -1, INTEL_ARRIAII
}, /* EP2AGX190 */
121 {0x025040dd, 1971, -1, INTEL_ARRIAII
}, /* EP2AGX260 */
122 {0x024810dd, 2274, -1, INTEL_ARRIAII
}, /* EP2AGZ225 */
123 {0x0240a0dd, 2682, -1, INTEL_ARRIAII
}, /* EP2AGZ300 */
124 {0x024820dd, 2682, -1, INTEL_ARRIAII
}, /* EP2AGZ350 */
127 static int intel_fill_device_parameters(struct intel_pld_device
*intel_info
)
129 for (size_t i
= 0; i
< ARRAY_SIZE(intel_device_parameters
); ++i
) {
130 if (intel_device_parameters
[i
].id
== intel_info
->tap
->idcode
&&
131 intel_info
->family
== intel_device_parameters
[i
].family
) {
132 if (intel_info
->boundary_scan_length
== 0)
133 intel_info
->boundary_scan_length
= intel_device_parameters
[i
].boundary_scan_length
;
135 if (intel_info
->checkpos
== -1)
136 intel_info
->checkpos
= intel_device_parameters
[i
].checkpos
;
145 static int intel_check_for_unique_id(struct intel_pld_device
*intel_info
)
148 for (size_t i
= 0; i
< ARRAY_SIZE(intel_device_parameters
); ++i
) {
149 if (intel_device_parameters
[i
].id
== intel_info
->tap
->idcode
) {
151 intel_info
->family
= intel_device_parameters
[i
].family
;
155 return (found
== 1) ? ERROR_OK
: ERROR_FAIL
;
158 static int intel_check_config(struct intel_pld_device
*intel_info
)
160 if (!intel_info
->tap
->has_idcode
) {
161 LOG_ERROR("no IDCODE");
165 if (intel_info
->family
== INTEL_UNKNOWN
) {
166 if (intel_check_for_unique_id(intel_info
) != ERROR_OK
) {
167 LOG_ERROR("id is ambiguous, please specify family");
172 if (intel_info
->boundary_scan_length
== 0 || intel_info
->checkpos
== -1) {
173 int ret
= intel_fill_device_parameters(intel_info
);
178 if (intel_info
->checkpos
>= 0 && (unsigned int)intel_info
->checkpos
>= intel_info
->boundary_scan_length
) {
179 LOG_ERROR("checkpos has to be smaller than scan length %d < %u",
180 intel_info
->checkpos
, intel_info
->boundary_scan_length
);
187 static int intel_read_file(struct raw_bit_file
*bit_file
, const char *filename
)
189 if (!filename
|| !bit_file
)
190 return ERROR_COMMAND_SYNTAX_ERROR
;
192 /* check if binary .bin or ascii .bit/.hex */
193 const char *file_ending_pos
= strrchr(filename
, '.');
194 if (!file_ending_pos
) {
195 LOG_ERROR("Unable to detect filename suffix");
196 return ERROR_PLD_FILE_LOAD_FAILED
;
199 if (strcasecmp(file_ending_pos
, ".rbf") == 0)
200 return cpld_read_raw_bit_file(bit_file
, filename
);
202 LOG_ERROR("Unable to detect filetype");
203 return ERROR_PLD_FILE_LOAD_FAILED
;
206 static int intel_set_instr(struct jtag_tap
*tap
, uint16_t new_instr
)
208 struct scan_field field
;
209 field
.num_bits
= tap
->ir_length
;
210 void *t
= calloc(DIV_ROUND_UP(field
.num_bits
, 8), 1);
212 LOG_ERROR("Out of memory");
216 buf_set_u32(t
, 0, field
.num_bits
, new_instr
);
217 field
.in_value
= NULL
;
218 jtag_add_ir_scan(tap
, &field
, TAP_IDLE
);
224 static int intel_load(struct pld_device
*pld_device
, const char *filename
)
226 unsigned int speed
= adapter_get_speed_khz();
230 unsigned int cycles
= DIV_ROUND_UP(speed
, 200);
234 if (!pld_device
|| !pld_device
->driver_priv
)
237 struct intel_pld_device
*intel_info
= pld_device
->driver_priv
;
238 if (!intel_info
|| !intel_info
->tap
)
240 struct jtag_tap
*tap
= intel_info
->tap
;
242 int retval
= intel_check_config(intel_info
);
243 if (retval
!= ERROR_OK
)
246 struct raw_bit_file bit_file
;
247 retval
= intel_read_file(&bit_file
, filename
);
248 if (retval
!= ERROR_OK
)
251 if (retval
!= ERROR_OK
)
254 retval
= intel_set_instr(tap
, 0x002);
255 if (retval
!= ERROR_OK
) {
259 jtag_add_runtest(speed
, TAP_IDLE
);
260 retval
= jtag_execute_queue();
261 if (retval
!= ERROR_OK
) {
266 /* shift in the bitstream */
267 struct scan_field field
;
268 field
.num_bits
= bit_file
.length
* 8;
269 field
.out_value
= bit_file
.data
;
270 field
.in_value
= NULL
;
272 jtag_add_dr_scan(tap
, 1, &field
, TAP_DRPAUSE
);
273 retval
= jtag_execute_queue();
275 if (retval
!= ERROR_OK
)
278 retval
= intel_set_instr(tap
, 0x004);
279 if (retval
!= ERROR_OK
)
281 jtag_add_runtest(cycles
, TAP_IDLE
);
282 retval
= jtag_execute_queue();
283 if (retval
!= ERROR_OK
)
286 if (intel_info
->boundary_scan_length
!= 0) {
287 uint8_t *buf
= calloc(DIV_ROUND_UP(intel_info
->boundary_scan_length
, 8), 1);
289 LOG_ERROR("Out of memory");
293 field
.num_bits
= intel_info
->boundary_scan_length
;
294 field
.out_value
= buf
;
295 field
.in_value
= buf
;
296 jtag_add_dr_scan(tap
, 1, &field
, TAP_DRPAUSE
);
297 retval
= jtag_execute_queue();
298 if (retval
!= ERROR_OK
) {
303 if (intel_info
->checkpos
!= -1)
304 retval
= ((buf
[intel_info
->checkpos
/ 8] & (1 << (intel_info
->checkpos
% 8)))) ?
305 ERROR_OK
: ERROR_FAIL
;
307 if (retval
!= ERROR_OK
) {
308 LOG_ERROR("Check failed");
313 retval
= intel_set_instr(tap
, 0x003);
314 if (retval
!= ERROR_OK
)
316 switch (intel_info
->family
) {
317 case INTEL_CYCLONEIII
:
318 case INTEL_CYCLONEIV
:
319 jtag_add_runtest(5 * speed
+ 512, TAP_IDLE
);
322 jtag_add_runtest(5 * speed
+ 512, TAP_IDLE
);
324 case INTEL_CYCLONE10
:
325 jtag_add_runtest(DIV_ROUND_UP(512ul * speed
, 125ul) + 512, TAP_IDLE
);
328 jtag_add_runtest(DIV_ROUND_UP(64ul * speed
, 125ul) + 512, TAP_IDLE
);
331 LOG_ERROR("unknown family");
335 retval
= intel_set_instr(tap
, BYPASS
);
336 if (retval
!= ERROR_OK
)
338 jtag_add_runtest(speed
, TAP_IDLE
);
339 return jtag_execute_queue();
342 static int intel_get_ipdbg_hub(int user_num
, struct pld_device
*pld_device
, struct pld_ipdbg_hub
*hub
)
347 struct intel_pld_device
*pld_device_info
= pld_device
->driver_priv
;
349 if (!pld_device_info
|| !pld_device_info
->tap
)
352 hub
->tap
= pld_device_info
->tap
;
355 hub
->user_ir_code
= USER0
;
356 } else if (user_num
== 1) {
357 hub
->user_ir_code
= USER1
;
359 LOG_ERROR("intel devices only have user register 0 & 1");
365 static int intel_get_jtagspi_userircode(struct pld_device
*pld_device
, unsigned int *ir
)
371 COMMAND_HANDLER(intel_set_bscan_command_handler
)
373 unsigned int boundary_scan_length
;
376 return ERROR_COMMAND_SYNTAX_ERROR
;
378 struct pld_device
*pld_device
= get_pld_device_by_name_or_numstr(CMD_ARGV
[0]);
380 command_print(CMD
, "pld device '#%s' is out of bounds or unknown", CMD_ARGV
[0]);
384 COMMAND_PARSE_NUMBER(uint
, CMD_ARGV
[1], boundary_scan_length
);
386 struct intel_pld_device
*intel_info
= pld_device
->driver_priv
;
391 intel_info
->boundary_scan_length
= boundary_scan_length
;
396 COMMAND_HANDLER(intel_set_check_pos_command_handler
)
401 return ERROR_COMMAND_SYNTAX_ERROR
;
403 struct pld_device
*pld_device
= get_pld_device_by_name_or_numstr(CMD_ARGV
[0]);
405 command_print(CMD
, "pld device '#%s' is out of bounds or unknown", CMD_ARGV
[0]);
409 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], checkpos
);
411 struct intel_pld_device
*intel_info
= pld_device
->driver_priv
;
416 intel_info
->checkpos
= checkpos
;
421 PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command
)
423 if (CMD_ARGC
!= 4 && CMD_ARGC
!= 6)
424 return ERROR_COMMAND_SYNTAX_ERROR
;
426 if (strcmp(CMD_ARGV
[2], "-chain-position") != 0)
427 return ERROR_COMMAND_SYNTAX_ERROR
;
429 struct jtag_tap
*tap
= jtag_tap_by_string(CMD_ARGV
[3]);
431 command_print(CMD
, "Tap: %s does not exist", CMD_ARGV
[3]);
435 enum intel_family_e family
= INTEL_UNKNOWN
;
437 if (strcmp(CMD_ARGV
[4], "-family") != 0)
438 return ERROR_COMMAND_SYNTAX_ERROR
;
440 if (strcmp(CMD_ARGV
[5], "cycloneiii") == 0) {
441 family
= INTEL_CYCLONEIII
;
442 } else if (strcmp(CMD_ARGV
[5], "cycloneiv") == 0) {
443 family
= INTEL_CYCLONEIV
;
444 } else if (strcmp(CMD_ARGV
[5], "cyclonev") == 0) {
445 family
= INTEL_CYCLONEV
;
446 } else if (strcmp(CMD_ARGV
[5], "cyclone10") == 0) {
447 family
= INTEL_CYCLONE10
;
448 } else if (strcmp(CMD_ARGV
[5], "arriaii") == 0) {
449 family
= INTEL_ARRIAII
;
451 command_print(CMD
, "unknown family");
456 struct intel_pld_device
*intel_info
= malloc(sizeof(struct intel_pld_device
));
458 LOG_ERROR("Out of memory");
462 intel_info
->tap
= tap
;
463 intel_info
->boundary_scan_length
= 0;
464 intel_info
->checkpos
= -1;
465 intel_info
->family
= family
;
467 pld
->driver_priv
= intel_info
;
472 static const struct command_registration intel_exec_command_handlers
[] = {
476 .handler
= intel_set_bscan_command_handler
,
477 .help
= "set boundary scan register length of FPGA",
478 .usage
= "pld_name len",
480 .name
= "set_check_pos",
482 .handler
= intel_set_check_pos_command_handler
,
483 .help
= "set check_pos of FPGA",
484 .usage
= "pld_name pos",
486 COMMAND_REGISTRATION_DONE
489 static const struct command_registration intel_command_handler
[] = {
493 .help
= "intel specific commands",
495 .chain
= intel_exec_command_handlers
,
497 COMMAND_REGISTRATION_DONE
500 struct pld_driver intel_pld
= {
502 .commands
= intel_command_handler
,
503 .pld_create_command
= &intel_pld_create_command
,
505 .get_ipdbg_hub
= intel_get_ipdbg_hub
,
506 .get_jtagspi_userircode
= intel_get_jtagspi_userircode
,