src/target/mips_cpu.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef OPENOCD_TARGET_MIPS_CPU_H
   3 #define OPENOCD_TARGET_MIPS_CPU_H
   4
   5 /*
   6  * NOTE: The proper detection of certain CPUs can become quite complicated.
   7  * Please consult the following Linux kernel code when adding new CPUs:
   8  *  arch/mips/include/asm/cpu.h
   9  *  arch/mips/kernel/cpu-probe.c
  10  */
  11
  12 /* Assigned Company values for bits 23:16 of the PRId register. */
  13 #define PRID_COMP_MASK          0xff0000
  14
  15 #define PRID_COMP_LEGACY        0x000000
  16 #define PRID_COMP_INGENIC_E1    0xe10000
  17
  18 /*
  19  * Assigned Processor ID (implementation) values for bits 15:8 of the PRId
  20  * register. In order to detect a certain CPU type exactly eventually additional
  21  * registers may need to be examined.
  22  */
  23 #define PRID_IMP_MASK           0xff00
  24
  25 #define PRID_IMP_XBURST_REV1    0x0200 /* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */
  26
  27 #endif /* OPENOCD_TARGET_MIPS_CPU_H */