flash/nor/stm32l4x: Remove redundant error messages
[openocd.git] / src / target / aarch64.h
blobb265e824983e4fa1d805ecd22d3ef3fc71134766
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2015 by David Ung *
5 ***************************************************************************/
7 #ifndef OPENOCD_TARGET_AARCH64_H
8 #define OPENOCD_TARGET_AARCH64_H
10 #include "armv8.h"
12 #define AARCH64_COMMON_MAGIC 0x41413634U
14 #define CPUDBG_CPUID 0xD00
15 #define CPUDBG_CTYPR 0xD04
16 #define CPUDBG_TTYPR 0xD0C
17 #define ID_AA64PFR0_EL1 0xD20
18 #define ID_AA64DFR0_EL1 0xD28
19 #define CPUDBG_LOCKACCESS 0xFB0
20 #define CPUDBG_LOCKSTATUS 0xFB4
22 #define BRP_NORMAL 0
23 #define BRP_CONTEXT 1
25 #define AARCH64_PADDRDBG_CPU_SHIFT 13
27 enum aarch64_isrmasking_mode {
28 AARCH64_ISRMASK_OFF,
29 AARCH64_ISRMASK_ON,
32 struct aarch64_brp {
33 int used;
34 int type;
35 target_addr_t value;
36 uint32_t control;
37 uint8_t brpn;
40 struct aarch64_common {
41 unsigned int common_magic;
43 struct armv8_common armv8_common;
45 /* Context information */
46 uint64_t system_control_reg;
47 uint64_t system_control_reg_curr;
49 /* Breakpoint register pairs */
50 int brp_num_context;
51 int brp_num;
52 int brp_num_available;
53 struct aarch64_brp *brp_list;
55 /* Watchpoint register pairs */
56 int wp_num;
57 int wp_num_available;
58 struct aarch64_brp *wp_list;
60 enum aarch64_isrmasking_mode isrmasking_mode;
63 static inline struct aarch64_common *
64 target_to_aarch64(struct target *target)
66 return container_of(target->arch_info, struct aarch64_common, armv8_common.arm);
69 #endif /* OPENOCD_TARGET_AARCH64_H */