- preserve cortex_m3 C_MASKINTS during resume/step
[openocd.git] / src / flash / stellaris.h
blob4ea1fe5aaf6d8f4e77be778312fb079cedd33670
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
3 * lundin@mlu.mine.nu *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef STELLARIS_FLASH_H
21 #define STELLARIS_FLASH_H
23 #include "flash.h"
24 #include "target.h"
26 typedef struct stellaris_flash_bank_s
28 /* chip id register */
29 u32 did0;
30 u32 did1;
31 u32 dc0;
32 u32 dc1;
34 char * target_name;
36 u32 sramsiz;
37 u32 flshsz;
38 /* flash geometry */
39 u32 num_pages;
40 u32 pagesize;
41 u32 pages_in_lockregion;
43 /* nv memory bits */
44 u16 num_lockbits;
45 u32 lockbits;
47 /* main clock status */
48 u32 rcc;
49 u8 mck_valid;
50 u32 mck_freq;
52 } stellaris_flash_bank_t;
54 /* STELLARIS control registers */
55 #define SCB_BASE 0x400FE000
56 #define DID0 0x000
57 #define DID1 0x004
58 #define DC0 0x008
59 #define DC1 0x010
60 #define DC2 0x014
61 #define DC3 0x018
62 #define DC4 0x01C
64 #define RIS 0x050
65 #define RCC 0x060
66 #define PLLCFG 0x064
68 #define FMPRE 0x130
69 #define FMPPE 0x134
70 #define USECRL 0x140
72 #define FLASH_CONTROL_BASE 0x400FD000
73 #define FLASH_FMA (FLASH_CONTROL_BASE|0x000)
74 #define FLASH_FMD (FLASH_CONTROL_BASE|0x004)
75 #define FLASH_FMC (FLASH_CONTROL_BASE|0x008)
76 #define FLASH_CRIS (FLASH_CONTROL_BASE|0x00C)
77 #define FLASH_CIM (FLASH_CONTROL_BASE|0x010)
78 #define FLASH_MISC (FLASH_CONTROL_BASE|0x014)
80 #define AMISC 1
81 #define PMISC 2
83 #define AMASK 1
84 #define PMASK 2
87 /* Flash Controller Command bits */
88 #define FMC_WRKEY (0xA442<<16)
89 #define FMC_COMT (1<<3)
90 #define FMC_MERASE (1<<2)
91 #define FMC_ERASE (1<<1)
92 #define FMC_WRITE (1<<0)
94 /* STELLARIS constants */
96 #endif /* STELLARIS_H */