src/target/nds32_aice.h

   1 /***************************************************************************
   2  *   Copyright (C) 2013 Andes technology.                                  *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20 #ifndef __NDS32_AICE_H__
  21 #define __NDS32_AICE_H__
  22
  23 #include <jtag/aice/aice_port.h>
  24
  25 int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
  26 int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
  27 int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
  28                 uint32_t *physical_address);
  29 int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
  30 int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times);
  31 int aice_program_edm(struct aice_port_s *aice, char *command_sequence);
  32 int aice_set_command_mode(struct aice_port_s *aice,
  33                 enum aice_command_mode command_mode);
  34 int aice_execute(struct aice_port_s *aice, uint32_t *instructions,
  35                 uint32_t instruction_num);
  36 int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script);
  37 int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script);
  38 int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script);
  39 int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check);
  40 int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
  41                 uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
  42
  43 static inline int aice_open(struct aice_port_s *aice, struct aice_port_param_s *param)
  44 {
  45         return aice->port->api->open(param);
  46 }
  47
  48 static inline int aice_close(struct aice_port_s *aice)
  49 {
  50         return aice->port->api->close();
  51 }
  52
  53 static inline int aice_reset(struct aice_port_s *aice)
  54 {
  55         return aice->port->api->reset();
  56 }
  57
  58 static inline int aice_assert_srst(struct aice_port_s *aice,
  59                 enum aice_srst_type_s srst)
  60 {
  61         return aice->port->api->assert_srst(aice->coreid, srst);
  62 }
  63
  64 static inline int aice_run(struct aice_port_s *aice)
  65 {
  66         return aice->port->api->run(aice->coreid);
  67 }
  68
  69 static inline int aice_halt(struct aice_port_s *aice)
  70 {
  71         return aice->port->api->halt(aice->coreid);
  72 }
  73
  74 static inline int aice_step(struct aice_port_s *aice)
  75 {
  76         return aice->port->api->step(aice->coreid);
  77 }
  78
  79 static inline int aice_read_register(struct aice_port_s *aice, uint32_t num,
  80                 uint32_t *val)
  81 {
  82         return aice->port->api->read_reg(aice->coreid, num, val);
  83 }
  84
  85 static inline int aice_write_register(struct aice_port_s *aice, uint32_t num,
  86                 uint32_t val)
  87 {
  88         return aice->port->api->write_reg(aice->coreid, num, val);
  89 }
  90
  91 static inline int aice_read_debug_reg(struct aice_port_s *aice, uint32_t addr,
  92                 uint32_t *val)
  93 {
  94         return aice->port->api->read_debug_reg(aice->coreid, addr, val);
  95 }
  96
  97 static inline int aice_write_debug_reg(struct aice_port_s *aice, uint32_t addr,
  98                 const uint32_t val)
  99 {
 100         return aice->port->api->write_debug_reg(aice->coreid, addr, val);
 101 }
 102
 103 static inline int aice_read_mem_unit(struct aice_port_s *aice, uint32_t addr,
 104                 uint32_t size, uint32_t count, uint8_t *buffer)
 105 {
 106         return aice->port->api->read_mem_unit(aice->coreid, addr, size, count, buffer);
 107 }
 108
 109 static inline int aice_write_mem_unit(struct aice_port_s *aice, uint32_t addr,
 110                 uint32_t size, uint32_t count, const uint8_t *buffer)
 111 {
 112         return aice->port->api->write_mem_unit(aice->coreid, addr, size, count, buffer);
 113 }
 114
 115 static inline int aice_read_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 116                 uint32_t length, uint8_t *buffer)
 117 {
 118         return aice->port->api->read_mem_bulk(aice->coreid, addr, length, buffer);
 119 }
 120
 121 static inline int aice_write_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 122                 uint32_t length, const uint8_t *buffer)
 123 {
 124         return aice->port->api->write_mem_bulk(aice->coreid, addr, length, buffer);
 125 }
 126
 127 static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
 128                 uint8_t *num_of_idcode)
 129 {
 130         return aice->port->api->idcode(idcode, num_of_idcode);
 131 }
 132
 133 static inline int aice_state(struct aice_port_s *aice,
 134                 enum aice_target_state_s *state)
 135 {
 136         return aice->port->api->state(aice->coreid, state);
 137 }
 138
 139 static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock)
 140 {
 141         return aice->port->api->set_jtag_clock(a_clock);
 142 }
 143
 144 static inline int aice_memory_access(struct aice_port_s *aice,
 145                 enum nds_memory_access a_access)
 146 {
 147         return aice->port->api->memory_access(aice->coreid, a_access);
 148 }
 149
 150 static inline int aice_memory_mode(struct aice_port_s *aice,
 151                 enum nds_memory_select mem_select)
 152 {
 153         return aice->port->api->memory_mode(aice->coreid, mem_select);
 154 }
 155
 156 static inline int aice_set_data_endian(struct aice_port_s *aice,
 157                 enum aice_target_endian target_data_endian)
 158 {
 159         return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
 160 }
 161
 162 #endif